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GESTURE BASED VEHICLE MOVEMENTS CONTROL AND
ALERTING SYSTEM
INDEX
CONTENTS
1. Abbreviations
2. Figure Locations
3. Introduction
4. Block Diagram
5. Block Diagram Description
6. Schematic
7. Schematic Description
8. Hardware Components
Micro controller
LCD Display
Power Supply
MEMS
Voice IC
L293D
9. Circuit Description
10. Software components
a. About Keil
b. Embedded ‘C’
11. Source Code
12. Conclusion (or) Synopsis
13. Future Aspects
14. Bibliography
ABBREVIATIONS
Symbol Name
ACC Accumulator
B B register
PSW Program status word
SP Stack pointer
DPTR Data pointer 2 bytes
DPL Low byte
DPH High byte
P0 Port0
P1 Port1
P2 Port2
P3 Port3
IP Interrupt priority control
IE Interrupt enable control
TMOD Timer/counter mode control
TCON Timer/counter control
T2CON Timer/counter 2 control
T2MOD Timer/counter mode2 control
TH0 Timer/counter 0high byte
TL0 Timer/counter 0 low byte
TH1 Timer/counter 1 high byte
TL1 Timer/counter 1 low byte
TH2 Timer/counter 2 high byte
TL2 Timer/counter 2 low byte
SCON Serial control
SBUF Serial data buffer
PCON Power control
Figure Locations
S.No. Figure Page No.
1Components of Typical Linear Power Supply
2 An Electrical Transformer3 Bridge Rectifier4 Bridge Rectifier Positive Cycle5 Bridge Rectifier Negative Cycle6 Three terminal voltage Regulator7 Functional Diagram of Microcontroller8 Pin Diagram of Microcontroller9 Oscillator connections10 External clock drive connections11 A register12 B register13 RAM14 RAM Allocation15 Register Banks16 PSW17 DPTR18 SP19 PORT 020 TL0 and TH021 DB922 Connecting Microcontroller to PC23 Types of SIM Structures24 Smart Card Pin-out25 Smart Card Reader26 LCD27 MAX 232 Pin-out28 MAX 232 Operating circuit29 MAX 232 Logic output30 Project 31 New Project32 Select Target device 33 Select device for Target34 Copy 8051 startup code35 Source group 136 New file37 Opened new file38 File Save
39 Add files to the source group40 Adding files to the source group41 Compilation42 After Compilation43 Build44 Selecting the Ports to be visualized45 Start Debugging
INTRODUCTION
EMBEDDED SYSTEM:
An embedded system is a special-purpose system in which the computer is completely
encapsulated by or dedicated to the device or system it controls. Unlike a general-purpose
computer, such as a personal computer, an embedded system performs one or a few predefined
tasks, usually with very specific requirements. Since the system is dedicated to specific tasks,
design engineers can optimize it, reducing the size and cost of the product. Embedded systems
are often mass-produced, benefiting from economies of scale.
Personal digital assistants (PDAs) or handheld computers are generally considered
embedded devices because of the nature of their hardware design, even though they are more
expandable in software terms. This line of definition continues to blur as devices expand. With
the introduction of the OQO Model 2 with the Windows XP operating system and ports such as a
USB port — both features usually belong to "general purpose computers", — the line of
nomenclature blurs even more.
Physically, embedded systems ranges from portable devices such as digital watches and
MP3 players, to large stationary installations like traffic lights, factory controllers, or the systems
controlling nuclear power plants.
In terms of complexity embedded systems can range from very simple with a single
microcontroller chip, to very complex with multiple units, peripherals and networks mounted
inside a large chassis or enclosure.
Examples of
Embedded Systems:
Avionics, such as inertial guidance systems, flight control hardware/software and other
integrated systems in aircraft and missiles
Cellular telephones and telephone switches
Engine controllers and antilock brake controllers for automobiles
Home automation products, such as thermostats, air conditioners, sprinklers, and security
monitoring systems
Handheld calculators
Handheld computers
Household appliances, including microwave ovens, washing machines, television sets,
DVD players and recorders
Medical equipment
Personal digital assistant
Videogame consoles
Computer peripherals such as routers and printers.
Industrial controllers for remote machine operation.
BLOCK DIAGRAM:
BLOCK DIAGRAM DESCRIPTION
Power Supply Section:
This section is meant for supplying Power to all the sections mentioned above. It
basically consists of a Transformer to step down the 230V ac to 9V ac followed by diodes. Here
diodes are used to rectify the ac to dc. After rectification the obtained rippled dc is filtered using
a capacitor Filter. A positive voltage regulator is used to regulate the obtained dc voltage.
Microcontroller Section:
This section forms the control unit of the whole project. This section basically consists
of a Microcontroller with its associated circuitry like Crystal with capacitors, Reset circuitry,
Pull up resistors (if needed) and so on. The Microcontroller forms the heart of the project
because it controls the devices being interfaced and communicates with the devices according to
the program being written.
Driver circuit:
L293d is to construct with transistors and Motor. It is used to rotate the device.
POWER SUPPLY
LCD
MEMS
MOTOR DRIVER
MOTORSMICRO
CONTROLLER UNIT(AT89S52)
VOICE IC
SPEAKER
MOTORS:
Motor is an output device; its speed will be varied according to the speed set by the
switches. The speed can be varied by varying the voltage given to the PWM converter (using
keypad). The speed of DC motor is directly proportional to armature voltage and inversely
proportional to flux. By maintaining the flux constant, the speed can be varied by varying the
armature voltage.
MEMS:
Accelerometers are acceleration sensors. An inertial mass suspended by springs is acted
upon by acceleration forces that cause the mass to be deflected from its initial position. This
deflection is converted to an electrical signal, which appears at the sensor output. The application
of MEMS technology to accelerometers is a relatively new development.
VOICE IC:
Here we can store or record our voice in the ic and we can play back that voice
LCD Display Section:
This section is basically meant to show up the status of the project. This project
makes use of Liquid Crystal Display to display / prompt for necessary information.
Hardware Components
Micro controller
LCD Display
Power Supply
MEMS
Voice IC
L293D
Hardware Components explanation:
AT89S52
8-bit Microcontroller with 8K Bytes
In-System Programmable Flash
Features
• Compatible with MCS-51® Products
• 8K Bytes of In-System Programmable (ISP) Flash Memory
– Endurance: 1000 Write/Erase Cycles
• 4.0V to 5.5V Operating Range
• Fully Static Operation: 0 Hz to 33 MHz
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Full Duplex UART Serial Channel
• Low-power Idle and Power-down Modes
• Interrupt Recovery from Power-down Mode
• Watchdog Timer
• Dual Data Pointer
• Power-off Flag
Description
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of
in-system programmable Flash memory. The device is manufactured using Atmel’s high-density
nonvolatile memory technology and is compatible with the industry- standard 80C51 instruction
set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or
by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-
system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful
microcontroller which provides a highly-flexible and cost-effective solution to many embedded
control applications. The AT89S52 provides the following standard features: 8K bytes of Flash,
256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters,
a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,
and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to
zero frequency and supports two software selectable power saving modes. The Idle Mode stops
the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue
functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling
all other chip functions until the next interrupt or hardware reset.
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight
TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.
Port 0 can also be configured to be the multiplexed low order address/data bus during accesses to
external program and data memory. In this mode, P0 has internal pullups. Port 0 also receives the
code bytes during Flash programming and outputs the code bytes during program verification.
External pullups are required during program verification.
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled
low will source current (IIL) because of the internal pullups. In addition, P1.0 and P1.1 can be
configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2
trigger input (P1.1/T2EX), respectively, as shown in the following table.
Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled
low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address
byte during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-
ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX
@ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the
high-order address bits and some control signals during Flash programming and verification.
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled
low will source current (IIL) because of the pullups. Port 3 also serves the functions of various
special features of the AT89S52, as shown in the following table. Port 3 also receives some
control signals for Flash programming and verification.
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the
device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO
bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit
DISRTO, the RESET HIGH out feature is enabled.
ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external
timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to
external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location
8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the
pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in
external execution mode.
PSEN
Program Store Enable (PSEN) is the read strobe to external program memory. When the
AT89S52 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external data
memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch code
from external program memory locations starting at 0000H up to FFFFH. Note, however, that if
lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC
for internal program executions. This pin also receives the 12-volt programming enable voltage
(VPP) during Flash programming.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Table 1. AT89S52 SFR Map and Reset Values
Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
Table 1.
Note that not all of the addresses are occupied, and unoccupied addresses may not be
implemented on the chip. Read accesses to these addresses will in general return random data,
and write accesses will have an indeterminate effect. User software should not write 1s to these
unlisted locations, since they may be used in future products to invoke new features. In that case,
the reset or inactive values of the new bits will always be 0.
Timer 2 Registers: Control and status bits are contained in registers T2CON (shown in Table 2)
and T2MOD (shown in Table 3) for Timer 2. The register pair (RCAP2H, RCAP2L) are the
Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can
be set for each of the six interrupt sources in the IP register.
Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two
banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-83H and
DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user
should always initialize the DPS bit to the appropriate value before accessing the respective Data
Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF
is set to “1” during power up. It can be set and rest under software control and is not affected by
reset.
Memory Organization
MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes
each of external Program and Data Memory can be addressed.
Program Memory
If the EA pin is connected to GND, all program fetches are directed to external memory. On the
AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are
directed to internal memory and fetches to addresses 2000H through FFFFH are to external
memory.
Data Memory
The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel
address space to the Special Function Registers. This means that the upper 128 bytes have the
same addresses as the SFR space but are physically separate from SFR space. When an
instruction accesses an internal location above
address 7FH, the address mode used in the instruction specifies whether the CPU accesses the
upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the
SFR space. For example, the following direct addressing instruction accesses the SFR at location
0A0H (which is P2).
MOV 0A0H, #data
Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the
following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at
address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data
RAM are available as stack space.
Watchdog Timer
(One-time Enabled with Reset-out)
The WDT is intended as a recovery method in situations where the CPU may be subjected to
software upsets. The WDT consists of a 13-bit counter and the Watchdog Timer Reset
(WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a
user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H).
When the WDT is enabled, it will increment every machine cycle while the oscillator is running.
The WDT timeout period is dependent on the external
clock frequency. There is no way to disable the WDT except through reset (either hardware reset
or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at
the RST pin.
Using the WDT
To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register
(SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH
and 0E1H to WDTRST to avoid a WDT overflow. The 13-bit counter overflows when it reaches
8191 (1FFFH), and this will reset the device. When the WDT is enabled, it will increment every
machine cycle while the oscillator is running. This means the user must reset the WDT at least
every 8191 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST.
WDTRST is a write-only register. The WDT counter cannot
be read or written. When WDT overflows, it will generate an output RESET pulse at the RST
pin. The RESET pulse duration is 96xTOSC, where TOSC=1/FOSC. To make the best use of the
WDT, it should be serviced in those sections of code that will periodically be executed within the
time required to prevent a WDT reset.
WDT During Power-down and Idle
In Power-down mode the oscillator stops, which means the WDT also stops. While in Power-
down mode, the user does not need to service the WDT. There are two methods of exiting
Power-down mode: by a hardware reset or via a level-activated external interrupt which is
enabled prior to entering Power-down mode. When Power-down is exited with hardware reset,
servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting
Power-down with an interrupt is significantly different. The
interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought
high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt
pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the
WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To
ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to
reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the
WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if
enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To
prevent the WDT from resetting the AT89S52 while in IDLE mode, the user
should always set up a timer that will periodically exit IDLE, service the WDT, and reenter
IDLE mode.
With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count
upon exit from IDLE.
UART
The UART in the AT89S52 operates the same way as the UART in the AT89C51 and
AT89C52..
Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the
AT89C51 and AT89C52
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type
of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three
operating modes: capture, auto-reload (up or down counting), and baud rate generator. The
modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists of two 8-bit
registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine
cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the
oscillator frequency.
In the Counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T2. In this function, the external input is sampled during S5P2
of every machine cycle. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. The new count value appears in the register during S3P1 of the cycle
following the one in which the transition was detected. Since two machine cycles (24 oscillator
periods) are required to recognize a 1-to-0 transition,
the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is
sampled at least
once before it changes, the level should be held for at least one full machine cycle.
Capture Mode
In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2
is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be
used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1- to-0
transition at external input T2EX also causes the current value in TH2 and TL2 to be captured
into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in
T2CON to be set. The EXF2 bit,
like TF2, can generate an interrupt. The capture mode is illustrated in Figure 5.
Auto-reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload
mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR
T2MOD (see Table 4). Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count
up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.
Figure 6 shows Timer 2 automatically counting up when DCEN=0. In this mode, two options are
selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets
the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the
16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and
RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an
overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit.
Both the TF2 and EXF2 bits can generate an interrupt if enabled.
Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 6. In this mode,
the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up.
The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit
value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2,
respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2
and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and
causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2
overflows or underflows and can be used as a 17th bit of resolution. In this operating mode,
EXF2 does not flag an interrupt.
Baud Rate Generator
Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON (Table
2). Note that the baud rates for transmit and receive can be different if Timer 2 is used for the
receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK
puts Timer 2 into its baud rate generator mode, as shown in Figure 8. The baud rate generator
mode is similar to the auto-reload
mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value
in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and
3 are determined by Timer 2’s overflow rate according to the following equation.
The Timer can be configured for either timer or counter operation. In most applications, it is
configured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it
is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12
the oscillator frequency). As a baud rate generator, however, it increments every state time (at
1/2 the oscillator frequency). The baud rate formula is given below.
where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned
integer.
Timer 2 as a baud rate generator is shown in Figure 8. This figure is valid only if RCLK or
TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an
interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not
cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud
rate generator, T2EX can be used as
an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud
rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions,
the Timer is
incremented every state time, and the results of a read or write may not be accurate. The RCAP2
registers may be read but should not be written to, because a write might overlap a reload and
cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the
Timer 2 or RCAP2 registers.
Programmable Clock Out
A 50% duty cycle clock can be programmed to come out on P1.0, as shown in Figure 9. This pin,
besides being a regular I/O pin, has two alternate functions. It can be programmed to input the
external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4
MHz at a 16 MHz operating frequency. To configure the Timer/Counter 2 as a clock generator,
bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2)
starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the
reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following
equation.
In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar
to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate
generator and a clock generator simultaneously. Note, however, that the baud-rate and clock-out
frequencies cannot be determined independently from one another since they both use RCAP2H
and RCAP2L.
Interrupts
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three
timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown
in Figure 10.
Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit
in Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once.
Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position
IE.5 is also unimplemented. User software should not write 1s to these bit positions, since they
may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits
TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the
service routine is vectored to. In fact, the service routine may have to determine whether it was
TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The
Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers
overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2
flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator, as shown in Figure 11. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an external clock source, XTAL2
should be left unconnected while XTAL1 is driven, as shown in Figure 12. There are no
requirements on the duty cycle of the external clock signal, since the input to the internal
clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high
and low time specifications must be observed.
Idle Mode
In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The
mode is invoked by software. The content of the on-chip RAM and all the special functions
registers remain unchanged during this mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware reset, the
device normally resumes program execution from where it left off, up to two machine cycles
before the internal reset algorithm takes control. On-chip hardware inhibits access to internal
RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an
unexpected write to a port pin when idle mode is terminated by a reset, the instruction following
the one that invokes idle mode should not write to a port pin or to external memory.
Power-down Mode
In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-down
is the last instruction executed. The on-chip RAM and Special Function Registers retain their
values until the Power-down mode is terminated. Exit from Power-down mode can be initiated
either by a hardware reset or by an enabled external interrupt. Reset redefines the SFRs but does
not change the on-chip RAM. The reset should not be activated before VCC is restored to its
normal operating level and must be held active long enough to allow the oscillator to restart and
stabilize.
Figure 11. Oscillator Connections
Program Memory Lock Bits
The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P)
to obtain the additional features listed in the following table.
When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset.
If the device is powered up without a reset, the latch initializes to a random value and holds that
value until reset is activated. The latched value of EA must agree with the current logic level at
that pin in order for the device to function properly.
Programming the Flash – Parallel Mode
The AT89S52 is shipped with the on-chip Flash memory array ready to be programmed. The
programming interface needs a high-voltage (12-volt) program enable signal and is compatible
with conventional third-party Flash or EPROM programmers. The AT89S52 code memory array
is programmed byte-bybyte.
Programming Algorithm: Before programming the AT89S52, the address, data, and control
signals should be set up according to the Flash programming mode table and Figures 13 and 14.
To program the AT89S52, take the following
steps:
1. Input the desired memory location on the address lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/VPP to 12V.
5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write
cycle is
self-timed and typically takes no more than 50 μs. Repeat steps 1 through 5, changing the
address
and data for the entire array or until the end of the object file is reached.
Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle.
During a write cycle, an attempted read of the last byte written will result in the complement of
the written data on P0.7. Once the write cycle has been completed, true data is valid on all
outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has
been initiated.
Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output
signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is
pulled high again when programming is done to indicate READY.
Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code
data can be read back via the address and data lines for verification. The status of the individual
lock bits can be verified directly by reading them back.
Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal
verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to a
logic low. The values returned are as follows.
(000H) = 1EH indicates manufactured by Atmel
(100H) = 52H indicates 89S52
(200H) = 06H
Chip Erase: In the parallel programming mode, a chip erase operation is initiated by using the
proper combination of control signals and by pulsing ALE/PROG low for a duration of 200 ns -
500 ns.
In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase
instruction. In this mode, chip erase is self-timed and takes about 500 ms. During chip erase, a
serial read from any address location will return 00H at the data output.
Programming the Flash – Serial Mode
The Code memory array can be programmed using the serial ISP interface while RST is pulled to
VCC. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After RST is
set high, the Programming Enable instruction needs to be executed first before other operations
can be executed. Before a reprogramming sequence can occur, a Chip Erase operation is
required. The Chip Erase operation turns the content of every memory location in the Code array
into FFH. Either an external system clock can be supplied at pin XTAL1 or a crystal needs to be
connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should
be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK
frequency is 2 MHz.
Serial Programming Algorithm
To program and verify the AT89S52 in the serial programming mode, the following sequence is
recommended:
1. Power-up sequence: Apply power between VCC and GND pins. Set RST pin to “H”.If a
crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to
XTAL1 pin and wait for at least 10 milliseconds.
2. Enable serial programming by sending the Programming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the
CPU clock at XTAL1 divided by 16.
3. The Code array is programmed one byte at a time by supplying the address and data together
with the
appropriate Write instruction. The write cycle is selftimed and typically takes less than 1 ms at
5V.
4. Any memory location can be verified by using the Read instruction which returns the content
at the
selected address at serial output MISO/P1.6.
5. At the end of a programming session, RST can be set low to commence normal device
operation.
Power-off sequence (if needed):
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
Turn VCC power off.
Data Polling: The Data Polling feature is also available in the serial mode. In this mode, during a
write cycle an attempted read of the last byte written will result in the complement of the MSB of
the serial output byte on MISO.
Serial Programming Instruction Set
The Instruction Set for Serial Programming follows a 4-byte protocol and is shown in Table 10.
Programming Interface – Parallel Mode
Every code byte in the Flash array can be programmed by using the appropriate combination of
control signals. The write operation cycle is self-timed and once initiated, will automatically time
itself to completion. All major programming vendors offer worldwide support for the Atmel
microcontroller series. Please contact your local programming vendor for the appropriate
software revision.
After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to
clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster
than 1/16 of the system clock at XTAL1. For Page Read/Write, the data always starts from byte
0 to 255. After the command byte and upper address byte are latched, each byte thereafter is
treated as data until all 256
bytes are shifted in/out. Then the next instruction will be ready to be decoded.
MEMS:
Introduction
Micro-Electro-Mechanical Systems (MEMS) is the integration of mechanical elements, sensors,
actuators, and electronics on a common silicon substrate through microfabrication technology.
While the electronics are fabricated using integrated circuit (IC) process sequences (e.g., CMOS,
Bipolar, or BICMOS processes), the micromechanical components are fabricated using
compatible "micromachining" processes that selectively etch away parts of the silicon wafer or
add new structural layers to form the mechanical and electromechanical devices.
MEMS promises to revolutionize nearly every product category by bringing together silicon-
based microelectronics with micromachining technology, making possible the realization of
complete systems-on-a-chip. MEMS is an enabling technology allowing the development of
smart products, augmenting the computational ability of microelectronics with the perception
and control capabilities of micro sensors and micro actuators and expanding the space of possible
designs and applications.
Microelectronic integrated circuits can be thought of as the "brains" of a system and MEMS
augments this decision-making capability with "eyes" and "arms", to allow Microsystems to
sense and control the environment. Sensors gather information from the environment through
measuring mechanical, thermal, biological, chemical, optical, and magnetic phenomena. The
electronics then process the information derived from the sensors and through some decision
making capability direct the actuators to respond by moving, positioning, regulating, pumping,
and filtering, thereby controlling the environment for some desired outcome or purpose. Because
MEMS devices are manufactured using batch fabrication techniques similar to those used for
integrated circuits, unprecedented levels of functionality, reliability, and sophistication can be
placed on a small silicon chip at a relatively low cost.
Microelectromechanical systems
A mite less than 1 mm on a MEMS device.
Microelectromechanical systems (MEMS) (also written as micro-electro-mechanical, or
MicroElectroMechanical) is the technology of the very small, and merges at the nano-scale into
The APR9600 device offers true single-chip voice recording, non-volatile storage, and
playback capability for 40 to 60 seconds. The device supports both random and sequential access
of multiple messages. Sample rates are user- selectable, allowing designers to customize their
design for unique quality and storage time needs. Integrated output amplifier, microphone
amplifier, and AGC circuits greatly simplify system design. the device is ideal for use in portable
voice recorders, toys, and many other consumer and industrial applications.
APLUS integrated achieves these high levels of storage capability by using its proprietary
analog/multilevel storage technology implemented in an advanced Flash non-volatile memory
process, where each memory cell can store 256 voltage levels. This technology enables the
APR9600 device to reproduce voice signals in their natural form. It eliminates the need for
encoding and compression, which often introduce distortion.
Fig 12: The APR9600 DIP & SOP
3 Functional Description:
APR9600 block diagram is included in order to describe the device's internal architecture. At the
left hand side of the diagram are the analog inputs. A differential microphone amplifier,
including integrated AGC, is included on-chip for applications requiring use. The amplified
microphone signals fed into the device by connecting the ANA_OUT pin to the ANA_IN pin
through an external DC blocking capacitor. Recording can be fed directly into the ANA_IN pin
through a DC blocking capacitor, however, the connection between ANA_IN andANA OUT is
still required for playback. The next block encountered by the input signal is the internal anti-
aliasing filter. The filter automatically adjusts its response According to the sampling frequency
selected so Shannon’s Sampling Theorem is satisfied. After anti-aliasing filtering is
accomplished the signal is ready to be clocked into the memory array. This storage is
accomplished through a combination of the Sample and Hold circuit and the Analog Write/Read
circuit. Either the Internal Oscillator or an external clock source clocks these circuits. When
playback is desired the previously stored recording is retrieved from memory, low pass filtered,
and amplified as shown on the right hand side of the diagram. The signal can be heard by
connecting a speaker to the SP+ and SP- pins. Chip-wide management is accomplished through
the device control block shown in the upper right hand corner. Message management is provided
through the message control block represented in the lower center of the block diagram. More
detail on actual device application can be found in the Sample Application section. More detail
on sampling control can be found in the Sample Rate and Voice Quality section. More detail on
Message management and device control can be found in the Message Management section.
Fig 13: APR9600 Block Diagram
3.1 Message Management:
3.1.1 Message Management General Description
Playback and record operations are managed by on-chip circuitry. There are several available
messaging modes depending upon desired operation. These message modes determine message
management style, message length, and external parts count. Therefore, the designer must select
the appropriate operating mode before beginning the design. Operating modes do not affect voice
quality; for information on factors affecting quality refer to the Sampling Rate & Voice Quality
section. The device supports five message management modes (defined by the MSEL1, MSEL2
and /M8_OPTION pins shown in Figures 1 and 2):
Random access mode with 2, 4, or 8 fixed-duration messages Tape mode, with multiple variable-
duration messages, provides two options:
- Auto rewind
- Normal
Modes cannot be mixed. Switching of modes after the device has recorded an initial message is
not recommended. If modes are switched after an initial recording has been made some
unpredictable message fragments from the previous mode may remain present, and be audible on
playback, in the new mode. These fragments will disappear after a Record operation in the newly
selected mode. Table 1 defines the decoding necessary to choose the desired mode. An important
feature of the APR9600 Message management capabilities is the ability to audibly prompt the
user to change in the device's status through the use of "beeps" superimposed on the device's
output. This feature is enabled by asserting a logic high level on the BE pin.
3.1.2 Random Access Mode
Random access mode supports 2, 4, or 8 Message segments of fixed duration. As suggested
recording or playback can be made randomly in any of the elected messages. The length of each
message segment is the total recording length available (as defined by the selected sampling rate)
divided by the total number of segments enabled (as decoded in Table1). Random access mode
provides easy indexing to message segments.
3.1.2A Functional Description of Recording in Random Access Mode
On power up, the device is ready to record or playback in any of the enabled message segments.
To record,/CE must be set low to enable the device and /RE must be set low to enable recording.
You initiate recording by applying a low level on the message trigger pin that represents the
message segment you intend to use. The message trigger pins are labeled /M1_MESSAGE -
/M8_OPTION on pins 1-9 (excluding pin 7) for message segments 1-8 respectively. Note:
Message trigger pins of M1_MESSAGE,/M2_NEXT, /M7_END, and /M8_OPTION, have
expanded names to represent the different functionality that these pins assume in the other
modes. In random access mode these pins should be considered purely message trigger pins with
the same functionality as /M3, /M4, /M5, and /M6. For a more thorough explanation of the
functionality of device pins in different modes please refer to the pin description table that
appears later in this document. When actual recording begins the device responds with a single
beep (if the BE pin is high to enable the beep tone) at the speaker outputs to indicate that it has
started recording. Recording continues as long as the message pin stays low. The rising edge of
the same message trigger pin during record stops the recording operation (indicated with a single
beep). If the message trigger pin is held low beyond the end of the maximum allocated duration,
recording stops automatically (indicated with two beeps), regardless of the state of the message
trigger pin. The chip then enters low-power mode until the message trigger pin returns high.
After the message trigger pin returns to high, the chip enters standby mode. Any subsequent high
to low transition on the same message trigger pin will initiate recording from the beginning of
the same message segment. The entire previous message is then overwritten by the new message,
regardless of the duration of the new message. Transitions on any other message trigger pin or
the /RE pin during the record operation are ignored until after the device enters standby mode.
3.1.2B Functional Description of Playback Random Access Mode
On power up, the device is ready to record or playback, in any of the enabled message segments.
To playback,/CE must be set low to enable the device and /RE must be set high to disable
recording & enable playback. You initiate playback by applying a high to low edge on the
message trigger pin that represents the message segment you intend to playback. Playback will
continue until the end of the message is reached. If a high to low edge occurs on the same
message trigger pin during playback, playback of the current message stops immediately. If a
different message trigger pin pulses during playback, playback of the current message stops
immediately (indicated by one beep) and playback of the new message segment begins. A delay
equal to 8,400 cycles of he sample clock will be encountered before the device starts playing the
new message. If a message trigger pin is held low, the selected message is played back
repeatedly as long as the trigger pin stays low. A period of silence, of a duration equal to 8,400
cycles of the sampling clock, will be inserted during looping as an indicator to the user of the
transition between the end and the beginning of the message.
3.1.3 Tape Mode:
Tape mode manages messages sequentially much like traditional cassette tape recorders. Within
tape mode two options exist, auto rewind and normal. Auto rewind mode configures the device
to automatically rewind to the beginning of the message immediately following recording or
playback of the message. In tape mode, using either option, messages must be recorded or played
back sequentially, much like a traditional cassette tape recorder.
3.1.3.1A Function Description of Recording in Tape Mode using the Auto Rewind Option
On power up, the device is ready to record or playback, starting at the first address in the
memory array. To record, /CE must be set low to enable the device and /RE must be set low to
enable recording. A falling edge of the /M1_MESSAGE pin initiates voice recording (indicated
by one beep).A subsequent rising edge of the /M1_MESSAGE pin during recording stops the
recording (also indicated by one beep). If the M1_MESSAGE pin is held low beyond the end of
the available memory, recording will stop automatically (indicated by two beeps). The device
will then assert a logic low on the /M7_END pin until the /M1 Message pin is released.
The device returns to standby mode when the /M1_MESSAGE pin goes high gain. After
recording is finished the device will automatically rewind to the beginning of the most recently
recorded message and wait for the next user input. The auto rewind function is convenient
because it allows the user to immediately playback and review the message without the need to
rewind. However, caution must be practiced because a subsequent record operation will
overwrite the last recorded message unless the user remembers to pulse the /M2_Next pin in
order to increment the device past the current message.
A subsequent falling edge on the /M1_Message pin starts a new record operation, overwriting
the previously existing message. You can preserve the previously recorded message by using
the /M2_Next input to advance to the next available message segment. To perform this function,
the /M2_NEXT pin must be pulled low for at least 400 cycles of the sample clock. The auto
rewind mode allows the user to record over the just recorded message simply by initiating a
record sequence without first toggling the /M2_NEXT pin.
To record over any other message however requires a different sequence. You must pulse the
/CE pin low once to rewind the device to the beginning of the voice memory. The /M2_NEXT
pin must then be pulsed low for the specified number of times to move to the start of the message
you wish to overwrite. Upon arriving at the desired message a record sequence can be initiated to
overwrite the previously recorded material. After you overwrite the message it becomes the last
available message and all previously recorded messages following this message become
inaccessible. If during a record operation all of the available memory is used, the device will stop
recording automatically,(double beep) and set the /M7_END pin low for a duration equal to 1600
cycles of the sample clock. Playback can be initiated on this last message, but pulsing the
/M2_Next pin will put the device into an "overflow state". Once the device enters an overflow
state any subsequent pulsing of /M1_MESSAGE or /M2_NEXT will only result in a double beep
and setting of the /M7_END pin low for a duration equal to 400 cycles of the sample clock. To
proceed from this state the user must rewind the device to the beginning of the memory array.
This can be accomplished by toggling the /CE pin low or cycling power. All inputs, except
the /CE pin, are ignored during recording.
3.1.3.1B Function Description of Playback in Tape Mode using Auto Rewind Option
On power-up, the device is ready to record or playback, starting at the first address in the
memory array. Before you can begin playback, the /CE input must be set to low to enable the
device and /RE must be set to high to disable recording and enable playback. The first high to
low going pulse of the /M1_MESSAGE pin initiates playback from the beginning of the current
message; on power up the first message is the current message. When the /M1_MESSAGE pin
pulses low the second time, playback of the current Message stops immediately. When the
/M1_MESSAGE pin pulses low a third time, playback of the current message starts again from
its beginning. If you hold the /M1_MESSAGE pin low continuously the same message will play
continuously in a looping fashion. A 1,540ms period of silence is inserted during looping as an
indicator to the user of the transition between the beginning and end of the message. Note that in
auto rewind mode the device always rewinds to the beginning of the current message. To listen
to a subsequent message the device must be fast forwarded past the current message to the next
message. This function is accomplished by toggling the /M2_NEXT pin from high to low. The
pulse must be low for least 400 cycles of the sampling clock. After the device is incremented to
the desired message the user can initiate playback of the message with the playback sequence
described above. A special case exists when the /M2_NEXT pin goes low during playback.
Playback of the current message will stop, the device will beep, advance to the next message and
initiate playback of the next message. (Note that if /M2 Next goes low when not in playback
mode, the device will prepare to play the next message, but will not actually initiate playback). If
the /CE pin goes high during playback, playback of the current message will stop, the device will
beep, reset to the beginning of the first message, and wait for a subsequent playback command.
When you reach the end of the memory array, any subsequent pulsing of /M1_MESSAGE or
/M2_NEXT will only result in a double beep. To proceed from this state the user must rewind
the device to the beginning of the memory array. This can be accomplished by toggling the /CE
pin low or cycling power.
3.1.3.2A Functional Description of Recording In Tape Mode using the Normal Option
On power-up, the device is ready to record or playback, starting at the first address in the
memory array. Before you can begin recording, the /CE input must be set to low to enable the
device and /RE must be set to low to enable recording. On a falling edge of the /M1_MESSAGE
pin the device will beep once and initiate recording. A subsequent rising edge on the /M1
Message pin will stop recording and insert a single beep. If the M1_MESSAGE pin is held low
beyond the end of the available memory, recording Stops automatically, and two beeps are
inserted; regardless of the state of the /M1_MESSAGE pin. The device returns to the standby
mode when the /M1_MESSAGE pin is returned high. A subsequent falling edge on the
/M1_MESSAGE pin starts a new record operation in the memory array immediately following
the last recorded message, thus preserving the last recorded message. To record over all previous
messages you must pulse the /CE pin low once to reset the device to the beginning of the first
message. You can then initiate a record sequence, as described above, to record a new message.
The most recently recorded message will become the last recorded message and all previously
recorded messages following this message will become inaccessible. If you wish to preserve any
current messages it is recommend that the Auto Rewind option be used instead of the Normal
option. If the Normal option is necessary the following sequence can be used. To preserve
current messages you must fast forward past the messages you want to keep before you can
record a new message. To fast forward when using the Normal option you must switch to play
mode and listen to messages sequentially until you arrive at the beginning of the message you
wish to overwrite. At this stage you should switch back to record mode and overwrite the desired
message.
The most recently recorded message will become the last recorded message and all previously
recorded messages following this message will become inaccessible. All inputs, except /CE, are
ignored during recording.
3.1.3.2B Functional Description of Playback in Tape Mode using the Normal Option
On power-up or after a low to high transition on /RE the device is ready to record or playback
starting at the first address in the memory array. Before you can begin playback of messages,
the /CE input must be set to low to enable the device and /RE must be set to high to enable
playback. The first high to low going pulse of the /M1_MESSAGE pin initiates playback from
the beginning of the current message. When the /M1_MESSAGE pin pulses from high to low a
second time, playback of the current message stops immediately. When the /M1_MESSAGE pin
pulses from high to low a third time, playback of the next message starts again from the
beginning. If you hold the /M1_MESSAGE pin low continuously, the current message and
subsequent messages play until the one of the following conditions is met: the end of the
memory array is reached, the last message is reached, the /M1_message pin is released. If the last
recorded message has already played, any further transitions on the /M1_MESSAGE pin will
initiate a double beep for warning and the /M7_END pin will go low. To exit this state you must
pulse the /CE pin high and then low once during standby to reset the pointer to the beginning of
the first message.
3.2 Microprocessor Controlled Message Management:
The APR9600 device incorporates several features design help simplify microprocessor
Controlled message management When controlling messages the microprocessor essentially
toggles pins as described in the message management sections described previously. The /BUSY,
/STROBE, and /M7_END pins are included to simplify handshaking between the microprocessor
and the APR9600. The /BUSY pin, when low, indicates to the host processor that the device is
busy and that No commands can be accepted. When this pin is high the device is ready to accept
and execute commands from the host. The /STROBE pin pulses low each time a memory
segment is used. Counting pulses on this pin enables the host processor to accurately determine
how much recording time has been used, and how much recording time remains. The APR9600
has a total of eighty memory segments. The /M7_END pin is used as an indicator that the device
has stopped its current record or playback operation.
During recording a low going pulse indicates that all memory has been used. During playback a
low pulse indicates that the last message has played. Microprocessor control can also be used to
link several APR9600 devices together in order to increase total available recording time. In this
application both the speaker and microphone signals can be connected in parallel. The
microprocessor will then control which device currently drives the speaker by enabling or
disabling each device using its respective /CE pins. A continuous message cannot be recorded in
multiple devices however because the transition from one device to the next will incur a delay
that is noticeable upon playback. For this reason it is recommended that message boundaries and
device boundaries always coincide.
3.3 Signal Storage:
The APR9600 samples incoming voice signals and stores the instantaneous voltage samples in
non-volatile FLASH memory cells. Each memory cell can support voltage ranges from 0 to 256
levels. These 256 discrete voltage levels are the equivalent of 8-bit (28=256) binary encoded
values. During playback the stored signals are retrieved from memory, smoothed to form a
continuous signal, and then amplified before being fed to an external speaker.
3.4 Sampling Rate & Voice Quality:
According to Shannon's sampling theorem, the highest possible frequency component introduced
to the input of a sampling system must be equal to or less than half the sampling frequency if
aliasing errors are to be eliminated. The APR9600 automatically filters its input, based on the
selected sampling frequency, to meet this requirement. Higher sampling rates increase the
bandwidth and hence the voice quality, but they also use more memory cells for the same length
of recording time. Lower sampling rates use fewer memory cells and effectively increase the
duration capabilities of the device, but they also reduce incoming signal bandwidth. The
APR9600 accommodates sampling rates as high as 8 kHz and as low a 4 kHz. You can control
the quality/duration trade off by controlling the sampling frequency.
An internal oscillator provides the APR9600 sampling clock. Changing the resistance
from the OscR pin to GND. Table2 summarizes resistance values and the corresponding
sampling frequencies, as can change oscillator frequency well as the resulting input bandwidth
and duration.
3.5 Automatic Gain Control (AGC):
The APR9600 device has an integrated AGC. The AGC affects the microphone input but
does not affect the ANA_IN input. The AGC circuit insures that the input signal is properly
amplified. The AGC works by applying maximum gain to small input signals and minimum gain
to large input signals. This assures that inputs of varying amplitude are recorded at the optimum
signal level. The AGC amplifier is designed to have a fast attack time and a slow decay time.
This timing is controlled by the RC network connected to pin 19. A value of 220K and 4.7uF has
been found to work well for the English language. Be aware that different languages, speakers
from different countries, and music may all require modification of the recommended values for
the AGC RC network.
3.6 Sampling Application:
The following reference schematics are included as examples of how a recording system
might be designed. Each reference schematic shows the device incorporated in one of its three
main modes: Random Access, Tape mode – Normal option, and Tape mode – Auto Rewind
option. Note that in several of the applications either one or all of the /BUSY, /STROBE, or
/M7_END pins are connected to LEDs as indicators of device status. This is possible because all
of these pins and signals were designed to have timing compatible with both microprocessor
interface and manual LED indication. A bias must be applied to the electrets microphone in order
to power its built-in circuitry. The ground return of this bias network is connected to the /Busy.
This configuration saves power when record mode. Both pins 18 and 19, MicIn and
MicRef, must be AC coupled to the microphone network in order to block the DC biasing
voltage. Figure 3 shows the device configured in random access mode. The device is using eight
Message segments, the maximum available, in this mode. Note that message trigger pins that are
not used, for modes with less than eight segments, can be left unconnected with the exception of
pin /M8_OPTION which should be pulled to VCC through a 100k resistor.
Fig 14: Random Access Mode
Fig 15: Tape Mode, Auto Rewind option
Fig 16: Tape Mode, Normal option
Liquid crystal display
Liquid crystal displays (LCDs) have materials, which combine the properties of both liquids and crystals. Rather than having a melting point, they have a temperature
range within which the molecules are almost as mobile as they would be in a liquid, but are grouped together in an ordered form similar to a crystal.
An LCD consists of two glass panels, with the liquid crystal material sand witched in
between them. The inner surface of the glass plates are coated with transparent electrodes which
define the character, symbols or patterns to be displayed polymeric layers are present in between
the electrodes and the liquid crystal, which makes the liquid crystal molecules to maintain a
defined orientation angle.
One each polarisers are pasted outside the two glass panels. These polarisers would rotate
the light rays passing through them to a definite angle, in a particular direction.
When the LCD is in the off state, light rays are rotated by the two polarisers and the
liquid crystal, such that the light rays come out of the LCD without any orientation, and hence
the LCD appears transparent.
When sufficient voltage is applied to the electrodes, the liquid crystal molecules would be
aligned in a specific direction. The light rays passing through the LCD would be rotated by the
polarisers, which would result in activating/ highlighting the desired characters.
The LCD’s are lightweight with only a few millimeters thickness. Since the LCD’s
consume less power, they are compatible with low power electronic circuits, and can be powered
for long durations.
The LCD’s don’t generate light and so light is needed to read the display. By using
backlighting, reading is possible in the dark. The LCD’s have long life and a wide operating
temperature range.
Changing the display size or the layout size is relatively simple which makes the LCD’s
more customers friendly.
The LCDs used exclusively in watches, calculators and measuring instruments are the
simple seven-segment displays, having a limited amount of numeric data. The recent advances in
technology have resulted in better legibility, more information displaying capability and a wider
temperature range. These have resulted in the LCDs being extensively used in
telecommunications and entertainment electronics. The LCDs have even started replacing the
cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV
applications.
This section describes the operation modes of LCD’s then describe how to program and
interface an LCD to 8051 using Assembly and C.
LCD operationIn recent years the LCD is finding widespread use replacing LEDs(seven-segment LEDs
or other multisegment LEDs).This is due to the following reasons:
1. The declining prices of LCDs.
2. The ability to display numbers, characters and graphics. This is in
contract to LEDs, which are limited to numbers and a few characters.
3. Incorporation of a refreshing controller into the LCD, there by
relieving the CPU of the task of refreshing the LCD. In the contrast,
the LED must be refreshed by the CPU to keep displaying the data.
4. Ease of programming for characters and graphics.
LCD pin description The LCD discussed in this section has 14 pins. The function of each pins is given in
table.
TABLE 1:Pin description for LCD:
Pin symbol I/O Description
1 Vss -- Ground
2 Vcc -- +5V power supply
3 VEE -- Power supply to
control contrast
4 RS I RS=0 to select
command register
RS=1 to select
data register
5 R/W I R/W=0 for write
R/W=1 for read
6 E I/O Enable
7 DB0 I/O The 8-bit data bus
8 DB1 I/O The 8-bit data bus
9 DB2 I/O The 8-bit data bus
10 DB3 I/O The 8-bit data bus
11 DB4 I/O The 8-bit data bus
12 DB5 I/O The 8-bit data bus
13 DB6 I/O The 8-bit data bus
14 DB7 I/O The 8-bit data bus
TABLE 2: LCD Command Codes
Code
(hex)
Command to LCD Instruction
Register
1 Clear display screen
2 Return home
4 Decrement cursor
6 Increment cursor
5 Shift display right
7 Shift display left
8 Display off, cursor off
A Display off, cursor on
C Display on, cursor off
E Display on, cursor on
F Display on, cursor blinking
10 Shift cursor position to left
14 Shift cursor position to right
18 Shift the entire display to the left
1C Shift the entire display to the right
80 Force cursor to beginning of 1st line
C0 Force cursor to beginning of 2nd line
38 2 lines and 5x7 matrix
Uses:
The LCDs used exclusively in watches, calculators and measuring instruments
are the simple seven-segment displays, having a limited amount of numeric data. The recent
advances in technology have resulted in better legibility, more information displaying capability
and a wider temperature range. These have resulted in the LCDs being extensively used in
telecommunications and entertainment electronics. The LCDs have even started replacing the
cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV
applications.
LCD INTERFACING
Sending commands and data to LCDs with a time delay:
Fig 21: Interfacing of LCD to a micro controller
To send any command from table 2 to the LCD, make pin RS=0.
for data, make RS=1.Then send a high –to-low pulse to the E pin to enable the internal latch of the LCD.
Power supply
The power supplies are designed to convert high voltage AC mains
electricity to a suitable low voltage supply for electronics circuits and other devices. A power
supply can by broken down into a series of blocks, each of which performs a particular function.
A d.c power supply which maintains the output voltage constant irrespective of a.c mains
fluctuations or load variations is known as “Regulated D.C Power Supply”
For example a 5V regulated power supply system as shown below:
Transformer:
A transformer is an electrical device which is used to convert electrical power from one Electrical circuit to another without change in frequency.
Transformers convert AC electricity from one voltage to another with little loss of power. Transformers work only with AC and this is one of the reasons why mains
electricity is AC. Step-up transformers increase in output voltage, step-down transformers decrease in output voltage. Most power supplies use a step-down transformer to reduce the dangerously high mains voltage to a safer low voltage. The input coil is called the primary
and the output coil is called the secondary. There is no electrical connection between the two coils; instead they are linked by an alternating magnetic field created in the soft-iron core of the transformer. The two lines in the middle of the circuit symbol represent the
core. Transformers waste very little power so the power out is (almost) equal to the power in. Note that as voltage is stepped down current is stepped up. The ratio of the number of turns on each coil, called the turn’s ratio, determines the ratio of the voltages. A step-down transformer has a large number of turns on its primary (input) coil which is connected to the high voltage mains supply, and a small number of turns on its secondary (output) coil
to give a low output voltage.
An Electrical Transformer
Turns ratio = Vp/ VS = Np/NS
Power Out= Power In
VS X IS=VP X IP
Vp = primary (input) voltage
Np = number of turns on primary coil
Ip = primary (input) current
RECTIFIER:
A circuit which is used to convert a.c to dc is known as RECTIFIER. The process of conversion a.c to d.c is called “rectification”
TYPES OF RECTIFIERS: Half wave Rectifier Full wave rectifier
1. Centre tap full wave rectifier.2. Bridge type full bridge rectifier.
Comparison of rectifier circuits:
Parameter Type of Rectifier
Half wave Full wave BridgeNumber of diodes
1 2
4
PIV of diodes Vm
2Vm
Vm
D.C output voltage Vm/
2Vm/
2Vm/
Vdc,at no-load
0.318Vm
0.636Vm 0.636Vm
Ripple factor 1.21
0.482
0.482
Ripple frequency
f
2f
2f
Rectification efficiency
0.406
0.812
0.812
Transformer Utilization Factor(TUF)
0.287 0.693 0.812
RMS voltage Vrms Vm/2 Vm/√2 Vm/√2
Full-wave Rectifier:
From the above comparision we came to know that full wave bridge rectifier as more advantages than the other two rectifiers. So, in our project we are using full wave bridge rectifier circuit.
Bridge Rectifier: A bridge rectifier makes use of four diodes in a bridge arrangement to achieve
full-wave rectification. This is a widely used configuration, both with individual diodes wired as
shown and with single component bridges where the diode bridge is wired internally.
A bridge rectifier makes use of four diodes in a bridge arrangement as shown in fig(a) to
achieve full-wave rectification. This is a widely used configuration, both with individual diodes
wired as shown and with single component bridges where the diode bridge is wired internally.
Fig(A)
Operation:
During positive half cycle of secondary, the diodes D2 and D3 are in forward biased while D1
and D4 are in reverse biased as shown in the fig(b). The current flow direction is shown in the
fig (b) with dotted arrows.
Fig(B)During negative half cycle of secondary voltage, the diodes D1 and D4 are in forward biased
while D2 and D3 are in reverse biased as shown in the fig(c). The current flow direction is
shown in the fig (c) with dotted arrows.
Fig(C)
Filter: A Filter is a device which removes the a.c component of rectifier output
but allows the d.c component to reach the load
Capacitor Filter:
We have seen that the ripple content in the rectified output of half wave rectifier is 121% or
that of full-wave or bridge rectifier or bridge rectifier is 48% such high percentages of ripples is
not acceptable for most of the applications. Ripples can be removed by one of the following
methods of filtering.
(a) A capacitor, in parallel to the load, provides an easier by –pass for the ripples voltage though
it due to low impedance. At ripple frequency and leave the d.c.to appears the load.
(b) An inductor, in series with the load, prevents the passage of the ripple current (due to high
impedance at ripple frequency) while allowing the d.c (due to low resistance to d.c)
(c) various combinations of capacitor and inductor, such as L-section filter section filter,
multiple section filter etc. which make use of both the properties mentioned in (a) and (b) above.
Two cases of capacitor filter, one applied on half wave rectifier and another with full wave
rectifier.
Filtering is performed by a large value electrolytic capacitor connected across the DC supply to act as a reservoir, supplying current to the output when the varying DC voltage from the rectifier is falling. The capacitor charges quickly near the peak of the
varying DC, and then discharges as it supplies current to the output. Filtering significantly increases the average DC voltage to almost the peak value (1.4 × RMS value).
To calculate the value of capacitor(C), C = ¼*√3*f*r*Rl
Where, f = supply frequency,
r = ripple factor, Rl = load resistance
Note: In our circuit we are using 1000µF Hence large value of capacitor is placed to reduce ripples and to improve the DC component.
Regulator: Voltage regulator ICs is available with fixed (typically 5, 12 and 15V) or variable output
voltages. The maximum current they can pass also rates them. Negative voltage regulators are
available, mainly for use in dual supplies. Most regulators include some automatic protection
from excessive current ('overload protection') and overheating ('thermal protection'). Many of
the fixed voltage regulator ICs have 3 leads and look like power transistors, such as the 7805
+5V 1A regulator shown on the right. The LM7805 is simple to use. You simply connect the
positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the
Input pin, connect the negative lead to the Common pin and then when you turn on the power,
you get a 5 volt supply from the output pin.
Fig 6.1.6 A Three Terminal Voltage Regulator
78XX:
The Bay Linear LM78XX is integrated linear positive regulator with three terminals. The
LM78XX offer several fixed output voltages making them useful in wide range of applications.
When used as a zener diode/resistor combination replacement, the LM78XX usually results in an
effective output impedance improvement of two orders of magnitude, lower quiescent current.
The LM78XX is available in the TO-252, TO-220 & TO-263packages,
The L293 is an integrated circuit motor driver that can be used for simultaneous, bi-directional
control of two small motors. Small means small. The L293 is limited to 600 mA, but in reality
can only handle much small currents unless you have done some serious heat sinking to keep the
case temperature down. Unsure about whether the L293 will work with your motor? Hook up the
circuit and run your motor while keeping your finger on the chip. If it gets too hot to touch, you
can't use it with your motor. (Note to ME2011 students: The L293 should be OK for your small
motor but is not OK for your gear motor.)
The L293 comes in a standard 16-pin, dual-in line integrated circuit package. There is an L293
and an L293D part number. Pick the "D" version because it has built in flyback diodes to
minimize inductive voltage spikes.
The pinout for the L293 in the 16-pin package is shown below in top view. Pin 1 is at the top left
when the notch in the package faces up. Note that the names for pin functions may be slightly
different than what is shown in the following diagrams.
The following schematic shows how to connect the L293 to your motor and the Stamp. Each
motor takes 3 Stamp pins. If you are only using one motor, leave pins 9, 10, 11, 12, 13, 14, and
15 empty.
Assume you have only one motor connected with the enable tied to Stamp Pin 0, and the two
direction controls tied to Stamp Pins 1 and 2.
Here is a table describing the control pin functions.
ENABLE DIRA DIRB Function
H H L Turn right
H L H Turn left
H L/H L/H Fast stop
L either either Slow stop
And here is a short sample program that exercises the L293.
advantage:
You can control 2 motors in both directions instead of 4 in only one direction.
Disadvantages:
There is a 1.5V voltage drop within the L293D driver chip.
If you run both motors and servos on the same circuit, your servos will always get 1.5V more than the motors - and typically you would want it the other way around!
DC GEARED MOTOR 12V 60RPM:(robotics)
60RPM 12V DC geared motors for robotics applications. Very easy to use and available in
standard size. Nut and threads on shaft to easily connect and internal threaded shaft for easily
connecting it to wheel.
Features: 60RPM 12V DC motors with Gearbox
3000RPM base motor
6mm shaft diameter with internal hole
125gm weight
Same size motor available in various rpm
2kgcm torque
No-load current = 60 mA(Max), Load current = 300 mA(Max)
Circuit description:
In this project we required operating voltage for Microcontroller 89S52 is 5V. Hence the 5V
D.C. power supply is needed for the IC’s. This regulated 5V is generated by stepping down the
voltage from 230V to 18V now the step downed a.c voltage is being rectified by the Bridge
Rectifier using 1N4007 diodes. The rectified a.c voltage is now filtered using a ‘C’ filter. Now
the rectified, filtered D.C. voltage is fed to the Voltage Regulator. This voltage regulator
provides/allows us to have a Regulated constant Voltage which is of +5V. The rectified; filtered
and regulated voltage is again filtered for ripples using an electrolytic capacitor 100μF. Now the
output from this section is fed to 40th pin of 89S52 microcontroller to supply operating voltage.
The microcontroller 89S52 with Pull up resistors at Port0 and crystal oscillator of 11.0592 MHz
crystal in conjunction with couple of 30-33pf capacitors is placed at 18th & 19th pins of 89S52 to
make it work (execute) properly. In this project Depending on the direction of the MEMS,
Directions of the vehicle may be LEFT, RIGHT, FRONT, and BACK as per the commands
given by MEMS. The microcontroller will change the direction of the vehicle and also gives the
voice announcement using the voice IC and loud speaker.
SOFTWARE DESCRIPTION
ABOUT SOFTWARE
Software used:*Keil software for c programming
ABOUT KEIL SOFTWARE:
It is possible to create the source files in a text editor such as Notepad, run the Compiler on each C source file, specifying a list of controls, run the Assembler on each Assembler source file, specifying another list of controls, run either the Library Manager or Linker (again specifying a list of controls) and finally running the Object-HEX Converter to convert the Linker output file to an Intel Hex File. Once that has been completed the Hex File can be downloaded to the target hardware and debugged. Alternatively KEIL can be used to create source files; automatically compile, link and covert using options set with an easy to use user interface and finally simulate or perform debugging on the hardware with access to C variables and memory. Unless you have to use the tolls on the command line, the choice is clear. KEIL Greatly simplifies the process of creating and testing an embedded application.
Projects:
The user of KEIL centers on “projects”. A project is a list of all the source files required to build a single application, all the tool options which specify exactly how to build the application, and – if required – how the application should be simulated. A project contains enough information to take a set of source files and generate exactly the binary code required for the application. Because of the high degree of flexibility required from the tools, there are many options that can be set to configure the tools to operate in a specific manner. It would be tedious to have to set these options up every time the application is being built; therefore they are stored in a project file. Loading the project file into KEIL informs KEIL which source files are required, where they are, and how to configure the tools in the correct way. KEIL can then execute each tool with the correct options. It is also possible to create new projects in KEIL. Source files are added to the project and the tool options are set as required. The project can then be saved to preserve the settings. The project is reloaded and the simulator or debugger started, all the desired windows are opened. KEIL project files have the extension Simulator/Debugger:
The simulator/ debugger in KEIL can perform a very detailed simulation of a micro controller along with external signals. It is possible to view the precise execution time of a single assembly instruction, or a single line of C code, all the way up to the entire application, simply by entering the crystal frequency. A window can be opened for each peripheral on the device, showing the state of the peripheral. This enables quick trouble shooting of mis-configured peripherals. Breakpoints may be set on either assembly instructions or lines of C code, and execution may be stepped through one instruction or C line at a time. The contents of all the
memory areas may be viewed along with ability to find specific variables. In addition the registers may be viewed allowing a detailed view of what the microcontroller is doing at any point in time. The Keil Software 8051 development tools listed below are the programs you use to compile your C code, assemble your assembler source files, link your program together, create HEX files, and debug your target program. µVision2 for Windows™ Integrated Development Environment: combines Project Management, Source Code Editing, and Program Debugging in one powerful environment. C51 ANSI Optimizing C Cross Compiler: creates relocatable object modules from your C
source code, A51 Macro Assembler: creates relocatable object modules from your 8051
assembler source code, BL51 Linker/Locator: combines relocatable object modules created by the compiler and
assembler into the final absolute object module, LIB51 Library Manager: combines object modules into a library, which may be used by the
µVision3 adds many new features to the Editor like Text Templates, Quick Function Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog based startup and debugger setup. µVision3 is fully compatible to µVision2 and can be used in parallel with µVision2.
What is µVision3?
µVision3 is an IDE (Integrated Development Environment) that helps you write, compile, and debug embedded programs. It encapsulates the following components:
A project manager. A make facility. Tool configuration. Editor. A powerful debugger.
To help you get started, several example programs (located in the \C52\Examples, \C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided.
HELLO is a simple program that prints the string "Hello World" using the Serial Interface.
MEASURE is a data acquisition system for analog and digital systems. TRAFFIC is a traffic light controller with the RTX Tiny operating system. SIEVE is the SIEVE Benchmark. DHRY is the Dhrystone Benchmark. WHETS is the Single-Precision Whetstone Benchmark.
Additional example programs not listed here are provided for each device architecture.
Building an Application in µVision2
To build (compile, assemble, and link) an application in µVision2, you must:1. Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2).2. Select Project - Rebuild all target files or Build target.
µVision2 compiles, assembles, and links the files in your project
Creating Your Own Application in µVision2
To create a new project in µVision2, you must:1. Select Project - New Project.2. Select a directory and enter the name of the project file.3. Select Project - Select Device and select an 8052, 251, or C16x/ST10 device from the
Device Database™.4. Create source files to add to the project.5. Select Project - Targets, Groups, Files. Add/Files, select Source Group1, and add the
source files to the project.6. Select Project - Options and set the tool options. Note when you select the target device
from the Device Database™ all special options are set automatically. You typically only need to configure the memory map of your target hardware. Default memory model settings are optimal for most applications.
7. Select Project - Rebuild all target files or Build target.
Debugging an Application in µVision2
To debug an application created using µVision2, you must:1. Select Debug - Start/Stop Debug Session.2. Use the Step toolbar buttons to single-step through your program. You may enter G,
main in the Output Window to execute to the main C function.3. Open the Serial Window using the Serial #1 button on the toolbar.
Debug your program using standard options like Step, Go, Break, and so on.Starting µVision2 and Creating a ProjectµVision2 is a standard Windows application and started by clicking on the program icon. To create a new project file select from the µVision2 menuProject – New Project…. This opens a standard Windows dialog that asks youfor the new project file name.We suggest that you use a separate folder for each project. You can simply usethe icon Create New Folder in this dialog to get a new empty folder. Thenselect this folder and enter the file name for the new project, i.e. Project1.µVision2 creates a new project file with the name PROJECT1.UV2 which containsa default target and file group name. You can see these names in the ProjectWindow – Files.Now use from the menu Project – Select Device for Target and select a CPUfor your project. The Select Device dialog box shows the µVision2 devicedatabase. Just select the micro controller you use. We are using for our examples the Philips 89S52RD+ CPU. This selection sets necessary tooloptions for the 89S52RD+ device and simplifies in this way the tool Configuration Building Projects and Creating a HEX FilesTypical, the tool settings under Options – Target are all you need to start a newapplication. You may translate all source files and line the application with aclick on the Build Target toolbar icon. When you build an application withsyntax errors, µVision2 will display errors and warning messages in the OutputWindow – Build page. A double click on a message line opens the source fileon the correct location in a µVision2 editor window.
Once you have successfully generated your application you can start debugging.
After you have tested your application, it is required to create an Intel HEX file to download the software into an EPROM programmer or simulator. µVision2 creates HEX files with each build process when Create HEX files under Options for Target – Output is enabled. You may start your PROM programming utility after the make process when you specify the program under the option Run User Program #1.CPU Simulation:µVision2 simulates up to 16 Mbytes of memory from which areas can beMapped for read, write, or code execution access. The µVision2 simulator trapsAnd reports illegal memory accesses.In addition to memory mapping, the simulator also provides support for theIntegrated peripherals of the various 89S52 derivatives. The on-chip peripheralsof the CPU you have selected are configured from the Device.Database selection:you have made when you create your project target. Refer to page 58 for moreInformation about selecting a device. You may select and display the on-chip peripheral components using the Debug menu. You can also change the aspects of each peripheral using the controls in the dialog boxes.Start Debugging:You start the debug mode of µVision2 with the Debug – Start/Stop DebugSession command. Depending on the Options for Target – DebugConfiguration, µVision2 will load the application program and run the startupcode µVision2 saves the editor screen layout and restores the screen layout of the last debug session. If the program execution stops, µVision2 opens aneditor window with the source text or shows CPU instructions in the disassembly window. The next executable statement is marked with a yellow arrow. During debugging, most editor features are still available. For example, you can use the find command or correct program errors. Program source text of your application is shown in the same windows. The µVision2 debug mode differs from the edit mode in the following aspects:_ The “Debug Menu and Debug Commands” described on page 28 areAvailable. The additional debug windows are discussed in the following._ The project structure or tool parameters cannot be modified. All buildCommands are disabled.
Disassembly WindowThe Disassembly window shows your target program as mixed source and assembly program or just assembly code. A trace history of previously executed instructions may be displayed with Debug – View Trace Records. To enable the trace history, set Debug – Enable/Disable Trace Recording. If you select the Disassembly Window as the active window all program step commands work on CPU instruction level rather than program source lines. You can select a text line and set or modify code breakpoints using toolbar buttons or the context menu commands.
You may use the dialog Debug – Inline Assembly… to modify the CPU instructions. That allows you to correct mistakes or to make temporary changes to the target program you are debugging.
SOFTWARE COMPONENTS
About Keil
1. Click on the Keil u Vision Icon on Desktop
2. The following fig will appear
3. Click on the Project menu from the title bar
4. Then Click on New Project
5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\
6. Then Click on Save button above.
7. Select the component for u r project. i.e. Atmel……
8. Click on the + Symbol beside of Atmel
9. Select AT89S52 as shown below
10. Then Click on “OK”
11. The Following fig will appear
12. Then Click either YES or NO………mostly “NO”
13. Now your project is ready to USE
14. Now double click on the Target1, you would get another option “Source group 1” as
shown in next page.
15. Click on the file option from menu bar and select “new”
16. The next screen will be as shown in next page, and just maximize it by double
clicking on its blue boarder.
17. Now start writing program in either in “C” or “ASM”
18. For a program written in Assembly, then save it with extension “. asm” and for “C”
based program save it with extension “ .C”
19. Now right click on Source group 1 and click on “Add files to Group Source”
20. Now you will get another window, on which by default “C” files will appear.
21. Now select as per your file extension given while saving the file
22. Click only one time on option “ADD”
23. Now Press function key F7 to compile. Any error will appear if so happen.
24. If the file contains no error, then press Control+F5 simultaneously.
25. The new window is as follows
26. Then Click “OK”
27. Now Click on the Peripherals from menu bar, and check your required port as shown
in fig below
28. Drag the port a side and click in the program file.
29. Now keep Pressing function key “F11” slowly and observe.
30. You are running your program successfully
Conclusion
The project “GESTURE BASED VEHICLE MOVEMENTS CONTROL AND
ALERTING SYSTEM” has been successfully designed and tested.
Integrating features of all the hardware components used have developed it. Presence of
every module has been reasoned out and placed carefully thus contributing to the best working of
the unit.
Secondly, using highly advanced IC’s and with the help of growing technology the
project has been successfully implemented.
BIBLIOGRAPHY
The 8051 Micro controller and Embedded Systems
-Muhammad Ali Mazidi
Janice Gillispie Mazidi
The 8051 Micro controller Architecture, Programming & Applications
-Kenneth J. Ayala
Fundamentals Of Micro processors and Micro computers