Fundamentals of Device and Systems Packaging Technologies and Applications Rao R. Tummala, Ph.D. Editor Georgia Institute of Technology, USA Second Edition Mc Graw Hill New York Chicago San Francisco Athens London Madrid Mexico City Milan New Delhi Singapore Sydney Toronto
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Fundamentals of Device and Systems
Packaging Technologies and Applications
Rao R. Tummala, Ph.D. Editor
Georgia Institute of Technology, USA
Second Edition
Mc Graw Hill
New York Chicago San Francisco Athens London Madrid
Mexico City Milan New Delhi Singapore Sydney Toronto
Contents Contributors xvii Preface xix
1 Introduction to Device and Systems Packaging Technologies Prof. Rao R. Tummala 1
1.1 What Is Packaging and Why? 3 1.1.1 What Is Packaging? 4 1.1.2 Why Is Packaging Important? 6 1.1.3 Every IC and Device Has to Be Packaged 7 1.1.4 Controls Performance of Computers 7 1.1.5 Controls Size of Consumer Electronics 7 1.1.6 Controls Reliability of Electronics 7 1.1.7 Controls Cost of Electronic Products 7 1.1.8 Required in Nearly Everything 7
1.2 Anatomy of an Electronic Packaged System from a Packaging Point of View 7
1.2.1 Fundamentals of Packaging 8 1.2.2 Systems Packaging Involves Electrical, Mechanical,
and Materials Technologies 9 1.2.3 Nomenclature 10
1.3 Devices and Moore's Law 11 1.3.1 On-Chip Interconnections 12 1.3.2 Interconnect Materials 13 1.3.3 The Resistance and Capacitance Delays (RC Delays)
of On-Chip Interconnects 14 1.3.4 Future of Device Scaling 15
1.4.1 Microelectronics: The First Technology Wave 16 1.4.2 RF and Wireless: The Second Technology Wave 18 1.4.3 Photonics: The Third Technology Wave 19 1.4.4 Micro-Electro-Mechanical Systems (MEMS):
The Fourth Technology Wave 21 1.4.5 Quantum Devices and Computing: Fifth Wave 22
1.5 Packaging and Moore's Law for Packaging 23 1.5.1 Three Eras in Packaging 23 1.5.2 Moore's Law or SOC Era (1960-2010) 25 1.5.3 Moore's Law for Packaging Era from 2010 to 2025 26 1.5.4 Moore's Law for Systems Era from 2025 27
V
vi Contents
1.6 Electronic Systems Technologies Trends 29 1.6.1 Core Packaging Technologies 29 1.6.2 Packaging Technologies and Their Trends 30
1.7 Future Outlook 33 1.7.1 Emerging Computing Systems 33 1.7.2 Emerging 3D Systems Packaging 34
1.8 How the Book Is Organized 37 1.9 Homework Problems 38
1.10 Suggested Reading 38
Fundamentals of Packaging
2 Fundamentals of Electrical Design for Signals, Power, and Electromagnetic Interference Prof. Eakhwan Song, Prof. Dong Gun Kam, Prof. Joungho Kim, Prof. Madhavan Swaminathan, and Prof. Andrew F. Peterson 43
2.1 What Is Electrical Package Design and Why? 45 2.2 Electrical Anatomy of a Package 45
2.2.1 Fundamentals of Electrical Package Design 47 2.2.2 Nomenclature 51
2.3 Signal Distribution 54 2.3.1 Devices and Interconnections 54 2.3.2 Kirchhoff's Laws and Transit Time Delay 58 2.3.3 Transmission Line Behavior of Interconnections 59 2.3.4 Characteristic Impedance 61 2.3.5 Typical Transmission Line Structures Used as
Fundamentals of Package Materials at Microscale and Nanoscale Dr. Himani Sharma, Prof. Markondeya Raj Pulugurtha, Prof. C. P. Wong, and Dr. Rabindra Das 171
5.1 What Is the Role of Materials in Packaging? 173 5.2 Anatomy of a Package with a Variety of Materials 173
5.2.1 Fundamentals of Package Materials 173 5.2.2 Nomenclature 175
5.3 Package Materials, Processes, and Properties 177 5.3.1 Substrate Materials, Processes, and Properties 177 5.3.2 Interconnection and Assembly Materials, Processes,
and Properties 188 5.3.3 Passive Component Materials, Processes,
and Properties 196 5.3.4 Thermal and Thermal Interface Materials (TIMs),
Processes, and Properties 207 5.4 Summary and Future Trends 214 5.5 Homework Problems 215 5.6 Suggested Reading 216
Fundamentals of Ceramic, Organic, Glass, and Silicon Package Substrates Mr. Chandra Nair, Dr. Venky Sundaram, Prof. Markondeya Raj Pulugurtha, Mr. Fuhan Liu, Dr. Vijay Sukumaran, and Mr. Bartlet H. DeProspo 217
6.1 What Is a Package Substrate and Why? 219 6.2 Anatomy of Three Package Substrates: Ceramics,
Organic Laminates, and Silicon 219 6.2.1 Fundamentals of Package Substrates 223 6.2.2 Nomenclature 227
Fundamentals of Passive Components and Integration with Active Devices Prof. Markondeya Raj Pulugurtha, Dr. Parthasarathi Chakraborti, Dr. John Prymak, Dr. Swapan Bhattacharaya, Dr. Saumya Gandhi, and Dr. Dibyajat Mishra... 281
7.1 What Are Passive Components and Why? 283 7.2 Anatomy of Passive Components 283
7.2.1 Fundamentals of Passive Components 286 7.2.2 Nomenclature 308
Fundamentals of Chip-to-Package Interconnections and Assembly Dr. Vanessa Smet, Dr. Ninad Shahane, and Dr. Eric Perfecto 331
8.1 What Are Chip-to-Package Interconnections and Assembly and Why? 333
8.2 Anatomy of an Interconnection and Assembly 333 8.2.1 Types of Chip-Level Interconnections
and Assembly Technologies 334 8.2.2 Fundamentals of Interconnections and Assembly 336 8.2.3 Fundamentals of Assembly and Bonding 339 8.2.4 Nomenclature 341
8.3 Interconnection and Assembly Technologies 342 8.3.1 Evolution 342
8.4 Interconnections and Assembly Technologies 345 8.4.1 Wire-Bonding 345 8.4.2 Tape Automated Bonding (TAB) 348 8.4.3 Flip-Chip Interconnection and Assembly
Technology 350 8.4.4 Copper Pillar with Solder Cap Technology 353 8.4.5 SLID Interconnection and Assembly Technology 354
8.5 Future Trends in Interconnection and Assembly Technologies... 357 8.5.1 Extension of SLID 357
Fundamentals of Embedded and Fan-Out Packaging Dr. Beth Keser, Mr. Tailong Shi, and Prof. Rao R. Tummala 367
9.1 What Is Embedding and Fan-Out Packaging and Why? 369 9.1.1 Why Embedding and Fan-Out Packaging? 370
9.2 Anatomy of a Fan-Out Wafer-Level Package (FO-WLP) 371 9.2.1 A Typical Fan-Out Wafer-Level Package Process 371 9.2.2 Fundamentals of Fan-Out Wafer-Level
Fundamentals of 3D Packaging with and without TSV Prof. Subramanian S. Iyer, Dr. Mukta Farooq, Prof. Rao R. Tummala, Mr. Omkar Gupte, Mr. Siddharth Ravichandran, Mr. Bartlet H. DeProspo, and Mr. Nithin Nedumthakady 407 10.1 What Are 3D ICs with TSV and Why? 409
10.1.1 Why 3D ICs with TSVs? 409 10.2 Anatomy of a 3D Package with TSV 411
10.2.1 Fundamentals of 3D ICs with TSV 412 10.2.2 Nomenclature 415
10.3 3D ICs with TSV Technologies 416 10.3.1 Through-Silicon-Vias (TSVs) 416 10.3.2 Ultra-Thin ICs 423 10.3.3 Back-End-of-Line (BEOL) RDL Wiring 425 10.3.4 Chip-to-Chip Interconnections within the 3D Stack . . . 426 10.3.5 Packages for 3D IC Stacks 430 10.3.6 Underfill 436
Fundamentals of RF and Millimeter-Wave Packaging Dr. Srikrishna Sitaraman, Prof. Emmanouü M. Tentzeris, Prof. Markondeya Raj Pulugurtha, Dr. Junki Min, Prof. Rao R. Tummala, and Prof. John Papapolymerou 441 11.1 What Is RF and Why? 443
11.1.1 History and Evolution 444 11.1.2 When Was the First Mobile Phone Introduced? 444
11.2 Anatomy of an RF System 445 11.2.1 Fundamentals of RF 446 11.2.2 RF Nomenclature 464
Fundamentals of Optoelectronics Packaging Dr. Bruce C. Chou, Prof. Gee Kung Chang, Dr. Daniel Guidotti, and Mr. Rui Zhang 497 12.1 What Is Optoelectronics? 499 12.2 Anatomy of an Optoelectronics System 499
12.2.1 Fundamentals of Optoelectronics 500 12.2.2 Nomenclature 504
Fundamentals of Package Encapsulation, Molding, and Sealing Prof. C. P. Wong, Dr. Treliant Fang, and Dr. Pengli Zhu 587 14.1 What Is Sealing and Encapsulation and Why? 589 14.2 Anatomy of an Encapsulated and a Sealed Package 589
14.2.1 Fundamentals of Encapsulation and Sealing 589 14.2.2 Nomenclature 596
Fundamentals of Printed Wiring Boards Mr. Shinichi Iketani, Dr. Sundar Kamath, Dr. Koushik Ramachandran, and Prof. Rao R. Tummala 621 15.1 What Is a Printed Wiring Board? 623 15.2 Anatomy of a Printed Wiring Board 624
15.2.1 Fundamentals of Printed Wiring Boards 625 15.2.2 Types of PWBs 625
Contents XÜi
15.2.3 PWB Material Grades 627 15.2.4 Single- to Multi-Layer Boards and Their Applications . . . 627 15.2.5 PWB Design Elements 628 15.2.6 Nomenclature 629
16 Fundamentals of Board Assembly Dr. Mulugeta Abtezv, Dr. Sundar Kamath, and Prof. Rao R. Tummala 651 16.1 What Is a Printed Circuit Board Assembly (PCBA) and W h y ? . . . . 653 16.2 Anatomy of Printed Circuit Board Assembly 654
16.2.1 Fundamentals of PCBA 654 16.2.2 Nomenclature 656
17 Applications of Packaging Technologies in Future Car Electronics Mr. Haksun Lee, Prof. Rao R. Tummala, and Prof. Klaus-Juergen Wolter ... 691 17.1 What Are Future Car Electronics and Why? 693 17.2 Anatomy of a Future Car 695
17.2.1 Fundamentals of a Future Car 695 17.2.2 Nomenclature 696
17.3 Future Car Electronic Technologies 697 17.3.1 Computing and Communications 697 17.3.2 Sensing Electronics 699 17.3.3 High-Power Electronics 704
17.4 Summary and Future Trends 708
17.5 Homework Problems 17.6 Suggested Reading . .
708 709
Applications of Packaging Technologies in Bioelectronics Prof. Markondeya Raj Pulugurtha, Dr. Melinda Varga, and Prof. Rao R. Tummala 711 18.1 What Are Bioelectronics? 713
18.1.1 Bioelectronics Applications 713 18.1.2 Anatomy of a Bioelectronic System 715
18.2 Packaging Technologies for Bioelectronic Systems 716 18.2.1 Biocompatible and Biostable Packaging 717 18.2.2 Heterogeneous Integration 719
Applications of Packaging Technologies in Communication Systems Mr. Muhammad Ali, Prof. Markondeya Raj Pulugurtha, and Prof. Rao R. Tummala 729 19.1 What Are Communication Systems and Why? 731 19.2 Anatomy of Two Communication Systems:
Wired and Wireless 731 19.2.1 Anatomy of a Wired Communication System 732 19.2.2 Anatomy of a Wireless Communication System 732
19.3 Communication System Technologies 733 19.3.1 Historical Evolution 733 19.3.2 Communication System Technologies 735 19.3.3 Wireless Communication System Technologies 738
Applications of Packaging Technologies in Computing Systems Dr. Ravi Mahajan, Dr. Sandeep Sane, Dr. Kashyap Mohan, and Prof. Rao R. Tummala 753 20.1 What Is Computer Packaging? 755 20.2 The Anatomy of a Computer Package 756
20.2.1 Fundamentals of Computer Packaging 756 20.2.2 Types of Computing Systems 757 20.2.3 Nomenclature 758
Contents
20.3 Computer Packaging Technologies 759 20.3.1 Evolution 759 20.3.2 Interconnection Technologies 759 20.3.3 Interconnection Designs for Signal and Power 760
Applications of Packaging Technologies in Flexible Electronics Mr. Siddharth Ravichandran, Prof. Markondeya Raj Pulugurtha, Dr. Vanessa Smet, and Prof. Rao R. Tummala 769 21.1 What Are Flexible Electronics and Why? 771
21.1.1 Applications 771 21.2 Anatomy of a Flexible Electronic System 773
21.2.1 Fundamentals of Flexible Electronics Technologies 774 21.2.2 Nomenclature 774
21.3 Flexible Electronics Technologies 776 21.3.1 Component Technologies 776 21.3.2 Process Integration of Flexible Electronics
Technologies 783 21.3.3 Component Assembly on Flexible Substrates 787