Functional Units and Addressing Modes

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Processor

Computer Functional Units

Memory

Arithmetic

& Logic

Control

I/O

Input

Output

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Processor and Memory

ALUIR

MAR

MEM

PC

MDR

R0

R1

.

.

.

Rn-1

Control

Processor

MAR - Memory Address Register

MDR - Memory Data Register

PC - Program Counter

IR - Instruction Register

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Computer Instructions

Assembly Language

MOVE NUM1,R1

MOVE #1,R2

ADD #1,R1

ADD R1,R2

Register Transfer Notation

R1 [NUM1]

R2 1

R1 1 + [R1]

R2 [R1] + [R2]

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Example Instruction

Fetch

MAR [PC]

PC [PC] + 1

MDR [MEM([MAR])]

IR [MDR]

Execute

MAR NUM1

MDR [MEM([MAR])]

R1 [MDR]

MOVE NUM1,R1

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Another Example

Fetch

MAR [PC]

PC [PC] + 1

MDR [MEM([MAR])]

IR [MDR]

Execute

R1 1 + [R1]

ADD #1,R1

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Single-Bus Structure

Memory ProcessorInput Output

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Single-Bus Architecture (HW1)

A B

R

ALU

MDR

MAR

MEM

BUS A

Y

Z

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Single-Bus Architecture (HW3)

12

PC

IR

REGS

A B

R

ALU

MDR

MAR

MEM

BUS A

Y

Z

1 2

MUX 6

66

21

1

MUX

6

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Design Project Architecture

6

A

B

R

6

1 12

A1 A2

PC

IR

1

2

2

22

REGS

ALU

MDR3 1

MAR

MEM

NZVC

BUS A BUS B BUS C

MUX

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System Software

Compiler High-level LanguageMachine Language

Assembler Assembly LanguageMachine Language

Text Editor Keyboard Input File

Operating System Control Sharing & Interaction

Assign & Manage Resources Memory

Disk Space

Handle I/O

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Memory Performance

Main

MemoryProcessor

Cache

Memory

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Processor Clock

Period (P)

Rate (R)

CLK

R = 1/P

1 GHz = 1/1ns

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Performance Equation

Processor Execution Time (T)

Number of Machine Language Instructions (N)

Average Steps per Machine Instruction (S)

Clock Rate (R)

Performance Measurement (Benchmarking)

TN S

R

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Pipelining

F1 E1

I1

F2 E2

I2

F3 E3

I3

Sequential Execution

F1 E1I1

F2 E2I2

F3 E3I3

Pipelined Execution

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Parallel Processing

Parallel Execution

Superscalar

Multiprocessors

Shared-Memory

Multicomputers

Message-Passing

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CISC vs RISC

Complex Instruction Set Computers (CISC)

Smaller N

Larger S

Reduced Instruction Set Computers (RISC)

Larger N

Smaller S

Easier to Pipeline

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Review

Binary

Hex

2's-complement

Overflow