Fred Chen & Lixin Su Fred Chen & Lixin Su SOI DRAM SOI DRAM Low Power, Multi-Gigabit DRAM Cell Low Power, Multi-Gigabit DRAM Cell Design Issues Using SOI Technology Design Issues Using SOI Technology Fred Chen & Lixin Su May 12, 1999 A Presentation for EE241 Term Project Department of Electrical Engineering and Computer Sciences University of California at Berkeley
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Fred Chen & Lixin Su SOI DRAM Low Power, Multi-Gigabit DRAM Cell Design Issues Using SOI Technology Fred Chen & Lixin Su May 12, 1999 A Presentation for.
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Fred Chen & Lixin Su Fred Chen & Lixin Su SOI DRAMSOI DRAM
Low Power, Multi-Gigabit DRAM Cell Low Power, Multi-Gigabit DRAM Cell Design Issues Using SOI TechnologyDesign Issues Using SOI Technology
Fred Chen & Lixin Su
May 12, 1999
A Presentation for EE241 Term ProjectDepartment of Electrical Engineering and Computer Sciences
University of California at Berkeley
Fred Chen & Lixin Su Fred Chen & Lixin Su SOI DRAMSOI DRAM
Outline of the ProjectOutline of the Project
• Background Study– SOI Technology– Low Power DRAM Design
• DRAM Conceptual Design Using SOI– Spice3 for SOI Simulation– Simulations/Results/Conclusions
• Summary and Future Work
Fred Chen & Lixin Su Fred Chen & Lixin Su SOI DRAMSOI DRAM
SOI Technology for DRAMSOI Technology for DRAM
Fully Depleted (FD) Partially Depleted (PD)
Dynamically Depleted (DD)
Tbox
Substrate
Body
Source DrainDepletion
GateVs
Vg Vd
Tox
TsiVbVp
Vbg
Fred Chen & Lixin Su Fred Chen & Lixin Su SOI DRAMSOI DRAM
SOI Technology for DRAMSOI Technology for DRAM
Low Power• Small channel leak for same drivability (1)
• Junction leak reduction (3)
• Charge/discharge current reduction (2)
• Body control current reduction (6)
Related SOI Features
(1) Small S-factor (4) Small substrate bias effect
(2) Small Junction Cap. (5) Complete body isolation
(3) Small Junction Area (6) Small Body Cap.
Low Voltage • High drive capability for same leak (1)