FPGA and CADs

FPGA and CADsPresented by Peng Du & Xiaojun BaoPresented by Peng Du & Xiaojun Bao

INRTODUCTION

The History of Programmable LogicThe History of Programmable Logic

Virtex-II Platform FPGA from Xilinx

•Highest Density FPGAs in The Industry

•Up to XC2V8000 (8 million systems gates, 104,832LCs) •Up to 1108 user I/O’s in the most advance package offering (FG1152, and FG1517

FPGA Programming Technologies

SRAM Programming TechnologySRAM Programming Technology

Anti-fuse Programming TechnologyAnti-fuse Programming Technology

Erasable Programming TechnologyErasable Programming Technology

FPGA ArchitectureFPGA Architecture

All FPGAs are composed of three All FPGAs are composed of three fundamental components:fundamental components:

Logic blocksLogic blocks

I/O blocksI/O blocks

Programmable routingProgrammable routing

A Generic FPGA

I/O blockI/O block

Programmable Programmable routingrouting

Logic Logic blockblock

FPGA Logic Block Architecture

Look-up Table (LUTs)Look-up Table (LUTs)

The logic block used in an FPGA strongly influences the FPGA speed and area-efficiency. While many different logic blocks have been used in FPGAs, most current commercial FPGAs use logic blocks based on:

Structure of LUT

Use Different Input LUTs to Implement A Boolean Function

Number of Blocks and Block Area

800800

700700

600600

500500

Number ofNumber of

BlocksBlocks

5050

3030

1010

BlockBlock

AreaArea

22 33 44 55 66 77

Number of inputs Number of inputs

Structure of Cluster-based Logic Block

FPGA Routing Architecture

Island – Style FPGAIsland – Style FPGA Row – Based FPGARow – Based FPGA Sea – Gates FPGASea – Gates FPGA Hierarchical FPGAHierarchical FPGA

Commercial FPGAs can be classified into the four groups, based on their routing architecture.

The Four Classes of FPGA

An Island – Based FPGA

Example channel segmentation distribution

SRAM Programming Technology

Advantages and Disadvantages of SRAM Programming

The major advantage of this technology is The major advantage of this technology is that FPGA can be reconfigured (in-circuit) that FPGA can be reconfigured (in-circuit) very quickly and can be produced using a very quickly and can be produced using a standard CMOS process technology.standard CMOS process technology.

The chip area required by SRAM approach The chip area required by SRAM approach is relatively large.is relatively large.

Anti-fuse Programming Technology

An anti-fused normally presents a high-impedance state but can be “fused” into a low-impedance state when programmed by a high voltage. The anti-fuse used in each of FPGAs from different company differs in construction . But their function is the same.

Actel anti-fuse – PLICE

Quicklogic anti-fuse - ViaLink

Advantages and Disadvantages of Anti-fuse Programming Anti-fuses chip area are small and Anti-Anti-fuses chip area are small and Anti-

fuses have a significantly lower on fuses have a significantly lower on resistance and parasitic capacitance than resistance and parasitic capacitance than transistors, reducing RC delays in the transistors, reducing RC delays in the routing.routing.

The major disadvantages of anti-fuses is The major disadvantages of anti-fuses is that their manufacture requires that their manufacture requires modifications to the basic CMOS process.modifications to the basic CMOS process.

Introduction

This technology is the same as that used in EPROM and EEPROM memories.

EPROM programming Technology

Advantages and Disadvantages of EPROM and EEPROM Programming

The major advantage of EPROM is that it The major advantage of EPROM is that it requires re-programmable but do not requires re-programmable but do not require external storage. EEPROM can be require external storage. EEPROM can be re-programmed in-circuit.re-programmed in-circuit.

A disadvantage of EPROM is that the A disadvantage of EPROM is that the resistor consumes static power. And resistor consumes static power. And EEPROM requires more chip area and EEPROM requires more chip area and multiple voltage sources.multiple voltage sources.