x Jitter Attenuators and Clock Gener nternet Infrastructure
Flexibility meets performance in the si534x clock generators
Dec 02, 2014
The Si534x family is a natural born clock generator and jitter cleaner for the Internet Infrastructure. Without any compromises, your design benefits from 100 Hz to 800 MHz output while meeting the 10/40/100G PHY jitter spec.
Learn more about the any frequency, format and output clock generators and jitter attenuators on http://www.silabs.com/timing
Ultra-Frequency-Flexible Si534x “Clock-Tree-on-a-Chip” Family Features First Fractional Synthesis and Jitter Attenuation Clocks with less than 100 fs Jitter
"The combination of Silicon Labs’ easy-to-use ClockBuilder Pro software and high-performance Si534x portfolio provides the best solution available today for clock synthesis and jitter attenuation, offering unsurpassed jitter performance and frequency flexibility for high data rate applications."
Skyrocketing demands for bandwidth and the growing complexity of Internet infrastructure and data center systems are driving the need for a wide variety of clocks at different frequencies, signaling formats and voltage levels. Jitter performance requirements to support the highest data rates for 10/40/100G networks are also very demanding.
Learn more about the any frequency, format and output clock generators and jitter attenuators on http://www.silabs.com/timing
Ultra-Frequency-Flexible Si534x “Clock-Tree-on-a-Chip” Family Features First Fractional Synthesis and Jitter Attenuation Clocks with less than 100 fs Jitter
"The combination of Silicon Labs’ easy-to-use ClockBuilder Pro software and high-performance Si534x portfolio provides the best solution available today for clock synthesis and jitter attenuation, offering unsurpassed jitter performance and frequency flexibility for high data rate applications."
Skyrocketing demands for bandwidth and the growing complexity of Internet infrastructure and data center systems are driving the need for a wide variety of clocks at different frequencies, signaling formats and voltage levels. Jitter performance requirements to support the highest data rates for 10/40/100G networks are also very demanding.
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Si534x Jitter Attenuators and Clock Generators for Internet Infrastructure
With new mobile traffic, IoT node deployments, and everything moving to the cloud…
12B MOBILE in 2020
50B IoT NODES
In 2020
EVERYTHINGCLOUD
…the Internet traffic is forecasted to growover 5 x in the coming years.
44K
248K
Source: Cisco VNI, Feb 2014, Silicon Labs estimates
Tremendously complex backbone systems and networks make the Internet simple, fast and reliable for us as users.
ACCESS &AGGREGATION
CLOUD &DATA CENTER
METRO & CORENETWORKS
We call this backbone the “Internet Infrastructure,” which represents the backbone infrastructure for data transportation and exchange globally.
Leading Internet Infrastructure providers rely on our Timing solutions because of the higher performance and ease-of-use
TECHNOLOGYCMEMS | DSPLL | MultiSynth
EASE OF USEConfigurable | Integrated
SOLUTIONSComprehensive | Partnerships
We understand diverse data services require many different clocks…
Optical Transport
Networking
1G Ethernet (1 Gb/s)OC-3 (155.52 Mb/s)3G-SDI (2.97 Gb/s)10G Ethernet (10 Gb/s)Fibre Channel (1.0625 Gb/s)
And there’re many challenges for the clock tree designer
• Users demanding new & diverse services
• Video streaming, video, data, storage, security
• FPGA/ASIC/PHY require diverse mix of frequencies, formats
• High-speed 10G+ clocks must have very low jitter
• Maximize communications port density
• Support faster 1/10/40/100G+ data rates
• Decrease costs and TTM
To help you design your Internet Infrastructure applications, we’ve launched the new jitter clock family
Any-Frequency Clocking Enables Single IC Clock Trees
Solutions:• Any frequency on any output: 1 kHz to 800 MHz
• Any format on any output: LVPECL, CML, LVDS,
HCSL, LVCMOS, HSTL, SSTL
• Exact clock synthesis (0 ppm error)
• Best-in-class jitter (100 fs RMS)
• 10 differential outputs or 20 single-ended outputs
• Accommodates any crystal or
reference clock frequency
• I2C programmable and pin-controlled options
With ClockBuilder Pro, you can also create an optimized clock for your product in minutes!
Define and validate your clock plan in CBGo (optional)
E-mail your design’s project file to CBPro (optional)
Enter and/or complete your configuration
Test on an Evaluation Board
Create Part Number. Get confirmation email in < 1 min!
Contact Sales or Distributor and place sample order
Receive your custom, pre-programmed samples in 2 weeks
www.silabs.com/CBPro
“I ran 60 different divide ratios and ClockBuilder Pro hit all of them –
This device will be absolutely beautiful!”
TELECOM CUSTOMER
If you want to test our timing solution yourself,
PRODUCT DATASHEET
www.silabs.com/TIMING
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