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Programmable Constant Power Limit (Full ACInput Range)
Internal OTP Sensor with Hysteresis
Build-in 5ms Soft-Start Function
Input Voltage Sensing (VIN Pin) for Brown-In/OutProtection with Hysteresis and Line Over-VoltageProtection
Appl ications
General-purpose switched-mode power supplies andflyback power converters, including:
LCD Monitor Power Supply
Open-Frame SMPS
Description
This highly integrated PWM controller provides severalfeatures to enhance the performance of flybackconverters.
To minimize standby power consumption, a proprietaryadaptive green-mode function reduces switchingfrequency at light-load condition. To avoid acoustic-noise problems, the minimum PWM frequency is setabove 23kHz. This green-mode function enables thepower supply to meet international power conservationrequirements, such as Energy Star ®. With the internalhigh-voltage startup circuitry, the power loss caused bybleeding resistors is also eliminated. To further reducepower consumption, FAN6755W/UW uses the BiCMOSprocess, which allows an operating current of only 2mA.The standby power consumption can be under 100mWfor most of LCD monitor power supply designs.
FAN6755W/UW integrates a frequency-hopping functionthat reduces EMI emission of a power supply withminimum line filters. Its built-in synchronized slopecompensation achieves a stable peak-current-modecontrol and improves noise immunity. The proprietary,external line compensation ensures constant outputpower limit over a wide AC input voltage range from90V AC to 264V AC.
FAN6755W/UW provides many protection functions.The internal feedback open-loop protection circuitprotects the power supply from open feedback loopcondition or output short condition. It also has lineunder-voltage protection (brownout protection) and over-voltage protection using an input voltage sensing pin(VIN).
FAN6755W/UW is available in a 7-pin SOP package.
ENERGY STAR® is a registered trademark of the U.S. Department of Energy and the U.S. Environmental Protection Agency.
Line-voltage detection. The line-voltage detection is used for brownout protection with hysteresis.Constant output power limit over universal AC input range is also achieved using this VIN pin. It
is suggested to add a low-pass filter to filter out line ripple on the bulk capacitor. Pulling VINHIGH also triggers auto-restart protection.
2 FBThe signal from the external compensation circuit is fed into this pin. The PWM duty cycle isdetermined in response to the signal on this pin and the current-sense signal on the SENSE pin.
3 SENSECurrent sense. The sensed voltage is used for peak-current-mode control and cycle-by-cyclecurrent limiting.
4
GND Ground
5 GATE The totem-pole output driver. Soft-driving waveform is implemented for improved EMI.
6 VDDPower supply. The internal protection circuit disables PWM output as long as VDD exceeds theOVP trigger point.
7 HV For startup, this pin is pulled HIGH to the line input or bulk capacitor via resistors.
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or beoperable above the recommended operating conditions and stressing the parts to these levels is not recommended.In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.The absolute maximum ratings are stress ratings only.
Symbol Parameter Min. Max. Unit
VVDD DC Supply Voltage(1, 2)
30 V
VFB FB Pin Input Voltage -0.3 7.0 V
VSENSE SENSE Pin Input Voltage -0.3 7.0 V
VVIN VIN Pin Input Voltage -0.3 7.0 V
VHV HV Pin Input Voltage 700 V
PD Power Dissipation (T A<50°C) 400 mW
JA Thermal Resistance (Junction-to-Air) 150 C/W
TJ Operating Junction Temperature -40 +125 C
TSTG Storage Temperature Range -55 +150 C
TL Lead Temperature (Wave Soldering or IR, 10 Seconds) +260 C
ESD
Human Body Model,JEDEC: JESD22-A114
All Pins Except HV Pin 5.5
kVCharged Device Model,JEDEC: JESD22-C101
All Pins Except HV Pin 2.0
Notes:1. All voltage values, except differential voltages, are given with respect to the network ground terminal.2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.3. ESD with HV pin: CDM=2000V (FAN6755W) or 1500V (FAN6755UW), and HBM=3500V.
SOURCE Gate Source Current VDD=15V, GATE=6V 700 mA
VGATE-
CLAMP_1 Gate Output Clamping Voltage VDD=22V 18 V
Over-Temperature Protection Section (OTP)
TOTP Protection Junction Temperature(4,6)
140 °C
TRestart Restart Junction Temperature(5,6)
TOTP-25 °CNotes:4. When activated, the output is disabled and the latch is turned off.5. The threshold temperature for enabling the output again and resetting the latch after over-temperature protection
has been activated.6. These parameters are guaranteed by design.
For startup, the HV pin is connected to the line input(1N4007 / 100KΩ recommended) or bulk capacitorthrough a resistor, RHV. Startup current drawn from pin
HV (typically 3.5mA) charges the hold-up capacitorthrough the diode and resistor. When the VDD capacitorlevel reaches VDD-ON, the startup current switches off. Atthis moment, the VDD capacitor only supplies theFAN6755W/UW to maintain VDD before the auxiliarywinding of the main transformer to provide the operatingcurrent.
Operating Current
Operating current is around 2mA. The low operatingcurrent enables better efficiency and reduces therequirement of VDD hold-up capacitance.
Green-Mode Operation
The proprietary green-mode function provides an off-time modulation to reduce the switching frequency inlight-load and no-load conditions. The on time is limitedfor better abnormal or brownout protection. VFB, which isderived from the voltage feedback loop, is taken as thereference. Once VFB is lower than the threshold voltage,switching frequency is continuously decreased to theminimum green-mode frequency of around 23KHz.
Current Sensing / PWM Current Limit ing
Peak-current-mode control is utilized to regulate outputvoltage and provide pulse-by-pulse current limiting. Theswitch current is detected by a sense resistor into theSENSE pin. The PWM duty cycle is determined by this
current sense signal and VFB, the feedback voltage.When the voltage on the SENSE pin reaches aroundVCOMP=(VFB –0.6)/4, a switch cycle is terminatedimmediately. VCOMP is internally clamped to a variablevoltage around 0.83V for output power limit.
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-onspike occurs on the sense resistor. To avoid prematuretermination of the switching pulse, a leading-edgeblanking time is built in. During this blanking period, thecurrent-limit comparator is disabled and cannot switchoff the gate driver.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at16V and 7.8V in normal mode. During startup, the hold-up capacitor must be charged to 16V through the startupresistor to enable the IC. The hold-up capacitorcontinues to supply VDD before the energy can bedelivered from auxiliary winding of the main transformer.VDD must not drop below 7.8V during startup. ThisUVLO hysteresis window ensures that the hold-upcapacitor is adequate to supply VDD during startup.
Gate Outpu t / Soft Driv ing
The BiCMOS output stage is a fast totem-pole gatedriver. Cross conduction has been avoided to minimizeheat dissipation, increase efficiency, and enhance
reliability. The output driver is clamped by an internal18V Zener diode to protect power MOSFET transistorsagainst undesirable gate over voltage. A soft drivingwaveform is implemented to minimize EMI.
Soft-Start
For many applications, it is necessary to minimize theinrush current at startup. The built-in 5.5ms soft-startcircuit significantly reduces the startup current spike andoutput voltage overshoot.
Slope Compensation
The sensed voltage across the current-sense resistor isused for peak-current-mode control and pulse-by-pulse
current limiting. Built-in slope compensation improvesstability and prevents sub-harmonic oscillation.FAN6755W/UW inserts a synchronized positive-goingramp at every switching cycle.
Constant Output Power Limit
For constant output power limit over universal input-voltage range, the peak-current threshold is adjusted bythe voltage of the VIN pin. Since the VIN pin isconnected to the rectified AC input line voltage throughthe resistive divider, a higher line voltage generates ahigher VIN voltage. The threshold voltage decreases asVIN increases, making the maximum output power athigh-line input voltage equal to that at low-line input. The
value of R-C network should not be so large that itaffects the power limit (shown in Figure 21). R and C
VDD over-voltage protection prevents damage due toabnormal conditions. Once the VDD voltage is over theover-voltage protection voltage (VDD-OVP), and lasts fortD-VDDOVP, the PWM pulses are disabled. When the VDD voltage drops below the UVLO, PWM pulses start again.Over-voltage conditions are usually caused by openfeedback loops.
Brownout Protection
Since the VIN pin is connected through a resistivedivider to the rectified AC input line voltage, it can alsobe used for brownout protection. If VIN is less than 0.7V,the PWM output is shut off. When VIN reaches over0.9V, the PWM output is turned on again. Thehysteresis window for ON/OFF is around 0.2V. Thebrownout voltage setting is determined by the potentialdivider formed with RUpper and RLower . Equations tocalculate the resistors are shown below:
)Vunit(,VRR
RV AC
Upper Lower
Lower IN
2 (1)
Thermal Overload Protection
Thermal overload protection limits total powerdissipation. When the junction temperature exceeds TJ=
+135C, the thermal sensor signals the shutdown logicand turns off most of the internal circuitry. The thermalsensor turns internal circuitry on again after the IC’s
junction temperature drops by 25C. Thermal overloadprotection is designed to protect the FAN6755W/UW inthe event of a fault condition. For continual operation, donot exceed the absolute maximum junction temperature
of TJ = +150C.
Limited Power Control
The FB voltage is saturated HIGH when the powersupply output voltage drops below its nominal value andshut regulator (KA431) does not draw current throughthe opto-coupler. This occurs when the output feedbackloop is open or output is short circuited. If the FB voltageis higher than a built-in threshold for longer than tD-OLP,PWM output is turned off. As PWM output is turned off,
VDD begins decreasing since no more energy isdelivered from the auxiliary winding.
When VDD goes below the turn-off threshold (~7.5V), thecontroller is totally shut down. VDD is charged up to theturn-on threshold voltage of 16V through the startupresistor until PWM output is restarted. This protectionfeature continues as long as the over loading conditionpersists. This prevents the power supply fromoverheating due to overloading conditions.
Noise Immunity
Noise on the current sense or control signal may causesignificant pulse-width jitter, particularly in continuous-
conduction mode. Slope compensation helps alleviatethis problem. Good placement and layout practicesshould be followed. Avoiding long PCB traces andcomponent leads, locating compensation and filtercomponents near the FAN6755W/UW, and increasingthe power MOS gate resistance improve performance.
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:http://www.fairchildsemi.com/packaging/.