International University for Science & Technology College of Engineering and Technology Electrical Engineering Department Experiment No.5: JFET & MOSFET 5-1 The Objectives: 1. Intr od uc ing JFET. 2. Oper at ing ra ng e. 3. Drawing JFET tr ans fer ch aracteri stic s. 4. Drawing transfer charac ter istics of the MOS FET . 5. Drawing outp ut cha rac teri stic s of the MOS FET. 5-2 the Required Equipments: − Master Board. − Board Number 70016. − Computer. − Transistors: BF 244 & BUZ 73. 5-3 Introduction: Transistors can be grouped into two major divisions: bipolar and field-effect. In the previous experiments we studied BJTs, which utilize a small current to control a larger current. In this experiment, we'll introduce the general concept of the FET - a device utilizing a small voltage to control current - and then focus on one particular type: the JFET. All field-effect transistors are unipolar rather than bipolar transistors. That is, the current through them is comprised either of electrons through an N-type semiconductor or holes through a P-type semiconductor. This becomes more evident when a physical diagram of the device is seen. There are tow types of JFET: P-Channel JFET and N-Channel JFET. Figure 5-1 In a JFET, the controlled current passes from source to drain and the controlling voltage is applied between the gate and source. With no voltage applied between gate and source, the channel is a wide-open path for electrons to flow. However, if a voltage is applied between gate and source of such polarity that it reverse-biases
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
the PN junction, the flow between source and drain connections becomes limited, or regulated, just as
it was for bipolar transistors with a set amount of base current. Maximum gate-source voltage pinches
off all current through source and drain, thus forcing the JFET into cutoff mode.
This action may be likened to reducing the flow of a liquid through a flexible hose by squeezing it:
with enough force, the hose will be constricted enough to completely block the flow.
Figure 5-2
MOSFET:
Figure 5-3
Placing an insulating layer between the gate and the channel allows for a wider range of control (gate)
voltages. The insulator is typically made of an oxide therefore this type of device is called a Metal-
Oxide-Semiconductor FET (MOSFET) or Insulated-Gate FET (IGFET). The bias voltage on the gateterminal either attracts or repels the majority carriers of the substrate across the PN junction with the
channel. This narrows (depletes) or widens (enhances) the channel, respectively, as V GS changes
polarity.
For N-channel MOSFETs, positive gate voltages (VGS > 0) repel holes from the channel into the
substrate, thereby widening the channel and decreasing channel resistance. Conversely, VGS < 0
causes holes to be attracted from the substrate, narrowing the channel and increasing the channel
resistance. The polarities discussed in this example are reversed for P-channel devices.
The common abbreviation for an N-channel MOSFET is NMOS , and for a P-channel MOSFET,
PMOS .
Since MOSFETs can both deplete the channel and also enhance it, the construction of MOSFET
devices differs based on the channel size in the resting state, VGS = 0. A depletion mode, device (alsocalled a normally on MOSFET) has a channel in resting state that gets smaller as a reverse bias
applied, this device conducts current with no bias applied. An enhancement mode device (also called
a normally off MOSFET) is built without a channel and does not conduct current when VGS = 0;
increasing forward bias forms a channel that conducts current.