PICREF-1 1997 Microchip Technology Inc. page 1 PICREF-1 SCHEMATICS The UPS may be split into 4 main circuits: Input Power Factor Correction, Battery Boost, Free-Running Chop- per, and Inverter. The UPS is an on-line device which normally will have the Power Factor Correction circuit feeding the Chopper, which then feeds the Inverter. If the input power should be lost, the Power Factor Cor- rection circuit falls out of the power flow and the Battery Boost circuit automatically provides power to the Chop- per. The Inverter is driven by the Inverter Drive circuitry, which in turn is controlled by the Inverter Control cir- cuitry containing the microcontroller. UPS circuit board (PCB) power flow is shown in Figure 1. UPS System Overview In the Battery Boost circuit, the transistor pairs are con- nected in parallel for the purpose of handling high cur- rents. The current transformer T2 is connected as shown to sense each pair’s current with just one trans- former, i.e., to prevent it from saturating. The control for the 120V/240V relay (power switch) was not implemented. Wherever input power monitoring would take place, monitoring for 120 or 240V would also occur and switch the relay. These functions would be placed before the PFC circuit. Power Factor Correction The Power Factor Correction circuit is provisional, so the parts listed are generic parts. FIGURE 1: PCB POWER FLOW Battery Boost PCB Power Factor Correction PCB Free-Running Chopper PCB Inverter Drive Card Inverter Control Card From Battery From Input Filter PIC17C43, Hardware Protection H-Bridge (Inverter) IGBT Drivers To Output Filter Power Flow Control Other Circuitry PCB
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PICREF-1
1997 Microchip Technology Inc. page 1
PICREF-1 SCHEMATICS
The UPS may be split into 4 main circuits: Input PowerFactor Correction, Battery Boost, Free-Running Chop-per, and Inverter. The UPS is an on-line device whichnormally will have the Power Factor Correction circuitfeeding the Chopper, which then feeds the Inverter. Ifthe input power should be lost, the Power Factor Cor-rection circuit falls out of the power flow and the BatteryBoost circuit automatically provides power to the Chop-per.
The Inverter is driven by the Inverter Drive circuitry,which in turn is controlled by the Inverter Control cir-cuitry containing the microcontroller.
UPS circuit board (PCB) power flow is shown inFigure 1.
UPS System Overview
In the Battery Boost circuit, the transistor pairs are con-nected in parallel for the purpose of handling high cur-rents. The current transformer T2 is connected asshown to sense each pair’s current with just one trans-former, i.e., to prevent it from saturating.
The control for the 120V/240V relay (power switch) wasnot implemented. Wherever input power monitoringwould take place, monitoring for 120 or 240V wouldalso occur and switch the relay. These functions wouldbe placed before the PFC circuit.
Power Factor Correction
The Power Factor Correction circuit is provisional, sothe parts listed are generic parts.
FIGURE 1: PCB POWER FLOW
Battery Boost PCB
Power FactorCorrection PCB
Free-Running Chopper PCB
Inverter Drive Card
Inverter Control CardFromBattery
FromInput Filter
PIC17C43, Hardware Protection
H-Bridge (Inverter)
IGBT Drivers
ToOutput Filter
Power Flow
ControlOther Circuitry
PCB
PICREF-1
page 2 1997 Microchip Technology Inc.
FIGURE 2: UPS SYSTEM OVERVIEW - PAGE 1 OF 3
AC
_IN
_HI
AC
_IN
_LO
Inpu
t Filt
er /
Prot
ectio
nPo
wer
Fac
tor
Cor
rect
ion
DC
_BU
S_O
UT
(+)
DC
_BU
S_O
UT
(-)
Tra
nsis
tor
Pai
r A
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
Tra
nsis
tor
Pai
r B
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
B_G
ND
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q2_
DR
IVE
Q1_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE BB
_I_F
DB
K1
BB
_I_F
DB
K2
B_G
ND
BA
TT
ER
Y(+
)BU
S
I_G
ND
PW
R_A
C_I
N_H
I
PW
R_A
C_I
N_L
O
I_G
ND
Bat
tery
Boo
st C
ircu
it
380V
dc B
us+
DC
_BU
SS
I_G
ND
Q1
Q2
T2
T1
D1
D2
D3
L1
C1
C4
C5
R4
IRF
P26
4IR
FP
264
Q3
Q4
IRF
P26
4IR
FP
264
ZZ
3450
ZZ
3449
500u
HD
ES
I 30-
12A
DE
SI 3
0-12
A
DE
SI 3
0-12
A
1uF
600V
1uF
600V
6100
uF35
0V
100k
2W R5
100k
2W
C6
6100
uF35
0V
PICREF-1
1997 Microchip Technology Inc. page 3
FIGURE 2: UPS SYSTEM OVERVIEW - PAGE 2 OF 3
CH
_I_F
DB
K1
CH
_I_F
DB
K2
Q5_
DR
IVE
_RE
T
Q5_
DR
IVE
Q7_
DR
IVE
_RE
T
Q7_
DR
IVE
Q6_
DR
IVE
_RE
T
Q6_
DR
IVE
Q8_
DR
IVE
_RE
T
Q8_
DR
IVE
Free
-Run
ning
Cho
pper
Cir
cuit
CH
_GN
DC
H_G
ND
I_G
ND
+D
C_B
US
S
O_G
ND
X1
X2
I_G
ND
120_
OR
_240
240V
ac o
r 12
0Vac
Pow
er S
wit
ch
Rec
tifi
er C
ircu
it
RE
CT
_WA
V
O_G
ND
T5
T4
Q5
Q6
Q7
Q8
T6
RY
L1
RY
L2
D9
D10
L4
C9
C10
R6
ZZ
9454
ZZ
9454
2N67
702N
6770
2N67
702N
6770
DE
SI 6
0-12
A
DE
SI 6
0-12
A72
5uH
1uF
600V
250u
F35
0V10
0k2W
ZZ
3455
R7
100k
2W
C11
250u
F35
0V
PICREF-1
page 4 1997 Microchip Technology Inc.
FIGURE 2: UPS SYSTEM OVERVIEW - PAGE 3 OF 3
RE
CT
_WA
V
Q11
_C
Q11
_G
Q11
_E
Q10
_C
Q10
_G
Q10
_E
Q12
_C
Q12
_G
Q12
_E
Q9_
C
Q9_
G
Q9_
E
O_G
ND
IGB
T H
-Bri
dge
AC
_OU
T_H
I
AC
_OU
T_L
O
OU
T_I
FD
BK
1
OU
T_I
FD
BK
2
Out
put F
ilte
ring
Q9
Q10
Q11
Q12
C12
C13
C14
C15
C16
C17
R8
L5T
7
0.58
uF0.
58uF
300u
H
L630
0uH
L750
uHZ
Z34
59
10uF
600V
10uF
600V
10uF
600V
10uF
600V
5.6
PICREF-1
1997 Microchip Technology Inc. page 5
FIGURE 3: POWER FACTOR CORRECTION (PFC) – PAGE 1 OF 2
I(S
EN
SE
)
MU
LT
R(T
)
I(S
IN)
RA
MP
C
C(T
)
SIG
_GP
WR
_G
EA
0
INV
OV
P
OU
T
VR
EF
SH
UT
CLK
Vcc
1 2
3 4 5
6 78
910
11
12
13
14
1516
D1
D2
D3
D4
D5
DE
SI6
0-06
A
L150
0µH
R1
375k
R2
375k
C2
1µF
C3
0.47
µF
Vcc
P_G
ND
R3
25.9
8kR
45.
1kR
529
.3k
C1
0.01
µFR
610
kR
71k
P_G
ND
C5
0.47
µFC
61µ
F
INV
OV
P
C4
1µF
R8
12k
R10
10k
R9
4.7k
Q5
2N22
22A
D6
DE
SI6
0-06
A
DC
BU
S O
UT
(+)
(T
o pa
ge 2
)
L1 O
UT
(T
o pa
ge 2
)
P_G
ND
VR
EF
I SE
NS
E (
To
page
2)
U1
UC
3854
Uni
trod
e
(To
page
2)
(To
page
2)
(To
page
2)
P_G
ND
MD
A40
08
MD
A40
08
MD
A40
08
MD
A40
08
PW
R_A
C_I
N_H
I
PW
R_A
C_I
N_L
O
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
PICREF-1
page 6 1997 Microchip Technology Inc.
FIGURE 3: PFC – PAGE 2 OF 2
VD
DV
DD
GN
DG
ND
P_G
ND
INO
UT
OU
T
U2
TS
C42
9CP
A
C7
1µF
C8
0.47
µF
Vcc
P_G
ND
VR
EF
R12
100
R11
20k
I SE
NS
E
D7
1N41
50-1
T1R
1324
Q1
L1 O
UT
R14
24
Q2
R15
24
Q3
R16
24
Q4
R19
180k
R18
180k
P_G
ND
R17
4.87
kR
224.
56k
INV
OV
P
DC
_BU
S_O
UT(-
)
R21
180k
R20
180k
R24
100k
R23
100k
C9
6100
µF
C10
6100
µF
C11
1µF
DC
_BU
S_O
UT(+
)
500:
1
(Fro
m p
age
1)
(Fro
m p
age
1)
(Fro
m p
age
1)
(Fro
m p
age
1)
(Fro
m p
age
1)
P_G
ND
DC
BU
S O
UT
(+)
(Fro
m p
age
1)
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
PICREF-1
1997 Microchip Technology Inc. page 7
FIGURE 4: BATTERY BOOST (BB) CONTROL CARD – PAGE 1 OF 3
INV
E/A
OU
T
Rt
CLK
/LE
B
Ct
RA
MP
SS
OU
T A
OU
T B
Vcc
1 311
6 75
1214
15
4
C6
0.47
µF
Vcc
R20
100
Q1
2N22
22A
U5
UC
3825
AN
I Lim
GN
D
PG
ND
Vc
VR
EF
NL
1µF
1316
2
89
10
C11
470p
FC
1268
0pF
C5
B_G
ND
3 5
2 4
U4a
4049
U4b
4049
R9
2.67
kB
_GN
D
2700
pFC
8
BB
_SY
N1
C10
100p
F
R11
6.8k
BA
TT
ER
Y(+
)BU
S
R10
24
B_G
ND
B_G
ND
C9
0.01
µF
10k
R21
2 31
LM13
9U
6a
- +
4 11
Vcc
C16
10nF
0.1µ
FC
15
B_G
ND
B_G
ND
R22
10k
C17
10nF
69.8
kR
23
VR
EF
LOW
_BA
T
C19
100p
F
B_G
ND
R24
1.5k
510
R12 1kR13
R14
6.2
B_G
ND
D15
D17
D16
D18
1N41
50-1
1N41
50-1
1N41
50-1
1N41
50-1
1/4W
BB
_I_F
DB
K1
BB
_I_F
DB
K2
2.49
kR
252.
49k
R26
B_G
ND
VR
EF
37.5
kR
337
.5k
R2
R1
523
B_G
ND
R8
10k
C7
470p
F
1µF
C18
FE
ED
BA
CK
B_G
ND
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Out
A (
To
page
2)
Out
B (
To
page
2)
PICREF-1
page 8 1997 Microchip Technology Inc.
FIGURE 4: BB – PAGE 2 OF 3
VD
DV
DD
GN
DG
ND
1 INO
UT
OU
T
U2
TS
C42
9CP
A
C3
1µF
C4
0.47
µF
Vcc
B_G
ND
2
45
67
8
R5
1k
B_G
ND
R4
2kO
UT
A
VD
DV
DD
GN
DG
ND
1 INO
UT
OU
T
U3
TS
C42
9CP
A
C13
1µF
C14
0.47
µF
Vcc
B_G
ND
2
45
67
8
R16
1k
B_G
ND
R15
2k
R6
5.6
R7
5.6
R17
5.6
R18
5.6
Tra
nsis
tor
Pai
r A
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
Tra
nsis
tor
Pai
r B
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
B_G
ND
(Fro
m p
age
1)
OU
T B
(Fro
m p
age
1)
B_G
ND
B_G
ND
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q2_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE
Q1_
DR
IVE
Q2_
DR
IVE
Q1_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE
Por
tion
of B
atte
ry B
oost
Circ
uit
PICREF-1
1997 Microchip Technology Inc. page 9
FIGURE 4: BB – PAGE 3 OF 3
D1
D3
D2
D4
1N56
15
1N56
15
1N56
15
1N56
15
T1
C1
33µF
35V
7815
IO
R
1
2
3U
1
C2
100µ
F25
V
Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1 2 3 4
CN
2
CN
1
R19
47
B_G
ND
ZZ
3448
1/2w
1 2 3 4
CN
3
B_G
ND
BB
_I_F
DB
K1
BB
_I_F
DB
K2
FE
ED
BA
CK
B_G
ND
B_G
ND
B_G
ND
B_G
ND
X1
X2
BA
TT
ER
Y(+
)BU
S
LOW
_BA
T
X1
X2
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q2_
DR
IVE
Q1_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE
BB
_SY
N1
PICREF-1
page 10 1997 Microchip Technology Inc.
FIGURE 5: FREE-RUNNING CHOPPER (FRC) CONTROL CARD – PAGE 1 OF 3