1 ESPL Wordlength Optimization with Complexity-and-Distortion Measure and Its Application to Broadband Wireless Demodulator Design Kyungtae Han and Brian L. Evans Embedded Signal Processing Laboratory Wireless Networking and Communications Group The University of Texas at Austin
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ESPL 1 Wordlength Optimization with Complexity-and-Distortion Measure and Its Application to Broadband Wireless Demodulator Design Kyungtae Han and Brian.
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1ESPL
Wordlength Optimization withComplexity-and-Distortion Measure andIts Application to Broadband Wireless
Demodulator Design
Kyungtae Han and Brian L. Evans
Embedded Signal Processing LaboratoryWireless Networking and Communications Group
The University of Texas at Austin
2ESPL
Fixed-Point Design
• Digital signal processing algorithms– Often developed in floating point
– Later mapped into fixed point for digital hardware realization
• Fixed-point digital hardware– Lower area
– Lower power
– Lower per unit production cost
Idea
Floating-Point Algorithm
Quantization
Fixed-Point Algorithm
Code Generation
Target System
Algorithm
Level
Implem
entationL
evel
Range Estimation
Introduction
3ESPL
Fixed-Point Design
• Float-to-fixed point conversion required to target– ASIC and fixed-point digital signal processor core
– FPGA and fixed-point microprocessor core
• All variables have to be annotated manually– Avoid overflow
– Minimize quantization effects
– Find optimum wordlength
• Manual process supported by simulation– Time-consuming
– Error prone
Introduction
4ESPL
Optimum Wordlength
• Longer wordlength– May improve application
performance– Increases hardware cost
• Shorter wordlength– May increase quantization errors
w0: Input wordlength of orthogonal frequency division multiplex (OFDM) demodulator which performs a fast Fourier transform (FFT)w1: Input wordlength of equalizerw2: Input wordlength of channel estimatorw3: Output wordlength of channel estimator
EncoderOFDM
Modulator
WirelessChannelModel
OFDMDemodulator
ChannelEstimator
DecoderBit error
ratetester
DataSource
ChannelEqualizer
w0w1
w2w3
Case Study
11ESPL
Simulations
• Assumptions– Internal wordlengths of blocks have bee
n decided
– Complexity increases linearly as wordlength increases
• Required application performance– Bit error rate of 1.5 x 10-3 (without error
correcting codes)
• Simulation tool– LabVIEW 7.0
Case Study
Input Weight
FFT 1024
Equalizer
(right)
1
Estimator 128
Equalizer (upper)
2
12ESPL
Minimum Wordlengths
• Change one wordlength variable while keeping other variables at high precision{1,16,16,16},{2,16,16,16},...{16,1,16,16},{16,2,16,16},...……{16,16,16,15},{16,16,16,16}
• Minimum wordlength vector is {5,4,4,4}
Case Study
13ESPL
Number of Trials
• Start at {5,4,4,4} wordlength• Next wordlength combinatio
n for complexity measure (α = 1.0)
{5,4,4,4},
{5,5,4,4}, …
• Increase wordlength one-by-one until satisfying required application performance
Case Study
14ESPL
Complexity and Number of Iterations
• Each iteration computes complexity & distortion measures
• Distortion measure: high cost, low iterations
• Complexity-distortion: medium cost, fewer iterations
• Complexity measure: low cost, more iterations• Full search: low cost, more iterations