eGaN® FET DATASHEET EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 1 EPC8002 EPC8002 – Enhancement Mode Power Transistor V DS , 65 V R DS(on) , 480 m I D , 2 A Gallium Nitride is grown on Silicon Wafers and processed using standard CMOS equipment leveraging the infrastructure that has been developed over the last 55 years. GaN’s exceptionally high electron mobility and low temperature coefficient allows very low R DS(on) , while its lateral device structure and majority carrier diode provide exceptionally low Q G and zero Q RR . The end result is a device that can handle tasks where very high switching frequency, and low on-time are beneficial as well as those where on-state losses dominate. EFFICIENT POWER CONVERSION New Product EPC8002 eGaN FETs are supplied only in passivated die form with solder bars Die Size: 2.1 mm x 0.85 mm Applications • Ultra High Speed DC-DC Conversion • RF Envelope Tracking • Wireless Power Transfer • Game Console and Industrial Movement Sensing (LiDAR) Benefits • Ultra High Efficiency • Ultra Low R DS(on) • Ultra Low Q G • Ultra Small Footprint HAL Maximum Ratings V DS Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150° C) 78 Drain-to-Source Voltage (Continuous) 65 V I D Continuous (T A = 25˚C, R θJA = 37 ˚C/W) 2 2 A Pulsed (25˚C, T Pulse = 300 μs) V GS Gate-to-Source Voltage 6 V Gate-to-Source Voltage -4 T J Operating Temperature -40 to 150 ˚C T STG Storage Temperature -40 to 150 Thermal Characteristics R θJC Thermal Resistance, Junction to Case 8.2 ˚C/W R θJB Thermal Resistance, Junction to Board 16 ˚C/W R θJA Thermal Resistance, Junction to Ambient (Note 1) 82 ˚C/W TYP UNIT Note 1: RθJA is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board. See http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics (T J = 25˚C unless otherwise stated) Specifications are with substrate shorted to source where applicable. BV DSS Drain-to-Source Voltage V GS = 0 V, I D = 125 μA 65 V I DSS Drain Source Leakage V DS = 52 V, V GS = 0 V 20 20 100 μA I GSS Gate-to-Source Forward Leakage V GS = 5 V 0.1 1 μA mA Gate-to-Source Reverse Leakage V GS = –4 V 100 V GS(TH) Gate Threshold Voltage V DS = V GS, I D = 0.1 mA 0.8 1.4 2.5 V V R DS(ON) Drain-Source On Resistance V GS = 5 V, I D = 0.5 A 380 480 mΩ V SD 2.6 Source-Drain Forward Voltage I S = 0.4 A, V GS = 0 V www.epc-co.com/epc/Products/eGaNFETs/EPC8002.aspx
6
Embed
EPC8002 – Enhancement Mode Power Transistor - epc …epc-co.com/epc/Portals/0/epc/documents/datasheets/EPC8002... · eGaN FET DATASHEET EPC – EFFICIENT POWER CONVERSION CORPORATION
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Gallium Nitride is grown on Silicon Wafers and processed using standard CMOS equipment leveraging the infrastructure that has been developed over the last 55 years. GaN’s exceptionally high electron mobility and low temperature coefficient allows very low RDS(on), while its lateral device structure and majority carrier diode provide exceptionally low QG and zero QRR. The end result is a device that can handle tasks where very high switching frequency, and low on-time are beneficial as well as those where on-state losses dominate.
EFFICIENT POWER CONVERSION
New Product
EPC8002 eGaN FETs are supplied only in passivated die form with solder barsDie Size: 2.1 mm x 0.85 mm
Applications• Ultra High Speed DC-DC Conversion• RF Envelope Tracking• Wireless Power Transfer• Game Console and Industrial Movement
Sensing (LiDAR)Benefits• Ultra High Efficiency• Ultra Low RDS(on)
• Ultra Low QG
• Ultra Small Footprint
HAL
Maximum Ratings
VDSDrain-to-Source Voltage (up to 10,000 5 ms pulses at 150° C) 78
Drain-to-Source Voltage (Continuous) 65V
ID
Continuous (TA = 25˚C, RθJA= 37 ˚C/W) 2
2A
Pulsed (25˚C, TPulse = 300 µs)
VGS
Gate-to-Source Voltage 6V
Gate-to-Source Voltage -4
TJ Operating Temperature -40 to 150˚C
TSTG Storage Temperature -40 to 150
Thermal Characteristics
RθJC Thermal Resistance, Junction to Case 8.2 ˚C/W
RθJB Thermal Resistance, Junction to Board 16 ˚C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1) 82 ˚C/W
TYP UNIT
Note 1: RθJA is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board. See http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details.
Eective Output Capacitance, Energy Related (Note 2)Eective Output Capacitance, Time Related (Note 3)
RG Gate Resistance
QG Total Gate Charge
QGS Gate-to-Source Charge
QOSS Output Charge
QRR Source-Drain Recovery ChargeNote 2: COSS(ER) is a xed capacitance that gives the same stored energy as COSS while VDS is rising from 0 to 50% BVDSS.Note 3: COSS(TR) is a xed capacitance that gives the same charging time as COSS while VDS is rising from 0 to 50% BVDSS.
VDS = 32.5 V, VGS = 0 V
VDS = 0 to 32.5 V, VGS = 0 V
VDS = 32.5 V, VGS = 5 V, ID = 0.5 A
VDS = 32.5 V, ID = 0.5 A
VDS = 32.5 V, VGS = 0 V
20
pF
Ω
6.7
0.12
8.9
10
57
0.3
133
pC15
46
334
0
24
10
0.18
167
500
26QGD Gate-to-Drain Charge
QG(TH) Gate Charge at Threshold
Figure 1: Typical Output Characteristics at 25°C
VDS– Drain-to-Source Voltage (V)
I D– Dr
ain
Curre
nt (A
)
1.5
1.0
2.0
0.5
0.5 1.5 1.0 2.0 2.5 3.0
VGS
GS
GS
GS
= 5 VV = 4 VV = 3 VV = 2 V
0 0
1.5
1.0
2.0
0.5
0
VGS– Gate-to-Source Voltage (V)
I D– Dr
ain
Curre
nt (A
)
0.5 1.0 1.5 2.0 3.02.5 3.5 4.0 4.5 5.0
Figure 2: Transfer Characteristics
25˚C125˚C
VDS = 3 V
1500
1200
900
600
300
0
VGS– Gate-to-Source Voltage (V)
2.5 3.0 3.5 4.54.0 5.0
Figure 3: RDS(on) vs VGS for Various Drain Currents
Duty Factor = tp/TPeak TJ = PDM x ZθJB x RθJB + TB
Notes:
tp
T
P DM
Duty Factor = tp/TPeak TJ = PDM x ZθJC x RθJC + TC
Notes:
tp
T
P DM
Single Pulse
0.020.01
0.5
0.2
0.10.05
Duty Factors:
10-410-5 10-3 10-2 10-1 1 10
10-410-5 10-3 10-2 10-1 1 10
tp– Rectangular Pulse Duration (s)
Junction-to-Case
Z θJC
Nor
mal
ized
Ther
mal
Impe
danc
e
1
0.1
0.01
0.001
TAPE AND REEL CONFIGURATION4mm pitch, 8mm wide tape on 7” reel
8002 YYYY
ZZZZ
Gate Pad bump is
under this edge of die
Die orientation
dot
Die is placed into pocket bump side down (face side down)
7” reel
Loaded Tape Feed Direction
a
d e f g
c
b
Dimension (mm) target min maxa 8 7.9 8.3b
EPC8002 (Note 1)
Note 1: MSL1 (moisture sensitivity level 1) classified according to IPC/JEDEC industry standard. Note 2: Pocket position is relative to the sprocket hole measured as true position of the pocket,not the pocket hole.
c (see note 2) 3.5 3.45 3.55d 4 3.9 4.1e 4 3.9 4.1
Recommended stencil should be 4 mil (100 μm) thick, must be laser cut, openings per drawing.
Intended for use with SAC305 Type 3 solder, reference 88.5% metals content.
Additional assembly resources available at: http://epc-co.com/epc/DesignSupport/AssemblyBasics.aspx
Information subject to change without notice.
Revised November, 2015
Efficient Power Conversion Corporation (EPC) reserves the right to make changes without further notice to any products herein to improve reliability, function or design. EPC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.
eGaN® is a registered trademark of Efficient Power Conversion Corporation.