EXPERIMENT 1: Open source software such as Linux flavors will be used. Ability to use industry standard tools for Verification and validation. AIM: To Port a compressed Embedded Linux kernel image (Linux 2.6 Kernel) to the RAM of ARM9 Processor and network the Linux-bootable ARM9 Single Board Computer to PC through Ethernet to display a message. TYPE OF PROTOBOARD USED: “EXPLORER” ARM-9 DEVELOPMENT BOARD HOW TO START WITH TRITON IDE Double click on the icon-Triton on your Desktop Select the workspace in which you can create all your projects as shown in the figure below. Click OK. Compiled by R. Mohan Kumar Asst. Prof (Sr.Gr)/ECE
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Transcript
EXPERIMENT 1:
Open source software such as Linux flavors will be used. Ability to use industry standard tools for Verification and validation.
AIM: To Port a compressed Embedded Linux kernel image (Linux 2.6 Kernel) to the RAM of ARM9 Processor and network the Linux-bootable ARM9 Single Board Computer to PC through Ethernet to display a message.
TYPE OF PROTOBOARD USED: “EXPLORER” ARM-9 DEVELOPMENT BOARD
HOW TO START WITH TRITON IDE Double click on the icon-Triton on your Desktop
Select the workspace in which you can create all
your projects as shown in the figure below. Click OK.
Compiled by R. Mohan Kumar Asst. Prof (Sr.Gr)/ECE
Select workspace & Click OK
EMBEDDED SYSTEMS – LAB MANUAL
Triton IDE C/C++ Environment opens as shown in below figure in which you can create new project, open existing one etc.
To create new project go to Project menu
Then click Project New C Project. You will get below figure.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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In the Project Name field, type name of the project as display. Do not use spaces or special characters in the project name.
Select the Target as per the board you have. i.e.ARM9
Select the Variant from the variant list. i.e.AT91SAM9260
Select Operating System as per your requirement. Here we should select Linux as the operating system
Select the Port from Port field. i.e.COM1
Select the Baud Rate from dropdown list.i.e.38400
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
EMBEDDED SYSTEMS – LAB MANUAL
Select the Build options as SDRAM, Download options as ISP Utility, Debug as MONITOR.
You can also change the location of project. For that, uncheck ‘use default location’ and then browse your location.
Check Create Project Using Template. then click NEXT
Below screen will appear, Debug and Release configurations would be checked.
Select the type of project that you want to build. By default Project Type is Executable (Gnu)
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Enter the various fields
&Click NEXT
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Debug-Project can be debugged on target board using serial JTAG and Ethernet
Release-Project is run on Target board without debugging
Uncheck the debug and click FINISH
The project is created and opened in the IDE. You should see the following components:
To create a new file, CLICK FILE > NEW > SOURCE FILE
Browse the source folder location & enter source filename –display.c
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Uncheck debug mode
& click FINISH
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The Projects window contains a tree view of the components of the project, source files and file properties.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Select new Source File
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You can enter the code in the display.c file.
You can double click the display.c tab in the Editor view to expand the view.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Enter your Project
Code here
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Save the display.c by choosing File > Save.
You will notice an asterisk in front of the file name on the tab in the Editor view (Workspace). The asterisk indicates that the file has changed, but has not been saved. So, save the file for every modification in the program.
To compile project you need to select Release mode.
Debug mode: This creates an executable hex file which you, after downloading on the target board, are able to debug.
Release mode: This creates an executable hex file which you can download on the target board, but you won’t be able to debug.
To build project in Release mode----
Right click on the DISPLAY project and point to “Active Build Configuration” and select “Release” as shown in the below screen
To Build Project right click on DISPLAY project and select Build Project.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Select the Release mode & Build your
Project
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Click “Build Console” view to check for any errors as shown in the below figure.
If your project has built successful display.hex will be created.
If there are any errors in the project “Build Console” view will display the error messages and from Build Output view you can check the location of errors in your code. When you build the project, the display.hex is generated
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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SWITCH ON THE POWER SUPPLY OF ARM 9 SINGLE BOARD COMPUTER
Output on HyperTerminal
Open Triton IDE; from TOOLS menu, click Hyper terminal and set the Baud rate as 38400
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Set baud rate as 38400 for
HyperTerminal output
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Type ls to check the list of files, then press enter
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Type cd /var/lib/tftpboot, then press enter
Type ls, then press enter
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Enter your system IP address. Type ping 192.168.0.12, then press enter
To stop the running process, press CONTROL+C
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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To Create a new file in Linux, type touch <your filename>. This command creates an empty file.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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touch display.out
Then press enter
Type ls, then press enter
It creates your file name display.out
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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To change the file permission to read/write & execution operation ,
Type chmod 777 display.out then press enter & type ls, then press enter.
(To get permission to receive/execute the file from your ARM9 EMB linux OS)
It shows the output file name – display.out
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Go to Start. Go to Run mode
Open the command prompt
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Type Oasis\ide\workspace, then press enter
Type c:\windows\system32\ping 192.168.0.240 ,then press enter
Type cd display then cd release, then press enter
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Type dir to check your output file, then press enter
Type c:\windows\system32\tftp –i 192.168.0.240 put display.out, then press enter
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Minimize the run mode and open the HyperTerminal window
Type ./display.out then enter, you will see the output message on hyper terminal window
RESULT:
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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We create the open source software in C/C++ and implement to the ARM9 Linux Boot Shell with simple printing our message in linux kernel. We are able to create source codes for Mutex, Semaphore, Fork, Pipes, Message Send & Receiving and Socket Server Programming, etc.,. The sample codes are given in Appendix A.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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EXPERIMENT 2:
High level language programming (C, C++) and porting it on a processor.
Aim: To implement the I/O Porting using the external peripheral devices in ARM7 Processor (UART, STEPPER MOTOR, Graphical LCD Display, LED Display, SEVEN SEGMENT Display, KEYPAD, ADC/DAC, SD/MMC, I2C, SPI, I2S, CAN, LIN, USB, PCI, Ethernet).
TYPE OF PROTOBOARD USED: Spirit-II / Voyager II ARM-7 Protoboard
HOW TO START WITH TRITON IDE
Double click on the icon-Triton on your Desktop
Select the workspace in which you can create all your projects as shown in the figure below. Click OK.
Triton IDE C/C++ Environment opens as shown in below figure in which you can create new project, open existing one etc.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Select workspace & Click OK
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To create new project go to Project menu
Then click Project New C Project. You will get below figure.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Select New
C project
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In the Project Name field, type name of the project as LED. Do not use spaces or special characters in the project name.
Select the Target as per the board you have. i.e.ARM7
Select the Variant from the variant list. i.e.LPC2148
Select Operating System as per your requirement. Here we should select NONE as the operating system
Select the Port from Port field. i.e.COM1
Select the Baud Rate from dropdown list.i.e.38400
Select the Build options as ROM, Download options as ISP Utility, Debug as MONITOR.
You can also change the location of project. For that, uncheck ‘use default location’ and then browse your location.
Check Create Project Using Template. then click NEXT
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
EMBEDDED SYSTEMS – LAB MANUAL
Below screen will appear, select Debug and Release configurations.
Select the type of project that you want to build. By default Project Type is Executable (Gnu)
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Enter the various fields
&Click NEXT
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Debug-Project can be debugged on target board using serial JTAG and Ethernet
Release-Project is run on Target board without debugging
Uncheck the debug and click FINISH
The project is created and opened in the IDE. You should see the following components:
o The Projects window contains a tree view of the components of the project,
source files and file properties.
o The Source Editor window with a file called LED_main.c open.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Uncheck debug
mode & click
FINISH
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You can enter the code in the LED_main.c file, by replacing the line:
//TODO: You can write your code at here
You can double click the LED_main.c tab in the Editor view to expand the view.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Enter your Project
Code here
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}
Save the LED_main.c by choosing File > Save.
You will notice an asterisk in front of the file name on the tab in the Editor view (Workspace). The asterisk indicates that the file has changed, but has not been saved. So, save the file for every modification in the program.
To compile project you need to select Release mode.
Debug mode: This creates an executable hex file which you, after downloading on the target board, is able to step-by-step debugging.
Release mode: This creates an executable hex file which you can download on the target board but you won’t be able to debug.
To build project in Release mode----
Right click on the LED project and point to Active Build Configuration and select Release as shown in the below screen.
To Build Project right click on LED project and select Build
Project.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Select the Release mode & Build your
Project
EMBEDDED SYSTEMS – LAB MANUAL
Open the build console view to check for any errors as shown in the below figure.
If your project has built successful, LED.hex will be created. Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
EMBEDDED SYSTEMS – LAB MANUAL
If there are any errors in the project, “Build Console” view will display the error messages and from Build Output view you can check the location of errors in your code. When you build the project, the led.hex is generated.
You can see where the new file is generated by opening the C/C++ Projects view and expanding the LED project node as shown in the following figure.
Here LED.hex file is created which is to be downloaded on target board and run the program.
Right click on the LED.hex file generated and click Download as shown below.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Connect the hardware kit with the serial connector and power supply provided. Switch on the hardware kit. Put the switch in ISP mode for the program to be downloaded.
Right click on the LED.hex file and download the executable file on to the board. Once, the program is downloaded, shift the mode from ISP to RUN and reset the board to verify the output.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Right click the *.hex file &
click DOWNLOAD
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DETAILS OF ON BOARD INTERFACES
Switch S1- Power ON/OFF the board
Switch S2- Reset switch
Switch S7- To select ISP or RUN mode
NAME OFINTERFACES
PIN CONFIGURATION
OUTPUTSTATUS
SETTINGS &DESCRIPTIONS
LED & DIPSWITCH
LED (P0.15 to P0.22)Switch (P0.2 to P0.6)& (P0.8 to P0.10)
LED-inputSwitch-output
8 LED’s on by DIP switch
BUZZER Buzzer (P0.7) Buzzer-output Connect JP8 to ON /OFF buzzer
KEYPAD keypad (P0.2 to P0.9) 4x4 matrix Keypad-input7-Segment-output
Numbers display on 7-Segment by keypad
ADCADC – POT connected in (P0.28)
Output on HyperTerminal
Connect JP5 (1-2) for ADC
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
EMBEDDED SYSTEMS – LAB MANUAL
Output on HyperTerminal to verify the output of ADC Program
Once, the program is downloaded, open Triton IDE.
From TOOLS menu ,click Hyper terminal and set the Baud rate as 38400
Then shift the mode from ISP to RUN and reset the board to verify the output on the hyper terminal
RESULT:
We create and implement the simple I/O Porting with LEDs using the GPIO ports in ARM7 Processor. We are able to create and I/O porting of the peripherals like UART, STEPPER MOTOR, Graphical / Text LCD, LED, SEVEN SEGMENT Display, KEYPAD, ADC/DAC, SD/MMC, I2C, SPI, I2S, CAN, LIN, USB, PCI, Ethernet. The sample codes are given in Appendix B.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Set baud rate as 38400 for
HyperTerminal output
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EXPERIMENT 3:
Create FSM of a typical application and implement on an FPGA.
AIM: To create the Finite State Machine for Traffic Light Controller and implement using Xilinx Spartan 3 (XC3S400) FPGA.
Traffic Light controller is implemented on FPGA and verified using Traffic Light Interface Module. There are simple rules for traffic lights on one node, and complex ways of regulating a whole infrastructure of them. It is necessary to adjust general algorithms.Spartan-3 - IM includes a TRAFFIC LIGHT Interface Module. This module is interfaced to the Trainer using 60 pin FRC cable.
DESIGN DESCRIPTION:- Initially all Red Lights will be “ON” (South, West, North, East, Pedestrian) Green Lights will be “ON”, Right, Left & Straight paths are free for Traffic. Yellow Phase will be ON, respective left & pedestrian paths are free for traffic. Same flow is repeated for all four paths. (South, west, north, east).
Flowchart:-
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
EMBEDDED SYSTEMS – LAB MANUAL
To implement Traffic Light controller refer the waveform given below
Algorithm is implemented in VHDL with a 13 state Finite State Machine. Refer Fig
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Fig: State Diagram for Traffic Light Controller
Abbreviation used:
South West
PSG – Pedestrian South Green PWR – Pedestrian West Red
PSR – Pedestrian South Red PWG – Pedestrian West Green
RS – Right South RW – Right West
LS – Left South LW – Left West
SS – Straight South SW – South West
YS – Yellow South YW – Yellow West
REDS – Red South REDW – Red West
North East
PNR- Pedestrian North red PEG – Pedestrian East green
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EMBEDDED SYSTEMS – LAB MANUAL
PNG – Pedestrian North green PER – Pedestrian Ease Red
RN – Right North RE – Right East
LN – Left North LE – Left East
SN – Straight North SE – Straight East
YN - Yellow North YE – Yellow East
REDN – Red North REDE – Red East
EXPERIMENTAL SET UP:
Figure shows the Traffic Light Interface to SPARTAN-3 FPGA
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COMPONENT DIAGRAM
VHD CODE FOR TRAFFIC LIGHT CONTROLLERlibrary IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating---- any Xilinx primitives in this code.--library UNISIM;--use UNISIM.VComponents.all;
entity traffic_fsm is Port ( CLK_4M,RESET : in std_logic;
TRC_LS,TRC_LW,TRC_LN,TRC_LE: out std_logic;TRC_SS,TRC_SW,TRC_SN,TRC_SE: out std_logic;TRC_RS,TRC_RW,TRC_RN,TRC_RE : out std_logic;TRC_REDS,TRC_REDW,TRC_REDN,TRC_REDE : out std_logic;TRC_YS,TRC_YW,TRC_YN,TRC_YE : out std_logic;TRC_PSR,TRC_PWR,TRC_PNR,TRC_PER : out std_logic;TRC_PSG,TRC_PWG,TRC_PNG,TRC_PEG : out std_logic);
end traffic_fsm;--*********************** Abbreviation used ***************************--South PSG ? Pedestrian south (Green)-- PSR ? Pedestrian south (Red)-- TRC_SS ? Straight south
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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-- TRC_RS ? Right south-- TRC_LS ? Left south-- -- TRC_YS ? Yellow south-- REDS ? Red south----West PWR ? Pedestrian west (red )-- PWG ? Pedestrian west (Green)-- TRC_SW ? South west-- TRC_RW ? Right west-- TRC_LW ? Left west-- TRC_YW ? Yellow west-- REDW ? Red west ----North PNR- Pedestrian north red-- PNG ? Pedestrian north green-- TRC_SN ? Straight North -- TRC_RN ? Right north-- TRC_LN ? Left North -- TRC_YN - Yellow north-- REDN ? Red north
--East PEG ? Pedestrian East (green)-- PER ? Pedestrian Ease (Red)-- TRC_SE? Straight East-- RE ? Right East-- TRC_LE ? Left East-- TRC_YE ? Yellow east-- REDE ? Red east**********************************************************************architecture Behavioral of traffic_fsm istype state is (start,south_g,south_orange,south_r,west_g,west_orange, west_r,east_g,east_orange,east_r,north_g,north_orange,north_r);signal ps , ns : state;signal div : std_logic_vector(30 downto 0);signal clk_s : std_logic;signal cnt : std_logic_vector(3 downto 0) ;begin--*************************** Divider **************************process(CLK_4M,RESET)begin
if(RESET = '1') thendiv <= (others => '0');
elsif(CLK_4M'event and CLK_4M = '1') thendiv <= div + 1;
1. Initially the Red light of all the directions is ON.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
EMBEDDED SYSTEMS – LAB MANUAL
2. Traffic starts from the South Direction; hence the green light of South direction goes ON.The signals that are ON, now are :- TRC_LS (left south) –‘1’. TRC_RS (right south) –‘1’. TRC_SS (straight south) –‘1’. TRC_LE (left east) –‘1’. TRC_REDW (red west) –‘1’. TRC_REDN (red north) –‘1’. TRC_REDE (red east) –‘1’. TRC_PSG (pedestrian south red) –‘1’. TRC_PWG (pedestrian west red) –‘1’. TRC_PNG (pedestrian north red) –‘1’. TRC_PEG (pedestrian east red) –‘1’.
Similarly when Yellow light of South direction is ON then the signals that are ON now are
Similarly when Red light of South direction is ON then the signals that are ON now are
TRC_LS (left south) –‘1’. TRC_REDW (red west) –‘1’. TRC_REDN (red north) –‘1’. TRC_REDE (red east) –‘1’. TRC_PSR (pedestrian south red) –‘1’. TRC_PWR (pedestrian west red) –‘1’. TRC_PNR (pedestrian north red) –‘1’. TRC_PER (pedestrian east red) –‘1’.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
EMBEDDED SYSTEMS – LAB MANUAL
During this time all ways are Blocked for 1 second except left south ( ls -‘1’ ) and so on. After that it goes clockwise for all Direction (i.e.:- South then West then North then East) similarly.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Traffic light controller Interface to SPARTAN-3 FPGA
net CLK_4M loc = p181;
net RESET loc = p182;
net TRC_LS loc = p150 #J3-25
net TRC_LW loc = P130 #J3-6
net TRC_LN loc = P125 #J3-9
net TRC_LE loc = p107 #J3-20
net TRC_SS loc = p152 #J3-26
net TRC_SW loc = P146 #J3-4
net TRC_SN loc = p123 #J3-11
net TRC_SE loc = p115 #J3-17
net TRC_RS loc = p111 #J3-23
net TRC_RW loc = P147 #J3-3
net TRC_RN loc = P122 #J3-12
net TRC_RE loc = P114 #J3-18
net TRC_REDS loc = p108 #J3-21
net TRC_REDW loc = P126 #J3-8
net TRC_REDN loc = P120 #J3-13
net TRC_REDE loc = p109 #J3-22
net TRC_YS loc = p113 #J3-24
net TRC_YW loc = P131 #J3-5
net TRC_YN loc = P119 #J3-14
net TRC_YE loc = p106 #J3-19
net TRC_PSR loc = P13 #J3-27
net TRC_PWR loc = p149 #J3-1
net TRC_PNR loc = p117 #J3-10
net TRC_PER loc = P124 #J3-15
net TRC_PSG loc = p12 #J3-28
net TRC_PWG loc = P148 #J3-2
net TRC_PNG loc = p128 #J3-7
net TRC_PEG loc = P116 #J3-16
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HOW TO START WITH Xilinx ISE
[XILINX ISE 9.1 is preferred for low configuration PCs]
Double click on the icon-Xilinx ISE 9.1i on your Desktop
(or)
Start---All Programs---Xilinx ISE 9.1i---Project Manager
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Create a new ISE project which will target the FPGA device on the Spartan-3 IM demo board.To create a new project:
1. Select File > New Project... The New Project Wizard appears.2. Type tutorial in the Project Name field.3 Enter or browse to a location (directory path) for the new project. A tutorial subdirectory is created automatically.4. Verify that HDL is selected from the Top-Level Source Type list.5. Click Next to move to the device properties page.
Enter the Project Name and Location , then click NEXT
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
SOURCEWINDOW
PROCESSWINDOW
WORK SPACE
TRANSCRIPT
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6. Fill in the properties in the table as shown below:
♦Product Category: All
♦Family: Spartan3Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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♦Device: XC3S400
♦Package: PQ208
♦Speed Grade: -4
♦Top-Level Source Type: HDL
♦Synthesis Tool: XST (VHDL/Verilog)
♦Simulator: ISE Simulator (VHDL/Verilog)
♦Preferred Language: Verilog (or VHDL)
Verify that “Enable Enhanced Design Summary” is selected. Leave the default values in the remaining fields.
Click next to proceed to the Create New Source window in the New Project Wizard. At the end of the next section, your new project will be complete.
Create an HDL Source
In this section, you will create the top-level HDL file for your design. Determine the language that you wish to use for the tutorial. Then, continue either to the “Creating a VHDL Source” section below, or skip to the “Creating a Verilog
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Source” section.
Creating a Verilog Source
Create the top-level Verilog source file for the project as follows:
1. Click New Source in the New Project dialog box.
2. Select Verilog Module as the source type in the New Source dialog box.
3. Type in the file name counter.
4. Verify that the Add to Project checkbox is selected.
5. Click Next.
6. Declare the ports for the counter design by filling in the port information as shown below:
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7. Click next, and then Finish in the New Source Information dialog box to complete the new source file template.8. Click Next, then Next, then Finish.
Creating a VHDL Source
Create a VHDL source file for the project as follows:
1. Click the New Source button in the New Project Wizard.
2. Select VHDL Module as the source type.
3. Type in the file name counter.
4. Verify that the Add to project checkbox is selected.
5. Click Next.
6. Declare the ports for the counter design by filling in the port information as shown below:
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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7. Click next, and then Finish in the New Source Wizard - Summary dialog box to complete the new source file template.
8. Click Next, then Next, then Finish.
The source file containing the entity/architecture pair displays the Workspace, and the counter displays in the Source tab, as shown below:
Click on the symbol of FPGA device ,then right click to select New source
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Write the VHDL code in VHDL editor
Testing the Traffic Controller design on the FPGA board
Once design is synthesized successfully it is ready to be implemented on FPGA.
Step 1: The first step for implementation is to generate constraint file. The constraint file specifies the FPGA pins used for accessing the design.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Step 2: To create new UCF file. Right click on the device name and select NEW SOURCE. Select IMPLEMENTATION CONSTRAINT FILE in NEW SOURCE WIZARD and give suitable name for the Project. Click NEXT for the DEFINE MODULE Window.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
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Step 3: Click on the UCF File (Traffic_Light.ucf) and Select the Edit Constraints (Text). Write the constraint file as shown in figure below.
For implementing your design, from the source window select “Generate Programming
File” from the process menu.
Compiled by R. Mohan Kumar Asst. Prof( Sr.Gr)/ECE CE
Step 4: Procedure for downloading using iMPACT
Boundary Scan Mode
1. Right click on “Configure Device (iMPACT)” -> and Say RUN or Double click on “Configure Device (iMPACT)”.
2. Right click in workspace and select “Initialize chain” .The device is seen.
3. Right click on the device and select “Program”.
RESULT:
We had done the Finite State Machine for Traffic Light Controller and implement using Xilinx Spartan 3 (XC3S400) FPGA.
SOUTH
NORTH
W
E
S
T
E
A
S
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TRAFFIC LIGHT CONTROLLER ON 4 ROAD JUNCTIONS
TRAFFIC LIGHT CONTROLLER ON OUTPUT LEDS
EXPERIMENT 4:
Application development, download partition between FPGA and ARM on Performance characteristics.
AIM: To create and analyze performance between ARM and FPGA Processor application using a simple 4-bit counter program.
TYPE OF PROTOBOARD USED: Herculis ARM-FPGA Fusion Board
PROCEDURE:1. Create and Generate the Hex file for 4 bit Counter C / C++ program with
en0 <= en1 and (not en2);PROCESS(RESET,CLK_4M,en0)BEGIN IF(RESET = '1') THEN CNTR <= (OTHERS =>'0'); ELSIF(CLK_4M'EVENT AND CLK_4M = '1')THEN IF(en0 = '1')THEN CNTR <= CNTR + '1';
END IF; END IF;END PROCESS;
COUNTER <= CNTR;
end Behavioral;
--------------------------------------------------------UCF File for ARM+FPGA Fusion Board
--------------------------------------------------------net "CLK_4M" loc = "p79";net "RESET" loc = "p113";net "COUNTER<0>" loc = "p61";net "COUNTER<1>" loc = "p63";net "COUNTER<2>" loc = "p64";net "COUNTER<3>" loc = "p62";
5. Download the FPGA_Counter.bit file in to ARM+FPGA Fusion Board.6. Now check the FPGA Counter output in LD1 to LD4 and verify the ARM and FPGA
Counter delay variations.
RESULT:
We create and analyze performance between ARM and FPGA Processor with 4-bit counter application by Xilinx ISE and Triton. Then, verify the speed and performance of Counter on ARM+FPGA Fusion Board. We able to create applications like UART and RTC based application on Fusion Board similarly.
EXPERIMENT 5:
Application development & Hardware and Software Partitioning.
AIM: To Partition the FPGA using SOC concept and implement a simple 4-bit Counter program with a Embedded Core
TYPE OF PROTOBOARD USED: “Herculis” ARM-FPGA Fusion Board
Introduction
This lab guides you through the process of using Xilinx Platform Studio (XPS) to create a simple processor system. An MHS file and design netlists will be created.
Objectives
After completing this lab, you will be able to: Create an XPS project by using Base System Builder (BSB) Create a Counter hardware design by using Xilinx IPs available in the
Embedded Design Kit
Procedure
The purpose of the lab exercises is to walk you through a complete hardware and software processor system design. Each lab will build upon the previous lab.
In this lab, you will use the BSB of the XPS system to create a processor system consisting of the following processor IP: Microblaze DCM OPB bus OPB BRAM controller BRAM GPIO LEDs for displaying results
Figure 1-1. Processor IP
This lab comprises three primary steps: You will create a project using Base System Builder, analyze the project created, and generate the processor system netlists. Below each general instruction for a given procedure, you will find accompanying step-by-step directions and illustrated figures providing more detail for performing the general instruction. If you feel confident about a specific instruction, feel free to skip the step-by-step directions and move on to the next general instruction in the procedure.
Open the Project Step 1
Launch Xilinx Platform Studio (XPS) and create a project file in D:/mb/ by using Base System Builder. Select the Microblaze processor, the processor clock frequency as 32 MHz, the bus clock frequency as 32 MHz, and no debug interface.
1. Open XPS by selecting Start Programs Xilinx Platform Studio 8.1i Xilinx Platform Studio
Do not select Platform Studio SDK; this opens the Software Development Kit IDE.
2. Select Base System Builder Wizard and Click Ok
Figure 1-2. New Base System Builder-Based Project Creation
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This opens the Create New Project Using Base System Builder Wizard dialog box.
Figure 1-3. Create New Project Using Base System Builder Wizard Dialog Box
3. Specify the Project File as D:/mb/system.xmp and click <OK>
4. Select the “I would like to create a new design option”
5. Click Next to display the Select Board dialog box. Select I would like to create system for Custom board.
Figure 1-4. Select I would like to create a system for custom board
6. Click Next to display the Select Processor dialog box
7. Choose the FPGA device configuration
Figure 1-5. Select Processor Dialog Box
8. Select Microblaze as the processor , spartan3 as a architecture, xc3s400 as device, PQ208 as a package, -4 as a speed grade.
9. Click Next to display the Configure Microblaze dialog box. Specify settings to match the following:
Reference Clock Frequency: 4 MHz o This the external clock source on the board you are using. This clock will be used to generate the processor and bus clocks. The values allowed may depend on the FPGA or board you are using because certain on-chip resources (DCMs) may be required to perform clock division or multiplication.
Processor Bus Clock Frequency: 4 MHz
Reset polarity – Active High
Debug Interface: No debug
Local memory (data and instruction) – 8kB
Cache setup – No cache
Figure 1-6. Configure Microblaze Dialog Box
Select LEDs as the external device.
10. Click Next to display the Configure IO Interfaces dialog box. Click on add device and select the GPIO option in IO interface type. Select LEDS under Device tab and click OK. Select 4 under GPIO Data width tab and leave the remaining parameters with the default settings.
Refer to Figure 1-7. Note that the number of peripherals that appear on each window will depend on the resolution of your monitor.
Figure 1-7. Configure IO Interfaces Dialog Box
11. Click <Next> to display the Add Internal Peripherals dialog box.
At this point you could click Add Peripheral to add additional internal peripherals.
Figure 1-8. Add Internal Peripherals Dialog Box
12. Click <Next> to display the Software Configuration dialog box
Figure 1-9. Software Configuration Dialog Box
13. Click <Next> to view the memory configuration options
Figure 1-10. Configure Memory Test Application
14. Click Next to display the System Created dialog box which summarizes the system being created. Note that the address map for the peripheral may differ.
Figure 1-11. System Created Dialog Box
15. Click Generate
A congratulations dialog box appears, indicating the files that BSB has created.
16. Click Finish to finish generating the project
17. Click <OK> when the Next Step dialog appears
Analyze the Created Project Step 2
Under the Project tab, study the created project files and view the project in block diagram view.
Figure 2-1.
18. Under the XPS Project tab, click on Generate and view Block Diagram to open a block diagram view
19. Observe the various components that are used in the design
Figure 2-2. Block Diagram View of the Generated Project
You will see the Microblaze processor, dlmb_if_cntlr, ilmb_if_cntlr connected to the Microblaze processor side. Notice that the opb_gpio LEDs, opb_gpio LEDs_1 are connected to the opb bus.
1. Right-click the LEDs block in system assembly view and click on configure IP, go through the various fields, and complete the following:
Base address: High address: GPIO Data Bus Width: Channel 1 is bidirectional:
Channel 1 is input only:
2. Why do you think that the DCM_module instances do not have connections to any of the other blocks in the design?
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Notice that you can change the parameters (such as base address, address range, or C_BAUDRATE) here to reflect the design specifications.
20. Close the block diagram view without saving any changes
The block diagram viewer is useful for viewing the overall system and bus connectivity. For more detail, you will utilize other tools.
Generate the Hardware Netlists Step 3
Using PlatGen, generate the hardware netlist.
21. Open MHS file and change the following lines
PORT fpga_0_LEDS_GPIO_d_out_pin = fpga_0_LEDS_GPIO_d_out, DIR = 0, VEC = [0:3]
To
PORT fpga_0_LEDS_GPIO_d_out_pin = fpga_0_LEDS_GPIO_d_out, DIR = 0, VEC = [3:0]
And save the changes.
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22. In XPS, select hardware Generate Netlist or click in the toolbar
23. Observe the netlist generation in the console window as the generation progresses
24. Open Windows Explorer by selecting Start Programs Accessories Windows Explorer
25. Browse to the mb project directory
Several directories containing VHDL wrappers and implementation netlists have been created.
26. In project information area, Select Project, open UCF file by double clicking over it given in Project Files. Enter the pin constraints and uncomment them. The dedicated ucf is provided at the end of this document.
27. In XPS, select hardware Generate Bitstream.
28. Observe the bitstream generation in the console window as the generation progresses
Generate the Software Libraries Step 5
29. In XPS, select software Generate Libraries and BSPs.
30. Observe the Libraries generation in the console window as the generation progresses
31. Observe the xparameters.h file created in the testapp_memory under applications tab
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Writing C code Step 6
32. In XPS, under Application tab, select Project: Testapp_memory open TestApp_Memory.c.
33. Write the C code application in the workspace.
34. Source code for this project is given at the end of this document.
35. In XPS, select software Build all users applications.
36.Observe the elf file generation in the console window as the generation progresses.
37.Create and Generate the Bit file for 4 bit Counter in VHDL program with Xilinx ISE.
en0 <= en1 and (not en2);PROCESS(RESET,CLK_4M,en0)BEGIN IF(RESET = '1') THEN CNTR <= (OTHERS =>'0'); ELSIF(CLK_4M'EVENT AND CLK_4M = '1')THEN IF(en0 = '1')THEN CNTR <= CNTR + '1';
END IF; END IF;END PROCESS;
COUNTER <= CNTR;
end Behavioral;
--------------------------------------------------------UCF File for ARM+FPGA Fusion Board--------------------------------------------------------net "CLK_4M" loc = "p79";net "RESET" loc = "p113";net "COUNTER<0>" loc = "p61";net "COUNTER<1>" loc = "p63";net "COUNTER<2>" loc = "p64";net "COUNTER<3>" loc = "p62";net "COUNTER<4>" loc = "p58";net "COUNTER<5>" loc = "p57";net "COUNTER<6>" loc = "p54";net "COUNTER<7>" loc = "p52";
38.In ISE, select Device Configuration update Bitstream to generate the download.bit file
Downloading into FPGA Step 7
39.Open Impact software by selecting Start Programs Xilinx ISE 9.1i Accessories iMPACT.
40.Impact project dialog box will open. Select create a new project (.ipf) option and click on OK. This will open Welcome to iMPACT dialog box.
41.Keep the default setting Configure devices using Boundary-Scan [JTAG]. Click on Finish. This will identify the device xc3s400.
41. In the Assign New Configuration File, select the download.bit file from implementation directory of your ISE project. Click on Open.
42.The download.bit file will be assigned to the FPGA. Right click on the device and Click on Program to configure the FPGA with download.bit file.
43.Download the download.bit file in to ARM+FPGA Fusion Board.
44.Now check the FPGA Counter output in LD1 to LD4 for software-hardware partitioned output ie., through embedded core of FPGA and LD5 to LD8 for direct FPGA output.
Base System Builder can be used in XPS to create a project. Several files—including an MHS file representing the processor system and a PBD file representing the schematic view—are created. After the system has been defined, the netlist of the processor system can be created.
Answers
1. Right-click the top LEDS block, configure IP and go through the various fields, and complete the following:
Instance name: LEDS Base address: 0x40020000 High address: 0x4002ffff GPIO Data Bus Width: 4 Channel 1 is bidirectional: FALSE Channel 1 is Input only: FALSE
2. Why do you think that the DCM_module instance does not have connections to any of the other blocks in the design?
This module generate signals which are area connected to almost every module in the design. For example, the clock signal generated by DCM_module is connected to the processor and opb controller.
3. List the directories that were created. data etc hdl implementation pcores mb_0 synthesis TestApp_Memory __xps
Completed MHS File
PARAMETER VERSION = 2.1.0
PORT fpga_0_LEDS_GPIO_d_out_pin = fpga_0_LEDS_GPIO_d_out, DIR = O, VEC = [3:0]PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = DCMCLK PORT sys_rst_pin = sys_rst_s, DIR = I
BEGIN dcm_module PARAMETER INSTANCE = dcm_0 PARAMETER HW_VER = 1.00.a PARAMETER C_CLK0_BUF = TRUE PARAMETER C_CLKIN_PERIOD = 31.250000 PARAMETER C_CLK_FEEDBACK = 1X PARAMETER C_DLL_FREQUENCY_MODE = LOW PARAMETER C_EXT_RESET_HIGH = 1 PORT CLKIN = dcm_clk_s PORT CLK0 = sys_clk_s PORT CLKFB = sys_clk_s PORT RST = net_gnd PORT LOCKED = dcm_0_lockEND
Completed .ucf File
Net sys_clk_pin LOC=p181;Net sys_rst_pin LOC=p182;## System level constraintsNet sys_clk_pin TNM_NET = sys_clk_pin;TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 250000 ps;Net sys_rst_pin TIG;
## IO Devices constraints
#### Module LEDS constraints
Net fpga_0_LEDS_GPIO_d_out_pin<0> LOC=p58; Net fpga_0_LEDS_GPIO_d_out_pin<1> LOC=p61; Net fpga_0_LEDS_GPIO_d_out_pin<2> LOC=p62; Net fpga_0_LEDS_GPIO_d_out_pin<3> LOC=p63;
We create an embedded core through software partitioning of the actual hardware and implement a simple 4-bit counter application by Xilinx EDK Tool. Then verify the speed and performance of Partition on FPGA processor. In these Xilinx EDK, performs many kind of processing in Partitioning.
D
C
EXPERIMENT 6:
Implementation of a wireless communication protocol on an embedded system
AIM: To implement wireless communication protocol (like. ZigBee / Bluetooth / RF / RFID / GPS & WiFi) on an Embedded System.
PROCEDURE FOR ZIGBEE
Aim: To Interface a ZigBee module with ARM7
TYPE OF PROTOBOARD USED: Spirit-II/Voyager-II ARM-7 Protoboard – 2 Nos Zigbee Transceiver Pair - 1 Pair
Theory of Operation: Zigbee is a specification for a suite of high level communication protocols using small, low powered digital radios based on IEEE 802.15.4-2003 standard and are used extensively for Wireless Home Area Networks (WHANs), such as wireless light switches with lamps, electrical meters with in-home displays etc. ZigBee is targeted towards at RF applications that require a low data rate, long battery life and secure networking.
Procedure and Observation:
1. Open Triton IDE.2. Select a workspace and create a new Project ZIGBEE_LPC21483. Write in the program for ZIGBEE_LPC2148 as provided in the
Documentation CD and ignore step 3 or else click File menu -> Add Project ->Existing Project into Workspace and click next.
4. If importing project browse the Documentation CD and select “ZIGBEE_LPC2148” and also check option “Copy projects into workspace” and click finish.
5. Save the file, build the Project in Release Mode and generate hex file (ZIGBEE_LPC2148.hex)
6. Download the hex file to ARM7 Board.7. Disconnect ARM7 UART1 from the PC’s COM port.8. Connect the ZigBee module to ARM7 board using the provided male to
male serial cable.9. Attach USB A to B cable between PC’s USB port and the USB connector
on ARM7 Processor add-on board. 10.Repeat steps 6, 7, 8 and 9 for another ARM7 board.11.Slide RUN/ISP switch into Run mode and press momentarily.
12.Once the initialization is over type anything into one hyper terminal and that will be visible in the other hyper terminal.
RESULT:
We interfaced two ZigBee modules to two separate ARM7 protoboards and established communication between them. These ZigBee modules can be configured in various Network Topologies and are a drop-in replacement wireless applications such as Home Automation and Wireless Sensor Networks.
PROCEDURE FOR BLUETOOTH
Aim: To Interface a Bluetooth connected to ARM7 with a Computer
TYPE OF PROTOBOARD USED: Spirit-II/Voyager-II ARM-7 Protoboard – 1 No.Bluetooth Interface Module with dongle - 1 No.
Theory of Operation: Conceived by Ericsson in 1994 as a wireless replacement to RS232 bluetooth today is a wireless technology for exchanging data over short distances (using short wavelength radio transmissions) and creating PANs (Personal Area Networks) with high levels of security. Utilizing the frequency hopping spread spectrum the modulation details of which are as under
Basic data rate 1Mbit/s GFSK (Gaussian Frequency Shift Keying)
1. Open Triton IDE.2. Select a workspace and create a new Project Bluetooth_LPC21483. Write in the program for Bluetooth_LPC2148 as provided in the
Documentation CD and ignore step 3 or else click File menu -> Add Project ->Existing Project into Workspace and click next.
4. If importing project browse the Documentation CD and select “Bluetooth_LPC2148” and also check option “Copy projects into workspace” and click finish.
5. Save the file, build the Project in Release Mode and generate hex file (Bluetooth_LPC2148.hex)
6. Download the hex file to ARM7 Board and Disconnect ARM7 UART1 from the PC’s COM port.
7. Connect the Bluetooth module to ARM7 board using the provided male to male serial cable.
8. Attach USB A to B cable between PC’s USB port and the USB connector on ARM7 Processor add-on board.
9. Slide RUN/ISP switch into Run mode and press momentarily and Power on the bluetooth addon board.
10.If Computer finds a new device and asks for drivers browse and upload the drivers for this cable provided in the Documentation CD.
11.Check the virtual COM port number on device manager.12.Open a Hyper terminal with the found COM port number and select baud
rate as 11520013.Connect the provided USB Bluetooth Dongle to any of the Computer’s
free USB port.14.Wait for the automatic installation of the bluetooth software.15.Double click the bluetooth icon visible in the system tray and use the
software for searching and connecting to the bluetooth module.16.If asked for a passkey the default passkey is 8888.17.When connected open the device manager to again see the assigned
outgoing COM port number.18.Open hyper terminal for the COM port and type anything. This will be
visible on another HT.
RESULT:
File transfer between a PC and ARM7 Protoboard through Bluetooth Interface is studied.
PROCEDURE FOR RF MODULE
Aim: To interface a RF Module to ARM7 Processor.
TYPE OF PROTOBOARD USED: Spirit-II/Voyager-II ARM-7 Protoboard – 2 Nos RF Transceiver Pair - 1 Pair
Theory of Operation: In this exercise we establish communication between two RF modules from Nordic Semiconductors. These modules work in the ISM band of 2.4 GHz and have a SPI interface through which they are controlled and configured. Being a transceiver they establish full duplex communication. Communication between ARM7 and RF module are also of two types. They are
command mode and data mode. In command mode we tell the module that we will be using it as a transmitter or receiver etc. In data mode we either send or receive data depending on the operating mode.
Procedure and Observation:
1. Open Triton IDE.2. Select a workspace and create a new Project nordic_rf24l01p_LPC21483. Write in the program for nordic_rf24l01p_LPC2148 as provided in the
Documentation CD and ignore step 3 or else click File menu -> Add Project ->Existing Project into Workspace and click next.
4. If importing project browse the Documentation CD and select “nordic_rf24l01p_LPC2148” and also check option “Copy projects into workspace” and click finish.
5. Now open file nordic_rf24l01p_LPC2148_main.c and scroll to line number 16
6. Assign values to NRF24l01_MODE_TX as 1 and to NRF24l01_MODE_RX as 0 so that it looks like for Transmitter Enable.
7. Save the file, build the Project in Release Mode and generate hex file (nordic_rf24l01p_LPC2148.hex)
8. Download the hex file to ARM7 Board.9. Reverse the assigned values for NRF24l01_MODE so that they look like
for Receiver Enable.#define NRF24l01_MODE_TX 0#define NRF24l01_MODE_RX1
10.Repeat step 7.11.Download into another ARM7 board and not the one to which we had
downloaded earlier.12.Connect two separate RF modules to these two ARM7 boards to their
appropriate connectors. One ARM7 board will act as a transmitter and the other as a receiver.
13.Connect these two boards to two different computers and open HyperTerminal in each one of them at baud rate 115200.
14.Slide RUN/ISP switch into Run mode and press momentarily.15.Both these Hyper Terminals will give some initialization prints and at the
end will tell the operating mode in which they are configured.16.The board that is in Tx mode will ask for characters to send after
initialization as completed. Type in anything and that will be visible on the hyper terminal connected on other board.
RESULT:
File transfer between a PC and ARM7 Protoboard through an ISM band 2.4Ghz RF module pair over SPI is studied. This interface can be used in applications like Remote Monitoring, Wireless data transfer, Wireless Sensor Networks etc.
PROCEDURE FOR RFID – SERIAL COMMUNICATION MODULE
Aim: To Interface a RFID module with an ARM7 LPC2148 board and detect codes from various RFID cards.
TYPE OF PROTOBOARD USED: Spirit-II/Voyager-II ARM-7 Protoboard – 1 No RFID with tags - 1 Set
Procedure and Observation:
1. Open Triton IDE.2. Select a workspace and create a new Project VCOM_LPC2148.3. Write in the program for VCOM_LPC2148 as provided in the
Documentation CD and skip step 3 or else click File menu -> Add Project ->Existing Project into Workspace and click next.
4. If importing a project browse the Documentation CD and select “VCOM_LPC2148” and also check option “Copy projects into workspace” and click finish.
5. Build the Project in Release Mode and generate hex file (VCOM_LPC2148.hex)
6. Download the hex file to ARM7 Board.7. Disconnect ARM7 UART1 from the PC’s COM port.8. Connect the RF-ID module to ARM7 board using the provided male to
male serial cable.9. Attach USB A to B cable between PC’s USB port and the USB connector
on ARM7 Processor add-on board. 10.Slide RUN/ISP switch into Run mode and press momentarily.11.If Computer finds a new device and asks for drivers browse and upload
the drivers for this cable provided in the Documentation CD.12.Check the virtual COM port number on device manager.13.Open a Hyper terminal with the found COM port number and select baud
rate as 115200
14.Ensure that the RFID module is powered ON and bring the RFID card near to the detector.
15.On the HyperTerminal we will be able to view the RF ID of the card.
RESULT:
We will now be able to detect RFID codes and can use it in various applications such as Smart Home Security Systems, Automated Attendance Systems, Automated Toll Tax Collection, and Automated Parking Ticket System.
PROCEDURE FOR GPS MODULE
Aim: To Interface GPS module to ARM7
TYPE OF PROTOBOARD USED: Spirit-II/Voyager-II ARM-7 Protoboard – 1 No.GPS Module - 1 No.
Theory of Operation: GPS technology assists us in knowing our exact location on the surface of the earth with the use of Satellites in Middle Order Orbit. These satellites relay the information and the receivers receive the data and perform triangulation to get the exact co-ordinates. Any standard GPS device spits out data in NMEA (National Marine Electronics Association) format which is a combined electrical and data specification for communication by marine electronic devices. The NMEA for GPS is NMEA-0183 which is an ASCII based data sentence. Interfacing a GPS device is the method to receive the NMEA sentence into our microcontroller so that it can be later parsed to obtain parameters such as Latitude, Longitude and Altitude etc. The GPS has a RS232 based interface through which it spits out data. So we will be interfacing the UART of the ARM7 to the GPS in this exercise.
Procedure and Observation:
1. Open Triton IDE.2. Select a workspace and create a new Project GPS_LPC21483. Write in the program for GPS_LPC2148 as provided in the
Documentation CD and ignore step 3 or else click File menu -> Add Project ->Existing Project into Workspace and click next.
4. If importing project browse the Documentation CD and select “GPS_LPC2148” and also check option “Copy projects into workspace” and click finish.
5. Save the file, build the Project in Release Mode and generate hex file (GPS_LPC2148.hex)
6. Download the hex file to ARM7 Board.7. Disconnect ARM7 UART1 from the PC’s COM port.8. Connect the GPS module to ARM7 board using the provided male to
male serial cable.9. Attach USB A to B cable between PC’s USB port and the USB connector
on ARM7 Processor add-on board. 10.Slide RUN/ISP switch into Run mode and press momentarily.11.If Computer finds a new device and asks for drivers browse and upload
the drivers for this cable provided in the Documentation CD.12.Check the virtual COM port number on device manager.13.Open a Hyper terminal with the found COM port number and select baud
rate as 11520014.Ensure that the GPS module is powered ON.15.On the HyperTerminal we will be able to view the GPS NMEA 0813 data
sentences.
RESULT:
We Interfaced a GPS module with ARM7 board which can be used in numerous applications such as Navigation, Tectonics, Geo-fencing, Geo-caching, Way-marking, Geo-tagging etc.
PROCEDURE FOR WIFI
NOTE: For performing this experiment the LAB has to be WiFi enabled
Aim: To Interface a WiFi module connected to ARM7 with a Local Area Network and also to a Computer on the Network.
TYPE OF PROTOBOARD USED: Spirit-II/Voyager-II ARM-7 Protoboard – 1 No WiFi Transceiver with Wireless Router - 1 Set
Theory of Operation: Based on IEEE 802.11 standard which uses both direct-sequence spread spectrum and multiple-carrier orthogonal frequency division multiplexing. The exercise here is to make an ARM device discoverable in network and transfer data to and fro.
Procedure and Observation:
1. Open Triton IDE.2. Select a workspace and create a new Project WiFi_LPC21483. Write in the program for WiFi_LPC2148 as provided in the
Documentation CD and ignore step 3 or else click File menu -> Add Project ->Existing Project into Workspace and click next.
4. If importing project browse the Documentation CD and select “WiFi_LPC2148” and also check option “Copy projects into workspace” and click finish.
5. Save the file, build the Project in Release Mode and generate hex file (WiFi_LPC2148.hex)
6. Download the hex file to ARM7 Board.7. Disconnect ARM7 UART1 from the PC’s COM port.8. Connect the WiFi module to ARM7 board using the provided male to
male serial cable.9. Attach USB A to B cable between PC’s USB port and the USB connector
on ARM7 Processor add-on board.10.Slide RUN/ISP switch into Run mode and press momentarily.11.Power on the WiFi addon board.12.If Computer finds a new device and asks for drivers browse and upload
the drivers for this cable provided in the Documentation CD.13.Check the virtual COM port number on device manager.14.Open a Hyper terminal with the found COM port number and select baud
rate as 115200 and type in the following commands. [ Also documented is the expected result ]
15.$$$ to get into command mode16.scan to scan available networks17.join <network name> to join an available network18.set ip gateway XXX.XXX.XXX.XXX to set the Gateway IP Address of
the module 19.set ip host XXX.XXX.XXX.XXX to set the Host IP Address of the
module 20.open XXX.XXX.XXX.XXX 23 to open port 23 TCP port of the module21.On the Computer whose IP address which has been opened run Hercules
Software provided on the Documentation CD.22.Connect to the WiFi module through a TCP port and type anything which
will be visible on the HyperTerminal to which the ARM board is connected.
RESULT: Accelerated file transfer between a PC and ARM7 Protoboard through
if(pid == 0) { /* Child process: * When fork() returns 0, we are in * the child process. * Here we count up to ten, one each second. */ int j; for(j=0; j < 10; j++) { printf("child: %d\n", j); sleep(1); } _exit(0); /* Note that we do not use exit() */ } else if(pid > 0) { /* Parent process: * Otherwise, we are in the parent process. * Again we count up to ten. */ int i; for(i=0; i < 10; i++) { printf("parent: %d\n", i); sleep(1); }