Embedded System with Linux Kernel Based on OpenRISC 1200-V3 Mohammed BAKIRI, Sabrina TITRI, Nouma IZEBOUDJEN, Faroudja ABID, Fatiha LOUIZ and Dalila LAZIB Centre de Développement des Technologies Avancées Lotissement 20 Août 1956, Baba Hassan, Alger, Algérie. [email protected][email protected]Abstract: Embedded system intends to realize portable systems, while reducing chip connect, device size and power dissipation. These systems have obtained great tallness due to their ample fields of application and, it´s lower costs compared with the traditional computer systems. The target of this paper is to show how to design and implement an embedded system based on a soft core processor, and how to port the Linux Kernel-3.0-rc1 operating system on FPGA (Field Programable Gate Array) and on architectural simulator (ISS) OR1ksim. We have chosen the OpenRISC 1200-v3 opensource processor from opencores as soft core processor which is support FPGA and ASIC 0.18um technology and our contribution for OpenRISC architecture in Linux will be included in the upcoming 3.1 release. Key words: Embedded System, Opensource, OpenRISC 1200, Linux Kernel, Opencores, Soft processor, OR1Ksim, FPFA. INTRODUCTION Modern embedded systems more and more resemble small computer systems. There are specialized systems dedicated to a single task, called special purpose systems which are widely used in a variety of applications like PDA, smart phone network and telecom systems. The market of these embedded systems has rapidly grown; this explosive growth has been fueled by rapid prototyping technologies. The ability to quickly program microprocessor memories in circuit and reconfigure field programmable digital hardware is critical to embedded systems engineers who must meet ever shortening development cycles [ZON 08]. Nowadays, with the advance of the microelectronic technology, FPGA have becomes more and more popular and attractive, as the size of a single FPGA has increased to several million gates. Currently, it is possible to integrate a whole system into a single FPGA circuit and become practical to consider adding a soft core processor to the FPGA chip for an embedded system application. If the embedded system offers great advantages, these will be greater if we incorporate an (OS) operating system which can easily enhance the performance of the embedded system and extend a lot of functions, which gives the user greater ease when working. In a process of choosing a suitable embedded operating system, we considered the following requirements: easy portability to the hardware architecture, ultimate support for peripheral devices, networking capabilities, and source code availability. Cost of the operating system and the development tools were also of high importance. Considering these requirements, these have been achieved through the most open source stable operating systems, more robust and more widespread today, as it is Linux. In this paper, we describe an embedded system on chip, where Linux Kernel 3.0 operating system is ported on OpenRISC1200 processor. The design and implementation of the embedded system which is a part of a SOC platform based on Opencores and Opensources design concepts for Voice over Internet Protocol VOIP application is described in [TIT 07] [TIT 11], [ABI 09]. The paper is organized as follow: in section 1, a brief description of embedded system based on FPGA is introduced. The design and implementation of the hardware embedded system on FPGA are presented in section 2. In section 3, we present the software system and the porting of Linux on OR1Ksim and FPGA circuit. Finally, a conclusion is given. 1. Embedded system design methodology A lot of approaches have emerged from academic research and industrial to design embedded systems on FPGA. Among these approaches [TON 06] [ABI 10], we have the Altera approach, which is based on the NIOS processor, the IBM approach with the Power PC processor, the Xilinx approach with the Microblaze processor and the opencores approach - 1 -
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Embedded System with Linux Kernel Based on
OpenRISC 1200-V3
Mohammed BAKIRI, Sabrina TITRI, Nouma IZEBOUDJEN, Faroudja ABID,
Fatiha LOUIZ and Dalila LAZIB
Centre de Développement des Technologies Avancées
Lotissement 20 Août 1956, Baba Hassan, Alger, Algérie.
Slice Logic Utilization: Number of Slice Registers: 7756 out of 28800 26%
Number of Slice LUTs: 13495 out of 28800 46%
Number used as Logic: 12615 out of 28800 43% Number used as Memory: 880 out of 7680 11%
Slice Logic Distribution: Number of LUT Flip Flop pairs used: 15157 Number with an unused Flip Flop: 7401 out of 15157 48% Number with an unused LUT: 1662 out of 15157 10% Number of fully used LUT-FF pairs: 6094 out of 15157 40%
Specific Feature Utilization:
Number of Block RAM/FIFO: 23 out of 48 47%
Number using Block RAM only: 23 Number of BUFG/BUFGCTRLs: 9 out of 32 28%
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SETIT 2012
3.1. Booting Linux on OR1Ksim architectural simulator
We used the Instruction Set Simulator (ISS)
architecture of the OR1200 core named Or1ksim as a
reference model for the functional verification of the
IPs cores. It supports all peripherals and system
controller cores for our hardware architecture, this
advantage can be used to test Kernel without hardware
support. By using the OR1Ksim, we can port Linux
Kernel and emulate the hardware to see the output of
the booting Linux image on the xterm terminal.
Before using the OR1Ksim, Linux Kernel must be
compiled to support a system configuration
“System.dts” by adding this setting in menuconfig file
CONFIG_OPENRISC_BUILTIN_DTB=System.
For Or1ksim, all modifications are done in a
configurable file called “or1k_sim.cfg”. The
“or1k_sim.cfg” file contains the default configurations
of IP cores and a set of simulations environments
which are similar to the actual hardware situation. In
figure 7 it is show how to enable the IPs cores like
UART, Ethernet localhost and TCP/IP, a debug unit to
enable network socket for remote debugging using
OR1K JTAG interface. We have also defined memory
specification and size used like memory management
MMU and CACH, the others peripherals include in
the configuration file and which are not used in the
embedded system are not selected.
Figure 7. Configuration of the OR1K_Sim.cfg for
Linux Kernel
Once we have configured Linux Kernel for
OpenRISC processor and configured
“OR1K_sim.cfg” file for simulation, the result of
booting the Linux Kernel 3.0-rc1 on or1ksim using the
following command “or32-linux-sim –f arch/openrisc
or1k_sim.cfg vmlinux” is shown in figure 8. The
figure shows that the Linux Kernel has been
successfully booted on OR1Ksim. This gives us more
than 90% chance that it can also be boot on FPGA.
Figure 8. Booting Linux using OR1Ksim
3.2. Booting Linux on Virtex5 FPGA
To boot the Linux Kernel on FPGA, we have to
reconfigure the Kernel for the target FPGA. We follow
the same steps like in OR1Ksim. For the FPGA
Virtex5 ML501, we define another dts file named
“ML501.dts. Then, we recompile Linux Kernel to
generate the Linux image vmlinux for FPGA. To load
the Linux Kernel image into the DDR2 RAM, we
have to start by opening a port of communication
between the OpenRISC processor through the debug
interface implemented in FPGA and user debugger.
Then, we use an FTDI-USB JTAG cable [WEB 11a]
to connect the user debugger GDB7.2 with opened
port this permit to load the vmlinux image into DDR2
as it is illustrated in figure 9.
Figure 9. Process to load vmlinux into DDR2 using
or_debug_proxy and gdb-7.2.
or_debug_proxy
Reset openrisc GDB-7.2
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SETIT 2012
After downloading the image into DDR2 we reset
the processor, start the execution then booting the
Linux Kernel 3.0-rc1 in minicom terminal. The main
problem when booting Linux, is in the decompression
of the user space, a message “Panic Kernel” appears
because the l.rfe instruction only takes one clock cycle
in the EX_freeze stage of the pipeline and the pipeline
does not get frozen when l.rfe is in the EX stage as
shown in figure 10, the Immu_en will not have
enough time to do the ITLB-translation before the
instruction cache ack's the address request. To solve
the problem, the l.rfe need two cycle instruction, thus
preventing this bug from happening and Linux can
boot completely. Figure 11 and 12 shows the results of
booting the Linux Kernel 3.0-rc1 on minicom terminal
using Xilinx Virtex5 ML501 prototyping board.
Figure 10. Panic Kernel problem with one cycle of
I.rfe
Figure 11. Booting Linux Kernel on Xilinx Virtex5
ML501.
Figure 12. Loading user space in Linux Kernel.
4. User application
To test Linux Kernel for OpenRISC processor on
FPGA, we need some free and open source
applications like:
BusyBox which combine tiny versions of
many common UNIX utilities into a single
small executable [WEB 11b].
The IRCII application [WEB 11c] is a
termcap based interface to the IRC Network
and also runs on most UNIX platforms such
as our Linux Kernel-3.0-rc1.
Web server.
For example, figure 13 show the result of the
IRCII application on Linux Kernel.
Figure 13. IRCII on Linux Kernel 3.0-rc1
5. ConclusionIn this paper, we have developed an embedded
system with Linux Kernel 3.0-rc1 operating system
based on the OpenRISC 1200-V3 soft processor. The
way and experience of the co-design HW/SW are
presented. The concept is completely based in open
source and open cores. It incorporates hardware and a
software parts. To build the hardware part, we have
designed a SOC architecture described in Verilog. The
synthesis result shows that the whole system occupies
46% of slice and 47% of Bloc RAM of the Virtex5
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XCVLX50-1FF676 circuit. For the software part, the
Linux Kernel 3.0-rc1 operating system has been
ported on the OpenRISC 1200-V3 soft core processor.
The Kernel has been configured for the target Virtex5
ML501 board. The whole system can constitute a
basic know how in the field of the embedded system
with Linux operating system. As future work we
manage to add the other IP cores ( PS2, VGA, Audio..)