Embedded System Design - hcmut.edu.vntqvinh/Lectures/ESD/ESD-Ch3_2016.pdf · Embedded System Design Chapter 3: Microcontroller 1. Introduction to PIC microcontroller 2. PIC16F84 3.

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ĐẠI HỌC QUỐC GIA TP.HỒ CHÍ MINHTRƯỜNG ĐẠI HỌC BÁCH KHOA

KHOA ĐIỆN-ĐIỆN TỬ BỘ MÔN KỸ THUẬT ĐIỆN TỬ

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Embedded System Design

Chapter 3: Microcontroller

1. Introduction to PIC microcontroller 2. PIC16F843. PIC16F8774. Apply PIC microcontroller for embedded systems

Bộ môn Kỹ Thuật Điện Tử - ĐHBK

1. Introduction to PIC microcontroller

• PIC is a family of modified Harvard architecture microcontrollers made by Microchip Technology

• The PIC1650 was originally developed by General Instruments

• The name PIC initially referred to "Peripheral Interface Controller"

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Why is PIC popular?

• PICs are popular with developers due to – low cost

– wide availability

– large user base

– extensive collection of application notes

– availability of low cost or free development tools

– serial programming capability

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PIC18F4XK20 Starter Kit•128x64 Organic LED Display (SPI) • 32.768 kHz External Oscillator (Timer1) • Analog input filtering and gain control into RE1• PWM output filtering from RC2• 4 push buttons for user interfacing

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PIC microcontroller

• Comparison of PIC families

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● Complete portfolio: 6 to 100 pins, 384B to 512KB of program memory, up to 80MHz● Upward compatible architectures to preserve investment in code development● Pin compatibility in multiple packages facilitates drop-in replacement● Range of memory technologies: Self Programming Flash, OTP, ROM● Easy Migration across 8, 16, and 32-bit families

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PIC Microcontroller

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Some members of PIC16 Series

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Some members of PIC16 Series

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PIC speed

• Can use crystal, clock oscillator, or even an RC circuit

• Some PICs have a built‐in 4MHz RC clock, not very accurate, but requires no external components

• Instruction speed = ¼ clock speed– 12C50x 4MHz

– 12C67x 10MHz

– 16Cxxx 20MHz

– 17C4x/17C7xxx 33MHz

– 18Cxxx 40MHz

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Bộ môn Kỹ Thuật Điện Tử - ĐHBK 9

Three ways to provide the clock signal to a PIC

PIC Clock

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PIC’s program memory

• PICs have two difference types of program storage:

– EPROM (Erasable Programmable ROM)

• need high voltage from programmer to program (~13V)

• need windowed chips and UV light to erase

• PIC examples: any ‘C’ part 12C50x, 17C7xx,…

– FLASH

• rewriteable

• much faster to develop on

• PIC examples: any ‘F’ part 16F84, 16F87x, 18Fxxx

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PIC16 Series

http://tme.com.vn

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2. The Microchip PIC16F84

• The Microchip PIC16F84 is a low‐cost, single‐chip, 8‐bit microcontroller.– Only 35 single word instructions

– All instructions single‐cycle except for program branches which are two‐cycle

– Operating speed: DC ‐ 20 MHz clock input

– DC ‐ 200 ns instruction cycle

– 1024 words of program memory

– 68 bytes of Data RAM

– 64 bytes of Data EEPROM

– 14‐bit wide instruction words

– 8‐bit wide data bytes

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The PIC 16F84A pin connection diagram

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PIC16C8X PINOUT DESCRIPTION

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PIC16C8X PINOUT DESCRIPTION ..

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Architecture of the PIC16F84

Buses: Communication lines for transferring data within the processor.

Oscillator: Used to drive the microprocessor, clocking data and instructions in the processor.

Timing: The PIC has an internal divide by 4 whereby 4 oscillator pulses form one clock pulse. This makes instruction times easy to calculate.

– Most instructions (except calls and returns and other instructions involving jumps and branches) take one clock cycle, so with a 4MHz oscillator (divided by 4), instructions take 1s.

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Architecture of the PIC16F84

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W Register

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The 16F84A Status register

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The PIC16F84 Status register

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16F84A memory features

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PIC16F84 Memory

There are two memory blocks in the PIC16C84;

program memory and data memory.

• Each block has its own bus, so that access to each can occur during the same clock cycle.

• The data memory can be further broken down into general purpose memory and special purpose registers

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PIC16F84 Program Memory

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Pointed to by reset vector 0x00

0x01 0x02 0x03

Pointed to by interrupt vector 0x04

0x3FF

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PIC16F84 Data Memory

0x00 Ind. address. 0x01 TMR0 0x02 PCL Special-purpose 0x03 STATUS registers 0x04 FSR Indirect pointer 0x05 PORTA data PORT A 0x06 PORTB data PORT B 0x07 Not used 0x08 EEPROM prog. 0x09 “ 0x0A PCLATH Program counter 0x0B INTCON Interrupt control 0x0C .. \:

.. \

.. | General-purpose | file registers.

.. /

.. /

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(This is a simplified memory map that excludes bank1.

Study the memory banks in the Microchip data sheets).

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PIC16F84 Register‐Mapped I/O• PORTA and PORTB can be programmed as an input or an output.

• PORTA is 5 bits wide and PORTB is 8 bits wide. (Bit 4 of port A can be used for an external timer input.)

• PORTA has pins/bits labelled RA4:RA0

• PORTB has pins/bits labelled RB7:RB0

• Referencing bits …. Bits are numbered 7‐0 from left to right, i.e., msb‐lsb.

• One of the most common programming errors is incorrect specification of bit numbers.

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0x00 Ind. address. 0x01 TMR0 0x02 PCL Special-purpose 0x03 STATUS registers 0x04 FSR Indirect pointer 0x05 PORTA data PORT A 0x06 PORTB data PORT B 0x07 Not used 0x08 EEPROM prog. 0x09 “ 0x0A PCLATH Program counter 0x0B INTCON Interrupt control 0x0C .. \:

.. \

.. | General-purpose | file registers.

.. /

.. /

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PIC16F84A CONFIGURATION WORD

• bit 13‐4 CP: Code Protection bit– 1 = Code protection disabled

– 0 = All program memory is code protected

• bit 3 PWRTE: Power‐up Timer Enable bit– 1 = Power‐up Timer is disabled

– 0 = Power‐up Timer is enabled

• bit 2 WDTE: Watchdog Timer Enable bit– 1 = WDT enabled

– 0 = WDT disabled

• bit 1‐0 FOSC1:FOSC0: Oscillator Selection bits– 11 = RC oscillator (Resistor/capacitor)

– 10 = HS oscillator (High Speed Crystal/Resonator)

– 01 = XT oscillator (Crystal/Resonator)

– 00 = LP oscillator (Low Power Crystal)

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OPTION REGISTER (ADDRESS 81h)

• bit 7 RBPU: PORTB Pull‐up Enable bit

– 1 = PORTB pull‐ups are disabled

– 0 = PORTB pull‐ups are enabled by individual port latch values

• bit 6 INTEDG: Interrupt Edge Select bit

– 1 = Interrupt on rising edge of RB0/INT pin

– 0 = Interrupt on falling edge of RB0/INT pin

• bit 5 T0CS: TMR0 Clock Source Select bit

– 1 = Transition on RA4/T0CKI pin

– 0 = Internal instruction cycle clock (CLKOUT)

• bit 4 T0SE: TMR0 Source Edge Select bit

– 1 = Increment on high‐to‐low transition on RA4/T0CKI pin

– 0 = Increment on low‐to‐high transition on RA4/T0CKI pin

• bit 3 PSA: Prescaler Assignment bit

– 1 = Prescaler is assigned to the WDT

– 0 = Prescaler is assigned to the Timer0 module

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bit 2-0 PS2:PS0: PrescalerRate Select bits

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DIRECT/INDIRECT ADDRESSING

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DIRECT/INDIRECT ADDRESSING

• A simple program to clear RAM locations 20h‐2Fh using indirect addressing

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movlw 0x20 ;initialize pointermovwf FSR ;to RAM

NEXT clrf INDF ;clear INDF registerincf FSR ;inc pointerbtfss FSR,4 ;all done?goto NEXT ;NO, clear next

CONTINUE: ;YES, continue

• An effective 9‐bit address is obtained by concatenating the 8‐bit FSR register and the IRP bit (STATUS<7>)• However, IRP is not used in the PIC16F84A.

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EEPROM Data Memory

• EEPROM data memory

– readable and writable during normal operation

– indirectly addressed through the Special Function Register (SFR)

• SRFs are:

– EECON1

– EECON2

– EEDATA

– EEADR

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EECON1 Register (Adr. 88h)

• bit 7‐5 Unimplemented: Read as '0'

• bit 4 EEIF: EEPROM Write Operation Interrupt Flag bit– 1 = The write operation completed (must be cleared in software)

– 0 = The write operation is not complete or has not been started

• bit 3 WRERR: EEPROM Error Flag bit– 1 = A write operation is prematurely terminated (any MCLR Reset or any WDT Reset during normal operation)

– 0 = The write operation completed

• bit 2 WREN: EEPROM Write Enable bit– 1 = Allows write cycles

– 0 = Inhibits write to the EEPROM

• bit 1 WR: Write Control bit– 1 = Initiates a write cycle. The bit is cleared by hardware once write is complete. The WR bit can only be set

(not cleared) in software.

– 0 = Write cycle to the EEPROM is complete

• bit 0 RD: Read Control bit– 1 = Initiates an EEPROM read RD is cleared in hardware. The RD bit can only be set (not cleared) in software.

– 0 = Does not initiate an EEPROM read

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Reading The EEPROM Data Memory

• Reading the EEPROM data memory

– write the address to the EEADR register

– set control bit RD

– the data is available, in the next cycle, in the EEDATA register

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BCF STATUS, RP0 ; Bank 0MOVLW CONFIG_ADDR ;MOVWF EEADR ; Address to readBSF STATUS, RP0 ; Bank 1BSF EECON1, RD ; EE ReadBCF STATUS, RP0 ; Bank 0MOVF EEDATA, W ; W = EEDATA

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• Writing to the EEPROM data memory

– write the address to the EEADR register and data to the EEDATA register

– follow a specific sequence to initiate the write for each byte

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BSF STATUS, RP0 ; Bank 1BCF INTCON, GIE ; Disable INTs.BSF EECON1, WREN ; Enable WriteMOVLW 55h ;MOVWF EECON2 ; Write 55hMOVLW AAh ;MOVWF EECON2 ; Write AAhBSF EECON1,WR ; Set WR bit

; begin writeBSF INTCON, GIE ; Enable INTs.

Writing to the EEPROM Data Memory

Requirement

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I/O Port

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• PORT A:

– 5‐bit wide, bi‐direction port

– Corresponding data direction register is TRISA (TRISA bit = 1: input; TRISA bit = 0: output)

– On a Power‐on Reset, PORTA pins are configured as inputs and read as ‘0’

• PORT B:

– 8‐bit wide, bi‐direction port

– Corresponding data direction register is TRISB

– RB7:RB4, have an interrupt‐on‐change feature

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I/O Port

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BCF STATUS, RP0 ;

CLRF PORTA ; Initialize PORTA by

; clearing output

; data latches

BSF STATUS, RP0 ; Select Bank 1

MOVLW 0x0F ; Value used to

; initialize data

; direction

MOVWF TRISA ; Set RA<3:0> as inputs

; RA4 as output

; TRISA<7:5> are always

; read as ’0’.

BCF STATUS, RP0 ;CLRF PORTB ; Initialize PORTB by

; clearing output; data latches

BSF STATUS, RP0 ; Select Bank 1MOVLW 0xCF ; Value used to

; initialize data; direction

MOVWF TRISB ; Set RB<3:0> as inputs; RB<5:4> as outputs; RB<7:6> as inputs

• Initializing Port A • Initializing Port B

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Assignments1. What are 8‐bit and 16‐bit families of PIC microcontrollers?

2. What is maximum frequency of clock input for the PIC16F84A?

3. How many word of program memory are physically implemented in PIC16F84A?

4. What is the maximum memory space the PIC16F84A can address?

5. What is the address of the PORT A?

6. What is the address of the Status Register?

7. How to set all bits of Port A as outputs?

8. How many program calls and interrupts can the stack handle?

9. How many bytes are there for EEPROM of the PIC16F84A?

10. Show how to read the EEPROM data memory for PIC16F84A?

11. Show how to write the EEPROM data memory for PIC16F84A?

12. Show how to perform write verification for PIC16F84A?

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Assignments1. Design a PIC16F84 schematic in which

– Port A is input, connected with 4 buttons

– Port B is output, connected with 4 LEDs

Write a program to control 4 LEDs by 4 buttons

2. Design a PIC16F84 schematic in which

– PIC16F84 interfaces with ADC0808 and 4‐digit 7‐segment LED through Port B

– RA0 and RA1 are to select digits of 7‐segment LED

– RA2 is to control START signal of ADC0808

– RA3 is to control OE signal of ADC0808

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3. The PIC16F87x• PIC16F873/ 874/ 876/ 877

– 35 single word instructions

– Operating speed

• DC – 20MHz clock input

• DC – 200ns instruction cycle

– Timer: timer0/timer1/timer2

– 2 Capturer, Compare, PWM modules

– 10‐bit multi‐channel ADC

– SSP with SPI and I2C

– USART

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3 The PIC16F87x

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PIC16F87x

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Block diagram

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The program memory map and stackPIC16F877/876

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PIC16F874/873

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Data memory Organization

• Data memory:– partitioned into multiple banks which contain the General Registers and

the Special Function Register

– Bits RP1 (STATUS<6>) and RP0 (STATUS<5>) are the bank select bits

• Each bank extends up to 7Fh (128 bytes). – The lower locations of each bank are reserved for the Special Function

Registers.

– Above the Special Function Registers are General Purpose Registers

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General Purpose Register File (1)

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General Purpose Register File (2)

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Special Function Registers (1)

Reference: 16F87X datasheet

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Special Function Registers (2)

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PCL and PCLATH• The program counter (PC) is 13‐

bits wide.

• The low byte comes from the PCL register, which is a readable and writable register.

• The upper bits (PC<12:8>) are not readable, but are indirectly writable through the PCLATH register.

• On any RESET, the upper bits of the PC will be cleared.

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Loading of PC in different situations:• how the PC is loaded on a write to PCL(PCLATH<4:0> → PCH). • how the PC is loaded during a CALL or GOTO instruction (PCLATH<4:3> →PCH)

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Stack

• The PIC16F87X family has an 8‐level deep x 13‐bit wide hardware stack.

• The stack space is not part of either program or data space and the stack pointer is not readable or writable.

• The PC is PUSHed onto the stack when a CALL instruction is executed, or an interrupt causes a branch.

• The stack is POPed in the event of a RETURN,RETLW or a RETFIE instruction execution.

• PCLATH is not affected by a PUSH or POP operation.

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Program Memory Paging (1)

• All PIC16F87X devices are capable of addressing a continuous 8K word block of program memory.

• The CALL and GOTO instructions provide only 11 bits of address to allow branching within any 2K program memory page.

• When doing a CALL or GOTO instruction, the upper 2 bits of the address are provided by PCLATH<4:3>.

• When doing a CALL or GOTO instruction, the user must ensure that the page select bits are programmed so that the desired program memory page is addressed.

• If a return from a CALL instruction (or interrupt) is executed, the entire 13‐bit PC is popped off the stack.

• The contents of the PCLATH register are unchanged after a RETURN or RETFIE instruction

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Program Memory Paging (2)• Example:

– call of a subroutine in page 1 from page 0

– assumes that PCLATH is saved and restored by the Interrupt Service Routine (if interrupts are used).

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ORG 0x500BCF PCLATH,4BSF PCLATH,3 ;Select page 1 (800h‐FFFh)CALL SUB1_P1 ;Call subroutine in page 1 (800h‐FFFh):ORG 0x900 ;page 1 (800h‐FFFh)

SUB1_P1: ;called subroutine page 1 (800h‐FFFh):RETURN ;return to Call subroutine

;in page 0 (000h‐7FFh)

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Indirect Addressing (1)

• Indirect addressing is possible by using the INDF register.

• Any instruction using the INDF register actually accesses the register pointed to by the File Select Register, FSR.

• Reading the INDF register itself, indirectly (FSR = ’0’) will read 00h.

• Writing to the INDF register indirectly results in a no operation (although status bits may be affected).

• An effective 9‐bit address is obtained by concatenating the 8‐bit FSR register and the IRP bit (STATUS<7>),

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• A simple program to clear RAM locations 20h‐2Fh using indirect addressing

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MOVLW 0x20 ;initialize pointerMOVWF FSR ;to RAM

NEXT CLRF INDF ;clear INDF registerFSR,F ;inc pointer

BTFSS FSR,4 ;all done?GOTO NEXT ;no clear next

CONTINUE: ;yes continue

Chapter 3


IO Ports

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Port A Port B Port C Port D Port E

Support 16F87X 16F87X 16F87X PIC16F874 /877

PIC16F874 /877

Width 6‐bit 8‐bit 8‐bit 8‐bit 3‐bit

Direction Bi‐directional Bi‐directional Bi‐directional Bi‐directional Bi‐directional

Directionregister

TRISA TRISB TRISC TRISD TRISE

Buffer TTL buffer / Schmitt trigger

TTL buffer / Schmitt trigger

Schmitt trigger

Schmitt trigger

Schmitt trigger

Multiplexed with

Analog input Serial Programming

USART, PWM, I2C, SPI

Parallel slave port

Analog input

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Port A Functions

55Chapter 3


Port B Functions

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Port C Functions

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Port D Functions

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Port E Functions

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Initializing IO Ports

• Example: initializing Port A

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BCF STATUS, RP0 ;BCF STATUS, RP1 ; Bank0CLRF PORTA ; Initialize PORTA by

; clearing output; data latches

BSF STATUS, RP0 ; Select Bank 1MOVLW 0x06 ; Configure all pinsMOVWF ADCON1 ; as digital inputsMOVLW 0xCF ; Value used to

; initialize data; direction

MOVWF TRISA ; Set RA<3:0> as inputs; RA<5:4> as outputs; TRISA<7:6>are always; read as ’0’.

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PIC16CXXX Instruction Set (1)

61Chapter 3


PIC16CXXX Instruction Set (2)

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Class Assignment

1. What are main differences between PIC16F84 and PIC16F87x?

2. What is the capacity of the FLASH memory of PIC16F877?

3. How many IO ports of PIC16F873 are there?

4. What are multiplexed with PORTC ?

5. How to initialize Port C as output of PIC16F877?

6. What is the address of TRISB?

7. Is PCLATCH affected by PUSH and POP operation?

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4. Apply PIC microcontroller for embedded systems

• PIC microcontrollers provide basic required hardware for an embedded system

– Processing unit

– Memory: Flash ROM, EEPROM

– Timer/interrupt

• Interface:

– Parallel I/O

– ADC

– PWM

– Serial communication: UART, SPI, I2C

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4. Apply PIC microcontroller for embedded systems

• A simple security system using PIC microcontroller

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PIC Applications

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LED FlasherLoop:

bsf PORTB, 0call Delay_500msbcf PORTB, 0call Delay_500msgoto Loop

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PIC Applications

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Button ReadMovlw 0movwf TRISD, fbsf TRISD, 2

Loop:btfsc PORTD, 2goto lightgoto No_light

Light:bsf PORTB,0goto Loop

No_light:bcf PORTB,0goto Loop

Chapter 3


Group discussion

Discuss about how to apply PIC microcontroller to your class project

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Embedded System Design - hcmut.edu.vntqvinh/Lectures/ESD/ESD-Ch3_2016.pdf · Embedded System Design Chapter 3: Microcontroller 1. Introduction to PIC microcontroller 2. PIC16F84 3.

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