AP755 PMC PowerPC Architecture PCI Mezzanine Card (PMC) Target Applications IMT-2000 BTS/BSC/PDSN/PCF, CDMA Applications, IWFs, Intelligent Peripheral, Remote Access Server, ATM/WAN/LAN based Router, xDSL Router, VoDSL based IAD, Computer Telephony Integration, UMS, VoIP Gateway, IP & Optical Access System, Other High-performance Embedded Telecommunication Applications AddPac Technology Embedded CPU Board Series • High-performance OEM CPU Board Solution for Embedded Telecom Applications • MPC755 G3 Processor with MPC107 PCI Bridge / Memory Controller • 1Mbyte High-speed L2 Cache Memory • Up to 256Mbyte SDRAM Module • Up to 16Mbyte Flash Memory • 512K Boot ROM support for boot loader • One RS-232C Serial Interface • HW Watch-dog Timer Support • User-Defined Connector Support for I/O extension • VxWorks/Tornado 2.0 RTOS BSP • Embedded Linux OS & Boot-loader • Other Commercial RTOS BSP Support • Various Telecom Protocol Support Advantages Main Features The AP755 PCI Mezzanine Card(PMC) is a high-performance telecom CPU board for the telecommunication applications such IMT-2000, IP or ATM based system, general purpose high-end telecommunication equipments. The AP755PMC provides excellent PCI-based H/W solution using MPC755 high-end RISC computing power and MPC 107 PCI bridge/memory controller. AddPac A A d d d d P P a a c c AP755PMC Bottom Side
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• 1Mbyte High-speed L2 Cache Memory • Up to 256Mbyte SDRAM Module • Up to 16Mbyte Flash Memory • 512K Boot ROM support for boot loader • One RS-232C Serial Interface • HW Watch-dog Timer Support • User-Defined Connector Support for I/O
extension • VxWorks/Tornado 2.0 RTOS BSP • Embedded Linux OS & Boot-loader • Other Commercial RTOS BSP Support • Various Telecom Protocol Support
Advantages
Main Features
The AP755 PCI Mezzanine Card(PMC) is a high-performance telecom
CPU board for the telecommunication applications such IMT-2000, IP
or ATM based system, general purpose high-end telecommunication
equipments. The AP755PMC provides excellent PCI-based H/W
solution using MPC755 high-end RISC computing power and MPC 107
2000, AddPac is a registered trademark of AddPac Technology. Specifications and features subject to change without notice. All brands & products are trademarks of their respective organization.
: PMC • APACC-KIT : Power Supply, Cable Kits • AP755PMC-VX : VxWorks BSP • AP755PMC-LIN : Embedded LinuxOS Kit • AP755PMC-ATM : ATM SAR Device Driver Source Code for
: RS8234
Real-time OS and Bug Program • AddPac AP750 PMC Bug Monitor Program (AddPac) • VxWorks/Tornado 2.0 Real-time OS BSP (AddPac) • Embedded LinuxOS for PowerPC (AddPac) • Other Commercial Real-time OS BSP (AddPac)
P1 Connector Col Name Interface Description Col Name Interface Description A1 SDMA(0) Memory Local Addr 0 B1 MDH(0) Memory Data Bus High 0 A2 SDMA(1) Memory Local Addr 1 B2 MDH(1) Memory Data Bus High 1 A3 SDMA(2) Memory Local Addr 2 B3 MDH(2) Memory Data Bus High 2 A4 SDMA(3) Memory Local Addr 3 B4 MDH(3) Memory Data Bus High 3 A5 SDMA(4) Memory Local Addr 4 B5 MDH(4) Memory Data Bus High 4 A6 SDMA(5) Memory Local Addr 5 B6 MDH(5) Memory Data Bus High 5 A7 SDMA(6) Memory Local Addr 6 B7 MDH(6) Memory Data Bus High 6 A8 SDMA(7) Memory Local Addr 7 B8 MDH(7) Memory Data Bus High 7 A9 SDMA(8) Memory Local Addr 8 B9 Uart_INT_A Peripheral UART A Ch Interrupt A10 SDMA(9) Memory Local Addr 9 B10 Uart_INT_B Peripheral UART B Ch Interrupt A11 SDMA(10) Memory Local Addr 10 B11 RAMLED Peripheral LED A12 SDBA(0) Memory Local Addr 11 B12 MDH(8) Memory Data Bus High 8 A13 PAR(7) Memory Local Addr 12 B13 MDH(9) Memory Data Bus High 9 A14 PAR(6) Memory Local Addr 13 B14 MDH(10) Memory Data Bus High 10 A15 PAR(5) Memory Local Addr 14 B15 MDH(11) Memory Data Bus High 11 A16 PAR(4) Memory Local Addr 15 B16 MDH(12) Memory Data Bus High 12 A17 PAR(3) Memory Local Addr 16 B17 MDH(13) Memory Data Bus High 13 A18 PAR(2) Memory Local Addr 17 B18 MDH(14) Memory Data Bus High 14 A19 PAR(1) Memory Local Addr 18 B19 MDH(15) Memory Data Bus High 15 A20 PAR(0) Memory Local Addr 19 B20 JTS A21 SDBA(1) Memory Local Addr 20 B21 - A22 SDMA(11) Memory Local Addr 21 B22 - A23 SDMA(12) Memory Local Addr 22 B23 - A24 SDMA(13) Memory Local Addr 23 B24 - A25 RCS(0) Memory ROM/Bank 0 Sel B25 Uart_TXB Peripheral UART B Ch Transmit A26 RCS(1) Memory ROM/Bank 1 Sel B26 Uart_RXB Peripheral UART B Ch Receive A27 RCS(2) Memory ROM/Bank 2 Sel B27 Uart_TXA Peripheral UART A Ch Transmit A28 RCS(3) Memory ROM/Bank 3 Sel B28 Uart_RXA Peripheral UART A Ch Receive A29 FOE Memory Flash Output Enable B29 PCI_CLK3 Clock PCI Clock Output 3 A30 WE Memory Write Enable B30 PCI_CLK2 Clock PCI Clock Output 2 A31 AS Memory Address Strobe B31 PCI_CLK1 Clock PCI Clock Output 1 A32 IRQ(4) EPIC Interrupt 4
P4 Connector Col Name Interface Description Col Name Interface Description A1 MDH(16) Memory Data Bus High 16 B1 - A2 MDH(17) Memory Data Bus High 17 B2 - A3 MDH(18) Memory Data Bus High 18 B3 - A4 MDH(19) Memory Data Bus High 19 B4 - A5 MDH(20) Memory Data Bus High 20 B5 - A6 MDH(21) Memory Data Bus High 21 B6 - A7 MDH(22) Memory Data Bus High 22 B7 - A8 MDH(23) Memory Data Bus High 23 B8 - A9 GND B9 GND A10 GND B10 GND A11 MDH(24) Memory Data Bus High 24 B11 - A12 MDH(25) Memory Data Bus High 25 B12 - A13 MDH(26) Memory Data Bus High 26 B13 - A14 MDH(27) Memory Data Bus High 27 B14 - A15 MDH(28) Memory Data Bus High 28 B15 - A16 MDH(29) Memory Data Bus High 29 B16 - A17 MDH(30) Memory Data Bus High 30 B17 - A18 MDH(31) Memory Data Bus High 31 B18 - A19 GND B19 GND A20 GND B20 GND A21 - B21 - A22 - B22 - A23 - B23 - A24 - B24 - A25 - B25 - A26 - B26 - A27 - B27 - A28 - B28 - A29 SDA 12C Control Serial Data B29 - A30 SCL 12C Control Serial Clock B30 - A31 GND B31 GND A32 GND