www.epdtonthenet.net September 2015 PCB cloning • JTAG use in functional testers on the rise • Unmanned robot for army and civil defence • Six reasons to conduct early EMC testing Also inside 14 Usage shift leads to methodology shift Smart analogue 22 Maximise ROI on complex systems
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Six reasons to conductearly EMC testingTypically conducted at a specialist lab at the end of the project, EMC testing can lead to frustration when the tests fail.
Unmanned robot for army and civil defence In critical environments, military and civilian task forces often use unmanned robots in order to scout the terrain and eliminate hot spots.
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EPDT - ISSN 0263-1474Copyright in the contents of Electronic Product Design & Test, its websites and newsletters is the property of the publisher. The publisher and the sponsors of this magazine are not responsible for the results of any actions or omissions taken on the basis of information in this publication. In particular, no liability can be accepted in result ofany claim based on or in relation to material provided for inclusion.Electronic Product Design & Test is a controlled circulation journal, published monthly. Completed print or online registration forms will beconsidered for free supply of printed issues, website access and onlineservices. Annual subscriptions for non qualifying readers is UK £121.00 - £108.90, OC £212.00 - £190.80, and single copy price is £12.10 - £10.80
Component obsolescence has always been a challenge across industries but with consumer markets rocketing, industry sectors risk being left behind.
25 PCB cloning techniques on complex systems41
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12Increase safety and reduce costs inHIL testing The use of rechargeable batteries in consumer products, business applications and industrial systems continues to grow substantially.
Digital modeling yields efficientPCB design processesProduct experiences are being driven by customer interaction with the physical, mechanical model.
Flip chips: Simultaneous multi-gate acoustic imaging Finding structural defects in a flip chip assembly means having a nondestructive view of the interior.
Usage shift leads to methodologyshift A usage shift in mobile computing devices warrants a methodology shift in the power analysis flow.
Smart analogueIndustrial automation is entering the fourth industrial revolution with the growth of M2M technology.
High precision spatial positioningComputed tomography is used to obtain volume information from sample types at micrometer resolution.
Unlocking your AOI and AXIsystem’s true potentialToday, most PCB assembly lines would be difficult to operate without an automated optical inspection (AOI) system.
Handling increased complexity inembedded devicesAdvances in the complexity of embedded software are creating implications for test and validation systems.
JTAG use in functional testers on the riseJTAG Technologies has invested in the development of integration options for a range of test platforms.
The paper doll approachThe most common method deployed by
design teams to ensure that a rigid-flex PCB
design will fit in an enclosure is the “paper
doll” model of the PCB. These models,
created from paper, are cut into what’s
hoped to be an exact shape of the PCB
in concept.
While effective at modeling an approximate
shape of a rigid-flex PCB, the paper doll
approach has a number of inefficiencies and
problems in application, including:
• Imprecise thickness: The paper doll isn’t
the same thickness as the rigid and flexible
sections of the PCB. Therefore, it becomes
very difficult to simulate the bending of the
paper model because it will bend in its
final application. This makes it incredibly
challenging to get a clear idea about the
fatigue or natural folding properties of the
design.
• No 3D models: The paper doll doesn’t
include all of the 3D component models that
will appear in the final design. One must
wonder how the presence of these models
will change how the model folds and whether
a 3D model might interfere with the clearance
required for the rigid-flex sections to fold
properly.
• Costly 3D printing: To determine a correct
board fit with an enclosure, it might be
necessary to print the enclosure with a 3D
printer. Depending on the complexity of a
design, this can become a costly option to
implement—it adds a layer of unnecessary
expenses to a project that could have been
simulated entirely in software.
Despite its widespread use, the application
of paper doll models is both imprecise and
impractical. Designers who rely on this
method to ensure a correct PCB fit with the
mechanical enclosure risk the potential of
design revisions and expensive prototype
adjustments during the fabrication process.
Digital-modeling efficienciesRather than build an inaccurate paper doll
model, a more sensible approach is to
handle all of the modeling and simulations
directly in the digital software environment.
Not only will this approach save time and
money, it will also yield a more exact design
that doesn’t depend on the imprecision of
paper models.
In practice, there are currently two accepted
methods to execute this approach: using a
combination of mechanical computer-aided
design (MCAD) tools and electronic
Digital modeling yields efficient rigid-flex PCB design processesProduct experiences are being driven by customer interaction with the physical, mechanical model. The necessity to constantly satisfy the senses of the physical experience requires that printed-circuit-board (PCB) assemblies be smaller and denser to fit pre-conceptualised mechanical structures.
September 20154
The mechanical model becoming such an infl uential factor has turned fl exible electronics into anincreasingly common design objective. To gain this fl exibility, designers often opt for rigid-fl exPCBs, which combine both the rigid and fl exible substrates of a PCB into a single design element.
Benjamin Jordan,Altium
epdtonthenet.net
DesignFeature
Figure 1- To make this paper doll, the designer printed a 1:1 copy and then cut out the final shape.
Despite its numerous benefits, rigid-flex PCB design presents significant challenges in terms of effective, efficient execution.
Compounding design efficienciesIn addition to delivering better boards, the
3D STEP models generated from the
rigid-flex design (including folded, unfolded,
and partially folded states) deliver more
accurate and detailed documentation.
Manufacturing engineers can use this
enhanced documentation to develop clear
assembly instructions for both the PCB
assembly and the final product.
If desired, manufacturing engineers can even
produce a video from the images generated
in the ECAD environment. These videos can
be used to train assembly personnel in the
exact process required to fold the flexible
circuitry. Implementing this process helps
significantly reduce assembly time and
errors, thus streamlining the entire design-
to-fabrication process.
Despite the benefits, it’s important to note
that like any other process driven by
incremental improvements in technology,
not even the most precise STEP models
provide a 100% accurate picture of design
intent. More advanced models and systems
for streamlining the rigid-flex design-
collaboration process between electrical
and mechanical design teams are certain
to appear down the road.
Ensuring that your board fits the mechanical
enclosure right the first time, while also
maximising the quality of your flexible
circuitry, requires a more advanced
workflow incorporating the use of 3D
functionality in an ECAD environment.
When it comes to remaining competitive
and productive, don’t leave your designs
up to chance. Use a digital modeling and
simulation system for the most efficient
rigid-flex design process.
When it comes to remaining competitive and productive, don’t leave your designs up to chance.
6
DesignFeature
epdtonthenet.net
Figure 4- ECAD software that incorporates 3D functionality helps streamline the process of designing rigid-flex PCBs, allowing designers to perform all necessary design-for-manufacturing (DFM) checks in the PCB design tool.
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Finding structural defects and anomalies in a flip chip assembly means having a clear and nondestructive view of the interior. The design of flip chips gives a substantial advantage to acoustic micro imaging tools: with current ultrasound technology, silicon is an excellent medium through which sound travels with minimal detectable defects.
This transparency means that ultrasonic transducers pulsingultrasound at high frequencies can be used to provide high resolution in the acoustic images. High resolution is
needed to evaluate the degree of risk of a particular anomaly.
Figure 1- Side-view diagram of the six gates.
Figure 2- Gate 1 reveals solder ball connections, large areas of filler particle concentration, and the shadows of voids in deeper gates.
Finding structural defects and anomalies in a flip chip assembly means having a clear and nondestructive view of the interior.
generation—5G—will mean “everything, everywhere, and always conIf you’re on the cutting edge of this emerginng technology, we can heWe have expertise in all areas of 5G research and development, including widebandmmWave, radio spectrum, ASIC, antenna teechnologies, and network architecture.
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Keysight Authors: Greg Jue,ee Applications Development Engineer/Scientis
Model structure for this applicationFor the purpose of this ESS test system
development project, the key requirements for
the battery model were:
• Up to 144 Li-Ion polymer cells for testing
the BMS of the client’s ESS products.
• Ease of configuration for different
requirements (parallel/series networks).
• Several sensors per cell (current, voltage,
SoC, SoH).
• Variation of chemistry make-up due to
manufacturing tolerances.
• Fault-insertion on each cell (open-circuit,
shorting).
• Capacity to run in real-time (target
execution-time budget of 1ms).
In the case of energy storage systems, each
ESS battery is made of several “stacks” that,
in turn, contain several cells. The MapleSim
model follows this structure with each cell
being a shared, fully parameterised
subsystem. Each cell can also be switched to
open circuit using logical parameters.
The stack model is made of 18 cell subsys-
tems connected either in parallel or series,
depending on the requirement. Input signals
are provided for charge balancing from the
BMS. Output signals are provided back to the
BMS to monitor the condition of the stack.
Finally, the full ESS is made of several stacks
with IO signals fed to and from the BMS.
Model calibration and validationProject engineers determined that any
deviation in performance due to manufacturing
variations needed to be included in order to
test the charge-balancing capability of the
BMS. Instead of testing every cell, engineers
relied on random variants generated from the
statistical distribution determined by the
Increase safety and reduce costs and set-up time in HIL testing Monitoring and controlling larger cell arrays through Battery Management Systems (BMS) helps to minimise charge times and maximise efficiency and battery life. Design and testing of a sophisticated BMS can pose a challenge, that’s why Maplesoft and ControlWorks Inc. developed a Hardware-in-the-Loop (HIL) test system for the BMS in one of their large Energy Storage System (ESS) products.
September 201512
An attractive solution to these testing challenges is to use virtual batteries for early-AAstage testing of the BMS. Not only have these models proven to be highly accurate, they A are computationally effi cient and are able to achieve the execution required to deliverAreal-time performance for batteries containing hundreds of cells on real-time platforms.
Maplesoft
Monitoring and controlling larger cell arrays through Battery Management Systems (BMS) helps to minimise charge times and maximise efficiency and battery life.
epdtonthenet.net
PowerFeature
Figure 1- Simulation of thermal runaway using the Li-Ion model from the MapleSim Battery Library
Functional testbench vs. live applicationOver the last year, Mentor Graphics has
worked with leading fabless chip design
companies to establish an emulation flow to
generate accurate power numbers. They do
this by measuring power in a targeted
application environment while running actual
software applications. This includes booting
an OS and then running hundreds of millions
of cycles to locate areas of concern when it
comes to power. The Veloce emulation
system not only has capacity to handle very
large SoCs (up to 2 billion ASIC gates), but
also has the performance required to boot an
OS, run real applications and generate
switching data. In addition, Veloce provides
complete visibility of every design node, a
must-have capability for accurate power
analysis. When it comes to generating the
most accurate power number, it’s best to use
the platform and methodology that allows for
analysing power of a SoC in targeted
application environment at the system level.
Figure 2 illustrates the need for analysing
power while running live SW applications.
Traditional file-based flow For a traditional file-based flow, Veloce is
used to generate switching activity (SAIF)
over a long emulation run. The data is then
used as an input to power analysis tools
for generating average power numbers.
SAIF-based flows are quite common among
customers to do average power estimation;
however such flows do not have temporal
dependency information as they do not store
the full, time-based waveform for all design
states. This gap can impact the accuracy of
average power for memories or IP, where the
calculation is generally more complicated
than just considering cumulative switching.
To facilitate the capture of this conditional and
segmented switching, Veloce supports the
more elaborate version of SAIF known as
“Forward SAIF,” which can capture all the
interesting conditions for switching activity.
This is in principle a State and Path Depend-
ent (SDPD) SAIF file for all library cell ports in
addition to normal SAIF activity for all design
nodes, which improves the accuracy of the
average power. However, the accuracy still
Usage shift leads to methodology shiftPower exploration and accurate power calculation of SoCs in the target application environment is getting executive attention due to the fact that companies are missing market windows because of power issues.
September 201514
Power issues are caused because of a usage shiftin mobile computing
devices. These devices are now being used for playing games, watching moviesin addition to typical cell phone usage. This usage shift warrants a methodology shift in the power analysis fl ow.
Vijay Chobisa & Gaurav Saharawat,Mentor Graphics
Veloce Power Application is enabling a methodology shift in the way power measurements are done to address the new requirements due to usage shift.
Veloce activity plot Veloce Activity Plot, shown in Figure 5, is a
distinctive capability that allows a power
analysis team to run long test sequences and
quickly isolate high switching regions over long
emulation runs; these regions represent actual
power concerns. This enables customers to
run real software applications, identify areas
of interest when it comes to power and then
narrow down those application/logic blocks
causing peak switching. It’s possible to view
an Activity Plot of the full or partial design, and
thus to analyse the activity trends of the design
that are directly proportional to the power
consumption pattern. Veloce can produce an
Activity Plot faster compared to file-based
power charts. For an example, Veloce takes
15 minutes to generate an Activity Plot of a
100 million gate design for 75 million design
clock cycles. Power analysis tools will probably
take more than a week to generate similar
information and might not even be able to
handle such a large volume of data. Veloce
Activity Plot provides an activity view for the
entire design scope, including IPs and
sub-hierarchies, all within targeted time
windows of interest.
Once you identify high switching activity
regions at the top level of your design, then
you can analyse the various sub-blocks or
applications that are the main source of this
high switching. Now you can capture this time
zone information in a TZF (Time Zone File) file
and input this to Veloce to generate complete
data for the selected time windows for detailed
power analysis.
Dynamic read waveform API flow Mentor Graphics has worked on a custom-
ised integration with an industry power tool,
PowerArtist. The result is a flow where the
power analysis tool is fed with the switching
data live while emulation is running. The
Dynamic Read Waveform API (DRW-API)
approach enables accurate power calcula-
tion at the system level, where booting an OS
and running software applications is required.
This makes it practical to explore power
exploration at RTL for power budgeting and
tradeoffs, as well as more accurate power
analysis and signoff at the gate level in a
targeted application environment. The
dynamic API-based live streaming exchange
of switching data between emulation and
power analysis tools allows for all the
PowerFeature
September 201516 epdtonthenet.net
The main goal of Project P was to develop a generic, high-quality, framework for code generators that could be easily instantiated for multiple languages such as UML or Simulink.
Figure 3- File-based power analysis flow
Figure 4- Veloce forward SAIF flow
Figure 5- The Veloce Activity Plot identifies focus areas over long runs
The search for a small heart with lots of powerAround three years ago, the developer team
headed by Mark Vaynberg was looking for a
small, flexible CPU that could easily be
integrated into the new ROCU-7 control unit.
After a short market analysis, they found the
COM Express mini module from Kontron.
Kontron developed the COM Express mini
module in order to implement power-saving
computer-on-modules with greater x 86
performances on a credit card-sized footprint
(55 x 84 mm).
“The ultra-compact module with COM Express
pin-out type 10 satisfied all the requirements
with regard to functionality and performance
that we expected from an ultra-small
embedded solution for our ROCU-7 control
unit,” Mark Vaynberg says. In addition, the
price-performance ratio and global customer
support at Kontron fit the bill. “Kontron always
Feature
September 2015 19
Embedded
epdtonthenet.net
In critical environments, military and civilian task forces often use unmanned robots in order to scout the terrain and eliminate hot spots. Roboteam has developed the ROCU-7, an intelligent controller that easily does its job even under the toughest conditions. The COM Express mini module from Kontron is a key element in this solution.
Kontron
Unmanned robot as A-team for army and civil defence
Based on their own military experience and intensive talks with users, the
company founders set clear priorities for the developmentof unmanned systems rightfrom the start. The solutions that Roboteam offers should be compact and light-weight, as well as easy to operate. In addition, the application areas for unmanned robotsalso demand 3D representation,video communication and the necessary ruggedness for hard use in the fi eld. Compliance withmilitary standards is mandatory.
From the very beginning, the development teams stressed the importance of an ergonomic product design and human-machine interfaces that conform to industrial standards.
and its characteristics into a sensor application.
Smart Analogue circuits are designed at a
computer screen using configurable designed
operational amplifier circuits that greatly
reduces the design time.
As a sensor equipped system uses different
type of transducers, for many different
purposes, each of these sensors must have
September 201522
AnalogueFeature
epdtonthenet.net
The world of industrial automation is entering the fourth industrial revolution. A paradigm shift in which rising awareness of energy efficiency, environmental concerns and regulations, qualitative productivity and operational health and safety, contribute to the continued growth of machine to machine (M2M) technology. “Smart production” will become a norm in the manufacturing engineering sector, where intelligent machine systems, through networks interconnectivity will be capable of managing industrial production processes independently from human intervention, thereby making the “Internet of Things” a reality.
Bruno Nelta, Renesas ElectronicsEurope
The M2M communications are made possible withthe use of industrial
instrumentation comprising of intelligent sensors. These are capable of capturing eventsand relaying the data overa network to an application that translates the capturedevent into meaningful information that can be analysed and acted upon.
Engineers are looking for solutions enabling them to reduce the development time of their analogue circuit, and release their products faster.
Smart analogue
Figure 1- Customised examples of the configurable amp in the Smart Analogue IC
Building on the heritage of Microchip Technology’s world-leading 8- and 16-bit PIC® microcontrollers, the PIC32 family delivers 32-bit performance and more memory to solve increasingly complex embedded system design challenges.
Broad PortfolioFrom simple USB device connectivity to RTOS-drivengraphical user interface applications with advancedaudio processing, there is a PIC32 device to meet your design challenges.
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Up to 26 DMA channels 8/16-bit parallel master port supporting graphic
interface and additional memory Capacitive touch for improved human interfaces with
capacitive buttons or slider control
Performance-Leading PIC32 Microcontrollers
PIC32 Software Solutions SupportGet the latest updates at www.microchip.com/harmony.yy
USB USB Host, Device, On-the-Go with Class Drivers
HMI
Microchip Graphics Library MPLAB® Harmony Graphics Composer (HGC) mTouch® Capacitive Touch Library Touch System Service Library
CAN CAN Driver and PLIB support for PIC32
Audio and Speech
Audio Library for PIC32MX: Speex, ADPCM and WAV ; MP3 ; AAC Decode and WMA Decode USB Audio 2.0 Device Class ; Sample Rate Conversion (SRC) Library; PIC32 Bluetooth Audio Software Suites ; Audio Equalizer Filter Library
ConnectivityMicrochip TCP/IP with SSL and BSD ; IrDA® Stack; Bluetooth® SPP Stack for PIC32 ; Wi-Fi® Software Library ; IEEE 802.15.4 and Sub-GHz MiWi™ Development Environment
Encryption Cryptographic Library
Basic LibrariesFile System Library ; Floating Point Math Library ; Peripheral Library ; EEPROM Emulation; IEC 60730 Class B Software; Fixed Point Math Library ; Fixed Point DSP Library
Boot Loader
Serial Port Boot Loader USB Host Boot Loader Ethernet Boot Loader
MPLAB Harmony Software Framework compatible. Additional software libraries listed in the table above are planned to be included in MPLAB Harmony.
MPLAB Harmony is a flexible, abstracted, fully integrated firmware development environment for PIC32 microcontrollers. It enables robust framework developmentof interoperable RTOS-friendly libraries with quick andextensive Microchip support for third party software integration. MPLAB Harmony includes a set of peripherallibraries, drivers and system services that are readily accessible for application development. The code development format allows for maximum re-use and reduces time-to-market. It features the MPLAB Harmony Configurator (MHC) plug-in that provides a graphical way to select andconfigure all MPLAB Harmony components, includingmiddleware, system services and peripherals with ease.
Benefits Faster time-to-market Improved code interoperability Simplified support MPLAB Harmony Configurator (MHC) for enhanced
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MPLAB® Harmony for PIC32
MPLAB Harmony Block Diagram
Application(s)
RTOS(Third Party)
Common System Services
Middleware
Plug-In Plug-In Driver
OSALDriverMiddleware
DriverDriverDriverDriver Driver
PLIBPLIBPLIBPLIB PLIBSystem
ConfigurationRTOS
Configuration
Hardware
SoftwareFramework
MPL
AB
® H
arm
ony
Con
figur
ator
(MH
C)
Application Layer
Abstracted hardware access Allows for easy port across PIC32 parts
Common System Services
Provides common functionality to avoid duplication and conflicts
Eliminates complex interactions and interdependencies between modules
OSAL provides OS compatibility and interface Manages shared resources Supports low-level configuration and board
support package
Peripheral Libraries (PLIB) Layer
Provide functional interface for Microchip PIC32 scalability
Implements part-specific features
Middleware Layer
Implements complex libraries and protocols (USB, TCP/IP, file systems, graphics)
Provides a highly abstracted application program interface Libraries are thread-safe and RTOS-ready Built on drivers, PLIBS, system services Supports third party library integration
Device Driver Layer
Provides highly abstracted interface to peripheral Controls access to the peripheral Manages multiple hardware instances and software
clients with select drivers Manages peripheral state and multiple
peripheral instances Accesses hardware via PLIB Supports blocking or non-blocking code
PIC32 Software Development Tools Available with MPLAB Harmony
ApplicationsOperating System
Abstract Layer (OSAL)
Middleware/
Software LibrariesDevice Drivers
Development
Software
Third Party
Software
Graphics applications
TCP/IP applications and utilities
USB applications
OSAL interface with “basic” and “none” implementation
PIC32 Starter KitsGetting started is easy with any of the fully integrated PIC32 Starter Kits. They feature simple installation, a getting started tutorial and a PIC32 starter board which easily connects to your PC via USB. The starter kits include:
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PIC32 starter board with integrated programmer and debugger Code examples, documentation, tutorials and sample projects; optional I/O
expansion board allows signal breakouts and connections for PICtail™ Plus daughter cards
†Free version has no code size limit and full optimizations. After 60 days some optimizations are disabled.
PIC32 Development Tools
Choose a Platform: Explorer 16 Platform OR Starter Kit Platform
Microchip is the only silicon vendor with a full 8-, 16- and 32-bit microcontroller portfolio supported by a unified development environment. The MPLAB® X IDE is free and easy to use.
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MPLAB Harmony Software Framework compatible.For up-to-date information about our 32-bit portfolio, related development tools and technical support, visit: www.microchip.com/PIC32.
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PIC32MZ2048EFM1442048 + 160 512 144 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ2048EFM1242048 + 160 512 124 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ2048EFM1002048 + 160 512 100 200 6 5 6 8/18 Y HS Y 2 9/9/9 40 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ2048EFM0642048 + 160 512 64 200 4 4 6 8/18 Y HS Y 2 9/9/9 24 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ1024EFM1441024 + 160 512 144 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ1024EFM1241024 + 160 512 124 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ1024EFM1001024 + 160 512 100 200 6 5 6 8/18 Y HS Y 2 9/9/9 40 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ1024EFM0641024 + 160 512 64 200 4 4 6 8/18 Y HS Y 2 9/9/9 24 6 2 9/4 Y Y Y Y Y Y −40 to
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Note: AEC-Q100 qualified for grade 1, 2 and 3. Check individual product pages on www.microchip.com for details. Please contact your Microchip representative for availability.
PIC32MZ1024EFK1441024 + 160 256 144 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to
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PIC32MZ0512EFE144512 + 160
128 144 200 6 5 68/12
Y HS Y–
9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85
PIC32MZ0512EFF144512 + 160 8/16 2
PIC32MZ0512EFE124512 + 160
128 124 200 6 5 68/12
Y HS Y–
9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85
PIC32MZ0512EFF124512 + 160 8/16 2
PIC32MZ0512EFE100512 + 160
128 100 200 6 5 68/12
Y HS Y–
9/9/9 40 6 2 9/4 Y Y Y Y Y N −40 to +85
PIC32MZ0512EFF100512 + 160 8/16 2
PIC32MZ0512EFE064512 + 160
128 64 200 4 4 68/12
Y HS Y–
9/9/9 24 6 2 9/4 Y Y N Y Y N −40 to +85
PIC32MZ0512EFF064512 + 160 8/16 2
PIC32MZ0512EFK144512 + 160 128 144 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ0512EFK124512 + 160 128 124 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ0512EFK100512 + 160 128 100 200 6 5 6 8/18 Y HS Y 2 9/9/9 40 6 2 9/4 Y Y Y Y Y Y −40 to
+85
PIC32MZ0512EFK064512 + 160 128 64 200 4 4 6 8/18 Y HS Y 2 9/9/9 24 6 2 9/4 Y Y N Y Y Y −40 to
+85
PIC32MZ Devices with Floating Point Unit (FPU) (Continued)
PIC32 Microcontroller Product Families
Note: AEC-Q100 qualified for grade 1, 2 and 3. Check individual product pages on www.microchip.com for details. Please contact your Microchip representative for availability.
in developing products faster and more efficiently. We maintain a worldwide network of field applicationsengineers and technical support ready to provide product and system assistance. In addition, the following service areas are available at www.microchip.com:
Support link provides a way to get questions answered fast: http://support.microchip.com
Sample link offers evaluation samples of any Microchip device: http://sample.microchip.com
Forum link provides access to knowledge base and peer help: http://forum.microchip.com
Buy link provides locations of Microchip Sales ChannelPartners: www.microchip.com/sales
TrainingIf additional training interests you, then Microchip can help. We continue to expand our technical training options, offering a growing list of courses and in-depth curriculum locally, as well as significant online resources – whenever you want to use them.
Technical Training Centers and Other Resources:www.microchip.com/training
tion amplifier. This type of differential amplifier
is essential for interfacing to high-impedance
sensors such as piezoelectric types (see
Figure 2).
Other elements found in the Smart Analogue
blocks portfolio are single-channel amp (with
sync detection), single-channel low-pass/high-
pass filter with variable cutoff frequency, high
precision 16 or 24-bit Delta-sigma A/D
converter with built-in AUTOSCAN sequencer
and programmable gain instrumentation
amplification.
Compared to the classical discrete approach,
component count can be reduced by a factor
of ten, allowing for a much smaller overall
footprint. Additionally, the power-on/off feature
of each block of Smart Analogue subsystem
yields significant savings in power consump-
tion, in some cases as much as 20 per cent.
The Smart Analogue platform approach is
particularly versatile and convenient. It can be
implemented in two ways. One method based
on a Smart Analogue IC, which is a single-
chip silicon die implementation of an AFE.
System engineers insert it into the embedded
control system to connect the transducer to
the MCU. The other one applies a Smart
Analogue MCU, a device that combines both
AFE and MCU chips into a single, integrated
package.
The Smart Analogue MCU combines a Smart
Analogue IC and an MCU into a space-saving,
single-package device simplifying the design
of sensor-based embedded control systems.
Its internal MCU can be used to optimise the
sensor compatibility of the AFE chip, as well
as to control that chip’s signal-interfacing
characteristics. Due to this unique combina-
tion of capabilities, the Smart Analogue MCU
is the only AFE solution that can handle the
different outputs from diverse types of voltage,
current and differential-output sensors. It
provides enough connection terminals to
accommodate all the sensors typically
needed, eliminating the traditional requirement
to have a separate AFE circuit for each sensor.
The Smart Analogue MCU helps shrink the
circuit board, while simultaneously decreasing
system component counts and costs.
The reconfigurable characteristics of Smart
Analogue, means that engineers now have a
field programmable solution which can be
used to plan sensor sensitivity loss over time.
Existing AFE design approaches make it
necessary during the manufacturing process
to perform manual trimming to compensate
for variations in sensor characteristics. By
contrast, a Smart Analogue MCU automates
this process with the implementation of
automatic self-correction features. Thereby
cutting system production and commission-
ing costs, while increasing the sensor-based
system’s operating lifetime.
Using the new Smart Analogue solutions,
engineers can readily select the configuration
and main features of the AFE they require
and, thereafter, change those selections as
often as necessary. This flexible design
capability significantly reduces the time that
otherwise would be necessary for component
selection, board design, and parts
procurement.
Smart Analogue technology represents a
new innovative platform for AFE design
contributing to the implementation of
enhanced features into intelligent sensors,
with the added values of downsized systems,
shortened design cycle and lowered system
cost. By saving cost and time, the new
customisable semiconductor devices enable
sensor manufacturers to create products that
otherwise might be too expensive to produce
or take too long to bring to market.
Feature
September 2015 23
Analogue
The Smart Analogue MCU combines a Smart Analogue IC and an MCU into a space-saving, single-package device simplifying the design of sensor-based embedded control systems.
epdtonthenet.net
Figure 2- High-impedance instrumentation amp built from the AFE chip’s 3-channel configurable amplifier
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Component obsolescence has always been a key challenge across industries but with consumer markets rocketing, industry sectors risk being left behind.
PCB cloning techniques to maximise ROI on complex systems
Before expanding on this, it is important to
define what is meant by obsolescence.
Obsolescence can range from perceived
obsolescence, in which perceived need
is the main driver as opposed to actual
redundancy, through to technical
obsolescence in which technological change
is the main issue. For the purpose of this
article, however, it simply means that the
item is discontinued and no longer being
manufactured.
Solutions to this type of obsolescence are
extremely inefficient when compared with
the fiscal return that is being achieved. The
easiest solution is to find a replacement of
the PCB (Printed Circuit Board) in question,
which serves the same function. The
problem that arises when the obsolete PCB
is no longer available for market reasons is
finding a ‘like for like’ functional replacement.
Additionally within mission critical systems,
this substitution is often not compliant with
procedures. Subsequently, solutions such as
partial or full redesign are considered, at
which point the solution to the problem
begins to get expensive.
PCB cloning provides the ability, in essence,
to remanufacture the PCB by creating a
The popularity of consumer electronics has led to a rapid change in the prospects presented by the industrial markets to electronics manufacturers. The business case
for keeping technically obsolete boards available to industrywhen there is an unlikely opportunity for further sales, is small.
The problem that arises when the obsolete PCB is no longer available for market reasons is finding a ‘like for like’ functional replacement. Additionally within mission critical systems, this substitution is often not compliant with procedures.
The ability to optimise the cloning process for your specific situation and requirement is important when looking for a PCB cloning supplier. The process should be adaptable to fit your cost/ROI model
26
ManufacturingFeature
epdtonthenet.netSeptember 2015
complete design data pack using advanced
techniques and mapping the board digitally
using flying probe technology. Any modifica-
tions or changes can be easily made to the
board before the PCB is produced; in fact
as many as are needed.
This straightforward but sophisticated
process has the potential for substantial cost
savings by eliminating the need for redesign
and ensuring the system can remain
operational for many years beyond its
planned life.
The process differs from conventional reverse
engineering, a more manual and involved
process, in two aspects: accuracy and cost.
Reverse engineering a PCB is a labour
intensive process, requiring significantly
skilled resource and as a result the cost
increases. Furthermore, as with any
labour-intensive process there is risk created
by the prospect of error. In contrast, PCB
cloning is a highly automated process and
avoids potentially costly mistakes.
A case studyImagine you are the Maintenance Manager of
a control system for a nuclear power station;
your logistics manager informs you that you
have two spares available for each of the
three PCBs within the system. The cost of
replacing the system amounts to £3.5 million
with an estimated lifespan of 20 years but
making this investment is difficult due to
further large investments being made in new
stations and budgets for existing mainte-
nance being cut. Considering the planned
decommissioning date is in five years time,
a viable return on investment is impossible.
While a PCB redesign is possible, the lack of
manufacturing data has led to high quota-
tions (£100K for the three boards) and down
time of the system is required. In addition,
there are some tricky compliance hoops to
jump through which will increase down-time
and heighten cost.
You have been made aware of a third option;
offered by a test company called Spherea
Test & Services, who are able to clone the
boards where the cost to generate a
manufacturing data pack amounts to £60K
and importantly no system down time is
required. To ease the process further, the
PCB is fully tested and a certificate of
conformance is provided to ensure it is
functionally indistinguishable from the original
design. To many Maintenance Managers the
value of this solution is clear cut.
A scalable solutionThe ability to optimise the cloning process
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Today, computed tomography (CT) is an established method with synchrotron radiation sources to obtain volume information from numerous sample types at micrometer resolution. However, it is a fact that the examination of extended flat microsystems or planar test objects is often unsatisfactory when the sample is considerably larger than the area of interest for examination.
Positioning solution for a new imaging method with synchrotron radiation
In a joint project, the ANKA (Angströmquelle
Karlsruhe) at the KIT (Karlsruhe Institute for
Technology, Germany), the Fraunhofer IZFP
(Institute for Non-destructive Testing)
Saarbrücken/Dresden, Germany, and the
ESRF (European Synchrotron Radiation
Facility), Grenoble, France, developed
synchrotron laminography, which allows
examining large-surface objects. Examples
for such object geometries are found in wind
energy or aerospace where the method can
be applied to detect damage in the inner
structure (e.g. during loading and failure) and
manufacturing faults. The instrument has
been in operation since 2007 at the
synchrotron radiation source ESRF at
the imaging beamline ID19. For example,
the instrument was able to depict three-
dimensionally a leg of a fossilised prehistoric
snake without damaging this unique find.
With the aid of so-called phase contrast
methods it was also possible to successfully
examine structures without absorption
contrast. At ANKA the new IMAGE beamline
will also provide interested users with the
same method of analysis.
Maximum positioning demands Using conventional CT it is often not possible
to perform reconstruction of volume
information of enlarged asymmetrical bodies
(such as plates, for example), since the
different long radiation paths in the sample
prevent reliable measurement of the
projection data. In laminography, the sample
is scanned under rotation around an axis
tilted with respect to the beam direction.
The considerable variationin X-ray transmissionduring a scan often creates
artefacts during reconstruction. This limitation was overcomeby introducing a new imagingmethod which now enablescalculating three-dimensionalrepresentations of fl at, widely extended objects. However, toobtain meaningful raw data, the sample and the detectorneed to be positioned withhigh precision and stability.This demanding task wassolved by employing apositioning system specifi callydeveloped for this task.
Using conventional CT it is often not possible to perform reconstruction of volume information of enlarged asymmetrical bodies, since the different long radiation paths in the sample prevent reliable measurement of the projection data.
Practical solutionThanks to the close cooperation of the
customers with the engineers and developers
from PI (Physik Instrumente), this complex
task could be solved in a practice-oriented
manner. The aim of the team of specialists,
coordinated by PI miCos, is to develop
application-specific solutions that go beyond
offering individual components and include
system integration as well as the complete
instrumentation. This capability has again
been demonstrated with the instrument for
computed laminography.
In principle, the detector and sample
positioning consists of three cooperating
systems: a Z stage with granite base, a
detector stage moveable in three directions,
and sample positioning. The latter consist of
a six-axis positioning system and a rotation
and tilting stage on which the actual sample
carrier is held magnetically. The challenges lie
in the details, which illustrate the sophistica-
tion of this engineering feat.
Details When designing the Z stage, the large overall
weight of 2.5 tons proved to be a challenge
as it had to be lifted in parallel and with
precision. This was achieved using three-
point air bearing. This way the unit can be
shifted with a minimum of force and remains
stable as soon as the air supply is switched
off. Tilting of the granite base can be
readjusted. An absolute measuring linear
scale allows precise and repeatable alignment
to a few micrometers. The entire setup is
managed via a controller with positioning
display and joystick operation.
The design of the detector stage is equally
sophisticated. The overhanging load of the 50
kg heavy detectors must be moved over a
range of 850 mm x 300 mm x 500 mm. Here,
the absolute deviation must not exceed 100
nanometers and tilting is only tolerated up to
+/- 30 µrad. The longitudinal axis of the
detector stage was therefore integrated
directly into the granite base. Other guaran-
tees for high positioning precision include
precisely matched components, for example,
the drive via centrally arranged ball screws,
needle guidance and a very accurate optical
linear encoder. A high transmission ratio in a
zero-play drive provides self-locking of the
vertical axis.
Positioning samplesNow the requirement is for the samples to be
positioned just as accurately. This is where
the six-axis positioning system comes into
operation.
This SpaceFAB is designed symmetrically,
where three legs with a fixed length are each
mounted on an XY stage in a ball joint. The
platform of the SpaceFAB is mounted to the
legs via a cylindrical bearing in each case.
The lower stages of the XY combinations are
integrated into the granite base via guidings.
The samples can thus be positioned with six
degrees of freedom. Essential features are
the freely selectable pivot point of the
parallel-kinematic system and its high
stiffness. The linear travel ranges are 150 mm
× 150 mm × 50 mm, at 0.2 µm position
resolution, ±12.5° tilting is possible for the
axial angle, and ±5° for the other directions.
Precision is provided by optical linear
encoders and the high-precision mechanical
components which are driven by a combina-
tion of stepper motors and ball screws.
A combined rotation and tilting stage, which
supports the actual sample carrier, is
mounted on this parallel kinematic. The
rotating table enables 360° rotation at only
0.24 µm absolute flatness deviation. The
repeatability of sample positioning of the
SpaceFab has been specified and measured
at less than 0.5 µm following reference
measurement. Rotation eccentricity was less
than 0.5 µm. This is important so that the
various projection angles have the same
projected rotation center. At lower accuracy,
artefacts would occur during reconstruction.
The compact construction height allows
shallow tilting angles so that the synchrotron
beam does not penetrate through the
mechanical elements, thus making projection
recording impossible. An optical encoder ring
assures high angular resolution. In addition,
the angle of the sample to the X-ray beam
can be adjusted by up to 45° via the tilt stage
at a resolution of 0.001°. This design has a
self-locking rack and pinion drive and
remains stable during examination.
The actual sample holder, a very thin frame
carrier, is also an exemplary piece of
technology. It is supported by Teflon
cushions and is coupled magnetically. Two
linear stages angled at 90° in relation to the
rotating axis, which shift the sample holder
over 150 mm × 150 mm but do not touch
same during operation, serve to center the
sample holder. Magnetic retention can be
switched on and off, a flexure joint and air
cushion provide optimal parallelism.
The study results achievable today with
such a synchrotron laminography method
can benefit a host of fields, from industry-
oriented research to geology and life
sciences. A major contribution is provided by
the bespoke positioning solution created by
the specialists of the “Beamline Instrumenta-
tion”, which can even align large samples
and consequently rather high loads with
micrometer precision.
Maximum precision and stability are essential during examination to allow subsequent reconstruction of meaningful images. During imaging, positional stability must be ensured for both the detector and the sample.
1) Detect errors earlyThe earlier product deficiencies are identified
in the development process, the easier they
are to fix. Pre-compliance testing can be
used to focus on any areas identified as
potential causes for concern and enables
solutions to be found early.
The risk of a design failing is often relative
to the time taken to start testing, so
designers that leave testing to the project
end are completely reliant on the design
team’s skill and experience.
Early analysis can also drive system
decisions. EMC also encompasses the
system and mechanical changes that may
be required. These may include adding EMI
shields, coating boxes or adding EMC foam
to fill any leaks/gaps in an enclosure.
2) Test to compliance standardsUsing an anechoic testing chamber before
formal testing can determine whether or
not a design will meet relevant compliance
standards. The ability to test to EN55022,
EN61000 and EN61000-3-2, as well as
MIL-STD-461, for emissions provides
confidence in the design. Engineers that offer EMC pre-compliance testing as a service offering will be continuously on the lookout for areas of risk during product development.
32
Test and measurementFeature
Typically conducted at a specialist lab at the end of the project, EMC testing can lead to frustration when the tests fail. Unfortunately, many projects trip up at this last hurdle, with radiated emissions regularly cited as the top reason.
Dunstan Power, ByteSnap Design
Six reasons to conduct early EMC testing
The cost of testing is already high, but re-testing often stretches the planned budget and slows down the entire project. Upon failure,
engineers need to investigate the source of the problem, at a stage in the project when the integration of all the components can make this diffi cult.
Visibility of process trendsCupio’s VuData statistical process analyser
software package offers an alternative
approach, which is cost-effective and easy
to implement. Using data from any Nordson
Yestech AOI system’s database, VuData
generates detailed reports and live charts that
expose trends within the production process.
These can reveal, for example, if a reflow
solder oven’s temperature profile needs
adjusting, or that an operator would benefit
from further training.
Whereas the AOI user interface is focused on
issues related to the board currently under
inspection, VuData shows bar charts, pie
charts and reports for a volume of boards
over a period of time. The snapshot can
be a live, rolling record of production just
completed, or it could be a historical record
recalled for management review or customer
discussion. The bars can show faults per
board or by component reference ID. The
operator can focus on the fault levels that
really matter by setting a couple of thresholds.
Failure rates below the lower threshold will not
be displayed at all, while those below the
second threshold will be displayed in blue.
Attention is focused on rates above this – i.e.
those that merit closer review and action –
which are displayed in red (Fig1).
Feature
September 2015 35
Test and measurement
epdtonthenet.net
Where an AOI system allows operators to isolate faulty PCBs as they leave the production line, Cupio’s VuData statistical process analyser software acts on AOI-generated databases to provide a bigger picture – giving operators and line management visibility of a process’s underlying trends and an opportunity to make corrections and improvements.
Unlocking your Nordson YESTECH AOI and AXI system’s true potential
Today, most PCB assembly lines would be diffi cult to operate without an automated optical inspection (AOI) system. Boards are typically too large, and too densely-populated with tiny components to allow effi cient manual inspection; in other
circumstances, the boards may be simpler, but manual inspection would simply take toolong. An AOI system operates far more effi ciently, reliably and quickly than any human inspector could – and it gathers large amounts of potentially useful data as it does so.
Using data from any Nordson Yestech AOI system’s database, VuData generates detailed reports and live charts that expose trends within the production process.
Ben Seviour, Cupio
Figure 1- ‘Parts failed by RefID’ chart, showing non-critical blue bars and critical red bars
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Taking steps to bring down testing time and expense allows companies to become market leaders and deliver the latest technology to market faster.
38
Test and measurementFeature
This is the fourth article in a five part series delivered by National Instruments. This article takes a look at how advances in the use and complexity of embedded software are creating implications for test and validation systems.
Aaron Edgcumbe, National Instruments
Handling increased complexity in embedded devices
Modern devices rely heavily on embedded software,which is continually becoming more advanced to allow the constant incorporation of new features
and additional functionality. Companies are facing the prospect of being forced to drive innovation and creativitywhilst maintaining the constant reliability we expectfor the same cost. The degree to which companies can introduce innovative technology into their products isoften limited by the cost of development and testing. Taking steps to bring down this testing time and expense allows companies to become market leaders and deliver the latest technology to market faster.
JFT routines Originally developed to run under the
open-source Python scripting language, JFT
(JTAG Functional Test) routines offer simple
access to low-level control of a JTAG device’s
pins. Use JFT to set or toggle a single pin or
group them together as a bus that can be set
as a program variable. JFT makes it easy to
create test programs with loops, conditional
branching and limits testing. The module
approach also allows test engineers to create
re-usable code blocks that can be transferred
between test projects.
In 2013 the JFT concept was ported to a
number of other platforms including National
Instruments’ LabVIEW. By gaining access to
the pins of high-density FPGA, microproces-
sors and DSPs, test engineers are afforded
access to kernel of the design in a safe and
predictable manner. Figure 1 shows how
boundary-scan access to an FPGA can assist
in testing a D-A converter device, in conjunc-
tion with a DVM – a simple task with JFT/
LabVIEW and VISA driver for the DVM. The
alternative functional test mechanism would
involve writing specific test firmware that also
requires partial functioning and boot-up of the
UUT before the test can begin.
ATE Solutions’ Flex series ATEs are frequently
supplied with JTAG/boundary-scan add-ons
from JTAG Technologies. The company’s MD,
Steve Lees, states that many of the designs it
is asked to test, cry out for boundary-scan
as a low-cost method to achieve higher test
coverage.
In addition to software resources, JTAG
Technologies also offers high-integrity
connection systems compatible with ATE
connector vendors MAC Panel and Virginia
Panel. For use with PXI(e) format boundary-
scan controllers these connection systems
include active signal conditioning and
additional IO channels.
Gary Clayton of MAC Panel says that JTAG
usage is increasing rapidly with telecom and
mil-aero customers – MAC Panel co-operated
with JTAG Technologies in providing a solution
compatible with the SCOUT mass-intercon-
nect system.
At the Automated Test Summit, a program
of events is offered to bring ATE developers
and users up to date with the latest trends
and technologies. Jeremy Twaits a Senior
Marketing Engineer with NI Europe, claims the
annual ATS event allows NI to interact with
customers and partners, get new ideas and
feed those back to the developments teams.
Working with suppliers allows NI to expand
its commercial offering to the ATE market.
It’s great to see that software tools such as
TestStand and LabVIEW are so well supported
by JTAG/boundary-scan technology.
JTAG use in functional testers on the rise
JTAG Technologies has invested in the development of integration options for a range of ATE and functional test platforms. One of the most popular platforms is for National Instruments’ LabVIEW and is known as PIP/LV (Production Integration Package for LabVIEW).
September 201540
Using PIP/LV, functional test developers are able to harness all the automated test generation features of ProVision, a processing tool that will import the UUTs (Unit under Test) CAD-derived netlist(s) along with boundary-scan device (BSDL) model and proprietary models that describe
the function of non-boundary-scan parts, often referred to as clusters. The resulting test programs, once verifi ed inside ProVision, can be released to the functional tester platform and invoked through a series of LabVIEW VIs (Virtual Instrument icons) that form PIP/LV. In addition to board test code, Provision can generate applications to program fl ash devices (NOR, NAND and serial) and also handle the confi guration of nearly all programmable logic parts (CPLDs, FPGAs, confi g PROMs etc..)
JTAG Technologies
In addition to board test code, Provision can generate applications to program flash devices and also handle the configuration of nearly all programmable logic parts.
Harwin, a leading hi-rel connector and SMT board hardware
manufacturer, has expanded its popular EZBoardware range
with the introduction of three new RFI Shield
Clips suitable for small and low profi le shield cans with wall
thicknesses of between 0.15 and 1.0mm. These additions include two clips of only 3.9mm
length, allowing users to fi x smaller sized cans to the PCB using this cost effective method. The range of clips now available
also includes the S0961-46R, specifi cally designed to provide signifi cantly higher retention forces on the shield can, typically up by 30%, ideal for those
users seeking to maximise retention of the shielding can to the board.
Supplied taped and reeled, EZShield Can Clips are designed to be automatically placed and surface mounted to the PCB.
‘Plug & Play’ proximity switches, 35% thinner from Panasonic
Panasonic has introduced a new series of human detection proximity sensors. MA Motion series
sensors are 35 % thinner than previous versions and are simple to install thanks to their ‘plug
and play’ nature.
With feature built-in trigonometric background suppression, so they are unaffected by changing scenes or by people passing
by outside the detection range. Also, changing light conditions and bright daylight measuring up to 30k lux at the sensor’s surface will not affect the performance of
the sensor.
Thin MA Motion proximity switches feature a detection distance of 5 to 200cm and are available with NPN and
PNP output trans./versionsin PNP or NPN open collector
versions. They operate from 4.5 to 5.5VDC or in a wilder voltage
version from 5.5 to 27 VDC.
For further product information, please visit: http://eu.industrial.panasonic.com/
ew series of humanMA Motion series previous versions
ks to their ‘pluge.
etric background naffected by ople passing nge. Also,bright
5
September 2015 41
tor Corporation, today orldTypdeoen
e
B
p , y’s fi rst superMHL e-C to deliver 4K
o with concurrent2 data.
JTAG/Boundary-scan Board Test Workshops
Register now for ‘hands on’ training sessions
JTAG Technologies are currently accepting registrations for the next of their hands on training workshop based on the JTAGLive Studio low-cost board test and validation system.
Costing just £295, the workshop will allow users to discover the power of boundary-scan testing for board bring-up and production applications. Attendees will work with the JT 2156 training board and
learn how to use the Buzz interactive test tool, AutoBuzz interconnect test system and the Python-based Script tool to generate cluster tests and re-usable cluster test modules for non-JTAG logic such as
memories and I2C parts.
The workshop fee includes the cost of a JTAGLive controller and a six-month taster licence for the JTAGLive Studio system, together worth £650.
The event will be run close to the JTAG Technologies’ UK offi ce in Bedford, a central location that offers easy access from both the A1 and M1 motorway. The next event is scheduled for 17th September 2015 and will begin at 9:30 am.
To register your interest please contact [email protected] or call 01234 831212.
The anticipated audience will include electronics design engineers looking at JTAG for hardware validation, test engineers not yet familiar with JTAG, project managers, SME owners, production engineers and anyone with an interest in this rapidly growing embedded test technology.
Comments from previous workshop attendees: “Studio looks a great tool that can help to speed-up time to market”,“I now longer need to wait for fi rmware before I start board bring-up”,“We intend to deploy Studio for repair and rework in manufacturing”
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News & Products
PCE-PA 8000 Three-Phase Clamp Meter with 2 GB SD Card and Three Current Clamps
The PCE-PA 8000 measures and records the power in both single-phase and three-phase circuits. Its 3.7” display shows the measured current (up to 1200 A) and voltage (up to 600 V) as well as the frequency and the active, apparent and reactive
power/energy. The device can also determine the power factor and phase angle. Measurement
values are saved to the SD card in xls format so that they can be analysed on your computer. The sampling rate can be set from 2
to 7200 seconds. The clamps can be used for cables with a diameter of 50 mm. This instrument meets IEC
1010 and CAT III 600V standards.
For more information about this or other clamp meters, please visit
Review Display Systems Ltd (RDS) offers three embedded boards from AAEON based on Intel’s latest Baytrail range of
CPU platforms.
The boards have been developed in three different industrial formats to cover a
range of applications.
• The compact COM Express Type 6 format CPU module, the COM-BT, available in single, dual and quad core versions, based on the Intel® Atom™E3815 (single), E3827 (dual) and E3845 (quad) processors.
• The GENE-BT05 is a 3.5inch, feature rich industrial sub-compact motherboard and features Intel® Celeron N2930/ N2807 processors, with 204 pin SODIMM DDR3L, maximum 8GB of system memory, and twin Gigabit Ethernet.
• The EMB-BT1 thin Mini-ITX embedded motherboard is based on Intel® Atom™ E3845/E3825 processors, delivering 1.91GHz and 1.33GHz respectively.
www.review-displays.co.uk Tel: +44 (0)1959 563345
Dragonfl y miniature connectors can mix signal and power contacts
Astute Electronics can now deliver Positronic’s
comprehensive Dragonfl y range of reliable, miniature
connectors with power and/or signal contacts.
Confi gurable with size 16, 20 or 22 contacts,
Dragonfl y connectors can handle currents up to 20A per contact. Blind mating,
sequential mating, fl oat mount, panel mount and
cable options with an integral locking system are available.
Comments Gary Evans, E-Mech Divisional Manager, Astute Electronics: “Positronic’s Dragonfl y connectors are ideal for high density applications.
The integral locking mechanism with three changeable size 16 contacts that make devices a good fi t as power input connectors.”
Dragonfl y connectors are fi eld-proven to be reliable over many mating cycles. Solder PCB mount, crimp and press-fi t terminations are available; coplanar mountings are an option. The series includes a wide variety of accessories.
Würth Elektronik eiSos publishes online design tool:the world’s most precise AC loss calculation
With RED EXPERT, has published a
new online tool with which developers can simulate the power inductors. With just a few
clicks, the power inductors are
selected and the complete AC losses
calculated. The special feature: RED
EXPERT enables the world’s most precise loss calculation, because it is not based on the known Steinmetz models with sinusoidal excitation, but rather is derived and validated from
measurements of the power inductors in a switching controller set-up.
The losses determined are based on current and voltage waveforms typical in applications. Besides the core and winding losses, they also
include the losses arising from the specifi c geometries of the inductance, such as the air gap.
Freely available at www.we-online.com/redexpert
Medical-grade DC/DC Converters
RECOM announces the release of three new medical-
grade DC/DC converters with 250VAC/2MOPP
certifi cation. The REM3, REM6 and REM10 series
offer 3W, 6W or 10W output power, respectively in a DIP24 case. Despite this
compact case size, all series feature reinforced isolation rated at 250VAC working voltage, 5KVDC galvanic isolation, 8mm creepage
and clearance and low 2µA leakage currents.
The three series are available with 2:1 or 4:1 input voltage
ranges, single or dual outputs from 3.3V up to 24V.
The high effi ciency of 89% means that the operating temperature is from -40°C to 105°C. The REM series are IEC60601-1 and ANSI/AAMI 606061 CB
The products pages are the only pages you need to catch-up with the latest releases.
To contact us about getting your product on these pages, send an email to: [email protected]
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September 2015 43
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Environmental Test Chambers
Weiss Technik UK Limited ¬ Tel +44 1495 305555
Industry leaders in the design, manufacture and servicing of customised and standard
In-house processes including:Oversized PCB CapabilityAutomated SMT/Through-Hole AssemblyHand Assembly/Box BuildDesign For ManufactureEnvironmental Testing Wide Range of Coatings/Encapsulation Full Test Services IPC Certified Staff
Hill Farm, Church Lane, Ford End, Chelmsford, Essex CM3 1LH
C / , C/ 6 0 a d C 600IPC 7711/21, IPC/WHMA-A-620 and IPC-600
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Device Programming Services
Batteries & Chargers
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