-
Vibration-to-Electric Energy Conversion Using
aMechanically-Varied Capacitor
by
Bernard Chih-Hsun Yen
Bachelor of Science in Electrical Engineering and Computer
ScienceUniversity of California at Berkeley, 2003
Submitted to the Department of Electrical Engineering and
Computer Sciencein partial fulfillment of the requirements for the
degree of
Master of Science
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
February 2005
@ Bernard Chih-Hsun Yen, 2005. All rights reserved.
The author hereby grants to MIT permission to reproduce and
distribute publiclypaper and electronic copies of this thesis
document in whole or in part.
Author.......
C i d b
... .. .. ... ...... .....
Department of Electrical Engineering and Computer ScienceJanuary
14, 2005
..y.Jeffrey H. Lang
Associate Director, Laboratory for Electronic and
Electromagnetic SystemsThesis Supervisor
Accepted by ....
Chairman, Departmental Committee on
!MSACHUSETS INSTITUTE.OF TECHNOLOGY
MAR 14 2005
LIBRARIES
Arthur C. SmithGraduate Students
AACHIVES
t U e:
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Vibration-to-Electric Energy Conversion Using
aMechanically-Varied Capacitor
byBernard Chih-Hsun Yen
Submitted to the Department of Electrical Engineering and
Computer Scienceon January 14, 2005, in partial fulfillment of
the
requirements for the degree ofMaster of Science
Abstract
Past research in vibration energy harvesting has focused on the
use of variable capac-itors, magnets, or piezoelectric materials as
the basis of energy transduction. How-ever, few of these studies
have explored the detailed circuits required to make theenergy
harvesting work. In contrast, this thesis develops and demonstrates
a cir-cuit to support variable-capacitor-based energy harvesting.
The circuit combines adiode-based charge pump with an asynchronous
inductive flyback mechanism to re-turn the pumped energy to a
central reservoir. A cantilever beam variable capacitorwith 650 pF
DC capacitance and 347.77 pF zero-to-peak AC capacitance, formed
bya 43.56 cm 2 spring steel top plate attached to an aluminum base,
drives the experi-mental charge pump near 1.56 kHz.
HSPICE simulation confirms that given a maximum to minimum
capacitance ratiolarger than 1.65 and realistic models for the
transistor and diodes, the circuit canharvest approximately 1 ptW
of power. This power level is achieved after optimizingthe flyback
path to run at approximately 1/4 of the mechanical vibration
frequencywith a duty ratio of 0.0019. Simulation also shows that
unless a source-referencedclock drives the MOSFET, spurious energy
injection can occur, which would inflatethe circuit's conversion
efficiency if the harvester is driven by an external clock.
A working vibration energy harvester comprising a time varying
capacitor with acapacitance ratio of 3.27 converted sufficient
energy to sustain 6 V across a 20 MQload. This translates to an
average power of 1.8 pW. Based on a theoretical harvestinglimit of
40.67 pW, the prototype achieved a conversion efficiency of 4.43 %.
Additionalexperiments confirm that the harvester was not sustained
by clock energy injection.Finally, the harvester could start up
from a reservoir voltage of 89 mV, suggestingthat the circuit can
be initiated by an attached piezoelectric film.
Thesis Supervisor: Jeffrey H. LangTitle: Associate Director,
Laboratory for Electronic and Electromagnetic Systems
3
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Acknowledgments
I owe a huge intellectual debt to numerous individuals working
at the Laboratory
for Electronic and Electromagnetic Systems for their help during
the development
of this thesis. Professor Dave Perreault provided excellent
suggestions on the diode
selection as well as alternative energy flyback techniques. The
vacuum chamber for
the variable capacitor and the surface mount PCB used in the
final stage of testing
were produced at lightning speed by Wayne Ryan, whose knowledge
on prototyping is
truly amazing. Jos6 Oscar Mur-Miranda, Joshua Phinney, Lodewyk
Steyn, Matthew
Mishrikey, and Yihui Qiu helped me ease the transition into LEES
early on and
provided unwavering support whenever I ran into difficulties.
Professor Thomas Keim
secured my internship at Engineering Matters, Inc., which
allowed me to continue
researching during the summer.
The redesign of the variable capacitor occurred with plenty of
guidance from
both Professor Alex Slocum, Alexis Weber, and Gerry Wentworth.
Alexis stayed
overtime on numerous occasions to help me run the Pro/Engineer
Wildfire finite
element analysis in order to optimize and correct the
out-of-plane resonant frequency.
Gerry provided much help during the final prototyping on the
waterjet and made theprocess as painless as it could be.
Schmidt Group Laboratory provided the necessary equipment to
excite the pro-
totype variable capacitor, which was crucial to the collection
of experimental data.
In particular, I want to thank Professor Martin Schmidt and
Antimony Gerhardt for
coordinating the effort that allowed the shaker table and
amplifier to remain checked
out for extended amounts of time. Your generosity will not be
forgotten.
I also want to extend a warm thank you to Professor Charles
Sodini for spending
time to work out the clock power injection issue in the energy
harvesting circuit.
5
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Without the insight of using a source-referenced gate drive, the
research would not
have been able to move past the simulation stage. Someday, when
I find a coin worthy
of this knowledge, it will be promptly deposited into your money
jar.
My parents, Gili and Eva Yen, provided much guidance and moral
support during
my educational career and allowed me to reach where I am today.
Their care and
understanding go way beyond the norm, and I am forever grateful.
This thesis belongs
to them as much as it does to me.
Professor Jeffrey Lang deserves my deepest gratitude, not only
as my thesis ad-
viser but as someone who truly cares about me in every possible
way. He offered
me a research position at a time when I felt extremely stressed
because no other
opportunities existed. Throughout this research, he provided
countless suggestions
for overcoming difficult theoretical and experimental barriers.
Without these critical
insights, this thesis would not exist. I will never forget all
the time he spent with
me both during and after research meetings, even when he already
had many other
businesses to attend to. Furthermore, he never hesitated to
remind me to rest when
I had exams in the courses I was taking, or when my teaching
assistant load grew too
high. Thank you! I cannot possibly repay all this kindness and
care.
6
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Contents
14
. . . . 15
. . . . 17
. . . . 18
. . . . 21
1 Introduction
1.1 Concept of Energy Harvesting . . . . . . . .
1.2 Reasons to Research . . . . . . . . . . . . .
1.3 Previous Works . . . . . . . . . . . . . . . .
1.4 Chapter Summary . . . . . . . . . . . . . .
2 Foundations of Energy Harvesting
2.1 The Q-V plane . . . . . . . . . . . . . . . .
2.2 A Synchronous Charge-Constrained Circuit .
2.3 The Asynchronous Topology: An Overview .
2.4 Limitations Without Flyback . . . . . . . .
2.5 Energy Flyback Technique . . . . . . . . . .
2.6 Bucket Brigade Capacitive Flyback . . . . .
2.7 Relevant Measuring Techniques . . . . . . .
2.8 Chapter Summary . . . . . . . . . . . . . .
23
. . 24
26
. . 28
29
36
. . 39
. . 44
46
3 Circuit Simulation and Design
3.1 Creating the Variable Capacitor . . . . . . . . . . . . . .
. . . . . . .
3.2 Inductor Modeling . . . . . . . . . . . . . . . . . . . . .
. . . . . . .
3.3 Power Devices . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . .
7
48
48
50
51
-
3.4 Oscilloscope Probes . . . . . . . . . . . .
3.5 Gate Drive Modeling . . . . . . . . . . .
3.6 Simulating the Two Diode Circuit . . . .
3.7 Two Diode Circuit with Energy Flyback
3.8 Gate Drive, A First Attempt . . . . . . .
3.9 Corrected Gate Drive . . . . . . . . . . .
3.10 Parameter Optimization . . . . . . . . .
3.10.1 Effect of Inductor Parasitics . . .
3.10.2 Effect of Clock's Duty Ratio . . .
3.10.3 Effect of Capacitance Variation .
3.10.4 Effect of Capacitor Values . . . .
3.10.5 Effect of Initial Voltage Level . .
3.10.6 Effect of Diode Leakage . . . . .
3.10.7 Effect of Rise and Fall Time . . .
3.11 Chapter Summary . . . . . . . . . . . .
4 Experimental Results
4.1 Aluminum Block Capacitor Characterization . . . . .
4.2 Energy Harvesting with Aluminum Capacitor . . . .
4.3 Design of a Cantilever Beam Capacitor . . . . . . . .
4.3.1 Qualitative Description . . . . . . . . . . . . .
4.3.2 Setting the Effective Spring Constant . . . . .
4.3.3 Dimensioning the Cantilever Beams . . . . . .
4.3.4 Gap Engineering . . . . . . . . . . . . . . . .
4.3.5 Calculating the Capacitance Variation . . . .
4.3.6 Second-Order Spring Constant Consideration
8
. . . . . . . . . . . . . . . . 5 2
. . . . . . . . . . . . . . . . 5 3
. . . . . . . . . . . . . . . . 5 3
. . . . . . . . . . . . . . . . 5 7
. . . . . . . . . . . . . . . . 6 1
. . . . . . . . . . . . . . . . 6 6
. . . . . . . . . . . . . . . . 6 8
. . . . . . . . . . . . . . . . 6 9
. . . . . . . . . . . . . . . . 7 0
. . . . . . . . . . . . . . . . 7 1
. . . . . . . . . . . . . . . . 7 2
. . . . . . . . . . . . . . . . 73
. . . . . . . . . . . . . . . . 7 4
. . . . . . . . . . . . . . . . 7 5
. . . . . . . . . . . . . . . . 7 5
77
. . . . . . . 78
. . . . . . . 82
. . . . . . . 85
. . . . . . . 86
. . . . . . . 87
. . . . . . . 88
. . . . . . . 89
. . . . . . . 89
. . . . . . . 92
-
4.4
4.5
4.6
4.7
4.8
4.9
4.10
4.11
4.3.7 Design Verification Using FEM . . . .
4.3.8 Additional Design Considerations . . .
Characterizing the Cantilever Beam Capacitor
Energy Harvesting with Steel Capacitor . . . .
Starting Up the System . . . . . . . . . . . .
Sensitivity to Frequency Variation . . . . . . .
Simulation Revisited . . . . . . . . . . . . . .
Energy Conversion Verification . . . . . . . .
Energy Conversion Efficiency . . . . . . . . .
Chapter Summary . . . . . . . . . . . . . . .
5 Summary, Conclusions, and
5.1 Chapter Summaries . . . .
5.2 Important Conclusions . .
5.3 Future Improvements . . .
5.4 Interfacing with the Load
5.5 Final Words . . . . . . . .
. . . . 95
. . . . 97
. . . . 98
. . . . 100
. . . . 104
. . . . 105
. . . . 106
. . . . 110
. . . . 115
. . . . 119
Possible Future Work 120
. . . . . . . . . . . . . . . . . . . . . . . . 120
. . . . . . . . . . . . . . . . . . . . . . . . 123
. . . . . . . . . . . . . . . . . . . . . . . . 124
. . . . . . . . . . . . . . . . . . . . . . . . 126
A HSPICE Simulation Code
A.1 Complete Simulation Deck . . . . . . . . . . . . . . . . . .
. . . . .
A.2 Device Models . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . .
127
128
128
130
9
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List of Figures
2-1 Two typical electric energy conversion cycles . . . . . . .
. . . . . . . 25
2-2 Charge-constrained energy harvesting circuit using two
MOSFETs. . 26
2-3 Block diagram of capacitive energy harvester. . . . . . . .
. . . . . . 28
2-4 Charge-pump portion of energy harvesting circuit. . . . . .
. . . . . . 29
2-5 Equivalent circuit diagram of one idealized energy
harvesting cycle. 30
2-6 Charge-constraining portion of non-ideal energy harvesting
circuit. 33
2-7 Equivalent circuit diagram of one non-ideal energy
harvesting cycle. 34
2-8 Idealized inductive energy flyback circuit diagram. . . . .
. . . . . . . 37
2-9 Idealized capacitive energy flyback circuit diagram. . . . .
. . . . . . 38
2-10 A possible bucket brigade energy flyback circuit. . . . . .
. . . . . . . 40
2-11 Flyback efficiency versus number of bucket brigade
capacitors. ..... 43
2-12 Op-amp based network to extract capacitance variation
magnitudes. 44
2-13 Circuit to accurately determine the DC value of a
capacitor. . . . . . 45
3-1 Subcircuit for simulating a variable capacitor. . . . . . .
. . . . . . . 49
3-2 Two-port input current of variable capacitor. . . . . . . .
. . . . . . . 50
3-3 Inductor modeled with core loss and winding loss. . . . . .
. . . . . . 51
3-4 Charge pump portion of the energy harvester. . . . . . . . .
. . . . . 54
3-5 Voltage waveforms for energy harvesting circuit. . . . . . .
. . . . . . 54
3-6 Current waveforms for charge pump circuit. . . . . . . . . .
. . . . . 56
10
-
3-7 The complete energy harvesting circuit without gate drive. .
. . . . . 58
3-8 VRES as a function of time for an ideally driven circuit. .
. . . . . . . 59
3-9 VVAR and vs as a function of time for an ideally driven
circuit. .... 60
3-10 iD1 and iD2 as a function of time for an ideally driven
circuit. . . . . . 61
3-11 VRES as a function of time for a ground-referenced CLK
drive. .... 63
3-12 Cycle of circuit operation that results in energy injection
from CLK. . 65
3-13 Energy harvesting circuit with source-referenced flyback
clocking. . . 66
3-14 vs as a function of time for slow energy flyback clocking.
. . . . . . . 68
3-15 vs as a function of time for Cs = 10 nF. . . . . . . . . .
. . . . . . . 73
4-1 Energy harvesting PCB attached to an auxiliary breadboard. .
. . . . 78
4-2 Side-view of the aluminum block capacitor (not to scale). .
. . . . . . 79
4-3 Ling Dynamic System V456 shaker table. . . . . . . . . . . .
. . . . . 80
4-4 VOUT as a function of shaking strengths. . . . . . . . . . .
. . . . . . 82
4-5 CAC as a function of shaking strength. . . . . . . . . . . .
. . . . . . 83
4-6 Frequency sweep used to determine variation in quality
factor. ..... 84
4-7 Waveform of vs for aluminum capacitor with VAMP,p-p = 100 mV
. 85
4-8 HSPICE waveform of vs for CDC = 752.4 pF and CAC = 10.33 pF
. 86
4-9 Waveform of VRES for aluminum capacitor with different
shaking. . 87
4-10 Equivalent mechanical model of the top capacitor plate. . .
. . . . . . 90
4-11 Cantilever beam when the proof mass is at maximum vertical
travel. . 93
4-12 Pro/Engineer Wildfire finite element analysis results. . .
. . . . . . . 95
4-13 Final design for the new variable capacitor, completely
assembled. . . 97
4-14 Frequency sweep for the spring steel variable capacitor. .
. . . . . . . 99
4-15 CAC as a function of shaking strength. . . . . . . . . . .
. . . . . . . 100
4-16 Amplifier VOUT as a function of shaking strengths. . . . .
. . . . . . . 101
11
-
4-17
4-18
4-19
4-20
4-21
4-22
4-23
4-24
4-25
4-26
4-27
4-28
4-29
4-30
4-31
4-32
4-33
12
Baseline experiment to gauge first order decay at VRES . . . . .
. . . 102
First order decay at VRES for increasingly heavy shaking. . . .
. . . . 103
Plot of VRES as VAMP,p-p changes from 250 mV to 380 mV. . . . .
. . 104
Rising curves at VRES for increasingly heavy shaking. . . . . .
. . . . 105
Plot of VRES as circuit starts up from VINIT = 200 mV. . . . . .
. . . . 106
Plot of VRES as a function of frequency with VAMP,p-p= 320 mV. .
. . 107
LC network used to characterize the nonlinear inductor core
loss. . . 108
Plot of and #c as a function of VDR,p-p at f = 865 Hz . . . . .
. 108LC network used to model the nonlinear core loss in HSPICE.
... . 109
Comparison of the piecewise linear functions modeling Rc. . . .
. . . 110
VRES as a function of time with nonlinear core loss. . . . . . .
. . . . 111
VRES as a function of time with nonlinear core loss. . . . . . .
. . . . 112
VRES as a function of reservoir loading with VAMP,p-p = 0
mV..... 113
VRES as a function of reservoir loading with VAMP,p--p = 100 mV.
. 114
VOUT for both top and bottom plate grounding strategy . . . . .
. . . 115
VRES as a function of clocking voltage . . . . . . . . . . . . .
. . . . . 116
Q-V plane trace representing theoretical harvesting maximum. . .
. . 117
-
List of Tables
Ideal converted power as a function of fCLK - - - -
Converted power as a function of VG . . . . . . .
Converted power as a function of fCLK . . . . . . .
Converted power as a function of vGS . . . . . . . .
Converted power as a function of fCLK . . . . . . .
Converted power as a function of RC and Rw. . ,
Converted power as a function of D . . . . . . .
Converted power as a function of CAC. . . . . .
Converted power as a function of CRES and Cs.
Converted power as a function of VINIT . . . . . .
Converted power as a function of Is . . . . . . .
Converted power as a function of tRISE and tFALL-
4.1 CAC of aluminum block capacitor as a function of shaking
strength. .
13
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
- . . - . . . . 62
- . . - - . .. 64
- . - . . - .. 64
- . - . . ... 67
- . .. . ... 67
. . . . . . . . 69
. . . . . . . . 70
- . .. - ... 71
. . . . . . . . 72
- - - - - . - - 74
- . . . . . . . 74
- . . .. - . . 75
81
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Chapter 1
Introduction
More than two thousand years ago, Greeks and Romans used
waterwheels, placed
strategically along streams, to mechanically rotate gears that
helped grind corn. This
simple idea spread around the world, and over the centuries,
people built upon the
original design in hopes of improving the conversion efficiency
between flowing water
and useful energy. In 1862, turbines situated in Wisconsin
managed to produce
12.5 kW of power based solely on water gushing through the
equipment when the
dam doors opened. The above development serves to illustrate
that the concept of
energy harvesting is nothing new. Rather, the methodology and
principles of creating
an efficient system evolves.
Scavenging the energy of ambient vibrations constitutes one such
methodology,
and this will be the focus of the present thesis. Broadly
speaking, vibration energy
harvesting involves the creation of some physical structure that
can couple in kinetic
energy from small vibrations and convert it into storable
electric energy. Due to
the growing demand of autonomous sensors that must function
without the need for
human intervention, interest in this topic has burgeoned in
recent years. Although
other methods of energy scavenging, such as those involving
thermal and chemical
gradients, tidal waves, and photons, are also being actively
researched, the wide
availability of vibration energy makes it a very good candidate,
and this thesis will
14
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show that the parts necessary to carry out such energy
harvesting are relatively simple.
This chapter presents a broad overview of the current affairs in
vibration energy
harvesting, including the different methods presently employed
as well as the reasons
behind the continual interest in this topic. Furthermore,
important achievements
documented in the literature will be summarized and
categorized.
1.1 Concept of Energy Harvesting
Fundamentally, energy harvesting involves the conversion of
ambient energy such as
light, heat, or mechanical motion into electrical energy that
can directly power an
external system or be stored in battery cells for future use. If
the energy source
is further limited to mechanical kinetic energy, or vibrations,
three main strategies
of conversion dominate: piezoelectric, magnetic, and electric.
Magnetic conversion
can be further subcategorized into systems with varying
inductance and systems
that employ moving permanent magnets. Likewise, electric
conversion uses either a
time varying capacitor or a permanent electret, where a fixed
charge distribution is
introduced in the dielectric layer between the capacitor plates.
Although the scope of
this thesis covers variable capacitor electric energy harvesting
only, all three strategies
have their own merits.
Piezoelectric materials, such as quartz and barium titanate,
contain permanently-
polarized structures that produce an electric field when the
materials deform as a
result of an imposed mechanical force [1]. Such a mechanically
excited element canbe modeled as a sinusoidal current source with a
capacitive source impedance [2] wherethe amplitude of the current
depends on the amount of force applied. Therefore, if
this structure is placed near a constantly vibrating source,
such as office walls near a
construction site, it can harvest the vibration energy and
generate electric power.
Magnetic energy harvesting, on the other hand, seeks to convert
vibrational kinetic
energy into an induced voltage across coils of wire, which then
can deliver power to an
15
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appropriate load. This is typically done by attaching either a
permanent magnet, such
as that made from Neodymium Iron Boron, or a coil of wire onto a
cantilever beam
that is vibrationally actuated [3]; the other one remains fixed.
In either scenario,the coil will cut through magnetic flux as the
cantilever beam vibrates, creating an
induced voltage in accordance to Faraday's law. Vibration energy
can also be coupled
into the system through the use of a variable inductor, although
no studies have been
done on this to date due to inherent advantages of using
permanent magnets. While
this method of energy harvesting possess very high conversion
efficiency, magnets,
bulky in nature, make these type of systems difficult to
integrate with the load it is
driving.
Finally, electric energy harvesting couples vibration energy
into the system by
having it perform work on charges via the electric field between
parallel plate capac-
itors. In a typical scenario, charges are injected onto
capacitor plates when they areclosest together, meaning that the
capacitance is at its maximum. Because charges
of opposite polarity reside on the separate plates, the plates
tend to collapse when no
external force is applied. Therefore, as vibration energy
separates the two plates, it
performs positive work on the charges, which are then drained
from the plates when
the capacitor voltage is highest and harvested using power
electronics. Besides the
variable capacitor, one can also employ a layer of embedded
charge, or electret, in the
dielectric to carry out electric energy harvesting [4]. Such a
distribution of permanentcharges induces a voltage on the capacitor
plates, polarizing them. As external vi-
bration moves the capacitor plates and alters the capacitance,
charge transport along
the plates delivers power to the load. Most state of the art
electret systems currently
have power densities inferior to those found in variable
capacitor systems, so the vari-
able capacitor is preferred until further advances are made in
the use of embedded
charges.
16
-
1.2 Reasons to Research
Although the method of harvesting energy varies vastly, the
ultimate goal of all vi-
bration energy harvesters is to deliver the converted electrical
energy to an attached
load that requires power. One might question the necessity of
expunging proven
techniques of expending electrochemical energy stored on
batteries in favor of energy
harvesting circuits, some of which cannot perform nearly as
efficiently compared to
batteries. In reality, while batteries can painlessly power
common household items
including alarm clocks, radios, and wireless keyboards, many
scenarios require ex-
tended lifetime a typical battery cannot provide. Batteries are
also limited to certain
temperature ranges; beyond those ranges, they begin to
malfunction.
Consider the difficulty of powering an RF sensor network that
must operate in
harsh environments for prolonged periods of time, perhaps a
couple years. In military
applications, motion sensors used for tracking enemy movement
might be dropped
into enemy territories from low-flying planes. Or, seismological
sensors could be
deployed in uninhabited areas accessible only by helicopters. As
a final example,
wildlife researchers tracking the behavior of rare bird species
might need RFID chips
placed on birds; trying to replace the batteries on these radio
frequency tags after
releasing the birds back into nature is difficult and time
consuming. Even when the
research can be completed within the battery lifetime, poisonous
mercury pollution
from battery corrosion can occur if they are not ultimately
recovered.
In all these cases, the sensors must be autonomous as far as
energy supply goes,
since physical access to the units is costly, if not impossible.
Even if battery replace-
ment were possible, trying to switch out batteries from
thousands of sensor units
simultaneously require a tremendous amount of manpower, which
can be just as, ifnot more, infeasible. With an energy harvesting
circuit powering these sensor units,
the above problems can be solved.
Applications of energy harvesting are not limited to sensor
networks. In the
17
-
army, for example, standard issue equipment such as night vision
goggles and radio
transmitters require power supplies. However, carrying excess
batteries increases the
load on the soldiers, so it is preferable that the electronics
be powered off available
ambient energy sources. This might include recoil energy from a
rifle or parasitic
compression energy from the sole of a soldier's boot striking
the ground [5].
Of course, in order to successfully maintain power delivery to
its load, an energy
harvesting circuit needs to fulfill two requirements: efficiency
and the ability to store
converted energy. Vibrations in nature, although common, usually
do not occur at
very high frequencies. Typical frequencies might range from a
few hertz to a couple
kilohertz. High conversion efficiency insures that as much
energy as possible can
be extracted from these slow vibrations. Furthermore, because
there are often dead
times between the occurrence of vibrations, the system must be
capable of storing
unused energy efficiently in anticipation of later times when
power demand exceeds
the amount harvested.
These two requirements are difficult to meet using traditional
energy harvesting
techniques. As a baseline of comparison, solar panels are often
only 10-20 % efficient,
whereas the goal of energy harvesting circuits lie around 70-80
% efficiency. Sending
the harvested energy into a capacitive or electrochemical source
usually requires the
use of DC/DC converters, a circuit topology falling in the
regime of power electronis.
Being able to maintain high efficiency in this energy flyback
portion of the system as
the amplitude and frequency of harvested energy change requires
careful design.
1.3 Previous Works
A careful literature survey of recent developments in the field
of energy harvesting is
appropriate for placing the current thesis in context. However,
due to the wide range
of techniques used for energy harvesting, some as unusual as
exploiting chemical
and thermal gradients, this thesis will limit the survey to
vibrational kinetic energy
18
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harvesting only.
Numerous research groups have focused on piezoelectric energy
harvesting due to
its potential of achieving the highest converted power per unit
volume [6]. Kymissiset al employed unimorph strip made from
piezoceramic composite material and a
stave made from a multilayer laminate of PVDF foil inside sport
sneakers to harvest
the parasitic kinetic energy generated during walking [5]. An
input signal of 1 Hz,similar in frequency to a person walking
briskly, produced 20 mW peak power for the
PVDF and 80 mW for the unimorph; this translates to roughly 1-2
mJ per step.
In order to maximize the amount of energy harvested from
piezoelectric materials,
Ottman et al developed a DSP-controlled, adaptive DC-DC
converter that accurately
determined the duty ratio of the active devices as a function
the instantaneous me-
chanical excitation amplitude [7]. They showed that as the
mechanical excitationincreases past a certain point, the optimal
duty ratio becomes essentially a constant.
A prototype circuit demonstrates a 325 % increase in harvested
power using this
technique.
As part of Berkeley Wireless Research Center's (BWRC) goal of
making an au-tonomous 1.9 GHz chip-on-board RF transmit beacon,
Roundy et al explored the
use of a two layer piezoelectric bender mounted as a cantilever
beam that harvested
vibration energy [8]. They showed that with a driving vibration
of 2.25 m/s 2 at60 Hz, a maximum of 375pW can be transferred into a
purely resistive load. On the
other hand, if a capacitive load is attached to store the
harvested energy for later
use, the maximum delivered power drops to 180pW. In this paper,
the authors also
implement a shutdown control as part of the power circuitry that
prevents the load
from consuming energy stored on the capacitor when the capacitor
voltage falls below
a certain threshold.
In the area of magnetic energy harvesting, Williams and Yates
derived an equa-
tion relating the amount of generated power as a function of the
damping factor
for a generator that consists of a permanent magnet attached to
a micromachined
19
-
spring-mass system [9]. Barring physical limitations of the
system, the magnet trav-els a longer distance near resonance due to
peaking in the system's transfer function;
this directly translates to increased harvested energy. They
note, however, that low
damping factor made the system more frequency selective, so if
the ambient vibration
covers a larger frequency spectrum, the resistive load attached
to the inductor coil
can be changed to make the harvesting broadband.
Glynne-Jones et al made two actual prototypes of electromagnetic
generators used
for powering intelligent sensor systems [3]. In these
prototypes, coils were hand woundonto a cantilever beam attached to
a shaker table and immersed in magnetic fields
generated from permanent magnets. When mounted on the engine
block of a car, the
second prototype device produced an average power of 157 pW and
a peak power of
3.9 mW.
Research in capacitive electric energy harvesting focuses on two
general areas:
the variable capacitor itself and the power electronic circuitry
that processes the
converted energy. Miao et al fabricated and conducted tests on a
micro electro-
mechanical system (MEMS) capacitor that can vary its capacitance
from 1 pF to100 pF [10]. In a single charge-constrained cycle
(refer to Chapter 2), this variablecapacitor is capable of
producing 24 pW of power using a 10 Hz vibration. However,they do
not show results from actual supporting power electronics
circuitry, so the
overall energy harvesting ability of the system is unknown.
Mur-Miranda conducted extensive research, using both a variable
capacitor macro
model machined from blocks of aluminum and a MEMS capacitive
comb drive trans-
ducer, on an electric energy harvesting circuit topology that
exploited the charge-
constrained cycle [11]. Using a bread-board prototype that
implemented both thepower electronics and the gate driver control
circuitry for the active devices, he
demonstrated energy conversion from the vibrational source and
showed that output
waveforms matched theoretical calculations. Due to the
inefficiencies of the power
electronics circuit used, however, the converted energy could
not be translated back
20
-
as a gain in voltage at a storage capacitor.
Recently, Miyazaki et al reported a prototype
vibration-to-electric variable capac-
itor energy converter that exhibited a measured power generation
of 120 nW [12]. The
power electronics used in this experiment resembled that used by
Mur-Miranda; two
complementary MOSFET switches regulate the flow of current
through an inductor
to charge and discharge the variable capacitor during specific
portions of a mechanical
cycle. The measured conversion efficiency of this prototype
comes out to 21 %. As
Section 3.8 will show, however, the clock signal driving the
MOSFET switches can
inadvertently inject energy into the system, and because
measurements relating tosuch injection are not available within
this paper, it is unknown what fraction of the"harvested" energy
actually came from the vibration source.
From the above literature search, one sees that most fully
functional state of
the art energy harvesting systems fall into the piezoelectric
and magnetic regimes.
The only working prototype for a capacitive electric energy
scavenging system comes
from Miyazaki et al as described in the preceding paragraph, but
because possible
clock injection issues did not receive attention there, a more
thorough investigationis warranted. This reason, added to the fact
that piezoelectric film can harm the
environment and magnetic systems are relatively bulky, paves way
for further research
into the capacitive electric energy harvesting scheme.
1.4 Chapter Summary
This chapter served both as an introduction to the world of
energy harvesting as well
as motivation for the rest of this thesis. As noted, numerous
techniques exist for har-
vesting energy from the environment that otherwise would have
been lost. Potential
energy sources include solar power, thermal and chemical
gradients, acoustic noise,
and vibration. Vibrational energy harvesting can be furthered
divided into piezoelec-
tric, magnetic, and electric, depending on how vibration energy
is coupled into the
21
-
system. All are active areas of research, but this thesis will
focus on the variable
capacitor electric conversion process. Emphasis will be placed
on the electronics and
circuit topologies as opposed to the implementation of the
variable capacitor using
MEMS.
Chapter 2 provides the reader with a review of capacitive
electric energy harvest-
ing, sufficient to understand the theoretical, simulation, and
experimental results that
follow. Related laboratory measurement techniques will also be
discussed. Chapter 3
outlines critical HSPICE simulation results that lead directly
to a final design of
the energy harvesting circuit topology, one of the main goals of
this thesis. Then,
in Chapter 4, experimental data based on a fabricated circuit
board is presented
and compared with computer simulations. Chapter 5 summarizes the
thesis and its
conclusions, and presents possible directions for future work in
this area of research.
If the reader has access to HSPICE and wishes to modify certain
design parameters
and observe the effect they have on conversion efficiency, refer
to Appendix (A) forthe complete set of HSPICE decks. The model
files of all the active components,which were downloaded off the
Internet, are also included.
22
-
Chapter 2
Foundations of Energy Harvesting
As explained in Chapter 1, there exists a broad array of
techniques for energy harvest-
ing, of which piezoelectric, electric, and magnetic are perhaps
the most prominent.
Based on the specific harvesting strategy used, electric and
magnetic energy scaveng-
ing can be further divided into two subcategories each.
Capacitive electric energy
harvesting, the main focus of this thesis, usually relies on
either charge-constrained
or voltage-constrained cycles, both of which will be fully
explained below. Although
methodologies that fall between these two are also theoretically
possible, power elec-
tronics, switch-like in nature, rarely permit them.
In this chapter, the fundamentals behind electric energy
harvesting will be ex-
plored. Mathematics relating contours in the Q-V plane to the
amount of harvestedenergy per cycle are covered first, followed by
a direct application of the formulated
concepts to a charge-constrained circuit topology presented in
[11]. An alternativetopology based on self-synchronous diodes,
which forms the centerpiece of this the-
sis, is shown next, along with detailed equations that model the
charge flow on the
variable capacitor and explain the impact of parasitic diode
capacitances. Once the
charge pump portion of the capacitive energy harvester has been
developed, an en-
ergy flyback mechanism will be added and analyzed, and the pros
and cons for various
flyback techniques will be discussed. The chapter concludes with
important labora-
23
-
tory concepts relevant to the characterization of energy
harvesting circuits, including
methods of measuring the AC capacitance of a variable
capacitor.
By the end of the chapter, an idealized capacitive energy
harvesting circuit with
inductive flyback will have been developed, although decisions
on the specific com-
ponent values will be left for Chapter 3. The chosen topology
forms the basis upon
which the simulations carried out in the next chapter will be
based; further improve-
ments to the circuit will curb the problem of clock energy
injection, but the maintopology will not change.
2.1 The Q-V plane
Consider a single capacitor with capacitance C and voltage Vc.
At any given time,the energy stored on the capacitor can be
expressed as
T? 12 1WC = Coc = -QVC (2.1)2 2
where Q = Cvc from fundamental physics. In a physical system, Q,
vc, and C canvary as a function of time. For argument purpose,
assume that the distance between
the capacitor plates is variable, implying that C can change. If
we plot Q and vcvalues parametrically over time in a Q-V plane as C
goes from a maximum value toa minimum value and back up, a graph
similar to Fig. 2-1 will result. Note that the
two contours shown in this figure represent typical cases;
numerous circuit topologies
produce contours dissimilar to both.
Notice that the slope of lines A and C in both diagram
represents the capacitance
value in that duration of the cycle. In drawing these figures,
an implicit assumption
is made that the capacitor charging (path A) and discharging
(path C) occur muchfaster than the rate at which the capacitance
changes. Were this not true, path A
and C would not be straight lines. Finally, note that a "short"
path does not imply
24
-
Enclosed arearepresenting net
converted energyin one cycle.
CMAx B
AC CMIN
V
(a) Charge-constrained
Figure 2-1: Two typical
0
Enclosed arearepresenting net
converted energyin one cycle.
B
CMAX I
AC CMIN
V
(b) Voltage-constrained
electric energy conversion cycles.
that the time duration associated with that path is short; in
fact, path B in both
cases takes the longest time to traverse.
The distinction between the two cycle, one charge-constrained
and one voltage-
constrained, depends on which variable, Q or V, is held fixed
during the time when thecapacitance value drops from maximum to
minimum. For circuits where the variable
capacitor is disconnected when the circuit traverses path B,
Fig. 2-1(a) shows thatthe charge on the capacitor plates remains
fixed as the capacitance decreases. On the
other hand, for circuits that connect the capacitor to a voltage
source during path B,
Fig. 2-1(b) illustrates the capacitor voltage remains fixed as
the capacitance drops.
Now, consider the area enclosed by path A-B-C in each case. For
the charge-
constrained cycle,
(2.2)WCHARGE ~~ QOAVC2where Qo represents the amount of
constrained charge on the capacitor plates whenthe plates move
apart. For the voltage constrained cycle,
1WVOLTAGE -AQVC,O2 (2-3)
25
a
AL
-
CVAR 2
L ControlElectronics
CRES ~ ~1
TFigure 2-2: Charge-constrained energy harvesting circuit using
two MOSFETs.
where Vc,o represents the constrained voltage when the plates
move apart. Comparing
Eq. (2.2) and Eq. (2.3) with Eq. (2.1), it is seen that the
enclosed area exactlyrepresents the net energy gained by the
capacitor in one cycle [13]. Therefore, theprimary goal of a well
designed energy harvesting circuit is to increase the amount
of area surrounded by path A-B-C while retaining high conversion
efficiency and the
ability to operate asynchronously.
2.2 A Synchronous Charge-Constrained Circuit
Fig. 2-2 shows an example of a circuit topology that employs the
charge-constrained
energy harvesting technique described earlier [11]. Assume that
the current throughthe inductor starts at 0 A and that CVAR,
initially at its maximum value CMAX, isuncharged. At the beginning
of a cycle, M turns on, resulting in iL, the current in
the inductor, ramping up according to VL = LdL. When iL reaches
a desired value,M 1 is turned off by the control circuitry and M 2
is simultaneously turned on. Because
of the continuity of iL, CVAR begins to charge up all the while
staying at a capacitance
value of CMAx; the mechanical cycle is assumed to be much longer
than the electrical
charging and discharging.
Once iL reaches 0 A, the control circuitry turns M 2 off,
resulting in CVAR being
isolated from the rest of the circuit. Therefore, as vibrational
force causes CVAR to
26
-
move apart and reach CVAR = CMIN, an energy harvesting cycle is
carried out. The
harvested energy can be transferred back to CRES through a
reverse cycle of inductor
charging and discharging.
There are several disadvantages to this topology, however.
Perhaps the most im-
portant are the need for accurate transistor turn-on and
turn-off, power consumption
in the control electronics, and excessive conduction loss.
Preliminary simulations in
HSPICE not presented in this work indicate a necessity to hit
the turn-on and turn-
off points precisely in order to convert energy efficiently. For
example, during the
charging phase of CVAR, M 2 must turn off as soon as iL reaches
0 A, or else it is
possible for resonance between the capacitors and inductor to
ring VAR down again.
However, if M 2 turns off too early, parts of the charge
extracted from CRES to ramp
up iL will be wasted. There are similar considerations for the
second half of the cycle
in which the harvested energy is transferred back to CREs. Such
precisions in the gate
drive signals are difficult to achieve due to the delay between
the detection of zero
crossing points in iL and the toggling of the MOSFET switches,
which can result in
limited conversion efficiency.
Power consumed in driving the MOSFET switches of this topology
can be quite
large, due to the complexity of accurately controlling two
active devices. In an au-
tonomous sensor IC, this power consumption would directly lower
the amount of
stored energy available to drive the energy harvester load. A
circuit topology that
requires only one active device is preferred since its gate
drive electronics can be
implemented with much less complexity, resulting in decreased
power usage.
Finally, there is a severe disadvantage when conduction loss is
considered. In
the two transistor topology, current flows through M 1 , M 2 , M
2 , and M 1 respectively,
amounting to 4 transistor conduction losses every scavenging
cycle. Given that such
conduction losses are comparable in magnitude to the amount of
energy harvested,
this charge-constrained circuit topology is not desirable.
To overcome these flaws, an asynchronous capacitive electric
energy harvesting
27
-
Flyback Circuitry
Load Reservoir Charge Pump -T--ora
Figure 2-3: Block diagram of capacitive energy harvester.
circuit based on diodes, the topology this thesis examines
in-depth, will be presented
next. Using uncontrolled devices such as diodes ameliorate
stringent clocking require-
ments because they turn on and off synchronously with the
movement of the variable
capacitor without the need for current sensors. Therefore,
cycle-to-cycle variation will,
in a sense, be automatically tracked. Furthermore, the removal
of sensing electronics
decreases the complexity of the overall circuit, resulting in
lower power consumption
and hence increased efficiency.
2.3 The Asynchronous Topology: An Overview
Fig. 2-3 illustrates the building blocks of an asynchronous
energy harvesting cir-
cuit. The heart of this circuit lies in the charge pump, formed
from two diodes and
a variable capacitor, that converts vibration energy into
electric energy by moving
charges from reservoir onto the variable capacitor and pushing
energized charges into
a temporary energy storage. Both the reservoir and temporary
storage consists of a
single capacitor. The flyback mechanism insures that the voltage
at the reservoir is
maintained while the load draws power from the reservoir.
First, the charge pump block, connected to the reservoir and
temporary storage
capacitors, is examined alone. Consider the circuit shown in
Fig. 2-4, which includes
3 capacitors and 2 diodes. In Chapter 3, the precise operation
of this circuit will be
explored. For now, an intuitive understanding is developed.
Assume that the capaci-
tor starts at its maximum possible value and that all three
capacitors are charged to
28
-
CRES VRES CVAR VVAR CS VS
Figure 2-4: Charge-pump portion of energy harvesting
circuit.
voltage vo. Because all the node voltages are equal, diodes D1
and D2 are both off.
Now, through an external means such as vibrational motion, the
capacitor plates are
moved apart, causing CVAR to drop. Because the charge on the
middle capacitor is
constrained by two diodes that are off, a drop in capacitance
implies that VAR must
rise to keep Q = CV satisfied; this corresponds to path B in
Fig. 2-1. This rise involtage turns on D 2 , resulting in CVAR
partially discharging. Unlike path C, CVAR
does not completely discharge into Cs but stops when VAR VS-. At
this point, D 2turns off.
Now, as the capacitor plates move back towards each other, again
due to an
external force, the cycle is also charge-constrained because
both D1 and D 2 are off. As
CVAR increases, VAR drops, forcing D1 to turn on and resulting
in a partial charging
of the variable capacitor. This corresponds roughly to path A.
The charging of the
capacitor causes VAR to rise, eventually turning off D1 and
returning the circuit to
its starting point. Thus, this circuit acts as a charge pump
from CRES to Cs, adding
net stored energy to the capacitor over time.
2.4 Limitations Without Flyback
As more and more energy conversion cycles are carried out, Cs in
Fig. 2-4 begins to
accumulate large amounts of charge. Eventually, vs rises so high
that the variation
in CVAR is unable to pump more charge to Cs; equivalently,
charge can no longer
flow from CRES onto CVAR. The maximum vs given a certain
variation in CVAR will
29
-
D1 D2 D1 D2
VRES CMAX VRES S VSn.1 VRES CMIN Cs T vs
(a) First half of cycle (b) Second half of cycle
Figure 2-5: Equivalent circuit diagram of one idealized energy
harvesting cycle.
now be explored using a cycle-to-cycle iteration process. For
the first pass of the
derivation, ideal diodes are used, meaning that the forward
voltage drop is VD = 0 V,the parasitic diode capacitance is CD = 0
F, and the reverse bias leakage current
coefficient is Is = 0 A.
Assume that the variation limits of CVAR are such that CMIN CVAR
CMAx and
that WAR = VRES (i.e. diode D1 has just equalized the voltage
between the reservoirand the variable capacitor). Define a complete
energy harvesting cycle as the time inwhich CVAR undergoes one
capacitance variation from maximum to minimum back to
maximum; take vs,i, where i is an integer index starting at 0,
to represent the voltage
on Cs when CVAR = CMAX- Finally, since the variation on CRES is
so small, represent
the reservoir capacitor as a constant voltage source.
Fig. 2-5(a) shows the equivalent circuit diagram at the start of
cycle n - 1. Atthis point, the total capacitor charge on CvAR and
Cs is
Qtotai = CMAXVRES + CSvS,n-1 (2.4)
Now consider the variable of interest in the next cycle, namely
vs,n. It is easy to see
that vs does not change once D 2 stops conducting, so analyzing
this portion of the
circuit operation when CVAR drops in value and WVAR increases in
value is sufficient.
The point where CVAR = CMIN is shown in Fig. 2-5(b).
Because DI does not conduct when WAR > VRES,
charge-constrained operation
30
-
dictates that QT = QVAR + Qs is constant, giving
Cs CMAXVS,n = VsV-1 + VRESCM1N + C sfl CMIN + CS
(2.5)
when CVAR CMIN. Furthermore, initial condition gives Vs,O =
VRES.
Define a = --CS and 0 = CM VRES. Eq. (2.5) can then be written
asCMIN+CS CMIN+CsS.
VS,n = avs,n-1 + , (2.6)
which is a recurrence relation in variable vs,j. Such a
recurrence relation can be solvedby determining the homogeneous and
particular solution for the associated recurrence
equation
(2.7)
which is obtained by substituting r' = vs,j into Eq. (2.6). The
homogeneous solutionmust satisfy
r" = ar" 1 (2.8)
and therefore by inspection,
s = Kaoz
From Eq. (2.7), one particular solution that works is
VSs = - , (2
which, when combined when the homogeneous solution and
simplified, results in
VS,n = Vs(h + Vs =P K CS " +CMIN + Cs
Now, using the initial condition vs,O = VRES,
K = VRES i - CMAXCMIN /
CMAXMVRE
CMIN(2.11)
(2.12)
31
2.9)
.10)
r" = ar"n-1 +0) ,
-
and so the cycle-to-cycle variation of the storage node voltage
is
CMIN CMIN + Cs CMINV, VRS[(i _ CMAX) ( CS ) + ICMAX (213To check
that Eq. (2.13) makes sense, substitute the extreme case of n = 0
to
obtain
Vs,O = VRES (2.14)
as expected from the initial condition. To determine the voltage
limit on the storage
capacitor without the flyback block illustrated in Fig. 2-3,
plug in n = OC to obtain
Us, = URAX - (2.15)CMIN
Eq. (2.15) interestingly indicates that the maximum storage on
CS depends on theratio of CMAX to CMIN. Because the efficiency of
the energy harvester will inevitably
hinge upon the maximum temporary energy storage capacity, it is
reasonable to
explore Eq. (2.15) in more detail. Writing out the terms, the
equation becomes
CDC + CAC,- CDC VRES (2.16)
C C AC
where CAC indicates the positive zero-to-peak magnitude of the
capacitance variation.
From Eq. (2.16), it is apparent that given a fixed CAC, a
smaller CDC will allow vsto reach a higher ultimate value. Hence,
minimizing parallel parasitic capacitances
becomes a design goal for this particular circuit topology.
Having worked out the circuit behavior using ideal diodes, now
consider the sit-
uation when the diode's junction capacitance Cj is included. The
modified circuitdiagram is shown in Fig. 2-6. In order to
understand the behavior of this non-ideal
circuit, one cycle needs to be divided up into five stages: D 2
closed, D1 and D2opened, Di closed, D1 and D 2 opened, and D2
closed again. For the equivalent cir-
cuit diagram of each stage, refer to Fig. 2-7. Note that the
ordering of the stages is
32
-
cdl
- vJ,+1CJ2
+ V 2 -D2
~1
CRES VRES CVAR WARTCS- VSI *
Figure 2-6: Charge-constraining portion of non-ideal energy
harvesting circuit.
slightly different compared to the ideal case analysis. Here,
the cycle begins with D2on instead of D, on. In Stage 1, the amount
of charge stored on Cs is
Qs,n-1 = CsVs,n-1 . (2.17)
Now, as the capacitance begins to increase from CMIN, assume,
without loss of
generality, that D 2 turns off first before Di turns on; this
brings the circuit into
Stage 2. From Stage 1 to Stage 2, the amount of charge at node X
is conserved.
Paying attention to the polarity of charge on C32 and Cs
carefully, one can write that
Qs - QJ2 = CsVs,n-i . (2.18)
As the capacitor plate moves apart and CVAR - CMAX, D1 turns on
and the circuit
enters Stage 3. At this moment, VAR V VRES, so by Kirchhoff's
Voltage Law,
VS + VJ2Qs QJ2CS CJ2
VRES
= VRES -
(2.19)(2.20)
Multiplying Eq. (2.18) through by Cs,
QsCs - QJ2Cs = CsVs,n- 1 ,
33
(2.21)
-
+ + - V1 + + V2 -
VRES CMIN VSn.1 cs VS n-1 VRES s
(a) Stage 1 (b) Stage 2
+ VJ2 +VRES CMAX Cs T VS
(c) Stage 3
CJ1
C 1 CJ2
- Vi+ + VJ2-
VRES T CsT
(d) Stage 4
0- Vi + + +
VRES - CMIN VS,, S VS,n
(e) Stage 5
Figure 2-7: Equivalent circuit diagram of one non-ideal energy
harvesting cycle.
which, when substituted into Eq. (2.20), gives
Q sC 2 + QsCs - CsVs,n-i = VRESCSCJ2 - (2.22)
Hence, Qs, the amount of charge on the storage capacitor during
Stage 3, is
QS = VRESCSCJ2 + CSVS,n-1 (2.23)CS + CJ2
At the same time, the amount of charge on CVAR is
QVAR = CMAXVRES- (2.24)
Now, again without loss of generality, assume that D1 opens
before D 2 turns on,
resulting in charge conservation for both node X and Y in Fig.
2-7(d). This is Stage 4
34
+
Vs
+
Vs
CA1 Ci1
-
of the circuit operation. Defining QJ2 as the amount of charge
on CJ2, the total chargeon all capacitors sums to
QTOT = (Qs - Q2) + (QVAR + Q2) = Qs + QVAR , (2.25)
where Qs and QVAR are defined in Eq. (2.23) and Eq. (2.24).
Finally, D 2 turns on as CVAR drops to its minimum value once
more. The charge at
node Z is equivalent to the sum of the charges at node X and Y
in Stage 4. Therefore,
by distributing QTOT across the 3 capacitors and solving for
vs,,, one obtains that
(Cs + CJ2) (Cn1 + CMIN + CS)CJ1 + CMAX + C S
,n-1 + V+I+CS VRESCJ1 + CMIN + CS
(CS + CJ2) (CR + CMIN + CS)
CJ + CMAX + C2sC3 =CS VRESCn1 + CMIN + CS
(2.27)
(2.28)
Eq. (2.26) can be rewritten as
Vs,n = avs,n-1 + , (2.29)
which is similar to Eq. (2.6) except for the definition of a and
3. The technique forsolving recurrence relation used earlier in the
ideal energy harvesting cycle can be
directly applied here. In the end,
(Cn1 +CMIN + CS))(CS + C2) (C 1 + CMAX + C"2C
(Cn1 + CJ2)Cs + (C2 + Cs) CMIN + C0 3 C3 2
(2.30)
(2.31)
35
vsn =
Defining
and
(2.26)
(h)vs,n
(p)vs'n
K((CS + CJ2)
-
Using the initial condition and defining
(Cs + CJ2) (C + CMAX + CS7 = J2C (2.32)(Cn + CJ2)CS + (CJ2 + Cs)
CMIN + C 1C 2 (
the full cycle-to-cycle variation in the storage capacitor
voltage is
Vs,n = [(1 - 7) a" + -Y] VRES - (2.33)
Again, check the derived equation with an extreme case of n= 0.
Here, Vs,O =
VRES, which is consistent with the initial condition. Since a
< 1, substitute n = oo
to yield
VS,o = 7VRES - (2-34)
Grouping terms on the numerator and denominator of Eq. (2.34)
makes it apparentthat the voltage limit on the storage capacitor is
significantly smaller compared to
the ideal case. Hence, energy harvesting efficiency goes down
with increasing Cjl andCJ2, which indicates that diodes with small
parasitics are preferred. As Cjl and CJ2approaches 0, vs,,
approaches -CA2VRES; this makes sense because diodes without
parasitic junction capacitance are ideal diodes.
2.5 Energy Flyback Technique
So far, the charge pump has been analyzed as a standalone block.
However, as seen
from the previous section, the energy harvesting cycle becomes
less efficient as charge
builds up on the storage capacitor Cs. Furthermore, referring
back to Fig. 2-3, the
load is attached to CRES instead of Cs. In this thesis, the load
comprises of a 10 MQscope probe measuring VRES in series with
another 10 MQ resistor. Therefore, flyingthe converted energy back
into a reservoir capacitor that satisfies CRES > CS mustoccur as
part of the circuit operation.
36
-
LFB
CLK
D1 D2L
Load CRES - VRES CVAR WAR CS -- VS I DFB
Figure 2-8: Idealized inductive energy flyback circuit
diagram.
Broadly speaking, there are two main methods of energy flyback:
inductive and ca-
pacitive. Inductive flyback, shown in Fig. 2-8 without parasitic
components, operates
by first ramping up the current in LFB using a voltage
difference across the inductor.
Then, at a later time, the inductive path is disconnected by
means of a transistor
switch, forcing current to "freewheel" through DFB in the second
half of the flyback
cycle. Topologically, the inductive flyback portion of Fig. 2-8
looks remarkably sim-
ilar to a DC/DC buck converter. The main difference stems from
the fact that in
a buck converter, the main objective is to maintain a constant
output voltage VOUTwhile the circuit here deliberately tries to
pull VRES up as efficiently as possible.
Theoretically, the efficiency of such a flyback system can reach
100 %, but due to
parasitic core and wire loss in the inductor as well as
conduction and switching loss in
the MOSFET and diodes, part of the energy is lost. For now,
ignore the non-idealities
of the inductor and focus on the conduction loss. Chapter 3 will
provide justificationas to why inductor parasitics prove to be
non-critical. Assume that the CLK signal is
high enough to force the MOSFET into the triode region. In this
case, the conduction
loss is resistive:
(PFET,COND) = KFETVFET) i 0RMSRDS,ON (2.35)
where RDS,ON is the equivalent on-resistance of the MOSFET in
triode region. On
the other hand, because a diode exhibits constant forward bias
voltage drop across
37
-
CLK
D , D2L
Load CRES VRES CVAR WAR CS VS
Figure 2-9: Idealized capacitive energy flyback circuit
diagram.
its terminals, the conduction loss can be represented as:
(PD,COND) = (iDVD) (iD) VD . (2-36)
In summary, the root-mean-square current is important for a
transistor while the av-
erage current is important for a diode. The total energy lost
per cycle of an inductive
flyback circuit is therefore
WLossD 1 23 DWRMSDS,ON 7 + (iD) VD (2-fFB fFB
with fFB representing the frequency at which the flyback portion
of the energy har-
vesting circuit operates and D representing the duty ratio of
the MOSFET.
For a capacitive flyback strategy, such as that shown in Fig.
2-9, the storage and
reservoir capacitor are simply shorted together through a
transistor at regular times
during the circuit operation. Energy flyback occurs by way of
voltage equalization
between Cs and CRES; given that both D1 and D 2 are off during
the time of flyback,charge conservation along with the fact that vs
> VRES results in VRES increasing after
the equalization. Mathematically, the total charge initially
is
QTOT,O = Csvs + CRESVRES (2.38)
38
-
and the total initial energy is
~CSVS + 2RE (2.39)WTOT,O = Css + CRESVRES- -9
When the circuit reaches steady state operation after the MOSFET
has been turned
on, the voltage on the capacitors equalizes to a final value VF.
However, charge is
conserved, leading to
QTOT,F = (CS + CRES) VF = QTOT,O (2.40)1
WTOT,F = -(Cs + CRES)V (2.41)2F
with VF determined from Eq. (2.38) and Eq. (2.40) to be
VF =SS + CRESVRESCs + CRES
Therefore, the amount of energy lost per capacitive flyback
cycle is
1 (OsORES 2WLOSS = WTOT,O - WTOT,F ~ CS RES) (VS - VRES) ,
(2.43)
= 2 CS+ CREs
which increases in magnitude as the voltage difference between
the reservoir and
storage node increases. Note that in contrast with the inductive
flyback loss, the
capacitive strategy energy loss is independent of the fFB.
Despite this independence,
inductive flyback is still superior to capacitive flyback given
typical component values.
2.6 Bucket Brigade Capacitive Flyback
The reader might wonder whether using multiple capacitors in the
flyback path will
increase the efficiency of energy flyback. An example of such a
flyback circuit is shown
in Fig. 2-10. In this diagram, WIN, the energy being fed into
the system, comes from
the vibrational source and WOUT, the energy being taken out,
goes into the reservoir.
39
-
WIN S1 2 S23 Sn-2,n-I Sn-1 n WOUT
Vibration C V, C2 V2 . . .. Cn-2 Vn-2 C V-1 V Vn.1 VRES
Figure 2-10: A possible bucket brigade energy flyback
circuit.
Imagine C1 as the storage capacitor Cs and the voltage source
VRES as the reservoir
capacitor CRES-
In order to calculate the energy flyback efficiency of this
setup, the periodic steady
state (PSS) condition must first be determined. PSS denotes the
situation in whichall the circuit state variables (i.e. voltages
and currents) return to the same valueafter every cycle of circuit
operation. In this case, a complete cycle involves the
variable capacitor's capacitance going from maximum to minimum
back to maximum,
or equivalently, a single WIN injection.
The exact calculations involved in deriving the PSS condition of
an n-capacitor
bucket brigade is extremely involved and offers no additional
insight into the circuit
operation. Therefore, a more intuitive approach is offered.
First assume all capacitors
are equivalent, meaning that C1 = C2 = ... = Cn-2 = Cn-1 = C.
Consider any
capacitor C, 1 < i < n - 1, that is sandwiched between two
other neighboring
capacitors. When the switch on its left, Si_,, closes, vi
equalizes with vi_ 1 and reaches
some intermediate voltage between the two original values. Then,
when the switch
on the right, Si,i+1 , closes, vi equalizes with vi+1 and
reaches a different intermediate
voltage. But these two operations are exactly equivalent to
averaging the center
voltage with its two neighboring voltage, so one would expect
that after many cycles,
the progression of v 1, v2 ,... , Vn- 2 , - becomes linear and
evenly spaced.
In fact, that is exactly what happens for a bucket brigade of
capacitors in PSS.
40
-
The PSS voltage on each capacitor can be expressed as
i = V -- (i 1 ) n - 2R E (2.44)
Having determined the PSS condition, the energy flyback
efficiency analysis can pro-
ceed. The steps in determining r wherer = T is as
follows:WIN
1. Begin with PSS capacitor voltages on the k-th energy flyback
cycle of V1(k),
V2(k),- - - , n--2(k), and Vn-1(k)-
2. Inject WIN into the system at C1.
3. One at a time, turn switches S1,2 , S 2 ,3 ,- - -, Sn-2,n-1,
and Sn_1, on then off.
Denote this as the switch rippling stage.
4. Determine V1(k+1), V2(k+),- .. , Vn-2(k+1), and Vn-l(k+1) and
require that Vi(k+1) -Vi(k) for all i such that 1 < i < n -
1.
During Step 1, the amount of energy stored on C1 is
W,= 1C 2 =24C; (2.45)
all the capacitance values are simply C since they are assumed
to be equal, as men-
tioned earlier. After Step 2, the total energy stored on C1
becomes
Q 2W1'0z 2'0, (2.46)Q I20
which, when multiplied through with 2C and simplified, gives
Q1,F = Q ,o + 2CWIN-
Finally, this allows the change in Q, to be calculated:
AQ1 = QI,F - Qi, O Qjo + 2CWIN - Qi0
(2.47)
(2.48)
41
-
Because all capacitor voltages must return to their original
values Vi(k) after Step 3and 4, the entire AQ 1 must ripple all the
way through and exit into the voltage sourceVRES. Therefore, WOUT
can be determined as
WOUT = AQ1VRES = ( ,o + 2CWIN - Q1,o) VRES - (2.49)The only
thing necessary before characterizing 77, the efficiency of a
bucket brigade
energy flyback circuit, is the value for Qi,o. This charge can
be obtained by examiningthe voltage equalization between C1 and C2
more closely. From Eq. (2.44),
V2,PSS - V1,0 - VES (2.50)n - 2
where vi,pss means the PSS voltage on Ci. Denote the voltage on
C1 before Step 2
as vi,0 and the voltage after Step 2 as V1,F. This gives
2-CV1, F = - CVi,0 + WIN (2.51)2 2WIN
V1,F = -, + 2W1N (2.52)
After Step 3 when the switch is closed, the final voltage is the
average of V1,F and V2 ,PSSsince the capacitors are equal in value.
But this final voltage will be the ultimate
voltage on C1 during this cycle since the switch opens after
equalization occurs. In
order to satisfy PSS,
1 1/ Vi0 -VRE5\1V1,F - 1 vl,O - '2 - = v 1,0 . (2.53)
Substituting Eq. (2.52) into Eq. (2.53) and simplifying,
-
2 (n - 1) vRES - 4 (n - 1)2ES -4 (-2n+3) (2.54)-4n + 6
where a = ' (n - 2)2 WIN - VRES. Note that the negative solution
for the quadraticequation was selected since vi,o > 0. The
required expression for Q1,o is simply
42
-
0.8 -
0.6 -
eta(n)0.4 -
0.2 -
0.185 0 1 1 10 20 40 60 80 1004 n 100
Figure 2-11: Flyback efficiency versus number of bucket brigade
capacitors.
Qi,o = Cvi,o. Finally, referring back to Eq. (2.49), q is
WOUT _ Q, + 2CWIN - Q1,o) VRESWIN WIN
Substituting in the expression for Qi,o into Eq. (2.55) and
plotting the result inMathCAD, one obtains an efficiency versus n
plot, which is shown in Fig. 2-11. The
efficiency decreases as the number of capacitors increases. Note
that because the
derivation is invalid for n < 3, the section of the curve
with y > 1 can be safely
ignored.
From the above derivation, it is apparent that the use of a
bucket brigade capaci-
tive energy flyback is inferior to the solution of a direct
flyback in which Cs is shorted
to CRES through the MOSFET. Another disadvantage of using such a
flyback scheme
is the large number of switches involved. Because these switches
will be implemented
using discrete transistors, each of them will exhibit conduction
loss due to a finite
RON value. Therefore, the actual efficiency will be much smaller
than that predicted
by the previous calculation.
43
I I I I0.918 1
-
C = 100 pF
R = 100 k
VARCVAR +
+
10V V
VOUT
Figure 2-12: Op-amp based network to extract capacitance
variation magnitudes.
In summary, the best flyback topology out of the three possible
candidates -
inductor, direct shorting switch, and capacitive bucket brigade
- is the inductor. Not
only does it possess the highest theoretical flyback efficiency
relative to the other two
mechanisms, the inductive flyback is also very simple to
implement. The only majordrawback comes from the inherent bulkiness
associated with inductors, but because
the design goals do not include minimizing the overall system
size, the remainder of
this thesis will use the inductive flyback topology.
2.7 Relevant Measuring Techniques
The AC variation of CVAR constitutes an important parameter to
characterize accu-
rately in the energy harvesting circuit. Such a circuit was
proposed in [11] and willbe repeated here for convenience. Consider
the op-amp network shown in Fig. 2-12.
There are two additional power line bypass capacitors not shown
in the schematic;
one is a 0.22 MF film capacitor connected between v+ and ground
while the other is
a 1 nF capacitor connected between v+ and v-.
If w
-
VR R
vssin(wt) C
Figure 2-13: Circuit to accurately determine the DC value of a
capacitor.
which is valid under the assumption that CAC < CDC, it can be
expressed as
VOUT =- -ivARR . (2.56)
Taking CvAR CDC + CAC sin (Lt),
VOUT = (10 V) wRCAC cos (wt) , (2.57)
which implies that
CAC = VOU . (2.58)A (10 V) wRHence, by measuring the output
voltage at specific frequencies, CAC can be determined
as long as w < !. Note that purpose of C is to attenuate high
frequency noise that
can severely mask the output signal.
The DC capacitance of CVAR also is a parameter of interest.
Usually, this value
can be directly determined using a bridge circuit or a
multimeter with capacitance
measuring capability. If an alternative method is desired, the
circuit topology shown
in Fig. 2-13 can also be considered. This is nothing more than
an impedance voltage
divider where1 (2.59)VC -1 + jwRCDcjV
with the hatted variables representing complex amplitudes.
Taking the magnitudes
45
-
of both side,
Y C = vs (2.60)1 + (wRCDC)2
Finally, solving for CDC, one gets
CDC (i)2 (2.61)wR
As will be documented in Chapter 4, the circuits shown in Fig.
2-12 and Fig. 2-13
give CDC = 650 pF and CACMAX = 317.36 pF for the variable
capacitor used in this
thesis.
2.8 Chapter Summary
This chapter mapped out the theoretical foundations behind
energy harvesting cir-
cuits, the most important one being the Q-V plane contours and
their relationshipto scavenged energy. Two typical capacitive
conversion cycles were given - charge-
constrained and voltage-constrained - and the circuit topology
explored in [11] wasgiven as an example employing
charge-constrained cycles. However, due to the topol-
ogy's synchronous nature, excessive power consumption for the
gate drive, and high
conduction loss, it is undesirable as an energy harvester. An
alternative topology
based on an asynchronous diode charge pump connected to an
energy flyback mech-
anism was proposed instead.
In order to sustain the efficiency of energy harvesting and to
power the load
connected at the reservoir, three possible flyback circuits were
analyzed, including the
inductor, direct shorting switch, and the capacitive bucket
brigade. Although bulky,the inductive flyback allowed for maximum
theoretical flyback efficiency, 100 %, and
required few components to implement. Hence, the topology chosen
for this thesis
uses inductive flyback.
46
-
Comparing Eq. (2.15) and Eq. (2.34), it is apparent that
parasitic diode capaci-tances hurt the overall conversion
efficiency by decreasing the maximum voltage level
Cs can reach. This implies that diodes with low junction
capacitance should beused for the charge pump. Furthermore, if the
circuit is implemented on an IC, one
must observe careful circuit layout techniques to avoid creating
excessive parasitic
capacitances.
The remaining chapters of this thesis builds upon the
established foundations and
examine second-order effects that are difficult to characterize
analytically. Chapter 3
examines in greater details the effect of device parasitics
through the use of HSPICE,
a specialized circuit simulation program, and addresses energy
flyback timing opti-
mization. Chapter 4 presents experimental results from a PCB
that was designed
and optimized based on simulation results; the variable
capacitor used will also be
characterized.
47
-
Chapter 3
Circuit Simulation and Design
Although the theoretical foundations of electric energy
harvesting laid out in the pre-
ceding chapter are important, a computer-based simulation
nonetheless is necessary
to pinpoint the most efficient circuit implementation. The
discussion in Chapter 2
lacked specific component values, maximum tolerable parasitic
sizes, and other im-
portant details necessary for the development of a successful
prototype circuit board
(PCB). In this chapter, results from various HSPICE simulations
that comprehen-sively survey the effect of different design choices
will be first presented; they will
then lead to the formation of the actual circuit schematic upon
which the final set of
experimental data presented in Chapter 4 is based.
3.1 Creating the Variable Capacitor
Because HSPICE inherently does not provide an easy way of
simulating mechani-
cal variable capacitors with moving plates, the first task
involves creating a circuit
equivalent that can represent the vibrating plates accurately
enough. Based upon the
discussion in [14], a variable capacitor can be represented by a
subcircuit consisting ofa fixed value capacitor in series with a
dependent source whose voltage depends on the
48
-
iIN
CDC
ZIN - o VIN
AvIN
Figure 3-1: Subcircuit for simulating a variable capacitor.
voltage difference across the terminals of the subcircuit. Such
a circuit configuration
is shown in Fig. 3-1. The two-port impedance of this subcircuit
is
ZIN VIN _31IN SCDC(l+A)
Eq. (3.1) suggests that the subcircuit behaves equivalently to a
capacitor that hascapacitance CDC (1 + A), which means that if A =
sin (wt + #), the two-portmodel is precisely a variable capacitor
with frequency W, DC value CDC, AC amplitude
CAC, and angle 4. Given the desired value for A, the dependent
voltage source AVINmust have the value
CACAvIN = VIN 0 D sin (Wt + ~),(3.2)
which is simply a multiplication of the two-port voltage, a
sinusoidal excitation of
amplitude 1, and a constant CAC/CDC.
Such a dependent voltage source can be specified in HSPICE
through the use of a
polynomial function [15]; refer to Appendix (A) for the actual
code implementing thevariable capacitor subcircuit. Verification of
the variable capacitor implementation
involves attaching the subcircuit to a fixed voltage source Vs
and gauging the amount
of current flowing into the subcircuit. Defining CvAR(t) = CDC +
CAc(t), correctoperation requires
d dZIN -(VAR(S) = S- (AC(t)) -(3-3)
49
-
, eriod (sI Urrent(
0 5I L
)--5.26e-04 '-NI \I ~I ~I II II II I
I I I
II
1I MTime (tin) (TIME)
1.5m
Figure 3-2: Two-port input current of simulated variable
capacitor forCAC = 300 pF, and Vs = 1 V. The vertical axis
represents the inputin amps and the horizontal axis represents time
plotted in seconds.
CDC = 1.22 nF,current plotted
As an example, if CDC = 1.22 nF, CAC = 300 sin (27r x 1900t) pF,
and V = 1 V,the input current should be iIN = 3.58 cos (27r x
1900t) pA. Computer simulation ofthe two-port input current, shown
in Fig. 3-2, confirms that the subcircuit behaves
correctly. Although shown with a sinusoidal variation, the
capacitor model, through
additional parameter fitting, can also accommodate non-linear
mechanical effects.
3.2 Inductor Modeling
A real wire-wound inductor will inevitably have parasitic losses
associated with it.
Because the success of electric energy harvesting hinges upon
high power conversion
efficiency, parasitic resistances associated with wire loss and
core loss must be accu-
rately modeled. Capacitive effects, significant for radio
frequency applications, will
not be considered here since environmental vibration doing work
on the electrical
charges occur at much lower frequencies.
50
3.5u
3u
2.5u
2u
1 .5u
I U
500n
0
-500n
-1 U
-1.5u
-2u
-2.5u
-3u
-3.5u
2m
-
Rc
Rw L
Figure 3-3: Inductor modeled with core loss and winding
loss.
Characterization of the energy flyback inductor has been
performed in [11] usinga multimeter and a bridge instrument set at
300 kHz. The final model, with Rc
representing the core loss and Rw representing the winding loss,
is shown in Fig. 3-
3. Extracted parameter values are L = 2.5 mH, chosen to limit
the rate of current
ramping and prevent inductor saturation, RC = 360 kQ, and Rw = 8
Q for the exper-imental circuit. Note that by modeling the core
loss as a linear resistor, one implicitly
disregards nonlinear loss mechanisms found in the inductor.
Although not critical in
the simulation phase, these second-order effects turn out to be
important when a
close fit between experimental data and simulation is desired.
Refer to Chapter 4 for
more details.
3.3 Power Devices
Because the amount of energy harvested from the vibrational
source is on the or-
der of several pW, power electronic components in the circuit,
including diodes and
MOSFETs, also require accurate modeling to insure that the
associated losses do not
exceed the converted energy. To model the components with
precision, they must first
be selected. As with most circuits processing power, diodes
exhibiting nearly ideal
behaviors are desirable; this translates to a low forward bias
voltage drop, small par-
asitic resistance and capacitance, as well as low reverse bias
leakage. Based on these
limitations, the 1N6263 Schottky barrier diode was selected. As
will become evident
later from simulation results, the best MOSFET for energy
harvesting should have
low on-resistance, small parasitic gate capacitance, and a weak
body diode. These
51
-
requirements lead to the selection of a 2N7002 n-channel MOSFET
for use in this
circuit.
Buermen extracted the appropriate HSPICE parameters for the
1N6263 Schottky
barrier diode in [161; Vishay, a company specializing in
semiconductor devices, gen-erated the HSPICE model for the 2N7002
n-channel MOSFET. Briefly, the Schottky
barrier diode model contains two diodes, each with its own set
of parameters, in par-
allel; one of them serves as a parasitic component. The
n-channel MOSFET model
accounts for parasitic p-channel MOSFET, gate capacitance, and
the body diode.
For the complete model files, refer to Appendix (A).
3.4 Oscilloscope Probes
As will be shown in simulations later during this chapter, the
parasitic resistance
presented to the circuit due to the presence of oscilloscope
probes can significantly
affect the energy conversion efficiency. In an extreme case, a
simulation that results
in positive converted energy can see its reservoir voltage
collapse when a 10 MQequivalent probe resistance is included as a
load.
The significant problems posed by the scope probes arise because
they form un-
expected current paths through which charge that had work done
on it can leak to
ground, greatly decreasing conversion efficiency. As an example,
if the scope probe
is attached to a point in the circuit with DC voltage VNODE = 2
V, the parasitic
resistance will on average dissipate
V2 22(PDIss) V R - 106 - 0.4 pW (3.4)
which could realistically exceed the amount of harvested
energy.
In order to minimize probe loss, all probe points on the final
PCB design require a
series 10 MQ resistor in front of the scope probe entry point;
this halves the consumed
52
-
power at the expense of voltage resolution on the oscilloscope.
With this in mind,
all simulations will have a 20 MQ parasitic resistance attached
to probing nodes, themost prominent ones being VRES and vs, in
order to assure that measurements can be
taken on the actual board.
3.5 Gate Drive Modeling
In order to feed the converted energy from the temporary storage
capacitor Cs back
into the reservoir capacitor CRES, the n-channel MOSFET serving
as a pass transistor
must be driven on and off in a timely fashion. The actual choice
of drive strength and
frequency will be discussed later in the chapter after
simulation results are presented,
but it is nonetheless important to discuss ways in which the
clock signal can be
modeled with sufficient precision in HSPICE.
Based on the selection of an LMC555 CMOS timer configured in
astable operation
as the gate drive, two important limitations must be modeled:
finite rise time and
saturation voltage limits from Vss, the bottom power rail, and
VDD, the top power
rail. These nonidealities are important because both contribute
to additional power
loss during the conversion - finite rise time incur switching
losses while saturation
voltage limits give rise to leakage current at the low end and
higher than expected
channel on-resistance at the high end. From the LMC555
datasheet, the rise and fall
time are both 15 ns and the saturation voltage limit is 0.3 V
from either supply rail.
3.6 Simulating the Two Diode Circuit
To better understand the energy harvesting process, the first
part of the circuit,
namely the components of the charge pump, is simulated on its
own. As a starting
point, a reservoir capacitor of value CRES = 1 MF and a storage
capacitor of value
Cs =_ 3.3 nF are chosen; the value of Cs insures that parasitic
capacitance from the
53
-
CRES VRES CVAR ~VAR CS VS
Figure 3-4: Charge pump portion of the energy harvester.
9.5 -A
9 -VS
-- 1, -8.5
vVAR i *
vRE
6.5
0 im 2m 3m 4m 5m 6m 7m 8mTime (1n) (TIME)
Figure 3-5: Voltage waveforms for energy harvesting circuit with
CDC = 1.22 nF,CAC = 300 pF, CRES = 1 MF, Cs = 3.3 nF, and VINIT = 6
V. The vertical axisrepresents voltage plotted in volts and the
horizontal axis represents time plotted inseconds.
oscilloscope probe and other sources do not dominate.
Fig. 3-4 shows the schematic for this section of the energy
harvesting circuit,repeated from Chapter 2 for convenience. The
schematic lacks any source of voltage
excitation; instead, before the simulation in HSPICE begins, all
the individual node
voltages, VRES, VAR, and vs are initialized to 6 V. This allows
the system to begin
with some initial energy that is necessary to start the energy
conversion process. In
a real circuit, a battery that can be disconnected would serve
as this initial energy
injection source.
54
-
During each cycle of operation, within which CRES decreases from
its maximum
value and goes back up, energy flows from both the reservoir
capacitor and the vi-
brational source into Cs, as shown earlier in Chapter 2. The
voltage waveforms for
VRES, vAR, and vs plotted in Fig. 3-5 indicate the effects of
these energy transfers. As
expected, the energy transferred to Cs causes vs to rise in
accordance to Ws = 1Csvs.
At the same time, VRES drops as charge is pulled out of CRES and
placed onto CVAR for
the vibrational source to do work on. However, because CRES >
CVAR, the decrease
in VRES is insignificant, allowing VRES to be treated as a
constant during this part
of the simulation. Furthermore, vVAR oscillates up and down as
CVAR varies, also in
agreement with the predicted behavior.
In each energy conversion cycle,
WCONv =-Qovv (3.5)WCNV 2 QAVR=2 0(CMIN - CMAX) 35
where Qo is the amount of constrained charge and CMIN and CMAX
are the minimumand maximum capacitance value for the vibrating
capacitor. As more and more
conversion cycles occur, Qo decreases due to increasing
difficulty of placing additionalcharge on CVAR (refer to Eq.
(2.15)). This results in the decreasing step height forvs.
The theoretical maximum voltage that vs can obtain has been
calculated in Chap-
ter 2. Using the derived formula,
VS,MAX - CMAX nSO= 1.65 x 6 V = 9.9 V (3.6)CMIN
if we take CDC = 1.22 nF and CAC = 300 sin (27r x 1900t) pF like
in the earlierexample. Looking at Fig. 3-5, it is apparent that vs
does not approach 9.9 V but
instead flattens out at around 9.5 V. This discrepancy stems
from the fact that the
theoretical calculations presented in Chapter 2 ignored the
forward bias voltage drop
of the Schottky barrier diodes.
55
-
20u
D116U ID216u -
6u -
0 1m 2m 3m 4m 5m 6m 7m 8mTime (11n) (TIME)
Figure 3-6: Current waveforms for charge pump circuit with CDC
1.22 nF, CAC =300 pF, CRES = 1 pF, Cs = 3.3 nF, and vINIT = 6 V.
The vertical axis representscurrent plotted in amps and the
horizontal axis represents time plotted in seconds.
Fig. 3-6 shows the current passing through the two diodes. The
simulated wave-
forms shows that the diodes conduct in alternating fashion, in
agreement with theory.
However, theoretical calculation ignored the effect of leakage
current during the time
when diodes are reverse biased. Simulations later in this
chapter confirms that diode
leakage has a detrimental effect on the efficiency of energy
harvesting (due to thecareful selection of Schottky diodes with
maximum Is = 0.15 pLA, the reverse bias
leakage current is not readily visible in the simulated
waveforms).
Comparing the current and voltage waveforms, one finds that vs
ramps up when
D 2 is conducting and stays flat when D1 is conducting. This
makes sense intuitively
because the only time when harvested energy can flow into Cs
occurs while D 2 con-
ducts. Finally, notice the decreasing amplitude of conducted
current; this shows that
as vs rises, CvAR discharges less into Cs per cycle and
therefore extracts fewer charges
from the reservoir.
For this part of the energy harvesting circuit to be considered
successful, positive
56
-
net energy should result after a few cycles of vibrational
motion. For any capacitor,
the change in stored energy given an original voltage vo and a
final voltage vF is
A WC = C (v2 - v2) (3.7)
Using the same simulation parameters as above, the reservoir
voltage droops from
VRES = 6 V to VRES = 5.9923 V after 4 cycles. During the same
period of time, the
temporary storage node rises from vs = 6 V to vs = 8.2268 V.
Therefore,
AWTOT = CRES (VRES,F - VRES,O) + (,F -~VS o) (3.8)
- 1 (10-" F) (0.092 V2) + 1 (3.3 x 10-9 F) (31.680 V2) (3.9)S6
nJ . (3.10)
The net energy of the system is rising, indicating a success in
injecting mechanicalvibration energy into the circuit.
3.7 Two Diode Circuit with Energy Flyback
Now that the charge pump portion of the circuit has been shown
to convert positive
energy, the inductive energy flyback consisting of a pass
transistor, freewheeling diode,
and an inductor will be added. Their addition, along with a
parasitic probe resistance
Rp mentioned earlier, completes the entire circuit except for
the transistor gate drive;
the schematic is shown in Fig. 3-7.
As a first pass simulation, the gate of the MOSFET is driven in
such