1 FP5533-Preliminary 1.0-2008 FP5533 fitipower integrated technology lnc. Efficient multi-channel DSC motor driver Description FP5533 is an efficient multi-channel DSC motor driver. It has 5 channel, when used in exclusive control mode, it can be used as 5.5 channel motor driver (two of them can’t be operate at the same time).Each channel can provide 600mA current. The control method is flexible. Use the provide code, it can be controlled by an MCU to act as constant voltage(CV) driver, constant current(CC) driver and full swing driver, the output level of CV and CC model is realized by the embedded DACs, which is also controlled by MCU code. Due to the CMOS process and Charge Pump-less topology, the consumption current is low, the package is small TQFN-40(5mm*5mm), so it is suitable for portable product. The protect function includes UVP and Thermal shutdown. Pin Assignments: Fig.1 pin assignments Features ● Built-in 3ch Schmitt trigger ● Low operation current: I(VCC)=1mA ● Low standby and shutdown current: 5uA ● Internal DAC set CV and CC output accuracy: ±5% ● Serial digital input control ● Separated analog vcc and power vm ● Wide operation power supply, excellent low voltage operation ● Low on resistance of the driver:1.2Ω typical @VM=5V ● UVP and thermal shutdown ● PI on voltage:0.3V@Io=30mA ● 40 pin 5X5mm small TQFN package Applications Motor driver for ● Digital still camera Ordering information TR: Tape / Reel Blank: Tube G: Green Product Package Type WQ: TQFN-40 FP5533□□□
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Efficient multi-channel DSC motor driver 1.0-2008 3 fitipower integrated technology lnc. FP5533 OUT1B CH1 output B RNF4 CH4 current sense(CC) or power GND(CV) VM12 CH1/CH2 power supply
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1 FP5533-Preliminary 1.0-2008
FP5533fitipower integrated technology lnc.
Efficient multi-channel DSC motor driver
Description FP5533 is an efficient multi-channel DSC motor driver. It has 5 channel, when used in exclusive control mode, it can be used as 5.5 channel motor driver (two of them can’t be operate at the same time).Each channel can provide 600mA current. The control method is flexible. Use the provide code, it can be controlled by an MCU to act as constant voltage(CV) driver, constant current(CC) driver and full swing driver, the output level of CV and CC model is realized by the embedded DACs, which is also controlled by MCU code. Due to the CMOS process and Charge Pump-less topology, the consumption current is low, the package is small TQFN-40(5mm*5mm), so it is suitable for portable product. The protect function includes UVP and Thermal shutdown.
Pin Assignments:
Fig.1 pin assignments
Features Built-in 3ch Schmitt trigger Low operation current: I(VCC)=1mA Low standby and shutdown current: 5uA Internal DAC set CV and CC output accuracy:
±5% Serial digital input control Separated analog vcc and power vm Wide operation power supply, excellent low voltage operation Low on resistance of the driver:1.2Ω typical @VM=5V UVP and thermal shutdown PI on voltage:0.3V@Io=30mA 40 pin 5X5mm small TQFN package
Applications Motor driver for Digital still camera Ordering information
TR: Tape / Reel Blank: Tube G: Green Product Package Type WQ: TQFN-40
FP5533
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FP5533fitipower integrated technology lnc.
Typical Application Circuit
Fig.2 Typical application circuit
Functional Pin Description Pin Name Pin Function Pin Name Pin Function
CS Serial input control NC Not connected
SCLK Serial input clock PI1 PI1 output
SDAT Serial input data PI2 PI2 output
VCC Small signal power supply PI3 PI3 output
DGND Small signal block ground OUT3A CH3 output A
IN5B CH5 input B PGND3 CH3 Power GND
IN5A CH5 input A OUT3B CH3 output B
IN4 CH2/CH4 input B VM3 CH3 power supply
IN3 CH2/CH4 input A STIN2 Schmitt trigger 2 input
IN2 CH1/CH3 input B STOUT2 Schmitt trigger 2 output
IN1 CH1/CH3 input A STIN3 Schmitt trigger 3 input
OUT1A CH1 output A STOUT3 Schmitt trigger 3 output
PGND12 CH1/CH2 Power GND OUT4A CH4 output A
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FP5533fitipower integrated technology lnc.
OUT1B CH1 output B RNF4 CH4 current sense(CC) or power GND(CV)
VM12 CH1/CH2 power supply OUT4B CH4 output B
OUT2A CH2 output A VM45 CH4/5 power supply
PGND12 CH1/CH2 Power GND OUT5A CH5 output A
OUT2B CH2 output B RNF5 CH5 current sense
STIN1 Schmitt trigger 1 input OUT5B CH5 output B
STOUT1 Schmitt trigger 1 output RESET Logic reset
Block Diagram
Fig.3 Block Diagram
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FP5533fitipower integrated technology lnc.
Absolute Maximum Ratings VCC to GND---------------------------------------------------------------------------------------------------------------- - 0.3 to + 5.5V
VM12 to DGND------------------------------------------------------------------------------------------------------------ - 0.3 to + 5.5V
VM3 to DGND-------------------------------------------------------------------------------------------------------------- - 0.3 to + 5.5V
VM45 to DGND------------------------------------------------------------------------------------------------------------ - 0.3 to + 5.5V Note:Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.
Operation Temperature Range--------------------------------------------------------------------------------------------------------- - 20°C to + 75°C
Storage Temperature Range------------------------------------------------------------------------------------------------------------ - 40°C to + 150°C
Note: The 1lines control b2b1=10 or 11 only effective while IN5A=H, if these two code is set and IN5A=L the CH5 state is off, ie:
IN5A b2b1 OUT5A OUT5B 5CH
L - High impedance High impedance off
H 10 H L forward
H 11 L H reverse
A2:1,2ch disable/3,4ch serial control Address Data
b7 b6 b5 b4 b3 b2 b1 b0
0 1 0 1,2ch disable 3ch serial control 4ch serial control
Bit Name Function
b4b3 1,2ch disable
1,2ch disable setting(effective only when 1,2ch works in 2lines or 3lines control mode:A0-b4b3=10or 11)
0: disable
1: enable
b2b1 3ch serial control
3ch drive mode control (effective only when 3ch works in serial control mode:A0-b2b1=10)
00: off
01: forward
10: reverse
11: brake
b0 4ch serial control
4ch drive mode control(effective only when 3ch works in serial control mode:A1-b4b3=10)
00: off
01: forward
10: reverse
11: brake
A3:1,2ch DAC setup and 1,2ch FS/CV set Address Data
b7 b6 b5 b4 b3 b2 b1 b0
0 1 1 1,2ch DAC 1,2ch FS/CV
Bit Name Function
b4b3
b2b1
1,2ch DAC to set
1,2ch CV output
1.8~4.8V
0000:4.80V 1000:3.20V
0001:4.60V 1001:3.00V
0010:4.40V 1010:2.80V
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FP5533fitipower integrated technology lnc.
0.20V/step 0011:4.20V 1011:2.60V
0100:4.00V 1100:2.40V
0101:3.80V 1101:2.20V
0110:3.60V 1110:2.00V
0111:3.40V 1111:1.80V
b0 1,2ch drive mode
select
0: CV
1: FS
A4:3ch DAC setup and 3ch FS/CV set
Address Data
b7 b6 b5 b4 b3 b2 b1 b0
1 0 0 3ch DAC 3ch FS/CV
Bit Name Function
b4b3
b2b1
3ch DAC to set
3ch CV output
1.8~4.8V
0.20V/step
0000:4.80V 1000:3.20V
0001:4.60V 1001:3.00V
0010:4.40V 1010:2.80V
0011:4.20V 1011:2.60V
0100:4.00V 1100:2.40V
0101:3.80V 1101:2.20V
0110:3.60V 1110:2.00V
0111:3.40V 1111:1.80V
b0 3ch drive mode
select
0: CV
1: FS
A5:4ch DAC setup and 4ch FS/CV set
Address Data
b7 b6 b5 b4 b3 b2 b1 b0
1 0 1 4ch DAC 4ch FS/CV
Bit Name Function
b4b3
b2b1
4ch DAC to set
4ch CV output
1.8~4.8V
0.20V/step
4ch CC RNF
CV mode CC mode:
0000:4.80V 1000:3.20V 0000:300mV 1000:220mV
0001:4.60V 1001:3.00V 0001:290mV 1001:210mV
0010:4.40V 1010:2.80V 0010:280mV 1010:200mV
0011:4.20V 1011:2.60V 0011:270mV 1011:190mV
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FP5533fitipower integrated technology lnc.
output
150mV~300mV
10mV/step
0100:4.00V 1100:2.40V 0100:260mV 1100:180mV
0101:3.80V 1101:2.20V 0101:250mV 1101:170mV
0110:3.60V 1110:2.00V 0110:240mV 1110:160mV
0111:3.40V 1111:1.80V 0111:230mV 1111:150mV
b0 4ch drive mode
select
only effective when A1-b0=1
0: CV
1: FS
A6:5ch DAC setup
Address Data
b7 b6 b5 b4 b3 b2 b1 b0
1 1 0 5ch DAC -
Bit Name Function
b4b3
b2b1
5ch DAC to set
5ch CC RNF
output
150mV~300mV
10mV/step
0000:300mV 1000:220mV
0001:290mV 1001:210mV
0010:280mV 1010:200mV
0011:270mV 1011:190mV
0100:260mV 1100:180mV
0101:250mV 1101:170mV
0110:240mV 1110:160mV
0111:230mV 1111:150mV
b0 Parallel Input
Select
IN1/IN2/IN3/IN4
0: IN1A/IN1B/IN2A/IN2B in effect
1: IN3A/IN3B/IN4A/IN4B in effect
A7: PS, RESET and PI control
Address Data
b7 b6 b5 b4 b3 b2 b1 b0
1 1 1 PS PI1 control PI2 control PI3 control S/W reset
Bit Name Function
b4 Power save 0: power off (standby)
1: power on (active)
b3 PI1 control 0: output off: high impedance
1: output on: low impedance
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FP5533fitipower integrated technology lnc.
b2 PI2 control 0: output off: high impedance
1: output on: low impedance
b1 PI3 control 0: output off: high impedance
1: output on: low impedance
b0 S/W reset 0: normal working, no action
1: all the data in the register set to 0
Note: CH1-5 use H bridge output structure
Fig.7 H bridge output structure
For ch1-5, direction forward means current from OUTA to OUTB, PA and NB conduct current while PB and NA cut off; reverse means current from OUTB to OUTA, PB and NA conduct current while PA and NB cutoff Off means all MOS are cutoff, output is high impedance to both VM and PGND Brake means NA and NB active to pull OUTA and OUTB to gnd, PA and PB cut off. Output is low impedance to PGND but high impedance to VM
Parallel function table Note: IN1* and IN2* can’t be synchronous in effect with IN3* and IN4*, which lie on the “Parallel Input Select” bit setup. While IN5* is independent unit.