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Abolfazl RaziWiseNet Lab
Electrical Engineering Commun
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TABLE OF C ONTENTS
Abolfazl Razi 4WiseNet Lab
Multiple Access for Passive Sensors 8BY ABOLFAZL RAZI
Featured Products 11
State Machine Coding Styles 12BY RAY SALEMI
Filter Selection and Design: The 17Gateway to System PerformanceBY TAMARA SCHMITZ WITH INTERSIL
Return to Zero Comic
Learn about the roles and importance of passive sensors in the electronics industry.
Interview with Abolfazl Razi - PhD Student at the University of Maine
An examination of state machines and the coding styles used to implement them.
Properly select, model and integrate elements of filter circuit design to maximizeperformance.
23
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INTERVIEW
WiseNet Lab
How did you get into
electronics/engineeringand when did you start?
I have always been interested inmathematics because to me, itis the only science completelybased on solid proofsone follows from another.Most physical phenomena,hypotheses and theories,
are not understandable and
provable without the magic ofmathematical equations. WhenI was in high school, I got thebook Schaums Mathematical Handbook of Formulas and
Tables as a gift. I studied it andgot familiar with new topics likederivatives and integrals. Thisbook made me so eager to learn
math theory and become moreknowledgeable about thesethings. I also was very interestedin assembling electronic kits likeradio and led blinkers. Whilestudying in high school, I realizedhow fantastically an electricalphenomenon can be describedby mathematical equations.
All of this led me into the fieldof electrical engineering, so Ichose it as my academic major,and as time passes I love it more.
What are your favoritehardware tools that youuse?
I have used different hardwarebased on different projectsrequirements. This spans a
wide category from a tiny smartcard reader to a huge mobileswitching center. Recently I havebeen working with a Xilinx Virtex-4 FPGA board to design a newinterrogator system for passivesensors. It is a very multi-purposed and powerful boardand at the same time is easily
Abolfazl Razi - PhD Student at the University of Maine, ECE Department
AdolfazlRazi
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INTERVIEW
programmable by MATLABDSP tools. I am also very luckyto have access to a powerfuland expensive SPIRENT SR5500
wireless channel simulator inour lab that helps me simulatedifferent cellular systems likeGSM, WiMAX and LTE. I canexamine the performance of
various transmission techniquesand coding schemes on wirelessradio channels. Sometimes itcompares the performance ofthe codes developed in MATLABunder idealistic assumptions
against what is really happeningin the wireless channels. Thisinstrument makes a goodconnection between the theorystuff we learned in university andthe practical world of industry.
What are your favoritesoftware tools that you use?
Maybe Id better tell you mysecond favorite software, since I
think the most popular softwareamong all communicationengineers is definitely MATLAB,and I am not an exemption. Iuse MATLAB mostly to simulatecommunication systems. Ialso use different software indifferent projects. I prefer the VBfamily for general programmingbecause of its capabilities andsimplicity. I recommend it for
anyone who wishes to enter theprogramming world. I developeda professional software built tocontrol a companys call centerusing VB6. I also developeda SIMCARD test suite under
VB.NET. I am a C++ fan too,and have developed a charging
entity of a PABX switching center.I have used other softwarelike TEMS Investigation,GemXplore, and Mentum planet
v4.5 when I was working oncellular networks. Recently Ihave used 4nec2 software forarray antenna modeling, which isa very powerful software to easilymodel any wire-based antennas.I like to try different software andcant imagine how hard it wouldbe to research without it.
My first trick isasking somebodywho may know
the answer beforeendlessly fighting a
problem. This way wecan spend our time
more efficiently.
What is the hardest/trickiestbug you have ever fxed?
I believe every problem lookseasy just after it is solved! One
very challenging problem Ifaced goes back to three yearsago when I was working for amobile operator. We realizedthat some customers were beingpushed out of the network andcouldnt make phone calls. Twotechnical groups had workedon the problem without anyprogress before a team of twoother experts and I got into theproject. We started very time-
consuming tests and traced callsand mobile activities in the regionat three different levels. One testinvolved checking the signaling
links between a radio basetransceiver station (BTS) andthe network, which was called
A-Interface using a networkanalyzer. Another test wasmonitoring Air-interface betweenthe BTS and mobile stations (MS)
with TEMS Investigation toolbox,and I was checking the interfacebetween the mobile equipment(ME) and the SIMCARD using
PC/SC debugging tools. At lastour teamwork paid off and wefound the signaling problemthat was due to a wrong errorcode that MSs were receivingfrom an adjacent local mobilenetwork. The code was NoPLMN Access while it had to bePLMN prohibited. This wrongsignaling message caused theFPLMN file in the SIMCARD to
be filled with a wrong value andprevented MSs from makingcalls. I always remember thissuccessful mission that solvedan annoying problem for manycustomers in that area.
What is on your bookshelf?
Most of my books are Ebooks inmy computer. On my bookshelf,I have a few reference books in
my research area. Two of themthat I most frequently need toread, are Tomas Covers bookon Information Theory, andCostellos on Coding Theory. Irecently borrowed a book fromthe library titled Surface AcousticWave Devices for Mobile and
Wireless Communications
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INTERVIEW
written by Colin K. Campbell.This book has been very usefulfor me. My experience saysthat reading the right book
that teaches the fundamentalsis always a necessary stepwhen getting into a new area ofresearch.
Do you have any tricks upyour sleeve?
My first trick is asking somebodywho may know the answer beforeendlessly fighting a problem.This way we can spend our time
more efficiently. The second pointI always remind myself is thatthe computers are developed to
work fine and almost error-free.So, I very often try to shift mymath or engineering problemsinto the computer world bymeans of simulation. Sometimes,I compare my results on a pieceof paper with the simulationresults step by step. It is a time-
consuming process and needspatience, but usually it works andhelps me to localize the issues inmy problems.
What has been your favoriteproject?
My recent favorite project isdealing with interference effect inpassive wireless sensor networks(PWSN). Passive sensors are
widely used to sense variousparameters like temperature,humidity, and stress, wherebattery-run active sensors donot operate well due to harshconditions. The passive sensors
we are using are reflective delaylines implemented on Surface
Acoustic Wave (SAW) devices.
Can you tell us more aboutthe Surface Acoustic Wave
(SAW) devices?These devices are composedof an antenna, an interdigitaltransducer (IDT), and a bunchof reflectors, all printed on apiezoelectric substrate like YZ-LiNbO3. To utilize these devices,an electromagnetic wave isradiated by an interrogatorsystem. The electromagnetic
wave is received by the
antenna and is converted toan acoustic wave by the IDT,and is propagated through thedevice surface. The wave ispartially reflected back by thereflectors and is radiated backto the interrogator system bythe same antenna. The reflected
wave carries information aboutthe sensing parameterin ourcase temperatureas well as
the sensors identity defined bythe reflector patterns.
In this project we try to developan efficient algorithm to extractthis information by analyzingthe reflected wave. The goal isto achieve higher accuracy inthe range of operation and toincrease the number of sensors ina single-interrogator system. The
difficulty of employing traditionalsignal processing techniques isthat these devices are passivein nature and all the intelligenceshould be moved to theinterrogator side. Also, the signallevel is very low compared to theactive battery-powered sensors,and that makes the analysis even
more challenging. I think we arestill in the beginning, and there isstill much to be done.
Do you have any note-worthy engineeringexperiences?
I remember a fun trick I learnedfrom one of my professors whenI was an undergraduate. InMicrowave circuit design lab,sometimes the high frequencycircuits like oscillators and RFfilters were not working properlyeven after comprehensive
checks and careful analysis.Our professor taught us a veryeasy trick to use as a last step
when every regular test lookeddisappointing. He said to justput your finger on the back of theelectric board and move it slowlyand check the output signalcarefully. When you obtain thedesired signal, just solder a 20 to100 pico Farad capacitor where
you have put your finger on theboard. It was very surprisingto us to see that this trick was
working fine for some circuits.
What are you currentlyworking on?
Currently I am working on de- veloping interference reductionalgorithms for passive wirelesssensor networks. Our projectsare financially supported byNASA.
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PROJECT
Why are sensors
so important?
The role of sensors in our dailylife is more important than wemay think. We are surrounded bydifferent sensors helping us to do
our tasks. Almost every buildingis equipped with fire and smokesensors, as well as surveillancecamera systems. TVs come withinfrared sensors. Any typicalcar is equipped with varioussensors like speedometer, fuel,temperature, oil pressure andcharging gauges, door lock andbrake indicators, and so on. Therole of sensors in industry is evenmore essential. Every electrical
appliance utilizes differenttypes of sensors. An airplaneflight goes smoothly and stayssafe largely due to thousandsof sensors. Any modern factorytoday is totally controlled bythe advanced sensing systems.Health monitoring systems along
with robotic technology help
physicians on disease diagnosis,treatment, and performingsurgical operations. So it is kindof hard to imagine the world
without sensors.
Wireless Sensor
NetworksThe use of sensors is growing fastand finds new applications in the
field of habitat monitoring, trafficcontrol, energy distribution, andhealthcare. A system includinga number of sensors spread outin an area that collect data andtransmit it to a central stationto be processed is called a
Wireless Sensor Network(WSN). In past decades, WSNis intensively investigated from
M Aultiple ccessfor
assiveP S
ensorsBy Abolfazl Razi
Figure 1: Showing how we are surrounded by sensors.
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PROJECT
different aspects includingsensor fabrication, sensorutilization, data communication,data processing, applicationdevelopment, and market study.Our main focus in this project ison the communication part.
The trend in WSN technologyis to build sensors as small andcost efficient as possible. In thenext-generation sensor systems,a sheer number of very tinysensors are spread out in an areato collect different data types
with very low resolution and high
accuracy. One of the challengingproblems in this field is how todevelop efficient communicationprotocols to carry this hugeamount of information betweensensors and the control unit in areliable fashion.
Passive sensors
Traditional sensors are of activetype. Active, in sensor technology,means that the sensors arebattery-run electrical devices.They include a measurement
Figure 2: An example of passive sensor: a Binary modulated reflective delay lineSAW Device.
block, a data processing unitthat converts the measurementto electrical signals, a radiotransceiver that transmits thesignals to the destination, and acontrol unit that controls differentparts. Even though these sensorsare very effective and widelyused, in some applicationsthey are not applicable due toharsh conditions like extremelyhigh temperature. For instance,inside a jet engine where thetemperature can go as high as1,000 degrees, no active sensorcan survive because of battery
explosion. In these applicationsbattery-free passive sensorsare the only possible choice.The WSN composed of passivesensors is called PWSN.
BPSK Modulated
Reflective Delay Line
The technology we have used toimplement a passive sensor isbased on Surface Acoustic Wave
(SAW) devices. SAW devices arebattery-free, long lasting, ruggedsensors that operate based
on the fact that acoustic wave velocity on the device dependson the measured parameter liketemperature, stress, and so on.These devices are implementedin various types including (i)Resonators, (ii) Delay lines,and (iii) Reflective delay lines.In this project, we are workingon temperature sensing usingbinary coded reflective delaylines that can be individuallyaccessed by DS-CDMA codesin a multiple access fashion.
As shown in Figure 2, each device
is composed of an antenna, anInter Digital Transducer (IDT),and two series of reflectors withmirrored pattern, all printedon a temperature-sensitivesubstrate such as YZ-LiNbO3.
An ElectroMagnetic (EM)radio wave is radiated by aninterrogator system. The EM
wave is received by the antennain the middle of the device andis converted to an Acoustic Wave(AW) by IDT. The AW travelsthrough the device surface inboth directions and is partiallyreflected back by specificallyshaped reflectors at two endsof the device. The AW then isconverted back to an EM waveand radiated by the antenna.This reflected signal is sensedby a very sensitive interrogatorsystem and is convolved with
the original signal. The resultingcurve, as illustrated in Figure3, includes two peaks andthe distance between peaksreveals information about themeasured parameter, in our casetemperature. These devicesand interrogator system aredeveloped at the University of
0 0 1 0 1...0 1 0 01 ...
d2
d1
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PROJECT
Maine as a joint project in LASTand WiseNet labs.
Multiple Access and
Interference Problem
In some applications, theinterrogation technique is
based on a point-to-pointcommunication, where a singlesensor is placed close to thedata source and an interrogatorsystem communicates with thesensor to read the measurement.In some applications, due tothe existence of many datasources, or the need for highermeasurement accuracy andresolution, more sensors are
required to be put in a cluster. Inthis case, when we are targetinga particular sensor, other sensorsalso respond to the interrogationsignal that causes an undesiredinterference effect and makes itdifficult to read the measurementof a specific sensor. So weneed to implement a Multiple
Figure 2: A sample response signal of the sensors.
Access (MA) technique forthe communication system.To do so in active WSN cases,different schemes such asTDMA, FDMA, and CDMA areused at sensor side. However,in a PWSN, since the passivesensors cannot perform signalprocessing, it is much morechallenging. In fact, we need torealize the MA technique on thesensor fabrication or push all theintelligence to the interrogatorside. In the first phase of ourproject, we use a combinationalmethod. Orthogonal codes aredeveloped on the sensors byusing different reflector patterns
on the device. In the interrogatorside, BPSK modulated DS-CDMA signals with GOLDcodes are employed. Thisenables us to have a simple MAsystem with a few sensors. Now
we are thinking of extendingour technique and going furtherby employing new techniques
to remove interference amongsensors and improve the systemperformance. One idea is toemploy a rotational directionalantenna structure based on arrayantennas in the interrogatorsystem that enables us to targeta specific sensor and reducethe interference level. Also, weare working on implementingan intelligent multi-stageinterference removal technique,in which we first try to detect thepatterns of interfering signalsand then remove them from thereceived signals by advancedsignal processing methods. Thisphase of the project is still in
the beginning steps and we arecurrently working on it.
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State
MachinesCoding Styles
Ray SalemiVerification Consultant
State machines are so common that there are tools
devoted to creating them by drawing circles and arts.
There are simulators that will recognize your statemachine and animate it to help you debug it. There are
even synthesis tools that will add error correcting logic
to your state machine so that it can recover from the
single event upsets that can happen at high altitude or in
electrically noisy environments.
You can take advantage of these tools by programming
state machines using a commonly accepted coding
style. Last month we began our discussion of this coding
style when we saw how to create named states and a
designated state register. This month well examine
various coding styles that we can use to create the next-state and output generating logic.
We are venturing into the world of combinatorial coding
style, a subject that is so controversial that adult engineers
have nearly come to blows when strong drink is present
at a design review meeting. (What, You dont have strong
drink present at your design review meetings?) This
article examines three basic coding styles you can use
to implement a state machine. We will use this simple
state machine as our example: the life of a dog.
Figure 1
sleeping
barking
happy
eating
tired
mouth
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TECHNICAL ARTICLE
The dog leads a simple life. By default he sleeps, but
if you feed him hes happy and then starts eating. After
hes done eating he goes back to being happy unless he
gets tired, you feed him again, or another dog walks in
the street. If there is another dog, he starts barking, if you
feed him he eats, and if hes tired he goes back to sleep.
The dog state machine has three inputs: tired, food, and
other_dog.
The dog state machine has two outputs: mouth and tail.
The mouth operates when the dog is barking or eating,
the tail operates when the dog is happy (product
marketing might argue that the tail could also operate
when eating, but were not implementing that approach).
Were going to code up our dog several ways.
Were going to see that HDL gives you control over
how your final code implements a state machine. There
are two steps to the process. First well choose a state
machine architecture, then well code it up. The key
is to realize that there are my possible state machine
architectures and that they all deliver different benefits
and challenges.
All state machine architectures have three or four pieces:
1. Combinatorial logic to determine the next state.
2. Combinatorial logic to determine the output basedon the state.
3. A state register.
4. Clocked output signals (optional).
The simplest way to implement a state machine is to
create a process for the first three pieces:
Figure 2
We have a cloud of logic implementing the next state
based upon the inputs and current state, a current state
register, and a cloud of logic implementing the output.
Here is the code that implements this simple state
machine:
Figure 3
You can code this kind of state machine with three
separate processes. This has the advantage of clarity.
Each process does one thing. Notice that the output logic
and the next-state logic have different sensitivity lists.
The output is only sensitive to the current state, while
the next-state logic is sensitive to the state and the input
signals. This is the definition of a Moore state machine.
We can also create a Mealy state machine if the output
logic is dependent upon the inputs as well as the state,as we see here:
Figure 4
Lets use a Mealy state machine to create a dog who
barks whenever there is another dog outside, regardless
of our dogs current state.
The rest of the state machine code is the same as in
Figure 2. The only difference is that we set the mouth
signal to be equal to the other_dog signal before
Next Stage
Logic
Output
Logic
State
Regis
ter
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always @(current_state, food, other_dog, tired)
begin : next_stage_block_proc
case (current_state)
sleeping:
if (food)
next_state = happy;
else
next_state = sleeping;
eating: next_state = happy;
happy:
if (other_dog)
next_state = barking;
else if (food)
next_state = eating;
else if (tired)
next_state = sleeping
else
next_state = happy;
barking: next_state = happy;
default:
next_state = sleeping;
endcase
end // Next State Block
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always @(current_state
)begin : output_block_proc
// Combined Actions
mouth = 0;
tail = 0;
case (current_state)
eating: mouth = 1;
happy: tail = 1;
barking: mouth = 1;
endcase
end // Output Block
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always @(
posedge clk,
negedge rst
)
if (!rst)
current_state
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TECHNICAL ARTICLE
checking the state. Now another dog will get the mouth
going regardless of what our dog is doing (this is a fairly
accurate simulation of my dog).
Now that weve seen how we can separate the next-state
logic from the output logic, I have to tell you that I dont
like this coding style because it uses two case statements
to respond to the same information. This means that if I
add a state to my state machine, I have to add it to both
the next-state and the output case statements. I have a
hard enough time getting things right once, I hate having
to get things right twice. We can get around the problem
with this architecture:
Figure 5
Figure 6
See Figure 7 for the code.
Now I have one process that is sensitive to the state
and the input signals. The case statement is a little
more complex because I need to describe the outputs
response to the input signals in each state, and once
again I can wind up duplicating conditions if different
states respond to the input differently.
That said, I have one more pet peeve that we may want
to address. If the outputs of this state machine directly
drive the outputs of a module or component, then I have
a problem with unclocked outputs. Unclocked outputs
create design problems:
1. Synthesis tools cannot do timing analysis across
module boundaries. This means that if you have
10ns between clocks, then you can run into trouble if
generating the combinatorial outputs from one block
that takes 6ns while processing the combinatorialinputs of another block that takes 5ns. Both blocks
think they are meeting timing, but together they are
not.
2. You can get glitches on the output signals if they are
settling after youve changed your state.
3. Your synthesis tool will miss optimizing opportunities
because it cannot see a complete combinatorial
circuit that crosses module boundaries.
Figure 7
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83
//-----------------------------------------------// Output Block for machine csm
//-----------------------------------------------
always @(
current_state, other_dog
)
begin : output_block_proc
mouth = other_dog;
tail = 0;
case (current_state)
eating: mouth = 1;
happy: tail = 1;
barking: mouth = 1;
endcase
end // Output Block
Next-State
& Output
LogicState
Register
38
39
40
41
42
43
4445
46
47
48
49
50
51
52
53
54
55
56
57
58
59
6061
62
63
64
65
66
67
68
69
70
71
72
73
74
always @ (current_state, food, other_dog, tired)
begin : next_state_block_proc
case (current_state)
sleeping: begin
mouth = 0;
tail = 0;if (food)
next_state = happy;
else
next_state = sleeping;
end
eating: begin
mouth = 1;
next_state = happy;
end
happy: begin
mouth = 0;
tail = 0;
if (other_dog)
next_state = barking;else if (food)
next_state = eating;
else if (tired)
next_state = sleeping;
else
next_state = happy;
end // case: happy
barking: begin
mouth = 1;
tail = 0;
next_state = happy;
end
endcase
8/3/2019 EEWeb Pulse - Issue 25, 2011
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TECHNICAL ARTICLE
You can avoid all these problems by clocking your output
signals. This creates a circuit where your output signals
appear one clock cycle after the state that generates
them, but you avoid the problems of unclocked outputs.
This design looks like this:
See Figure 9 for the code.
Figure 8
Now we have one process that implements the entire
state machine. This process is sensitive to the clock and
the reset. On every clock edge the state machine outputs
the signals associated with the current state and moves
the state machine to the next state. Notice that mouth andtail are registers now, so they get set on line 51 along with
the current state. This state machine will deliver clean
edges on every clock.
Summary
Weve now examined several ways to code a state
machine. Design tools, simulators, and synthesis tools
will all recognize and generate state machines that you
code using any of these techniques. This of course raises
the question, Which is best?
The answer is, Whichever best matches your
application. If you have a complex output circuit, you
may choose to separate it from the next-state logic.
You may find that youd rather duplicate the state case
statement rather than duplicate the logic that responds
to inputs. You may not be able to afford the clock cycle
it takes to create clocked outputs. You may have coding
styles at work that limit your approach.
Figure 9
There is no single optimum style. Instead of slavishly
using one style because it was the first one we learned,
the best approach is to understand all our options and
make a conscious decision.
Next-State& Output
Logic
StateRegister
OutputFlops
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
6162
63
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90
91
always @(posedge clk,
negedge rst
)
begin : clocked_block_proc
if (!rst) begin
mouth
8/3/2019 EEWeb Pulse - Issue 25, 2011
16/24
Single, Low Voltage Digitally Controlled Potentiometer
(XDCP)
ISL23315The ISL23315 is a volatile, low voltage, low noise, low power, I2C
Bus, 256 Taps, single digitally controlled potentiometer (DCP),
which integrates DCP core, wiper switches and control logic on
a monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. The potentiometer has an associated
volatile Wiper Register (WR) that can be directly written to and
read by the user. The contents of the WR controls the position
of the wiper. When powered on, the ISL23315s wiper will
always commence at mid-scale (128 tap position).
The low voltage, low power consumption, and small packageof the ISL23315 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23315 has a VLOGIC
pin allowing down to 1.2V bus operation, independent from the
VCC value. This allows for low logic levels to be connected
directly to the ISL23315 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Features 256 resistor taps
I2C serial interface
- No additional level translator for low bus supply
- Two address pins allow up to four devices per bus
Power supply
- VCC = 1.7V to 5.5V analog power supply
- VLOGIC = 1.2V to 5.5V I2C bus/logic power supply
Wiper resistance: 70 typical @ VCC = 3.3V
Shutdown Mode - forces the DCP into an end-to-end open
circuit and RW is shorted to RL internally
Power-on preset to mid-scale (128 tap position)
Shutdown and standby current
8/3/2019 EEWeb Pulse - Issue 25, 2011
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All too often, designers spend so much time focusingon the specification and selection of their complex,
higher-cost devices such as processors, FPGAs, and
ADCs, that they dont fully take into account the major
performance impacts, as well as cost and power issues,
that are driven by the selection and integration of so-
called low-end components such as filters.
In fact, the specification and design of filter circuitry
can often be among the most important factors that
determine overall system success. For instance, if the
filtering design in a relatively low-bandwidth application
fails to eliminate high-bandwidth noise at the front-end of
the signal chain, the system has to burn extra power just
to propagate that unwanted noise down the signal chain.
Or, when processing signals of a certain bandwidth such
as in a channel-based radio receiver, an inadequate
filtering design can lead to unnecessary processing of
signals from adjacent channels. This leads to a waste of
power and a potential degradation of the target signal.
Proper filter design also prevents the signal path fromcontributing noise to other parts of the system, such as
keeping high-frequency signals from coupling back into
the power circuit and causing instability or fluctuations.
In essence, bypass capacitors are actually the simplest
category of analog filters and are widely used in all types
of designs.
Below is a brief overview of the role of filters, the types
of filters, and differences between digital and analog
approaches and passive versus active filtering designs.
Then, there are some specific design tips for simulating
and selecting analog filters for an example application
to drive high performance analog-digital converters
(ADCs).
The Role of Filters
Filters are electronic signal processing circuits that are
aimed at removing unwanted frequency components
from the signal, enhancing wanted signals, or both.
Filter Selection
& Design:The Gateway to
System Performance
Tamara SchmitzSenior Principal Applications Engineer
And Global Training Coordinator
8/3/2019 EEWeb Pulse - Issue 25, 2011
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TECHNICAL ARTICLE
Electronic filters generally can be grouped into the
following categories:
High-pass filters attenuation of frequencies below
the cut-off points.
Low-pass filters attenuation of frequencies abovethe cut-off points.
Band-pass filters attenuation of frequencies both
above and below the target frequency band.
Notch filters attenuation of certain frequencies
while allowing all others to pass.
The frequency response of a filter is typically
characterized in terms of Bode Plots, which express
amplitude gain in decibels and phase in radians or
degrees. The bandwidth, f, of a filter is defined as
energy versus frequency. The Q factor of the filter isdefinedbyf0/fwheref0isthecenterfrequencyofa
bandpassfilter andfis thebandwidth.See Figure2
for example curves. The higher the Q, the narrower and
sharper the peak will be. In essence, the Q-factor is a
measure of quality for a particular resonance point on
the frequency spectrum.
Depending on the specific application requirements,
there are a number of different filter configurations that
can be considered to provide alternatives with regard to
optimizing the Q factor, the filters stability and other key
characteristics:
Chebyshev filter slight peaking/ripple in the
passband before the corner; Q>0.7071 for 2nd-
order filters.
Butterworth filter flattest amplitude response;
Q=0.7071 for 2nd-order filters.
LinkwitzRiley filter desirable properties for audio
crossover applications; Q = 0.5 (critically damped).
Bessel filter best time-delay, best overshoot
response; Q=0.577 for 2nd-order filters. Paynter or transitional Thompson-Butterworth or
compromise filter faster fall-off than Bessel;
Q=0.639 for 2nd-order filters.
Elliptic filter or Cauer filter add a notch (or zero)
just outside the passband, to give a much greater
slope in this region than the combination of order
and damping factor without the notch.
Digital Filters
Digital filters sample discrete time signals and need
to operate on digital inputs in order to provide digital
outputs. Digital filtering is a more complex approach
than analog and is typically used in conjunction withFPGAs or microcontrollers, where there is already a
significant amount of things like programming and
digital gates. Because the signals in these systems need
to be digitized to go into the FPGA or microprocessor
anyway, it is not a major cost to the system to digitize the
signals first and then conduct filtering within the digital
processing chain.
A digital filter usually consists of an analog-to-digital
converter to sample the input signal, followed by a
microprocessor and some peripheral components such
as memory to store data and filter coefficients etc. In atypical digital filtering application, software running on
a digital signal processor (DSP) reads input samples
from an A/D converter, performs the mathematical
manipulations dictated by theory for the required
filter type, and outputs the result via a D/A converter.
In mathematical terms, filtering is in essence the
multiplication of the signal spectrum by the frequency
domain impulse response of the filter. For an ideal
lowpass filter, the pass band part of the signal spectrum
is multiplied by one and the stopband part of the signal
by zero.
In addition to adding complexity, digital filters generally
consume more power than analog approaches. Also,
because digital filters use a sampling process and
discrete-time processing, there is an inherent latency
factor, which must be taken into account with regard to
overall design objectives. Digital filter designs can be
simplified by limiting the number of bits used, depending
on the accuracy requirements of the application.
Digital filters are most often used in systems that require
complex signal management and/or a high degree ofprecision. Since these designs digitize the signal before
they perform operations on it, they offer a great degree
of flexibility for complex mathematical functions. This
makes it very easy to change the coefficient in order to
tune the filter for the desired output, such as in a Finite
Impulse Response (FIR) filter design.
8/3/2019 EEWeb Pulse - Issue 25, 2011
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TECHNICAL ARTICLE
Analog Filters
Analog filters are used to process continuous-time
signals and work directly on analog inputs, typically
providing a near instantaneous response from input to
output. In the ideal case, an analog filter would provide100 percent transmission within the specified frequency
passband and 100 percent attenuation outside of that
passband. However, in the real world, analog filters can
only approximate this ideal performance, with some
attenuation in the passband and less than 100 percent
attenuation over the stopband frequency range.
Figure 1: Comparison of Digital and Analog Filtering Approaches.
Analog is generally the preferred solution when the
designs filtering requirements are relatively simple
and especially if minimizing system cost and/or power
consumption is an important factor.
Passive vs. Active
If a very precise filter is required, designers may build it
from scratch using all passive components. However the
cost, space and complexity can often become prohibitive.
So, where possible, most designs lean toward an activefilter approach using a combination of op amps and
passives. This section provides a very brief overview of
the differences and the tradeoffs between passive and
active filter approaches.
By definition, a passive filter is made only from passive
elements. It does not require an external power source
beyond the signal itself. Since most filters are linear,
passive filters are typically composed of just the four
basic linear elements: resistors, capacitors, inductors,
and transformers. More complex passive filters may
involve nonlinear elements, or more complex linear
elements, such as transmission lines.
A passive filter has several advantages over an active
filter:
Guaranteed stability.
Passive filters scale better to large signals (tens of
amperes, hundreds of volts).
No power consumption.
May be less expensive in discrete designs (unless
large coils are required).
Passive filters are commonly used in applicationsinvolving higher voltage and current levels, such as
speaker crossover designs, filters in power distribution
networks, and power supplies. Passive filters are
uncommon in monolithic integrated circuit designs,
where active devices are inexpensive compared to
resistors and capacitors, and inductors are prohibitively
expensive.
Active filters are implemented using a combination
of passive and active (amplifying) components, and
require an outside power source. Operational amplifiers
are frequently used in active filter designs. These canhave high Q factor, and can achieve resonance without
the use of inductors. However, their upper frequency
limit is limited by the bandwidth of the amplifiers used.
Active filters have three main advantages over passive
filters:
Inductors can be avoided. Passive filters cannot
obtain a high Q without inductors but they are large
and expensive at low frequencies, have significant
internal resistance, and may pick up surrounding
electromagnetic signals.
The shape of the response, the Q factor, and the
tuned frequency can be set simply by varying
resistors and one parameter can often be adjusted
without affecting the others.
The amplifier powering the filter can also be used
to buffer the filter from the electronic components it
drives or is fed from, thereby eliminating variations
that could affect the shape of the frequency response.
Filter Type Characteristics Application Area
Digital Filters Digital Inputs & Digitaloutputs
High complexity Greater flexibility
FPGA & micro-processor based
systems High-precision,
complex filtering
requirements
Analog Filters Analog inputs & analogoutputs
Lower cost Lower power
Analog-onlysignal chains
Front-end filteringin mixed-signal
design
8/3/2019 EEWeb Pulse - Issue 25, 2011
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TECHNICAL ARTICLE
Design Example: Modeling an Active
Filter for High-performance ADCs
When creating any mixed-signal system, the first thing
that the designer typically chooses is the ADC because
the system needs a certain number of bits, and a specifiedspeed and sampling frequency. Once the ADC has been
selected, everything else in the supporting circuitry is
aimed at driving the ADC to the optimal specifications,
without degrading performance. It is critical that the op
amps and other components in the filter circuit provide
high-speed signal processing without adding to the noise
floor in order for the ADC to run as close as possible to
its maximum specified dynamic range or resolution.
To model the specifics for implementing an active filter,
engineers need simulation tools that can take the target
filter shape and deliver a set of op amps and externalpassives that accurately achieve the desired filter
response. There are a number of such tools available
online but its important to keep in mind the key
differences between modeling with ideal specifications
versus modeling for real-world production. Most tools
estimate amplifier frequency response with a single-pole
approximation instead of taking into account the second
and third order effects present in commercial amps.
When filters were designed for low frequencies and the
amplifiers had abundant bandwidth compared to the
application, this was a reasonable estimation. This is no
longer true and a better simulation tool is crucial. One
such comprehensive simulation tool can be accessed at
web.transim.com/iSimFilter.
It is also imperative that the model simulation goes
beyond specifying just the op amps and also models
the various resistors and capacitors needed to complete
an optimal filter circuit for the specific application. For
example, Figure 2 shows a simulation from the iSimFilter
tool that models noise gain in dB for various resistor
levels. The Sallen-Key filter (SKF) used in this example is
an electronic filter topology used to implement second-
order active filters, (The alpha values listed represent
the ratio of feedback resistor to gain resistors).
In our specific design example for driving a high-speed
ADC, such as the 500MSPS ISLA112P50 12-bit and the
ISLA214P50 14-bit ADCs, the recommended op amp
solution is the ISL55210, which operates at very low
power (115mW) and has negligible noise with respect to
the ADC. Therefore, adding gain and filtering has vir tually
no impact on the system SFDR. The ISL55210 features
very high slew rates, low noise, ultra-low distortion and
Figure 2: iSimFilter Modeling of Sallen Key Filter Noise for Various Resistor Levels
Noi
seGain(dB)
a = 0.17
a = 0.4
a = 0.85
a = 1.1
a = 2.15
a = 3.1
SKF Noise Gain VS Resistor Ratio
Frequency (Hz)
1.00E+04 1.00E+041.00E+041.00E+04
http://web.transim.com/iSimFilterhttp://web.transim.com/iSimFilter8/3/2019 EEWeb Pulse - Issue 25, 2011
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TECHNICAL ARTICLE
provides a 4GHz gain bandwidth with input noise of only
0.85nV/Hz and consistent performance over a wide
temperature and gain range. The op amp suppresses
even-order harmonic distortion, which is usually caused
by asymmetrical or unbalanced signal paths, andsupports gains greater than two with minimal bandwidth
or SFDR degradation.
Figure 3 illustrates a typical filter design using the
ISL55210 and passives support circuitry to drive a 12-bit
ISLA112P50 ADC.
Summary
Filtering may seem to be a simple design issue and
therefore it doesnt always get the attention that it
deserves. But filter circuits actually are the sentinels
at the gateway to the signal path and are critical forachieving full performance in the higher-cost devices
that form the heart of the overall system.
Proper selection, modeling and integration of the op
amps, passives and other elements of the filtering
circuitry can make or break the success of the overall
design. Even the most advanced ADCs, processors
and other high-end devices become a waste of money if
Figure 3: Filter design with ISL55210 and support circuitry.
they cant be driven as close as possible to their optimal
specification levels.
About the Author
Tamara Schmitz is a Senior Principal ApplicationsEngineer and Global Technical Training Coordinator
at Intersil Corporation, where she has been employed
since 2007. Tamara holds a BSEE and MSEE in electrical
engineering and a PhD in RF CMOS Circuit Design
from Stanford University. From 1997 until 2002 she was a
lecturer in electrical engineering at Stanford; from 2002
until 2007, she served as assistant professor of electrical
engineering at San Jose State University.
+3.3V
ISL55210
ISLA112P50
35mA(115mW)495
495
ADT4-1WT
100
1:2
40.2
210
210
33nH0.1F
0.1F
0.1F
Vdif
Vdif
Vi
Vi
20pF
20pF33nH
100
50
40.2
500kHz 180MHz SPAN
20log ( -------- ) = 17.3dB gain
105MHz SINGLE TONE
180mVpp for -1dBFS
500MSPSCLK
12 Bit
8/3/2019 EEWeb Pulse - Issue 25, 2011
22/24
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