EECT 7327 Data Converters Professor Yun Chiu © 2014 Erik Jonsson School of Electrical Engineering and Computer Science University of Texas at Dallas.

EECT 7327

Data ConvertersProfessor Yun Chiu

© 2014

Erik Jonsson School of Electrical Engineering and Computer Science

University of Texas at Dallas

Logistics

– 2 –

• Instructor: Professor Yun Chiu

• E-Mail: [email protected]

• Office Hour: Tuesday, 2-4 pm, in ECSN 3.602

• TA: TBA

• TA Office Hour: TBA

• Website: http://www.utdallas.edu/~chiu.yun/7327

• Lecture notes, handouts, project assignments, etc. will be posted on the website (no paper copy will be distributed in class)

Prerequisites

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

• Analog circuit design– EECT 6326 (Analog IC Design), or equivalent at the level of G&M,

Razavi, or similar books

• Digital signal processing– EE 4361 (Digital Signal Processing), or equivalent at the level of O&S or

similar books

• Digital circuit design– Basic knowledge of gate/transistor-level logic design (logic family,

sequential logic, etc.)– Some knowledge of AHDL or Verilog-A is helpful for the project

Course Outline (not in order)

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

1. Switched-capacitor circuit techniques and realization– SC amplifier and SC integrator

2. Review of topics in sampled-data signal processing3. Sample-and-hold amplifier (SHA)4. Nyquist-rate data converters

– Flash, algorithmic/cyclic, SAR, pipeline, subranging, etc.

5. Oversampled data converters– Single-loop, MASH, multi-bit, continuous-time, etc.

6. Precision techniques for data conversion7. Digital calibration, digital assistance, and digital post-processing8. Data converter testing and benchmarks9. Technology trend and figure-of-merit (FoM)10. Advanced topics (if time allows)

Lecture Notes & Textbook

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

• Textbook: No required textbook. Lecture notes, slides, and papers will be posted on the course website.

• References– Analog circuit design

• Gray, et al., Analysis and Design of Analog Integrated Circuits, 4th Ed., Wiley, 2001• Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001• Johns and Martin, Analog Integrated Circuit Design, Wiley, 1997• Allen and Holberg, CMOS Analog Circuit Design, 2nd Ed., Oxford, 2002

– Data converters• Razavi, Principles of Data Conversion System Design, IEEE Press, 1995• van de Plassche, CMOS Integrated Analog-to-Digital and Digital-to-Analog

Converters, 2nd Ed., Kluwer, 2003• Norsworthy et al., Delta-Sigma Data Converters: Theory, Design, and Simulation,

Wiley, 1996– Switched-capacitor circuits

• Gregorian and Temes, Analog MOS Integrated Circuits for Signal Processing, Wiley, 1986

CAD Tools

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

• CAD Tools required:– SpectreRF

SPICE-type analyses: .dc, .ac, .xf, .noise, .tran, etc.

Additional capabilities: pss, pac, pxf, pnoise, pdisto to analyze large-signal nonlinear circuits (e.g., switched-capacitor circuits, RF circuits)

– MATLAB, SimulinkMixed-domain behavioral modeling, analog/digital filter synthesis, etc.

• CAD Tools recommended:– Cadence GUI suite (awd, ocean, icfb, msfb, icde, icms, etc.) for design

entry, simulation, waveform display, etc.

Projects, Exam, and Grading

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

• A series of three phases of a nearly semester-long term project to build a

X-bit, Y-MS/s Z-type CMOS ADC…

• Midterm exam: 30% (TBA)• Term Project: 70%

– Phase I: 20% (assigned in 4th week)– Phase 2: 20% (assigned in 7th week)– Phase 3: 30% (assigned in 10th week)

• Project presentation: 5% (in class, last day of instruction)

• Grading Policy: Projects are to be completed by two-student groups, with each group submitting a joint report (and SPICE decks) in each phase. Grading in each phase will be independent, i.e., based on phase-specific goals and specifications.

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

Why This Course?

Isn’t Digital Great Enough?

Advantages of Digital VLSI

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

• Noise immunity, robustness

• Unlimited precision or accuracy

• Flexibility, programmability, and scalability

• Electronic design automation (EDA) tools widely available and successful

• Benefiting from Moore’s law – “The number of transistors on a chip doubles every 18 months,” IEDM, 1975– Cost/function drops 29% every year– That’s 30X in 10 years

Moore’s Law

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

2004 International Technology Roadmap of Semiconductor (http://www.itrs.net/)

1

10

100

1000

1996 2000 2004 2008 2012 2016 2020

Production year

Ga

te le

ng

th [

nm

]

100

1000

10000

Tra

ns

itio

n f

req

. [G

Hz]

HP-MPU printed gate length

NMOS peak transition frequency

Moore’s Law

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

“If GM had kept up with technology like the computer industry has, we would all be driving $25 cars that got 1,000 miles to the gallon…”

– Bill Gates, COMDEX keynote

TechnologyScaling

Just Digital is far from enough…

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

Mechanical Transducers(Car/Airplane Sensors,

MEMS, Nanopore)

Video(Dig. Camera, LCD TV,

TFT Display)

Digital Storage(DVD, Hard Disk, Flash)

Phone Lines, Cables(DSL, Cable Modem)

E&M Waves(Cellphone, Radio,

GPS)

Audio(MP3, Hearing Aid)

Digital World(DT, DA)

Analog World(CT, CA)

Biochemical Sensors(Hazard detection, Drug Delivery, Lab-on-a-Chip)

Paul Gray’s eggshell diagram

Challenges for Analog

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

• Sensitive to noise – SNR (signal-to-noise ratio)

• Subject to device nonlinearities – THD (total harmonic distortion)

• Sensitive to device mismatch and process variations

• Difficult to design, simulate, layout, test, and debug

• Inevitable, often limits the overall system performance/cost

• Scaling scenario outlook– High-speed, low-resolution applications benefit– High SNR design difficult to scale with low supply voltages

Example 1 – Mixed-Signal Hearing Aid

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

0.50.10.010.001

Normalized frequency

0

-150

-50

-100

[dB

]

ΣΔA/D

DSP

AGC Decimation

Filter

ΣΔD/A

H-BridgeDriver

Example 2 – PRML Read Channel

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

A/D Viterbi

LPFPreamp

ClockRecovery

01011

AdaptiveEqualizer

D D D…

Samplevalue 0 1 1 0

PR4

Example 3 – RF Transceiver

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Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

A/D

DSP

AAF SCF, GmC

OP-RC

D/A

LNA

PA

I Q

LO

I Q

LO

A

B C

DesirableChannel

A

RF

B

IF or BB BB

C

Example 3 – RF Transceiver

– 17 –

Data Converters IntroductionProfessor Y. Chiu

EECT 7327Fall 2014

CMOS? orsomething else?

Eric

sson

CH

388

(Hyb

rid,

199

5)

Eric

sson

Blu

etoo

th(C

MO

S,

2001

)B

erkä

na G

SM

/GP

RS

(CM

OS

, 20

05)

AD

Past Present

Future

• Small form factor, high integration, more functions, low power• Market/economy is the ultimate driving force