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Project 3PFC Rectifier Design

LS

1

1+RCS

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LV

LI OI

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EECS 267B: Industrial & Power Electronics,Spring 2005

Professor K. Smedley

Marc Davis-Marsh studentEthan Matthes student

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TABLE OF CONTENTS

Problem Statement .......................................................................................................................... 3

Requirement 1 Chip Information .............................................................................................. 4

Datasheet........................................................................................................................................... 4

Requirement Confirmation ............................................................................................................... 4

Requirement 2 Open Loop Design........................................................................................... 6

Calculations....................................................................................................................................... 6

Open-loop Simulations ..................................................................................................................... 8

Total Harmonic Distortion (THD) & Power Factor (PF) ............................................................. 9

Requirement 3 Closed-loop Design ....................................................................................... 10

Large-signal Switching Flow Graph............................................................................................... 10

PI Controller.................................................................................................................................... 10

Simulation and Analysis ................................................................................................................. 11

Boundary Checks ........................................................................................................................ 11

Typical Input Voltages................................................................................................................ 12

Step Response to Load Change................................................................................................... 14

Requirement 4 Documentation ............................................................................................... 15

Schematic........................................................................................................................................ 15

Bill of Material (BOM)................................................................................................................... 16

Conclusion....................................................................................................................................... 17

Appendix .......................................................................................................................................... 18

Open-loop Matlab code................................................................................................................... 18

Closed-loop Matlab Code ............................................................................................................... 19

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Problem Statement

Requirement 1 Chip InformationFind the IR new IC chip information for PFC from the web. Document your findings.

Requirement 2 Open-loop DesignUse the above information to perform open loop design a rectifier with the following designspecifications:

Ac line range 85-264V Switching frequency 130 kHz. Output voltage 377VDC Maximum output power 300W Minimum load required 10% Power factor 0.99 THD

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Requirement 1 Chip InformationFind the IR new IC chip information for PFC from the web. Document your findings.

Datasheet

The new Power Factor Correcting (PFC) IR1150 chips datasheet (No. PD60230) is available online at

the manufacturers web site: http://www.irf.com/product-info/datasheets/data/ir1150.pdf

This new chip, part number IR1150 is available for purchase online through Digikey(www.digikey.com) under catalog number IR1150SCT-ND at unit price $3.45 USD. It appears that thepart is available only in the SOIC-8 package.

Requirement Confirmation

The following pin-out and frequency curve were borrowed from the product datasheet.

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Switching Frequency Range: kHzfkHz S 20050 . Desired: kHz130

A programming resistor of approximately 62k is used to achieve the desired switching frequency.

The next figure also borrowed from the datasheet shows Current Sense DC Gain over temperature range

At room temperature 25C, we can expect a dc gain of approximately 2.53 from the current sensor.

Timing, layout, thermal management, and reliability are beyond the scope of this project.

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Requirement 2 Open Loop DesignUse the above information to perform open loop design of a rectifier with the following design

specifications:

Ac line range 85-264V Switching frequency 130 kHz.

Output voltage 377VDC Maximum output power 300W Minimum load required 10% Power factor 0.99 THD

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Open-loop Simulink Model

All model parameters are specified in the M-file (appendix).

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Open-loop Simulations

We verified that open-loop works for this typical case as well as for the boundary inputs: 85V and 264VMore cases are shown in the closed-loop section.

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Total Harmonic Distortion (THD) & Power Factor (PF)

The above figure shows the FFT of the inductor current. This was used to approximate THD and PF ofthe input current. Harmonics beyond n = 7 are negligible.

Harmonic Power Spectral Density

3 0.028

5 0.013

7 0.0071

%17.30317.0)0071.0()013.0()028.0( 2227

3

2==++== = THDITHD n n

Distortion Factor 9995.01

1

2=

+=

THD

Assuming negligible phase difference between input voltage and input current,

( ) 9995.01

1cos

1

1

22=

+

+=

THDTHDPF , which meets the specification.

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Requirement 3 Closed-loop Design

Large-signal Switching Flow Graph

Use switching flow graph to build a large signal model for the rectifier.

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gV

PI ControllerThe output voltage is regulated at +/- 1% around 377V. Configure a PI controller.

Using the Simulink software, a PI controller was designed with the following transfer function:

+=

ssc

3000160)(

It was determined that the best response was found when the current sensing loop had a gain of

approximately 5% of the output voltage loop gain. This can be implemented using op amps in the

following configuration:

+=

sCRR

Rsc

131

2 11)(

Final component selection can be found in the Bill of Materials

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Simulation and Analysis

Simulate the circuit. Show the waveform of the input voltage and current, output voltage and current for

110V ac input and 220V ac input. Show transient for load step response from 10%-100% and vice

versa.

Closed-loop Simulink Model

All model parameters are specified in the M-file (appendix).

Boundary Checks

The above two figures show the steady-state output voltage corresponding to the lower and upper inputvoltage (Vg) limits. This shows ripple specifications are met.

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Typical Input Voltages

Vg = 110Vrms

Input Voltage, Vg = 110Vrms Input Current, ig

The figure above-right shows there are no current spikes. However, keep in mind this figure actuallyshows inductor and not input current directly.

Output Voltage corresponding to 110Vrms input Output Current corresponding to 110Vrms input

The above-left figure shows that output voltage is regulated within +/- 1% of the target,V = 377V.

The above-right figure shows the output current.

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Vg = 220Vrms

Input Voltage, Vg = 220Vrms Input Current, ig

The figure above-right shows there are no current spikes. However, keep in mind this figure actuallyshows inductor and not input current directly. We note the closed-loop ig is more sinusoidal with lessripple.

Output Voltage corresponding to 220Vrms input Output Current corresponding to 220Vrms input

The above-left figure shows that after higher overshoot (and faster settling time), the outputvoltage is regulated within +/- 1% of the target, V = 377V.

The above-right figure shows the output current. The closed-loop output current looks moreregular.

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Step Response to Load Change

At typical value, Vg = 110Vrms

Output voltage: 10% 100% Load Output voltage: 100% 10% Load

Above-left: As the current is increased with the step load change, the output voltage drops, but thencorrects within 0.05 seconds. However, voltage ripple is increased.

Above-right: As the current is decreased with the step load change, the output voltage raises, but thencorrects within 0.05 seconds. However, voltage ripple is decreased.

At typical value, Vg

= 220Vrms

Output voltage: 10% 100% Load Output voltage: 100% 10% Load

The output voltage responds similarly to the 110Vrms case.

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Requirement 4 DocumentationDraw complete schematics. Provide a complete BOM (bill of materials).

Schematic

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Bill of Material (BOM)

Location Description Package QTY Digikey number

Power Stage

U3 OCC PFC Chip SOIC-8 1 IR1150SCT-ND

R1 62K Resistor (timing) SMD 1 311-62KFDKR-ND

Q1 HEX/MOS NCH 800V4.1A LEFT D2PAK

D2PAK 1 IRFBE30STRL-ND

D2 DIODE HYPERFAST600V 8A D2PAK

D2PAK 1 8ETX06S-ND

C1 CAPACITOR 330UF500V ELECT TSUP

Radial 1 P7459-ND

Rsense Current Sense Resistor,0.10, 3W

Thru Hole 1 13FR100-ND

R14 Current Sense Resistor,100, 1/4W 1206

SMD 1 311-100FCT-ND

C4 Current Sense Capacitor,

1000pF, 50V 1206

SMD 1 PCC102BCT-ND

R12 2.7 Resistor SMD 1 311-2.70FCT-ND

D1 RECT BRIDGE GPP600V 8A GBU

Thru Hole 1 GBU806DI-ND

Magnetic Parts for Inductor L1

Core OP42213-UG core 1

Bobbin B-2213 bobbin 1

Clamp PC-2213 clamp 1

22 AWG winding wire wire enough

PI Control Section

R3 71.5K Resistor SMD 1 311-71.5KFDKR-ND

R8 62K Resistor SMD 1 311-62KFDKR-NDR6,R7,R2 1K Resistor SMD 1 311-1KFDKR-ND

C2 4700 pF Capacitor 0402 1 311-1039-1-ND

U1,U2 Quad Opamp SOIC-14 1 MAX4020ESD-ND

Feedback Network

Rf1 RES 1.00M OHM 1/4W1% 1206 SMD

SMD 1 311-1.00MFCT-ND

Rf2 RES 10.0K OHM 1/4W1% 1206 SMD

SMD 1 311-10.0KFRCT-ND

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ConclusionThe design of a boost converter with an output voltage of 377 volts that performed power factorcorrection was completed using Matlab as a design tool. All design specifications were satisfied.

The converter was studied in both open-loop and closed-loop configurations. It performed within

specifications at both the boundary conditions and at the typical input voltages of 110 and 220 VRMS.The output voltage ripple was smaller with the closed-loop design, and didnt require direct control ofthe duty cycle. The reduction in ripple is due in part to the performance of the designed PI controller.

The entire control circuit was implemented with very few parts due to the inclusion of the OCC PFCchip from International Rectifier. The results of our simulations included some simplifications. Thesesimplifications include the assumption of zero phase shift between the input current and voltage. Ourproject also excluded thermal management, component parasitic factors, over-voltage and currentprotection circuits, and PCB layout. With this in mind the design is still quite functional and couldeasily be extended to include these factors.

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Appendix

Open-loop Matlab code% param_open.m

clear all;

clc;

%Boost Parameters

Vg = 200;

R = 473;

C = 330e-6;

L = 2.23e-3;

Rs = .05;

% Control Parameters

Pcon = 60; % proportional control

Pcon2 = Pcon*.05; % P control for ig loop

Icon = 3000; % Integral control constant

Dcon = 0; % No derivative control

% Simulate Boost Model

sim('U:\Power\Boost\Matlab_Sims\boost_pfc_open.mdl')

%Plot Output Respose

figure(1)

plot(t,Vout)

% Plot Duty Cycle

figure(2)

plot(t,io)

% Plot Duty Cycle

%figure(3)

%plot(t,d)

%Last Value

[w,l]=size(Vout);

Vout(w)

% Plot Power

figure(4)

plot(t,vin.*igrs)

% Plot FFT Stuff

figure(5)% Solve FFT and take 256 Samples

Y = fft(Vout,256);

% Remove first Component which is just the sum of all the other components

Y(1)=[];

%The complex magnitude squared of Y is called the power,

% and a plot of power versus frequency is a "periodogram".

m=length(igrs);

n=length(Y);

% Determine the "power" associated with the signal

power = Y.*conj(Y)/256;

% Determine your frequencies to plot with

% M is the number of samples of the initial signal

% N is the number of samples in the transformed signal

% (0:127) is a vector with half the number of samples than the FFT

% Since the negative half of the fft mirrors the positive half

f = (2*pi*m)/(n)*(0:127);

plot(f,power(1:128))

title('Power spectral density')

xlabel('Frequency (Hz)')

%Plot Vin and Ig on the same plot

%w=length(vin);

%figure(6)

%plot(t(w/2:w),vin(w/2:w))

%hold on;

%plot(t(w/2:w),igrs(w/2:w))

%hold off;

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Closed-loop Matlab Code% param_step.m

clc;

clear all;

%Boost Parameters

Vg = 200;

R = 473;

C = 330e-6;L = 2.23e-3;

Rs = .1;

% Control Parameters

Pcon = 60; % proportional control

Pcon2 = Pcon*.5; % P control for ig loop

Icon = 3000; % Integral control constant

Dcon = 0; % No derivative control

% Simulate Boost Model

sim('U:\Power\Boost\Matlab_Sims\boost_pfc_step.mdl')

%Plot Output Respose

figure(1)

plot(t,Vout)

% Plot Duty Cycle

figure(2)

plot(t,io)% Plot Duty Cycle

%figure(3)

%plot(t,d)

%Last Value

[w,l]=size(Vout);

Vout(w)

% Plot Power

%figure(4)

%plot(t,vin.*igrs)

% Plot FFT Stuff

%figure(5)

% Solve FFT and take 256 Samples

Y = fft(Vout,256);

% Remove first Component which is just the sum of all the other components

Y(1)=[];

%The complex magnitude squared of Y is called the power,

% and a plot of power versus frequency is a "periodogram".

m=length(igrs);

n=length(Y);

% Determine the "power" associated with the signal

power = Y.*conj(Y)/256;

% Determine your frequencies to plot with

% M is the number of samples of the initial signal

% N is the number of samples in the transformed signal

% (0:127) is a vector with half the number of samples than the FFT

% Since the negative half of the fft mirrors the positive half

f = (2*pi*m)/(n)*(0:127);

%plot(f,power(1:128))

%title('Power spectral density')

%xlabel('Frequency (Hz)')

%Plot Vin and Ig on the same plot

%w=length(vin);

%figure(6)

%plot(t(w/2:w),vin(w/2:w))

%hold on;

%plot(t(w/2:w),igrs(w/2:w))

%hold off;