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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 1
EE247Lecture 12
• Administrative issues§ Midterm exam Oct. 20th
o You can only bring one 8x11 paper with your own written notes (please do not copy)
o No books, class or any other kind of handouts/notes, calculators, computers, PDA, cell phones....
o Midterm includes material covered to end of lecture 14
– EE247 final exam date has changed to: December 13th, 12:30-3:30 pm (group 2)- please check your other class finals to ensure no conflict
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 2
EE247Lecture 12
Today:– Summary switched-capacitor filters– Comparison of various filter
topologies– Data converters
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 3
SC Filter Summary
ü Pole and zero frequencies proportional to – Sampling frequency fs– Capacitor ratiosØ High accuracy and stability in responseØ Long time constants realizable without large R, C
ü Compatible with transconductance amplifiers– Reduced circuit complexity, power dissipation
ü Amplifier bandwidth requirements less stringent compared to CT filters (low frequencies only)
L Issue: Sampled-data filters à require anti-aliasing prefiltering
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 4
SummaryFilter Performance versus Filter Topology
_
1-5%
1-5%
1-5%
1-5%
Freq. tolerance+ tuning
<<1%40-90dB~ 10MHzSwitched Capacitor
+-40-60%40-70dB~ 100MHzGm-C
+-30-50%50-90dB~ 5MHzOpamp-MOSFET-RC
+-30-50%40-60dB~ 5MHzOpamp-MOSFET-C
+-30-50%60-90dB~10MHzOpamp-RC
Freq. tolerance w/o tuning
SNDRMax. Usable Bandwidth
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 5
Data Converters
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 6
Material Covered in EE247ü Filters
– Continuous-time filters• Biquads & ladder type filters• Opamp-RC, Opamp-MOSFET-C, gm-C filters• Automatic frequency tuning
– Switched capacitor (SC) filters• Data Converters
– D/A converter architectures– A/D converter
• Nyquist rate ADC- Flash, Pipeline ADCs,….• Oversampled converters• Self-calibration techniques
• Systems utilizing analog/digital interfaces– Wireline communication systems- ISDN, XDSL…– Wireless communication systems- Wireless LAN, Cellular
telephone,…– Disk drive electronics– Fiber-optics systems
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 7
Data Converter Topics• Basic Operation of Data Converters
– Uniform sampling and reconstruction
– Uniform amplitude quantization
• Characterization and Testing
• Common ADC/DAC Architectures
• Selected Topics in Converter Design– Practical Implementations
– Desensitization to Analog Circuit Non-Idealities
• Figures of Merit and Performance Trends
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 8
Suggested Reference Texts• R. v. d. Plassche, CMOS Integrated Analog-to-Digital and
Digital-to-Analog Converters, 2nd ed., Kluwer, 2003.
• B. Razavi, Data Conversion System Design, IEEE Press, 1995.
• S. Norsworthy et al (eds), Delta-Sigma Data Converters, IEEE Press, 1997.Extensive treatment of oversampled converters including stability, tones, bandpass converters.
• J. G. Proakis, D. G. Manolakis, Digital Signal Processing, Prentice Hall, 1995.
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 9
Converter Applications
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 10
Example: Typical Cell PhoneContains in integrated form:• 4 Rx filters• 4 Tx filters
• 4 Rx ADCs• 4 Tx DACs• 3 Auxiliary ADCs• 8 Auxiliary DACs
Total: Filters à 8
ADCs à 7
DACs à 12
Dual Standard, I/Q
Audio, Tx/Rx powercontrol, Battery chargecontrol, display, ...
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 11
Data Converter Basics
• DSP is wonderful, but...• Real world signals are analog:
– Continuous time– Continuous amplitude
• DSP can only process:– Discrete time– Discrete amplitudeà Need for data conversion from
analog to digital and digital to analog
Analog Postprocessing
D/AConversion
DSP
A/D Conversion
Analog Preprocessing
Analog Input
Analog Output
000...001...
110
Filters
Filters
?
?
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 12
A/D & D/A ConversionA/D Conversion
D/A Conversion
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Data Converters
• Stand alone data converters– Used in variety of systems
– Example: Analog Devices AD9235 12bit/ 65Ms/s ADC- Applications:
• Ultrasound equipment
• IF sampling in wireless receivers
• Hand-held scopemeters
• Low cost digital oscilloscopes
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 14
Data Converters• Embedded data converters
– Cost, reliability, and performance à integration of data conversion interfaces along with DSPs
– Main challenges• Feasibility of integrating sensitive analog functions in
technologies optimized for digital performance
• Down scaling of supply voltage
• Interference & spurious signal pick-up from on-chip digital circuitry
• Portable applications dictate low power consumption
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 15
D/A Converter Transfer Characteristics
• For an ideal digital-to-analog converter with uniform, binary digital encoding & a unipolar output range from 0 to VFS
N N
0 FSi 1 i 1
N ii
biV V bi 2 , bi 0 or 1
2= =
−= = ∆ × =∑ ∑D/A
……..…b1 b2 b3 bn
V0
( )0 FS
FS N
Note:V Vbi 1,a l l i1
1V2
= −∆= −=
MSB LSB
( )0 2 1 0
Example:N 3
V b1.2 b2.2 b3.2
=
= ∆ + +FS
FSN
where N # of bitsV ful l scale output
LSB step sizeV
2
==
∆ =
∆ =
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 16
Ideal D/A Transfer Characteristic• Ideal DAC
introduces no error!
• One-to-one mapping from input to output
001 010 011 100 101 110 111
Step Height (1LSB=∆)
Ideal Response
Digital InputCode
Analog Output
VFS
VFS /2
VFS /8
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 17
A/D Converter Transfer Characteristic
• For an ideal analog-to-digital converter with uniform, binary digital encoding & a unipolar input range for 0 to VFS
……..…b1 b2 b3 bm
Vin
( ) FS
FS m
Note:D Vbi 1,a l l i1
1V2
→ −∆= −→
MSB LSB
A/D
FS
FSm
where m # of bitsV ful l scale output
s tep sizeV
2
==
∆ =
∆ =
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 18
Ideal A/D Transfer Characteristic• Ideal ADC
introduces error àmax error =
(+ -1/2∆)
∆= VFS /2m
m= # of bits
• This error is called ``quantization error``
111
110
101
100
011
010
001
000
1LSB
Digital Output
Analog input
∆ 2∆ 3∆ 4∆ 5∆ 6∆ 7∆
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 19
Data Converter Performance Metrics• Data Converters are typically characterized by static, time-domain,
& frequency domain performance metrics :– Static
• Monotonicity• Offset• Full-scale error• Differential nonlinearity (DNL)• Integral nonlinearity (INL)
– Dynamic• Delay, settling time• Aperture uncertainty• Distortion- harmonic content• Signal-to-noise ratio (SNR), Signal-to-(noise+distortion) ratio (SNDR)• Idle channel noise• Dynamic range & spurious-free dynamic range (SFDR)
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 20
What is a discrete time signal?
qA signal that changes only at discrete time instances?
qA continous time signal multiplied with a train of infinitely narrow unit pulses?
qA vector whose element indices correspond to discrete instances in time?
qAll of the above?
[1.2 2.0 2.5 0.1 ...]
time
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 21
Discrete Time Signals• A sequence of numbers (or vector) with
discrete index time instants• Intermediate signal values not defined
(not the same as equal to zero!)• Mathematically convenient, non-physical• We will use the term "sampled data" for
related signals that occur in real, physical interface circuits
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 22
Typical Sampling ProcessCT ⇒ SD ⇒ DT
ContinuousTime
Sampled Data(e.g. T/H signal)
Clock
Discrete Time
time
PhysicalSignals
"MemoryContent"
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 23
Uniform Sampling
• Samples spaced T seconds in time
• Sampling Period T ⇔ Sampling Frequency fs=1/T
• Problem: Multiple continuous time signals can yield exactly the same discrete time signal (aliasing)
y(kT)=y(k)
t= 1T 2T 3T 4T 5T 6T ...k= 1 2 3 4 5 6 ...
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 24
SummaryData Converters
• ADC/DACs need to sample/reconstruct to convert from continuous time to discrete time signals and back
• We distinguish between purely mathematical discrete time signals and "sampled data signals" that carry information in actual circuits
• Question: How do we ensure that sampling/reconstruction fully preserve information?
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 25
Aliasing
• The frequencies fx and Nfs ± fx, N integer, are indistinguishable in the discrete time domain
• Undesired frequency interaction and translation due to sampling is called aliasing
• If aliasing occurs, no signal processing operation downstream of the sampling process can recover the original continuous time signal!
• Let's look at this in the frequency domain...
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 26
Sampling Sine Waves
fs = 1/T
y(nT) time
Time domain
fs … f
Am
plitu
de
fin 2fs
fs - fin fs + fin
Vol
tage
Frequency domain
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 27
Frequency Domain Interpretation
fs …….. f
Am
plitu
de
fin 2fs
Am
plitu
de
f/fs
Signal scenariobefore sampling
Signal scenarioafter sampling à DT
àSignals @nfS ± fmax__signal fold back into band of interestàAliasing
fs /2
0.5
ContinuousTime
DiscreteTime
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 28
Brick Wall Anti-Aliasing Filter
ContinuousTime
DiscreteTime
0 fs 2fs ... f
Amplitude
0 0.5 f/fs
Filter
Sampling at Nyquist rate (fs=2fsignal) à required brick-wall anti-aliasing filters
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 29
How to Avoid Aliasing
• Must obey sampling theorem:fmax_Signal < fs/2
• Two possibilities:1. Sample fast enough to cover all spectral
components, including "parasitic" ones outside band of interest
2. Limit fmax_Signal through filtering
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 30
How to Avoid Aliasing
fs_old …….. f
Am
plitu
de
fin 2fs_old
Frequency domain
fs f
Am
plitu
de
fin 2fs
Frequency domain
1- Push sampling frequency to x2 of the highest freq. à Oversampled converters almost!
2- Pre-filter signal to eliminate signals above 1/2 sampling frequency- then sample
fs /2
fs_new
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 31
Practical Anti-Aliasing Filter
• Practical filter: Nonzero "transition band"• In order to make this work, we need to
sample faster than 2x the signal bandwidth• "Oversampling"
ContinuousTime
0 fs 2fs ... f
Amplitude Filter
fs/2
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 32
Practical Anti-Aliasing Filter
ContinuousTime
DiscreteTime
0 fs ... f
DesiredSignal
0 0.5 f/fs
fs/2B fs-B
ParasiticTone
B/fs
Attenuation
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 33
Data ConverterClassification
• fs > 2fmax Nyquist Sampling– "Nyquist Converters"– Actually always slightly oversampled
• fs >> 2fmax Oversampling– "Oversampled Converters"– Anti alias filtering is often trivial– Oversampling is also used to reduce quantization noise, see
later in the course...
• fs < 2fmax Undersampling (sub-sampling)
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 34
Sub-Sampling
• Sub-sampling à sampling at a rate less than Nyquist rate à aliasing• For signals centered @ an intermediate frequency à Not destructive!• Sub-sampling can be exploited to mix a narrowband RF or IF signal down to
lower frequencies
ContinuousTime
DiscreteTime
0 fs ... f
Amplitude
0 0.5 f/fs
BP Filter
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 35
Where Are We Now?
• We now know how to preserve signal information in CTàDT transition
• How do we go back from DTà CT?
Analog Postprocessing
D/AConversion
DSP
A/D Conversion
Analog Preprocessing
Analog Input
Analog Output
000...001...
110
Anti-AliasingFilter
?
Sampling(+Quantization)
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 36
Ideal Reconstruction
• Unfortunately not all that practical...
∑∞
−∞=
−⋅=k
kTtgkxtx )()()(Bt
Bttg
ππ
2)2sin(
)( =
• The DSP books tell us:
⇒x(k) x(t)
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 37
Zero-Order Hold Reconstruction• How about just creating
a staircase, i.e. hold each discrete time value until new information becomes available
• What does this do the frequency content of the signal?
• Let's analyze this in two steps...0 1 2 3
x 10-5
-1
-0.6
-0.2
0.2
1
Time
Am
plit
ud
e
sampled dataafter ZOH
0.6
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 38
1) DTà CT: Infinite Zero Padding
DT sequence
f/fs
Time Domain Frequency Domain
......
0.5
Zero paddedDT sequence
......
f/fs0.5/i 1.5/i 2.5/i
InfiniteInterpolation:CT Signal!
......
f0.5fs 1.5fs 2.5fs
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 39
2) Effect of Hold Pulse
• Using the Fourier transform of a rectangular impulse we get:
......
Tp
Ts
p
p
s
p
fT
fT
T
TfH
π
π )sin()( =
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 40
Hold Pulse Tp=Ts
0 0.5 1 1.5 2 2.5 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
f/fs
abs(
H(f)
)
p
p
s
p
fT
fT
T
TfH
π
π )sin(|)(| =
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 41
Hold Pulse Tp=0.5Ts
0 0.5 1 1.5 2 2.5 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
f/fs
abs(
H(f)
)p
p
s
p
fT
fT
T
TfH
π
π )sin(|)(| =
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 42
ZOH Spectral DistortionContinuous Time
Pulse Train Spectrum
ZOH Transfer Function
("Sinc Distortion")
ZOH output, Spectrum of
Staircase Approximation
f/fs
0 0.5 1 1.5 2 2.5 30
0.5
1
0 0.5 1 1.5 2 2.5 30
0.5
1
0 0.5 1 1.5 2 2.5 30
0.5
1
X(k)
ZOH
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 43
Smoothing FilterAgain:• A brick wall
filter would be nice
• Oversampling helps to reduce filter order
f/fs
0 0.5 1 1.5 2 2.5 30
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 44
Summary
• Sampling theorem fs > 2fmax, usually dictates anti-aliasing filter
• If theorem is met, CT signal can be recovered from DT without loss of information
• ZOH and smoothing filter reconstruct CT from DT signal
• Oversampling helps reduce order & complexity of anti-aliasing & smoothing filters
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 45
Next Topic
• Done with "Quantization in time"
• Next: Quantization in amplitude
Analog Postprocessing
D/AConversion
DSP
A/D Conversion
Analog Preprocessing
Analog Input
Analog Output
000...001...
110
Anti-AliasingFilter
Sampling(+Quantization)
SmoothingFilter
D/A+ZOH
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 46
AmplitudeQuantization
• Amplitude quantizationà quantization “noise”
• Static ADC/DAC performance measures– Offset– Gain– INL– DNL
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Ideal ADC ("Quantizer")• Quantization step ∆ (= 1 LSB)
• E.g. N = 3 Bits
• Full-scale input range:-0.5∆ … (2N-0.5)∆
• Quantization error:bounded by –∆/2 … +∆/2for inputs within full-scale range
+
εq (Vin )
Vin Dout
ADC Model
-1 0 1 2 3 4 5 6 7 8
0
1
2
3
4
5
6
7
Dig
ital O
utpu
t Cod
e
A/D Characteristics [1]
ADC characteristicsideal converter
-1 0 1 2 3 4 5 6 7 8-1
-0.5
0
0.5
1
Qua
ntiz
atio
n er
ror
[LS
B]
ADC Input Voltage [1/∆]
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 48
Quantization Error PDF
• Uniformly distributed from –∆/2 … +∆/2 provided that– Busy input– Amplitude is many LSBs– No overload
• Not Gaussian!
• Zero mean• Variance
• Spectral density white if the joint pdf of the input at different sample times is smooth
Ref: W. R. Bennett, “Spectra of quantized signals,” Bell Syst. Tech. J., vol. 27, pp. 446-72, July 1988.
B. Widrow, “A study of rough amplitude quantization by means of Nyquist sampling theory,” IRE Trans. Circuit Theory, vol. CT-3, pp. 266-76, 1956.
-∆/2
Pdf
error
1/∆
+∆/2
2 22
/ 2
/ 2
ee de
12
+∆
−∆
∆= =
∆∫
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 49
Signal-to-Quantization Noise Ratio• If certain conditions are met (!) the quantization error can be
viewed as being "random", and is often referred to as “noise”• In this case, we can define a peak “signal-to-quantization noise
ratio”, SQNR, for sinusoidal inputs:
• Actual converters do not quite achieve this performance due to other errors, including
– Electronic noise– Deviations from the ideal quantization levels
2N
2N2
1 2
2 2SQNR 1.5 2
12
6.02N 1.76 dB Accurate for N>3
∆ = = ×
∆
= +
e.g. N SQNR8 50 dB
12 74 dB16 98 dB20 122 dB
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 50
Static, Ideal Macro Models
ADC
+DoutVin
εq
DAC
VoutDin
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 51
Cascade of Data Converters
ADC
+Vin
εq
DAC
Vout
ADC
+εq
DAC
DoutDin
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 52
Static Converter Errors
Deviations of characteristic from ideal– Offset– Full scale error– Differential nonlinearity, DNL– Integral nonlinearity, INL
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 53
Offset ErrorADC DAC
Ref: “Understanding Data Converters,” Texas Instruments Application Report SLAA013, Mixed-Signal Products, 1995.
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 54
Full Scale ErrorADC DAC
Actual full scale point
Ideal full scale point Ideal full scale
point
Full scale error
Actual full scale
point
Full scale error
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 55
Offset and Full Scale Errors
• Alternative specification in % Full Scale = 100% * (LSB value)/ 2N
• Gain error can be extracted from offset & full scale error
• Non-trivial to build a converter with extremely good gain/offset specs
• Typically gain/offset is most easily compensated by the digital pre/post-processor
• More interesting: Linearity àDNL, INL
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 56
Offset and Full-Scale Error
-1 0 1 2 3 4 5 6 7 8
0
1
2
3
4
5
6
7
Dig
ital
Ou
tpu
t C
od
e
ADC Input Voltage [LSB]
ADC characteristicsideal converter
Offset error
Full-scale error
Note:à For further
measurements (DNL, INL) connecting the endpoints & deriving ideal codes based on the non-ideal endpoints elliminates offset and full-scale error
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 57
-1 0 1 2 3 4 5 6 7 8 9
0
1
2
3
4
5
6
7
8
ADC characteristicsideal converter
ADC Differential Nonlinearity
DNL = deviation of code width from
∆ (1LSB)
+0.4 LSB DNL error
-0.4 LSB DNL error
à Endpoints connected
à Ideal characteriscticsderived
à DNL measured
0 LSB DNL error
Dig
ital
Ou
tpu
t C
od
e
ADC Input Voltage [∆]
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 58
-1 0 1 2 3 4 5 6 7 8 9
0
1
2
3
4
5
6
7
8
ADC characteristicsideal converter
ADC Differential NonlinearityExamples
-1 0 1 2 3 4 5 6 7 8 9
0
1
2
3
4
5
6
7
8
ADC characteristicsideal converter
Non-monotonic(> 1 LSB DNL)
Missing code(+0.5/-1 LSB DNL)
Dig
ital
Ou
tpu
t C
od
e
ADC Input Voltage [∆]
Dig
ital
Ou
tpu
t C
od
e
ADC Input Voltage [∆]
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 59
DAC Differential Nonlinearity
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 60
Impact of DNL on Performance
• Same as a somewhat larger quantization error, consequently degrades SQNR
• How much – later in the course...• People sometimes speak of "DNL
noise", i.e. "additional quantization noise due to DNL"
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 61
ADC Integral Nonlinearity
• A straight line through the endpoints is usually used as reference,i.e. offset and full scale errors are ignored in INL calculation
• Ideal converter steps is found for the endpoint line, then INL is measured
• Note that INL errors can be much larger than DNL errors and vice-versa
-1 LSB INL
-1 0 1 2 3 4 5 6 7 8
0
1
2
3
4
5
6
7
Dig
ital
Ou
tpu
t C
od
e
ADC Input Voltage [∆]
INL = deviation of code transition from its ideal location
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 62
DAC Integral Nonlinearity
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 63
DAC DNL and INL
* Ref: “Understanding Data Converters,” Texas Instruments Application Report SLAA013, Mixed-Signal Products, 1995.
EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 64
Example: INL & DNL
Large INL & Small DNL Large DNL & Small INL
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EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 65
Monotonicity• Monotonicity guaranteed if
| INL | = 0.5 LSBThe best fit straight line is taken as the reference for determining the INL.
• This implies| DNL | = 1 LSB
• Note: these conditions are sufficient but not necessary for monotonicity