8/10/2019 EDN 01 2013.pdf http://slidepdf.com/reader/full/edn-01-2013pdf 1/72 Tales from the Cube Pg 66 EDN.comment: Mind of the Engineer Pg 10 Teardown: Noise-canceling headphones Pg 24 Design Ideas Pg 51 Stability at last for the DRAM market? Pg 60 Entry- level scopes from TekPage 14 Detecting and distinguishing cardiac- pacing artifacts Page 31 Why your 4.7-µF ceramic cap becomes a 0.33-µF cap Page 47 JAN 2013 www.edn.com Issue 1 Page 38 SIGNAL- INTEGRITYISSUES ON THE RISE
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JOIN THE CONVERSATIONComments, thoughts, and opinions shared by EDN’ s community
In response to “Next round: GaN versus Si,” a post in theDave’s Power Trips blog at www.edn.com/4403311,UncommonTruthinesscommented:
“The battleground will be substrate price. At ~$5,000 for a 150-mm
GaN/Si substrate and $3,000 for a 100-mm SiC substrate + epi, itwill take a very special device to command an ASP [average selling price]that will yield a return on that direct cost. This motivates a market segmentdominated by military, aerospace, and perhaps medical applications. Vertical integration in the manufacturing of GaN/Si at the device manufacturer can reduce that cost by perhaps as much as 10 times, which would improve available market opportunities. I don’t see such a cost-reduction opportunityfor SiC, which could be a major limiter for SiC materials’ ability to addresscommodity markets.”
In response to “RF DACs simplify power and spacein downstream cable transmitter systems,” an article
by Daniel E Fague and Sara Nadeau at www.edn.com/4403455, WKetel commented:
“Perhaps it may seem to be of a more ‘luddite’ orientation, but perhaps we really don’t need all of these additional broadband functions. Just possibly there should be some technical limitation on the amount of advertising that can be carried at any given instant. Of course, the ultrahigh performance of the newest RF DAC is quite impressive, but we may actually be better off without it. Just because we can does not mean that we should.”
EDN invites all of its readers to comment constructively and creatively
on our content. You’ll find the opportunity to do so at the bottom of each
article and blog post.
CONTENTCan’t-miss content on EDN.com
THE CONNECTED CARAS A PLATFORM
When people think of the connected
car, they think of a car that hooks
to the cloud. The reality is that the
car itself is a connected platform
that enables multiple protocols to
talk together and connects to thecloud through the occupant’s mobile
cellular service and hardware.
www.edn.com/4403736
MATHEMATICS OF SOUND Almost every sound we hear
comprises rich
harmonics—
overtones that
we may not
notice, but that
are essential in
producing the
timbre and the meaning of sound—
and math fits into all of it.
www.edn.com/4403822
ACE AWARDS NOMINATIONS NOW OPEN
Get ready to shine! EDN and EE Times have opened the call for nominations for the 2013 ACE Awards competition, in which we’ll honor the people and technologies that have made adifference in the electronics industry in the last year. To claim your share of the glory or give athumbs-up to someone else’s work, make your nominations for the ACE Awards before Feb 1,2013, here: http://ubm-ace.com.
It’s all very intriguing—after all, weall love to hear about ourselves—but is
this really the mind of the engineer? Iwonder about that.
A while back, my son gave me ariddle to solve. I started to ask ques-tions, break it down, define the param-eters and conditions, and generallypester him until he broke down andyelped, “Dad, you’re overanalyzingagain; stop it!”
He was right; I do tend to overana-lyze. That’s why I found the book HowWe Decide, by Jonah Lehrer, so intrigu-
ing. Lehrer is a Rhodes Scholar andall-around smart guy who knows a lotabout how the brain works, yet evenhe admits to having made two wrongdecisions that later got him fired.
Lehrer’s exploration of humandecision-making starts with a look at New England Patriots quarterback TomBrady. Lehrer notes how hard it is tobreak down what Brady does in realtime at clutch moments on the field;during such moments, the subconscioustakes over, and things just happen.
How does that process unfold? Can
it be applied elsewhere? The answer isyes, but it requires the decision-maker
to do something engineers are taughtnot to do.
In his book, Lehrer guides us on ajourney through the writings of Platoto Freud and on to current-day cogni-tive psychology, all of which supportwhat he calls “the privileging of reasonover emotion.” Emotions, these writingstell us, are bad impulses that should becontrolled and suppressed, lest they getin the way of rational thought and gooddecision-making.
But then Lehrer relates the story ofa patient he calls Elliott who lost theability to make a decision after havinga part of his brain removed to excisea tumor. In short, the surgery killedElliott’s ability to “feel,” leaving himcompletely rational yet also completelyunable to make a decision.
Why was that?In engineering school, we’re taught
the importance of rational thinking. Infact, for many engineers, it’s the affinityfor the “rational” that attracts them to
the field in the first place. But Lehrer
notes that Elliott’s inability to makea decision came down to lack of emo-tion. To make good decisions, we must
learn to combine rational thought withemotional awareness. We’ve heard thisbefore when we’ve been advised to fol-low our gut or trust our instincts.
Malcolm Gladwell, the consummateobserver of human nature, points out inhis book Blink that generals in the fieldmake life-and-death decisions all thetime in situations where they have only60% or so of the information required.They are able to do so because theyare attuned to their gut instincts, or“feelings” (gag)—which, according to
Lehrer and other experts, we generatesubconsciously, based on our prior expe-riences and accumulated knowledge.
These fascinating findings under-score the importance of combiningrational thought with instinct to makethe right decisions for your design. Youremotions are telling you something, solisten up. Got that nagging sense some-thing is wrong? Don’t act until you find
out the cause.In the meantime, if you tire ofthinking about you, you can find outwhat others think of you by joiningAlex, myself, and the UBM Tech teamon Wednesday, Jan 30, in the SantaClara Convention Center, Room M3.You’ll also find me at the relaunchparty for Planet Analog later that day,at 6 pm, in the Mission City Ballroom,Showroom 3.
They say simulationis the sincerest formof flattery. 1984 marked the beginning of a newera for analog and mixed signal circuitsimulation. Cadence® PSpice® wasintroduced and electrical engineers
were able to simulate circuits on theirPCs with speed and accuracy neverthought possible. In the 28 yearssince PSpice was first released, manycompetitors have attempted toduplicate its capabilities and success.None have achieved that goal, andPSpice remains the standard by whichall others are judged.
While the imitators try to simulate the
success of PSpice, it continues to be aninnovator leading the way with the mostadvanced circuit simulation available.Features like multi-core processing, 64BIT precision, IBIS 5.0 support, and usercustomization mean the standard isnow higher than ever. Why settle foranything less?
To learn more about PSpice 16.6:www.ema-eda.com/PSpice16_6
Two amplifier specifications will helpyou sort out this problem: output-voltageswing and open-loop voltage gain.
The output-voltage swing of an opamp defines how far you can drive theamplifier output toward the positiveor negative supply rail. The output-
voltage-swing high (VOH) and output-voltage-swing low (V
OL) test conditions
usually take the amplifier outside itslinear region. The amplifier’s open-
loop-voltage-gain (AVOL
) specificationprimarily is the ratio of the closed-loop,output-voltage change to the input-offset-voltage change, but it also pro-vides output-linearity hints in the testconditions.
The VOH
and VOL
specifications tell
us how close the output pin comes tothe power-supply rails. Figure 1 shows asingle-supply amplifier’s output behavior.The output stage’s transistors prevent the
amplifier from reaching either rail.As you examine these specifications
with respect to their test conditions, you
will find that the amplifier’s output swingis dependent on the amount of currentthat the output stage is driving into theload. As you can see in Table 1 (AmplifierA), viewable in the online version of thisarticle at www.edn.com/4404550, thedefined conditions of this specificationhave a significant influence on the ampli-fier’s output performance. As the tableshows, V
OH is the difference between V
DD
(positive supply). VOL
is the differencebetween the minimum voltage out andV
SS(negative supply).
The key to comparing VOH and VOL
from amplifier to amplifier is to deter-mine the sink or source current. Smalleroutput currents provide better output-swing performance.
VOH
and VOL
tell us how close theamplifier drives to the rails but do notimply that the amplifier is linear so closeto the supply voltage rails; the condi-tions of the A
VOL specification, by con-
trast, do. Measure AVOL
by comparingthe amplifier’s output swing in its linearregion with the amplifier’s input offset
voltage. The dc open-loop gain is equalto the following equation:
AVOL
=20*log(ΔVOUT
/ΔVOS
),
where ΔVOUT
is the dc change in outputvoltage and ΔV
OS is the dc change in
input offset voltage.Table 2 (Amplifier B), also at www.
edn.com/4404550, shows an example ofthe A
VOL specifications and test condi-
tions for a single-supply amplifier. In the
condition column, note that the highand low output ranges of the ampli-fier are 5 mV from the power supplies.The A
VOL specification verifies that the
amplifier is in its linear region.If you are looking at a single-supply
op amp that’s claimed to offer rail-to-railoperation, make sure you look deeperbefore using the product in your appli-cation. Consider the V
OH, V
OL, and A
VOL
specifications and conditions. Doing sowill keep you from wasting your timeand will ensure that you have the cor-
rect amplifier for your circuit.EDN
What does “rail to rail” outputoperation really mean?
T
he advertisements for single-supply operational amplifiers
often claim rail-to-rail output capability. What does this
assertion really mean? Page one of a single-supply op amp’s
data sheet may call out “rail-to-rail input/output swing” inthe title or bullets; read on, because if you are looking for a
single-supply amplifier whose output can be driven all the way
to one supply rail and/or the other, good luck. So, what should you know
about an amplifier’s performance that claims rail-to-rail output operation?
BY BONNIE BAKER
B A K E R ’ S B E S T
Figure 1 The output signal ramping from VSS
(GND) to the positive power supply
(VDD=5V) never reaches either rail. At ground, the amplifier stops at ∼11 mV from the
Irecently wrote about my ongoing search for the perfect truly mobile audio-reproduction experi-ence, and afterward one of you was kind enough to send me a set of NC-255 active-noise-reductionheadphones. Manufactured by Hong Kong-based ODM Cobalt Industries and retailing for between$60 and $80, the headphones deliver decent audio at relatively low cost, but what made them par-ticularly interesting to me was the effectiveness of the active noise reduction. I had to dig deeper.Though the feature is intended for frequent fliers who want to attenuate cabin and engine noise,
I tested the headphones’ noise-reduction capability as I sat in a hotel room with my wife and twoplaying kids nearby, to see whether I could be blissfully unaware of my surroundings while listeningto my tunes. Success! Even better, when my attention was (frequently) required, I didn’t have toremove the headphones to listen; a very friendly “hear around you” button attenuated my music andamplified my surroundings. Life just keeps getting easier.
Noise cancellation has been around for years but continues to advance through better algorithms,
processes, and methodologies. As mobile applications proliferate, however, power consumption iswhere the rubber hits the road. That’s why I needed to look inside the headphones andsee how the design could get 32 hours off a single AAA battery.
Go to www.edn.com/learning/teardownsfor more Teardowns.
For data sheets on the devices discussedin this Teardown and thousands of otherparts, go to www.datasheets.com.
WANT MORE?T E A R D O W N PATRICK MANNION • BRAND DIRECTOR
On opening the controller, I found the AS3501 all-analog active-noise-cancellation IC from AMS.We like digital noise reduction for its flexibility, but Oliver Jones, marketing manager for power man-
agement at AMS, says it’s better to perform the filter-based phase adjustment and signal amplification inthe analog domain to meet stringent audiophile requirements and minimize power consumption. I would
agree, but of course the devil is in the implementation details.The AS3501 has proved itself, having been around since 2009, and now costs around $2 (1000). Eightmore iterations have followed the introduction; the latest includes Bluetooth for a marginal price increase,to $2.15. AMS provides full design help, and the device is also in OEM brands such as Pinteo and Tivoli.Cobalt also manufactures the NC-255 on an ODM basis for brands such as AT&T, Beats, and Klipsch.
T E A R D O W N
AMS’ AS3501 speaker amplifier and active-noise-canceling IC features 0.6-A
quiescent current, true ground, a charge pump for microphones, 0.1% total harmonic
distortion, >100-dB signal-to-noise ratio, I2C input, and one-time-programmable ROM.
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FRESH IDEAS ON INTEGRATINGMECHANICAL SYSTEMS,ELECTRONICS, CONTROL SYSTEMS,AND SOFTWARE IN DESIGN
US engineering advancement has been catalyzed overthe decades by external threats: the Space Race threatfrom the Soviet Union in the 1960s; the economic
threat from Japan’s low-cost, high-quality manufacturing inthe 1970s; the demographic threat from post-World War IIengineering retirements in the 1980s; the global threat as UScompetitiveness declined in the 1990s; and now the environ-mental threat driving the need for global energy conservationand sustainability. In addition, the impending retirement ofthe Baby Boom generation challenges the engineering profes-sion, as these workers will take with them a vast amount ofknowledge and skill that must be replaced.
One critical area, essential in manufacturing and transpor-tation, is tribology, officially defined in 1966 as the scienceand technology of interacting surfaces in relative motion.An undergraduate engineering student receives less than onehour of instruction in tribology during a four-year program,so this matter demands urgent attention.
Tribologists, through the development of air-bearing tech-nology between 1960 and 1980, enabled the extremely fast,reliable, precise, and accurate operation of a computer hard-drive read/write head (approxi-mately 0.05×0.04×0.01 in.) rid-ing over the disk surface on a
cushion of air at a height of 15nm and an average speed of 53mph. The challenge for tribolo-gists today is to understand thepotential modes for wear andsurface damage in an endlessvariety of mechanical systems.
Whether the goal is toreduce parasitic friction orenhance friction in a design, thedesigner must employ a propertribological approach—the rightcombination of geometry, mate-
rials, and lubrication—to ensure
Forgotten practice can saveUS industry $500 billion a yearTribology—the science of friction, lubrication, and wear—must be rediscovered.
28 EDN | JANUARY 2013 [www.edn.com]
By Kevin C Craig, PhD
safety, performance, and energy-efficient operation. Estimatesare that the correct application of tribology throughout USindustry could save $500 billion annually.
Friction, inevitably accompanied by wear, accounts formost of the energy consumed in our society. The object oflubrication is to reduce friction, wear, and heating of machineparts, which move relative to each other. A lubricant is anysubstance that, when inserted between moving surfaces,accomplishes those purposes.
Several types of lubrication exist: Hydrodynamic refers tofull-fluid-film lubrication, hydrostatic refers to lubricant intro-duced under pressure to create a full film, elastohydrodynamic
refers to lubricant films between elastically deformable sur-faces, boundary refers to a fluid film several molecular dimen-sions thick, and solid refers to solid lubricants used at hightemperatures. Unlubricated surfaces have a friction coefficientof about 1.0 with heavy wear; for boundary and thin-filmlubrication, the value is about 0.01 with slight wear; and forthick-film lubrication, the value is about 0.001 with no wear.
The most common fluid-film bearing is the journal bear-ing, in which a sleeve of bearing material is wrapped partially
or completely around a rotatingshaft to support a radial load. Figure 1 shows a plot of the coef-
ficient of friction versus Herseynumber (µN/P, where µ is theabsolute viscosity in centipoise, N is the shaft speed in rpm, and Pis the average pressure in psi) fora journal bearing under test con-ditions, and is a good measure ofthe state of health of the bearing.
There are other areas of sci-ence and technology that, liketribology, are threatened. Oncethese skills and knowledge arelost, getting them back will be
nearly impossible.EDN
Figure 1 This plot of the coefficient of friction versus
Hersey number for a journal bearing under test is a good
JOHN KRUSE AND CATHERINE REDMOND • ANALOG DEVICES INC
[www.edn.com] JANUARY 2013 | EDN 31
DETECTING AND
DISTINGUISHING
CARDIAC-PACING ARTIFACTSBURIED IN NOISE
AND LARGER CARDIAC
SIGNALS, THE ARTIFACTS
OF A PACEMAKER ARE
DIFFICULT TO SPOT.THE METHODOLOGY
PRESENTED HERE CAN
HELP DIAGNOSTICIANS
READ BETWEEN THE LINES
OF AN ECG STRIP.W
hen a heart patient with an implanted pace-maker undergoes electrocardiogram testing,
the cardiologist must be able to detect thepresence and effects of the pacemaker (seesidebar, “When the heart’s electrical subsystemmalfunctions,” available with the online
version of this article at www.edn.com/4404758). A simpleimplanted pacer’s activity is generally not perceptible on anormal ECG trace, because the very fast pulses—with typical widthsof hundreds of microseconds—get filtered due to low-bandwidthdisplay resolution (monitor/diagnostic 40-/150-Hz bandwidths).The pacer’s signal, however, can be inferred through the changedmorphology of the ECG trace, which is representative of the heart’s
own electrical activity as recorded at the skin surface via ECG leads.
It is important to be able to detectand identify pacing artifacts becausethey indicate the presence of the pace-maker and help in evaluating its inter-action with the heart. But the artifacts’small amplitude, narrow width, andvarying waveshape make them difficultto detect, especially in the presence of
electrical noise that can be many timestheir amplitude. At the same time,pacing therapy has become extremelyadvanced, with dozens of pacing modesavailable for single- to three-chamberpacing. Complicating the detection ofpacing artifacts, pacemakers producelead-integrity pulses, minute-ventila-tion (MV) pulses, telemetry signals, andother signals that can be incorrectlyidentified as pacing artifacts.
The use of real-time pacemakertelemetry has made the display of pac-
ing artifacts on an ECG strip less impor-tant than it used to be. An individualskilled in pacing therapies can look atthe strip and sometimes infer the typeof pacing therapy being administered tothe patient and determine whether thepacemaker is working properly.
In addition, all pertinent medicalstandards require the display of pacingartifacts, though they vary somewhatin their specific requirements for theheight and width of the captured pacersignal. The applicable standards include
Association for the Advancement ofMedical Instrumentation (AAMI)specifications EC11:1991/(R)2001/(R)2007 and EC13:2002/(R)2007, aswell as International ElectrotechnicalCommission specifications IEC 60601-1ed. 3.0b:2005, IEC 60601-2-25 ed. 1.0b,IEC 60601-2-27 ed. 2.0:2005, and IEC60601-2-51 ed. 1.0:2005.
HOW PACEMAKERS PACE
Implantable pacemakers ( Figure 1)
are typically lightweight and compact.They contain the circuitry necessary tomonitor the heart’s electrical activitythrough implanted leads and to stimu-late the heart muscle as necessary toensure a regular heartbeat. Pacemakersmust be low-power devices, as they oper-ate with a small battery that typicallyhas a 10-year lifespan. The NationalAcademy of Engineering estimated in2010 that more than 400,000 pacemak-ers are implanted in patients every year(Reference 1).
In unipolar pacing, the pacing leads
consist of an electrode at the tip of asingle pacing lead and the metal wallof the pacemaker housing itself. Thepacing artifacts caused by this mode ofpacing can be several hundred millivoltsat the skin surface, with a width of up
to 2 msec. Unipolar pacing is no longercommonly used, however.
In bipolar pacing, which todayaccounts for the bulk of pacing arti-facts created, the heart is paced from theelectrode at the tip of the pacing lead.The return electrode is a ring electrodelocated very close to the tip electrode.
The artifacts that this type of lead pro-duces are much smaller than those pro-duced by unipolar pacing; pulses on theskin surface can be as small as a fewhundred microvolts high and 25 µsecwide, with average artifacts measuring 1mV high and 500 µsec wide. The ampli-tude of the artifact can be much smaller
when the detection vector does not lineup directly with the pacing lead vector.Many pacemakers can be pro-
grammed for pulse widths as short as 25µsec, but the short-pulse-width settingsare typically used only in pacemakerthreshold tests performed in an elec-trophysiology laboratory. Setting thelower limit to 100 µsec eliminates theproblem of falsely detecting MV andlead-integrity (LV lead) pulses as validpacing artifacts. These subthresholdpulses are usually programmed to be
between 10 and 50 μsec.Various types of pacemakers are
available for pacing specific chambersof the heart. Single-chamber pacingdelivers pacing therapy to either theright atrium or the right ventricle. Sucha pacer can be either unipolar or bipolar.Dual-chamber pacing delivers pacingtherapy to both the right atrium andthe right ventricle. Biventricular pac-ing delivers pacing therapy to both theright ventricle and the left ventricle; inaddition, the heart is usually paced in
the right atrium.The biventricular pacing mode can
be difficult to display properly, for twomain reasons. First, the two ventriclepaces may occur at the same time,appearing as a single pulse at the skinsurface. Second, the left-ventricle leadplacement is generally not on the same
vector as the right-ventricle leadand may actually be orthogonalto it. Usually, the right atrium isbest displayed in lead aVF—one
of the augmented limb leads—and the right ventricle is bestdisplayed in lead II. Most ECGsystems do not employ threesimultaneous lead-detection cir-cuits or algorithms, making theleft ventricle the toughest leadto pick up. Thus, it is sometimesbest detected in one of the Vleads.
measured at the pacemaker output isgenerally about 100 nsec. When mea-sured at the skin surface, the rise timewill be slightly slower because of theinductance and capacitance of the pac-ing lead. Most pacing artifacts at theskin surface are on the order of 10 µsecor less. As complex devices with built-
in protection, pacemakers can producehigh-speed glitches that do not affectthe heart but do affect pacemaker-detec-tion circuits.
Figure 2 shows an example of anideal pacing artifact. The positive pulsehas a fast rising edge. After the pulsereaches its maximum amplitude, acapacitive droop follows, and then thetrailing edge occurs. The artifact nextchanges polarity for the recharge por-tion of the pacing pulse. The rechargepulse is required so that the heart tis-sue is left with a net-zero charge; with
a monophasic pulse, ions would buildup around the electrodes, creating a dccharge that could lead to necropsy ofthe heart tissue.
Introducing cardiac-resynchroni-zation devices adds another degreeof complication in detecting and dis-playing pacing artifacts. These devicespace the patient in the right atrium andboth ventricles. The pulses in the twoventricles can fall close together, over-lap, or occur at exactly the same time;
the left ventricle can even be pacedbefore the right ventricle. Currently,most devices pace both ventricles atthe same time, but studies have shownthat adjusting the timing will benefitsome patients by yielding a higher car-diac output.
Detecting and displaying both pulsesseparately is not always possible, andmany times the pulses will appear as asingle pulse on the ECG electrodes. Ifboth pulses were to occur at the sametime with the leads oriented in opposite
other out on the skin surface. The prob-ability of such an occurrence is remote,but one can envision the appearance onthe skin surface of two ventricle-pacingartifacts with opposite polarities. If thetwo pulses were offset by a small timeinterval, the resulting pulse shape mightbe very complex.
Figure 3 shows scope traces of a car-diac-resynchronization device pacingin a saline tank. This is a standard testenvironment for pacemaker validation,designed to mimic the conductivity ofthe human body. The proximity of thescope probes to the pacing leads causesthe amplitudes to be much larger thanwhat would be expected on the skinsurface, however, and the low imped-ance that the saline solution presentsto the ECG electrodes results in muchless noise than would normally be seen
in a skin-surface measurement.The first, second, and third pulses
shown in the figure (l to r) are the atri-al, right-ventricle, and left-ventriclepulses, respectively. The leads wereplaced in the saline tank with vectorsoptimized to see the pulses clearly. The
negative-going pulse is the pace; thepositive-going pulse is the recharge. Theamplitude of the atrial pulse is slightlylarger than the two other pulse ampli-tudes because the lead was in a slightlybetter vector than the ventricle leads;in actuality, all three pacing outputsin the resynchronization device were
programmed to have the same ampli-tude and width. With real patients, theamplitudes and widths are often differ-ent for each pacemaker lead.
ARTIFACT DETECTION
It is impossible to detect all pacing arti-facts and reject all possible noise sourcesin a cost-effective manner. Among thechallenges are the number of chambersthat the pace detection must monitor,the interference signals encountered,and the wide variety of pacemakers in
use. Solutions for detecting artifactsmay range from hardware implementa-tions to digital algorithms.
The pacing leads for cardiac-resyn-chronization devices will not all havethe same vector. The right-atrium leadusually aligns with lead II, but it can
sometimes point straight out of thechest, so a Vx (precordial lead) vectormay be needed to see it. The right-ven-tricle lead is usually placed at the apexof the right ventricle, so it usually alignswell with lead II. The left-ventricle pac-ing lead, threaded through the coronarysinus, is actually on the outside of the
left ventricle. This lead usually alignswith lead II but may have a V-axis ori-entation.
The pacing leads of implantable defi-brillators and resynchronization devicesare sometimes placed in areas of theheart that have not had an infarction.Placing them around infarcts is themain reason that this system uses threevectors and requires a high-performancepacing-artifact detection function.
A major noise source is the H-fieldtelemetry scheme used in most implant-
able heart devices. Other sources ofnoise are transthoracic-impedancemeasurements for respiration, electriccautery, and conducted noise fromother medical devices connected tothe patient.
acquiring pacing artifacts, each pace-maker manufacturer uses a differenttelemetry scheme. In some cases, asingle manufacturer may use differenttelemetry systems for different implant-able-device models. Many implantabledevices can communicate using bothH-field telemetry and either ISM- or
Medical Implant CommunicationService (MICS)-band telemetry. Thevariability of H-field telemetry fromone model to the next makes filterdesign difficult. ECG devices have tobe Class CF—the most stringent classi-fication—as there is direct conductivecontact with the heart, whereas othermedical devices may be built to lessstringent Class B or BF requirements,and their higher leakage currents mayinterfere with the performance ofECG-acquisition devices.
ARTIFACT-DETECTING AFE
The ADAS1000 ( Figure 4) is a five-channel analog front end designed toaddress some of the challenges facingdesigners of low-power, low-noise, high-performance, tethered or portable ECG
systems. The AFE, designed for bothmonitor- and diagnostic-quality ECGmeasurements, comprises five electrodeinputs and a dedicated right-leg-drive(RLD) output reference electrode. Inaddition to supporting the essentialECG signal-monitoring elements, theAFE enables such functions as respi-
One ADAS1000 supports five elec-trode inputs, facilitating a traditional,six-lead ECG measurement. By cascad-ing a companion ADAS1000-2 device,the system can be scaled up to a true12-lead measurement; by cascadingthree or more devices, the system canbe scaled to measurements with 15 leadsand beyond.
DETECTION ALGORITHM
The device’s front end includes a digitalpacemaker artifact-detection algorithmthat detects pacing artifacts with widthsranging from 100 µsec to 2 msec andamplitudes ranging from 400 µV to 1000
mV, to align with AAMI and IEC stan-dards. Figure 5 is a flow diagram of thealgorithm.
The pace-detection algorithm runsthree instances of a digital algorithmon three of four possible leads (I, II,III, or aVF). It runs on the high-fre-quency ECG data, in parallel with theinternal decimation and filtering, andreturns a flag that indicates pacingwas detected on one or more of theleads, providing the measured height
pace algorithm, the ADAS1000 sup-plies a high-speed pace interface thatprovides the ECG data at a 128-kHzdata rate; the filtered and decimatedECG data remains unchanged on thestandard interface.
A minute-ventilation filter is builtinto the ADAS1000 algorithm. MVpulses, which are conducted from thering of a bipolar lead to the housing ofthe pacemaker, detect respiration ratesto control the pacing rate. They’realways less than 100 µsec wide, varying
from about 15 to 100 µsec.The simultaneous three-vector pac-
ing-artifact system can detect pacingartifacts in noisy environments. Eachof the three instances of the pace algo-rithm can be programmed to detect pacesignals on different leads (I, II, III, oraVF). Programmable threshold levelstailor the algorithm to detect the rangeof pulse widths and heights presented,with internal digital filters designed toreject heartbeat, noise, and MV pulses.When a pace has been validated in an
individual instance of the pace signal,the device outputs a flag so that the usercan mark or identify the pace signal inthe ECG capture strip.
The choice of sample rate for thepacing-artifact algorithm is significantbecause it cannot be exactly the samefrequency as those used for the H-fieldtelemetry carrier by the three pacing-systems companies (Boston Scientific,Medtronic, and St Jude). All threevendors use different frequencies, and
each has many different telemetry sys-tems. Analog Devices believes that theADAS1000’s sampling frequency doesnot line up with that of any of the majortelemetry systems.EDN
REFERENCES1 National Academy of Engineering,
“What is a pacemaker?” 2012, http://
bit.ly/T4vXEH.2 Fruitsmaak, Steven, “St Jude medical
pacemaker with ruler,” image, 2007,
Wikipedia, The Free Encyclopedia,
http://bit.ly/V3KAJl.
AUTHORS’ BIOGRAPHIES
John Kruse is a field applications engi-neer for Analog Devices in Minneapolis.He joined ADI in 2005 and specializes inmedical applications. He has au-thored many articles and patents;several of the patents cover pacing-arti- fact acquisition. Kruse graduated with a
bachelor of science degree in electronicsengineering from the University of Min-nesota in 1980. In 1997, he received amaster of science degree in electron-ics engineering from the University of
St Thomas (St Paul, MN), where hecurrently is an adjunct professor.
Catherine Redmond is an applications en- gineer at Analog Devices in Limerick, Ire-land. Since joining ADI in 2005, she has gained industrial-market expertise by sup- porting precision DACs as applied in auto-
matic test equipment. Redmond currently focuses on precision ADC products. She graduated from Cork Institute of Technol-ogy in Ireland with a bachelor’s degree inelectronics engineering.
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lectronics design trends that ratchet updesign complexity and speed, such as theuse of multiple high-speed buses, bring newsignal-integrity challenges. With that in
mind, EDN assembled a virtual panel ofengineers working in signal integrity toexamine the current impairments, assess how well theavailable test equipment is measuring up, and determinewhat we can do both short- and long-term to improvesignal integrity. Admittedly, there are many thingsthat can affect signal integrity (Reference 1); in thisdiscussion, we focus primarily on crosstalk and EMI.
WHAT’S THE PROBLEM?
Many a trained eye is focused on the effects of multiple high-speed
buses on signal integrity and how to avoid the related problems.Chris Loberg, senior technical marketing manager at Tektronix Inc, andTim Caffee, vice president for design validation and test at AssetInterTech Inc, agree that shrinking operating margins on high-speedbuses are contributing to the challenges.
“The design trend is faster serial speeds, above 10 Gbits/sec, withno new cost-effective architecture for improving signal-path accom-modation of issues like EMI and crosstalk,” Loberg observes. “So,signaling accommodations like equalization must be made to minimizeEMI and crosstalk effects, enabling the receiver to accurately deter-mine the serial-bus logic transition.”
Loberg notes that interval times—the time between a transitionto one or zero—are shrinking; as a result, in a traditional eye diagram
used to evaluate transitions, EMI and crosstalk are “closing” theIMAGE: SHUTTERSTOCK
eye. Engineers can no longer effectivelyevaluate signal integrity, as crossingpoints and timing-integrity evaluationsbecome much more challenging.
Caffee notes that with each succes-sive generation of high-speed bus, oper-ating margins are gradually shrinking assignal frequencies increase, enabling
effects such as jitter, intersymbol inter-ference (ISI), and crosstalk to “createhavoc” on the signal integrity of high-speed SerDes and memory channels.Each new step to a higher speed andsignaling frequency makes the bus moresusceptible to distortions and anomaliesthat can effectively disrupt traffic andstall system throughput.
The eye diagram in Figure 1 illus-trates this point, showing the effects ofincreasing signal frequencies on threegenerations of a hypothetical high-
speed bus and the resultant, decreas-ing operating margins on the bus. Asfrequencies increase, even the slight-est distortion can disrupt signalingthroughput.
Alan Blankman, product man-ager for signal-integrity products atTeledyne LeCroy, agrees that higherbit rates (>25 Gbits/sec) and “paral-lelized serial” standards such as PCIExpress (PCIe), 40/100GBase-R, andInfiniBand are contributing to signal-integrity issues. “Faster bit rates require
faster edges with higher-frequency con-tent, which results in bigger reflectionsdue to impedance mismatches at con-nectors, vias, packages, etc.; higher lev-els of loss; and higher levels of crosstalk
and EMI, due to increased coupling toneighboring traces,” Blankman says.
Shamree Howard, signal-integrityprogram manager at Agilent Tech-nologies, adds that faster speeds createissues for accurate data capture, requir-ing precise triggering. She says jitter
measurements are the key to charac-terizing high-speed digital links, not-ing, “The measurement of jitter—evenif the user is provided a one-buttoninterface—is a sophisticated affair, tak-
ing into account clock recovery andknowledge of phase-locked loops, jitterdecomposition techniques and assump-tions for them, crosstalk and its effects,and waveform statistics that requiredifferent approaches” (Reference 2).Howard adds that the Agilent U4154A4-Gbit/sec AXIe logic-analyzer module
can make reliable measurements on eyeopenings as small as 100 psec × 100 mV( Figure 2).
Howard Johnson of SignalConsulting Inc concurs that circuits atvery high speeds are notoriously difficultto probe. “Even in cases when a probeexists that can do the job, you oftencannot place the probe at the point ina circuit that you wish to observe,” says Johnson. He suggests that the answeris to use cosimulation, or the processof simultaneously developing both a
physical circuit and a software simula-tion of it.
The problem, observes RansomStephens of Ransom’s Notes, is that,despite new oscilloscope techniquesfrom leading manufacturers, there isno automated way to identify crosstalkunambiguously. The latest test prod-ucts offer ways to estimate the effect ofcrosstalk on the bit error rate (BER),but they are all process-of-eliminationapproaches.
“Avoiding crosstalk is simple in
principle but sometimes impossiblein practice,” Stephens acknowledges.Because crosstalk is caused by joltsof radiation when an aggressor signalmakes a logic transition, increasingthe rise/fall times will reduce crosstalk.Because it’s interference, increasingtrace separation has a big effect, too.
“I think that careful differen-tial design is your best bet, though,”Stephens offers. “If you can get the dif-ferential skew really small and get thetwo traces nearly on top of each other,
then the cancellation from differential
40 EDN | JANUARY 2013 [www.edn.com]
AT A GLANCE
↘ Each new step to a higher speed
and signaling frequency makes the
bus more susceptible to distortions
and anomalies that can disrupt
traffic and stall system throughput.
“Parallelized serial” standards are
contributing to signal-integrity
issues. Circuits at very high speedsare notoriously difficult to probe.
↘ One way forward is to improve
the signal path itself with an optical
backplane; another way to improve
signal integrity is to trick the signal
using equalization approaches to
minimize crosstalk.
↘ Many designers are managing
crosstalk and EMI through better
design practices around the
signal path.
↘ Most engineers working on
signal-integrity issues agree that
simulation is becoming mandatory
for high-speed system design.
VOLTAGE
(mV)
TIMING (pSEC)
−100 1000 20 40 60
60
40
20
0
−20
−40
−60
80−80 −60 −40 −20
Figure 1 Moving from 6 (broken line) to 8 (dotted line) and, eventually, 10 Gbits/sec
(solid line) closes the eye around the operational sweet spot at the center of the
According to Tektronix’s Loberg, thereare several ways forward. First, changeand improve the signal path itself. Oneway to do that is with an optical back-plane; this is happening, but not in
the mainstream (think Thunderbolt).Another way to improve signal integ-rity is to trick the signal using equaliza-tion approaches to minimize crosstalk;for instance, you could hard-code thechip or compile FPGA code to equalizethe signal. In addition, many design-ers are managing crosstalk and EMIthrough better design practices aroundthe signal path.
Asset InterTech’s Caffee proposesthat engineers validate signal integrityon the bus during each of the major
phases of a system’s life cycle, fromdesign to field operation, though herecognizes that this is a challengingapproach and thus not a popular one. Ifdetected during prototype-board bring-up, signal-integrity problems could trig-ger changes in the design; if detectedduring manufacturing, problems couldresult in alterations to the productionprocess. If problems are detected inthe field as a result of troubleshoot-
ing poorly performing systems, designchanges, manufacturing-process chang-es, or both should be made for the nextproduct generation to reduce returns
and warranty claims.Hiroshi Goto, business development
manager at Anritsu Co, suggests pre-emphasis as an effective transmissiontechnique for maintaining the eye open-ing. With transmission speeds increas-ing to 20 Gbits/sec and faster, Gotoproposes a three- or four-tap emphasissignal in order to increase the numberof bits to be emphasized.
It’s a complex job to check and setthe combination of emphasis rates foreach tap, however, making it difficult to
find the ideal emphasis signal withoutquantitative guidelines.
The Anritsu-developed MP1825Bfour-tap emphasis and transmission-analysis software, working with theMP1800A signal-quality analyzerBER test set (BERTS), finds “theideal emphasis settings based uponthe reverse characteristics” of the de-vice under test (DUT), says Goto( Figure 3). “This raises the height ofthe eye and keeps the eye open, allow-
ing better quantitative signal-integrityanalysis in the shortest amount oftime.”
SIMULATION AND VALIDATION
Most agree that simulation is becom-ing mandatory for high-speed systemdesign. Agilent’s Howard says the com-pany’s Advanced Design System (ADS)is the leading EDA software in use forhigh-speed digital applications.
Teledyne LeCroy’s Blankman addsthat to detect and mitigate crosstalk
issues, designers must be able to predict
near- and far-end crosstalk by runningsimulations, and to validate the modelsused in the simulations by taking mea-surements ( Figure 4). To validate cross-
talk models, designers need multidiffer-ential-lane S-parameter measurements(eight-port for aggressor-victim models,12-port for aggressor-victim-aggressormodels, or even higher port counts).
Measuring crosstalk requires verti-cal noise measurements taken by real-time oscilloscopes that can extract thecrosstalk from the serial data signal.Those measurements should estimateeye closure as a function of BER, asjitter measurements do. Jitter measure-ments are also important, of course.
Measuring both jitter and noise yields amore complete picture of crosstalk thanjitter measurements alone.
TOOLBOX
Test-equipment vendors are working toevolve their tools to characterize jitterand improve signal-integrity analysis,so the optimal toolbox for signal-integ-rity engineers may not yet be available.Signal Consulting’s Johnson predictsthat “the next trend will involve a
blend of specialized equipment andtest software designed to characterizea power system and inject specific testcurrent waveforms into that power sys-tem.” Stephens, of Ransom’s Notes,suggests that we be on the lookout formore crosstalk-equalization techniques.
So, what’s out there now?• Scopes. Here is where high-
bandwidth oscilloscopes can reallyprove their worth. Teledyne LeCroy’sBlankman notes that nonreturn-to-zero(NRZ) serial data patterns can have
rise times less than 30 psec. He points
42 EDN | JANUARY 2013 [www.edn.com]
Figure 2 The Agilent U4154A logic
analyzer uses its eye-scan capability to
place the sampling point automatically
in both time and voltage within the eye,
making measurements on eye openings
as small as 100 psec × 100 mV.
Figure 3 The Anritsu MP1800A 32G synchronized multi-BERTS and MP1825B 28.1G
four-tap emphasis aim to assist signal-integrity analysis by keeping the eye open.
out that receiver testing of PCIe Gen3systems requires a scope with a 13-GHzbandwidth, whereas transmitter testingneeds a 20-GHz scope.
“Emerging multilane designs likeInfiniBand and 40/100GBase-Rhave even more-demanding require-ments for channel count and band-width,” Blankman says. “These stan-dards utilize bit rates of 25 and 28Gbits/sec. Typically, an oscilloscope with
four or five times the fundamentalfrequency is needed, which correspondsto 50 to 65 GHz. Since InfiniBand and40/100GBase-R are multilane, acquir-ing eight, 12, or even more channels
at a time is required to fully charac-terize SI issues.” Blankman points toTeledyne LeCroy’s LabMaster 10 Zi,with bandwidth out to 65 GHz and aChannelSync architecture that syn-chronizes up to 80 channels to operateas a single instrument.
• Network analyzers. Networkanalyzers are important for character-izing crosstalk in multilane systemsand revealing the frequency charac-
teristics of the DUT. Anritsu’s Gotopoints out that in order to acquire thebest S-parameter data, the vector net-work analyzer should have broad fre-quency coverage. He suggests Anritsu’s
VectorStar VNA, which ranges from 70kHz to 125 GHz.
“While the upper frequency receivesmost of the attention,” he warns, “it isimportant to remember that accuratemeasurements to the lowest possiblefrequency are critical for signal-integ-rity applications. Often, the accuracy
of models can be improvedby measuring down to asclose to dc as possible,providing the precise datato help create a high-accu-racy eye diagram.”
Blankman notes thatnetwork analyzers withhigh port counts canbe expensive. He saysthe network analyzersin Teledyne LeCroy’sSPARQ series ( Figure 4)
were designed for signal-integrity measurementsand offer a lower-costoption to a traditionalVNA. (SPARQ stands for“S-parameters quick.”)
• Software. Giventhe need for more simula-tion, vendors are devel-oping software tools towork with their hardware.Loberg notes the avail-ability of serial-data-link
analysis (SDLA) on theTektronix scope ( Figure
5), which can help engi-neers simulate equalizationin EDA environments suchas those from CadenceDesign Systems or MentorGraphics. “That softwaremodel can be dropped intoan oscilloscope, transfer-ring the model propertiesinto the S-parameters;
then we can place theeffects of that effort into afilter on the scope,” Lobergexplains. “The scope canthen model the behavior ofthe equalizer into the signalbeing measured and see if we can openthe eye. This approach allows you toanalyze the performance with the effectsof equalization baked into the scope.”
Teledyne LeCroy also offers oscil-loscope-based serial-data-analysis soft-ware in its SDAIII-CompleteLinQ
product. Blankman notes that it is
important to have scope-based soft-ware that performs eye, jitter, and ver-tical noise analysis. He says users alsoneed tool kits that allow fixtures andinterconnects to be de-embedded oremulated, and that apply transmitterand receiver equalization. “The analy-sis tool kit should also provide a wide
variety of plots that show the variationand distribution of jitter and noise infrequency and time in order to under-stand the root causes of noise and jit-ter,” Blankman adds.
• BERT. “Receiver testing is becom-ing mandatory in many standards, and
most people don’t know where to start,”
says Howard, who adds that system cali-bration—critical for ensuring the accu-racy of your measurements—may be thehardest part of testing.
Howard reveals that in working withengineers, she has found proper calibra-tion of the stress signal in PCIe 3.0 to bechallenging. She points to the Agilent
N4903B J-BERT high-performance serial BERTto test Rx compliance.The instrument can char-acterize a receiver’s jittertolerance and is designedto prove compliance withtoday’s most popular seri-al-bus standards, includ-ing PCIe, SATA/SAS,DisplayPort, and USB.
Goto suggests thatwhen selecting a BERT,
engineers should chooseone with minimal intrin-sic jitter. For example,the Anritsu MP1800Ahas intrinsic clock jitterof <350 fsec RMS. TheBERT should also be ableto conduct repeatableand stable jitter-toler-ance tests with a varietyof generated jitter types,such as sinusoidal, random,and bounded uncorrelated
jitter and spread-spectrumclock that can be measuredup to 32.1 Gbits/sec.
• Embedded test. Thedays of probing test padsare coming to a close, espe-cially for high-speed buses,because the practice canintroduce anomalies intothe signal. So where doesthat leave us? There is agrowing interest in embed-
ded test instruments, andthe design-for-test move-ment is allowing nonin-trusive embedded instru-ments to deliver the signaldata that the receivers
see. “In other words,” says Caffee, “softaccess is provided to the hard data thatsignal-integrity engineers need.”
Embedded instruments have beenused for years for chip-level charac-terization, verification, and test. Butnow, embedded instruments are being
used to monitor and report data being
44 EDN | JANUARY 2013 [www.edn.com]
Figure 5 This screen image of serial-data-link analysis shows differ-
ent eye diagrams before and after inclusion of equalization effects
and channel/fixturing effects (courtesy Tektronix).
Figure 6 An eye diagram like this one can be generated by a tool set
for embedded instrumentation (courtesy Asset InterTech).
that the embedded instruments areaccessed using standard technologies,such as the IEEE 1149.1 boundary-scan(JTAG) test-access port.
“JTAG provides access to an exter-nal software-based platform that canmanage the embedded instruments inthe system, as well as compile and ana-lyze the test and measurement data theygather,” Caffee says ( Figure 6).
As system speed and complexity con-tinue to rise, the way forward looks to be
a combination of advanced measurementtools and techniques that work with cus-tomized simulation models. In the end,though, the path of least resistance forimproving signal integrity looks to bean industry standby: good old-fashionedengineering ingenuity.EDN
REFERENCES1 Bogatin, Eric, and Alan Blankman,
“Use S-parameters to describe cross-
talk,” Test & Measurement World, Sept
13, 2012, www.tmworld.com/4396189.2 “Tips and Techniques for Accurate
Characterization of 28 Gb/s Designs,”
Agilent Technologies, 2012, http://bit.
ly/12m4IZ3.
[www.edn.com] [www.edn.com]
You can reach
Janine Love, editor
in chief of Test &
Measurement World,
at 1-973-864-7238
and janine.love@
ubm.com.
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For more articles like this one,go to www.edn.com/design/ test-and-measurement .
JTAG PROVIDES
ACCESS TO ANEXTERNAL SOFTWARE-BASED PLATFORMTHAT CAN MANAGETHE SYSTEM’S EMBED-DED INSTRUMENTS.
Afew years ago, after more than 25 years ofworking with ceramic capacitors, I learnedsomething new about them. I was workingon an LED-light-bulb driver, and the timeconstant of an RC circuit in my project simplydid not seem to be right.
I immediately assumed that there was an incorrect com-
ponent value installed on the board, so I measured the tworesistors serving as a voltage divider. They were just fine. Idesoldered the capacitor from the board and measured thatcomponent; the cap, too, was fine. Just to be sure, I measuredand installed new resistors and a new capacitor, fired up thecircuit, checked that the basic operation was proper, and thenwent to see whether the component swap had resolved myRC time-constant problem. It had not.
I was testing the circuit in its natural environment: in itshousing, which itself was in an enclosure to mimic a “can”for ceiling lighting. The component temperatures in someinstances reached well over +100°C. Even in the short timeit had taken me to retest the RC behavior, things had gotten
quite hot.My next conclusion, of course, was that the temperature
variation of the capacitor was the issue. I was skeptical of thatconclusion even as I drew it, however, because I was usingX7R capacitors, which to my recollection varied only ±15%
up to +125°C. I trusted my memory, but to be sure, I reviewedthe data sheet for the capacitor that I was using.
That is when my ceramic-capacitor reeducation began.
BACKGROUNDER
Table 1 shows the letters and numbers used for various ceram-ic-capacitor types and what each means. The table describes
Class II and Class III ceramics. Without getting too deepinto details, Class I capacitors include the common COG(NPO) type; these are not as volumetrically efficient as theones listed in the table, but they are far more stable overvarying environmental conditions, and they do not exhibitpiezo effects. The capacitors listed in the table, by contrast,can have widely varying characteristics; they will expand andcontract with applied voltage, sometimes causing audible(buzzing or ringing) piezo effects.
Of the many capacitor types shown, the most common, inmy experience, are X5R, X7R, and Y5V. I never use the Y5Vs,because they exhibit extremely large capacitance variationover the range of environmental conditions.
When capacitor companies develop products, they choosematerials with characteristics that will enable the capacitorsto operate within the specified variation (third character;Table 1) over the specified temperature range (first and sec-ond characters). The X7R capacitors that I was using should
Why your 4.7-μF ceramic cap
becomes a 0.33-μF cap
BY MARK FORTUNATO • MAXIM INTEGRATED
AN INVESTIGATION INTO TEMPERATURE AND VOLTAGE VARIATIONS IN X7R CAPACITORS
UNDERSCORES THE IMPORTANCE OF DATA SHEETS.
JANUARY 2013 | EDN 47[www.edn.com]
TABLE 1 COMMON CERAMIC-CAPACITOR TYPES
First character: low temp Second character: high temp Third character: Change over temp (max)
not have varied more than ±15% over a temperature rangeof −55°C to +125°C, so either I had a bad batch of capacitorsor something else was happening in my circuit.
NOT ALL X7Rs ARE CREATED EQUAL
Since my RC time-constant problem was far greater than wouldbe explained by the specified temperature variation, I had todig deeper. Looking at the data for capacitance variation versus
applied voltage for my capacitor, I was surprised to see howmuch the capacitance changed with the conditions I had set.I had chosen a 16V capacitor to operate with a 12V bias. Thedata sheet indicated that my 4.7-μF capacitor would typicallyprovide 1.5 μF of capacitance under those conditions. Now, that explained the problem my RC circuit was having.
The data sheet then showed that if I just increased the sizeof my capacitor from the 0805 to the 1206 package size, thetypical capacitance under the specified conditions would be3.4 μF. This called for more investigation.
I discovered that Murata Manufacturing Co (www.murata.com) and TDK Corp (www.tdk.com) offer nifty tools ontheir Web sites that let you plot the variations of capaci-
tors over different environmental conditions. I investigated4.7-μF capacitors of various sizes and voltage ratings. Figure1 graphs the data that I extracted from the Murata tool forseveral different 4.7-μF ceramic capacitors. I looked at bothX5R and X7R types, in package sizes from 0603 to 1812 andwith voltage ratings from 6.3 to 25V dc. Note, first, that as thepackage size increases, the capacitance variation with applieddc voltage decreases—and does so substantially.
A second interesting point is that, for a given packagesize and ceramic type, the capacitor voltage rating seemsoften to have no effect. I would have expected that using a25V-rated capacitor at 12V would result in less variation thanusing a 16V-rated capacitor under the same bias. Looking at
the traces for X5Rs in the 1206 package, it’s clear that the6.3V-rated part does indeed perform better than its siblingswith higher voltage ratings.
If we were to examine a broader range of capacitors, wewould find this behavior to be common. The sample setof capacitors that I considered in my investigation did notexhibit the behavior to the same extent as the general popu-lation of ceramic capacitors would.
A third observation is that, for the same package, X7Rshave better temperature sensitivity than do X5Rs. I do notknow whether this holds true universally, but it did seem soin my investigation.
Using the data from this graph, Table 2 shows how muchthe X7R capacitances decreased with a 12V bias. Note thatthere is a steady improvement with progressively larger capac-itor sizes until the 1210 size; going beyond that size yields noreal improvement.
CHOOSING THE RIGHT CAPACITORIn my case, I had chosen the smallest available package for a4.7-μF X7R because size was a concern for my project. In myignorance, I had assumed that any X7R was as effective asany other X7R; clearly, this is not the case. To get the properperformance for my application, I had to use a larger package.
I really did not want to go to a 1210 package. Fortunately,I had the freedom to increase the values of the resistorsinvolved by about 5× and thereby decrease the capacitanceto 1 μF.
Figure 2 graphs the voltage behavior of several 16V, 1-μFX7R caps versus that of 16V, 4.7-μF X7Rs. The 0603 1-μFcapacitor behaves about the same as the 0805 4.7-μF device.
Both the 0805 and 1206 1-μF capacitors perform slightlybetter than the 1210 4.7-μF size. Thus, by using the 08051-μF device, I was able to keep the capacitor size unchangedwhile getting a capacitor that only dropped to about 85% ofnominal, rather than 30%, under bias.
But I was still confused. I had been under the impressionthat all X7R caps should have similar voltage coefficientsbecause the dielectric used was the same, namely X7R. So I
contacted a colleague and expert on ceramic capacitors, TDKfield applications engineer Chris Burkett, who explainedthat there are many materials that qualify as “X7R.” In fact,any material that allows a device to meet or exceed the X7Rtemperature characteristics, ±15% over −55°C to +125°C,can be called X7R. Burkett also explained that there areno voltage-coefficient specifications for X7R or any otherceramic-capacitor type.
This is a critical point, so I will repeat it. A vendor cancall a capacitor X7R (or X5R, or any other type) as long asthe cap meets the temperature-coefficient specs, regardlessof how bad the voltage coefficient is. This fact reinforces theold maxim (pun intended) that any experienced applicationsengineer knows: Read the data sheet!
As capacitor vendors have turned outprogressively smaller components, theyhave had to compromise on the materi-als used. To get the needed volumetricefficiencies in the smaller sizes, theyhave had to accept worse voltage coef-ficients. Of course, the more reputable
manufacturers do their best to minimizethe adverse effects of this trade-off.
Consequently, when using ceramiccapacitors in small packages—indeed,when using any component—it isextremely important to read the datasheet. Regrettably, often the commonlyavailable data sheets are abbreviatedand will provide little of the informa-tion you’ll need to make an informeddecision, so you may have to press themanufacturer for more details.
What about those Y5Vs that I sum-
marily rejected? For kicks, let’s exam-ine a common Y5V capacitor. I chose a4.7-μF, 0603-packaged capacitor ratedat 6.3V—I won’t mention the vendor,because its Y5V cap is no worse thanany other vendor’s Y5V cap—and lookedat the specs at 5V and +85°C. At 5V,the typical capacitance is 92.9% belownominal, or 0.33 μF.
That’s right. Biasing this 6.3V-ratedcapacitor with 5V will result in a capac-itance that is 14 times smaller than
nominal.At +85°C with 0V bias, the capaci-tance decreases by 68.14%, from 4.7 to1.5 μF. Now, you might expect this toreduce the capacitance under 5V biasfrom 0.33 to 0.11 μF. Fortunately, how-ever, those two effects do not combine
in this way. In this particular case, the change in capacitancewith 5V bias is worse at room temperature than at +85°C.
To be clear, with this part under 0V bias, the capacitancedrops from 4.7 μF at room temperature to 1.5 μF at +85°C,whereas under 5V bias the capacitance increases with tem-perature, from 0.33 μF at room temperature to 0.39 μF at+85°C. This result should convince you that you really needto check component specifications carefully.
GETTING DOWN TO SPECIFICS
As a result of this lesson, I no longer just specify an X7Ror X5R capacitor to colleagues or customers. Instead, Ispecify specific parts from specific vendors whose data I
have checked. I also warn customers tocheck data when considering alterna-tive vendors in production to ensurethat they do not run into the problemsI encountered.
The larger lesson here, as you mayhave surmised, is to read the data sheet,
every time, without exception. Askfor detailed data when the data sheetdoes not contain sufficient informa-tion. Remember, too, that the ceram-ic-capacitor designations X7R, Y5V,and so on imply nothing about volt-age coefficients. Engineers must check
the data to know, really know, how aspecific capacitor will perform undervoltage.
Finally, keep in mind that, as wecontinue to drive madly to smaller andsmaller sizes, this is becoming more ofan issue every day.EDN
ACKNOWLEDGMENT
The author thanks Chris Burkett, fieldapplications engineer at TDK, for hisexplanation of why ceramic capacitors ofthe same nominal type can have widely di-vergent voltage coefficients.
AUTHOR’S BIOGRAPHY
Mark Fortunato is senior principal mem-ber of the technical staff in the Communi-cations and Automotive Solutions Groupat Maxim Integrated (San Jose, CA).He has spent much of the past 16 years
helping customers tame analog circuitry.Before that, Fortunato worked on prod-ucts ranging from speech-recognition sys-tems to consumer electronics, millimeter-wave instrumentation, and automatedteller machines. He regrets that he never gotto meet Jim Williams or Bob Pease.
50 EDN | JANUARY 2013 [www.edn.com]
Figure 2 This graph, which plots the voltage performance of 1-μF and 4.7-μF
capacitors, shows similar performance for the 1-μF 0603 and the 4.7-μF 0805.
System Monitor with Instrumentation-Grade Accuracy Used toMeasure Relative HumidityDesign Note 510
Leo Chen
01/13/510
Figure 1. Simple Psychrometer Using the LTC2991
Because much can be deduced about a physical sys-tem by measuring temperature, it is by far the mostelectronically measured physical parameter. Selecting
a temperature sensor involves balancing accuracyrequirements, durability, cost and compatibility withthe measured medium. For instance, because of its lowcost, a small-signal transistor such as the MMBT3904is an attractive choice for high volume or disposablesensing applications. Although such sensors arerelatively simple, accurate temperature measurementrequires sophisticated circuitry to cancel such effectsas series resistance.
The LTC2991 system monitor has this sophisticatedcircuitry built in—it can turn a small-signal transistorinto an accurate temperature sensor. It not only mea-sures remote diode temperature to ±1°C accuracy, butit also measures its own supply voltage, single-endedvoltages (0 to VCC) and differential voltages (±325mV).
While ostensibly designed for system monitor applica-tions, the top shelf performance of the LTC2991 makesit suitable for instrumentation applications as well, such
as the accurate psychrometer described here.
A Psychrometer: Not Nearly as Ominous asIt Sounds
A psychrometer is a type of hygrometer, a device thatmeasures relative humidity. A hygrometer uses twothermometers, one dry (dry bulb) and one covered ina fabric saturated with distilled water (wet bulb). Air ispassed over both thermometers, either by a fan or byswinging the instrument, as in a sling psychrometer.A psychrometric chart can then be used to calculate
humidity by using the dry and wet bulb temperatures. Al-ternatively, a number of equations exist for this purpose.The following equations are used in testing this circuit.
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registeredtrademarks and QuikEval is a trademark of Linear Technology Corporation. All othertrademarks are the property of their respective owners.
Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ●www.linear.com
Figure 2. Worst-Case Error
A = 6.6 •10–4 •(1+1.115•10–3 •WET)
ESWB= e16.78•DRY–116.9
WET+273.3
Where:
ED=ESWB– A •P •(DRY–WET)
HUMIDITY= EDEDSB
WET = wet bulb temperature in Celsius
DRY = dry bulb temperature in Celsius
P = pressure in kPa
Figure 1 shows a LTC2991-based psychrometer. Thetwo transistors provide the wet bulb and dry bulb tem-perature readings when connected to the appropriateinputs of the LTC2991.
The equations include atmospheric pressure as avariable, which is determined here via a NovasensorNPP301-100 barometric pressure sensor measured bychannels 5 to 6 configured for differential inputs. Full-scale output is 20mV per volt of excitation voltage, at100kPa barometric pressure (pressure at sea level isapproximately 101.325kPa).
The LTC2991 can also measure its own supply voltage,which in our circuit is the same supply rail used to ex-cite the pressure sensor. Thus, it is easy to calculate a
ratiometric result from the pressure sensor, removingthe error contribution of the excitation voltage.
Error Budget
The LTC2991 remote temperature measurements areguaranteed to be accurate to ±1°C. Figure 2 shows theerror in indicated humidity that results from a 0.7°Cerror in the worst-case direction, and the error inindicated humidity resulting from a 0.7°C error in theworst-case direction combined with worst-case errorfrom the pressure sensor.
Try It Out!A psychrometer readout is implemented as an Easteregg in the LTC2991 (DC1785A) demonstration software,available as part of the Linear Technology QuikEvalsoftware suite.
The demo board should be set up as shown in Figure 1.To access the readout, simply add a file named tester.txtin the install directory of your DC1785A software. Thecontents of this file do not matter. On software start-up,the message “Test mode enabled” should be shown inthe status bar, and a Humidity option will appear in theTools menu. Relative humidity readings can then becompared to sensors of similar accuracy grade, suchas resistive and capacitive film.
Data Sheet Download
www.linear.com/2991
For applications help,
call (408) 432-1900
Figure 3. A Psychrometer Readout Is Implemented asan Easter Egg in the LTC2991 (DC1785A) DemonstrationSoftware, Available as Part of Linear’s QuikEvalSoftware Suite
Complete Battery Charger Solution for High Current PortableElectronics3.5A Charger for Li-Ion/LiFePO4 Batteries Multiplexes USB and Wall Inputs
Design Note 496
George H. Barbehenn
Figure 1. Typical Application Using a Simple InputMultiplexer with No Backdrive Protection
Introduction
The LTC®
4155 and LTC4156 are dual multiplexed-inputbattery chargers with PowerPath™ control, featuring I2Cprogrammability and USB On-The-Go for systems suchas tablet PCs and other high power density applications.The LTC4155’s float voltage (VFLOAT) range is optimizedfor Li-Ion batteries, while the LTC4156 is optimized forlithium iron phosphate (LiFePO4) batteries, supportingsystem loads to 4A with up to 3.5A of battery chargecurrent. I2C controls a broad range of functions and USBOn-The-Go functionality is controlled directly from theUSB connector ID pin.
Input MultiplexerA distinctive feature of the LTC4155/LTC4156 PowerPathimplementation is a dual-input multiplexer using only
N-channel MOSFETs controlled by an internal charge
pump. The input multiplexer has input priority selectionand independent input current limits for each channel.
Applications include any device with a high capacityLi-Ion or LiFePO4 battery that can be charged from a highcurrent wall adapter input or from the USB input—suchas a tablet PC. Figure 1 shows a typical application andFigure 2 shows its efficiency.
This dual input multiplexer implementation allows theuse of inexpensive, low RDS(ON) N-channel MOSFETs.The MOSFETs also provide overvoltage protection (OVP)and if desired, backdrive blocking and reverse-voltage
L, LT, LTC, LTM, Linear Technology, the Linear logo are registered trademarks andPowerPath is a trademark of Linear Technology Corporation. All other trademarks arethe property of their respective owners.
Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ●www.linear.com
Figure 3. LTC4155/LTC4156 Input Multiplexer with OVP, RVP and Backdrive Blocking
protection (RVP). Backdrive blocking prevents voltage onthe wall input from backdriving the USB, or vice-versa.Backdrive blocking can be implemented on one or bothinputs. Reverse-voltage protection prevents a negativevoltage applied to the protected input from reachingdownstream circuits.
Dual High Current Input Application
Figure 3 shows a dual 3.5A input application, featuring OVP,RVP and backdrive protection. The FDMC8030 MOSFETsprovide ±40V of OVP and RVP protection.
0V~6V Input on Either WALL or USB
In the circuit of Figure 3, when a 0V~6V input is pres-ent on either input, the corresponding gate signal risesto approximately twice VIN, enabling the two seriesN-channel MOSFETS and connecting the input to VBUS.The undervoltage lockout (UVLO) is approximately 4.35Von each channel.
The LTC4155/LTC4156 have an input priority bit, whichdefaults to WALL. If a valid voltage is present on bothinputs, only WALLGT is activated. The input priority bitcan be changed via I2C to make the USB channel preferredwhen both inputs are present.
>6V Input on Either WALL or USB
When either input goes above 6V, the correspondingWALLGT or USBGT pin is pulled low, shutting off thecorresponding MOSFETs and disconnecting the input. Ifboth inputs have 5V on them, and the input that is enabledby the input priority bit goes above 6V, the LTC4155/ LTC4156 automatically and seamlessly switches to theother input—with no disturbance on VOUT.
The diode-connected NPNs (Q3 and Q4) serve to preventexcess VGS on the MOSFET closest to the input of thecorresponding channel current from the input flowsthrough the diode, through the B-C junction of the NPNbipolar transistor, and pulls the gate up through the 5Mresistor. This prevents the gate from dropping below thesource by more than 2V.
A voltage greater than 6V on one input does not preventthe other input from operating normally.
< 0V Input on Either WALL or USB
The USBSNS and WALLSNS pins ignore any negativeinputs, but clamp the pins to –VF (about –0.6V). Thenegative voltage forward-biases the base-emitter junc-tion of the NPN bipolar transistor, shorting the gate tothe input and ensuring that the gate is never more thanabout 0.5V above the source.
A negative voltage on one input does not prevent the
other input from operating normally.
OTG 0peration
The LTC4155/LTC4156 drive the USBGT pin high whenUSB On-The-Go operation is enabled, connecting VBUS tothe USB input and enabling up to 500mA to be sourced.
Conclusion
The LTC4155/LTC4156 implement an overvoltage andreverse-voltage protected, prioritized input multiplexerfor products that need to support multiple system poweror battery charging functionality. Optional backdrive
blocking prevents the appearance of voltages at anunconnected input.
↘A constant current is better thana constant voltage for driving
LEDs. In this proposed circuit, a com-mon constant-voltage regulator is
changed into a constant-current sourcefor LEDs. In addition, a startup currentlimiter is used to suppress large current
surges, and a voltage chopper isemployed for a wide ac input of 96 to260 V
RMS.
The concept presented here origi-nates from two Design Ideas publishedin 2011 (references 1 and 2) and was
developed to improve power efficiencyat a low cost. The circuits shown infigures 1 and 2 both have the same bril-liance of an inductorless chopper and
the same controversial issue of powerefficiency. To improve the power effi-ciency, you should observe two princi-ples: The resistors of the chopper shoulddissipate as little power as possible,and the chopper should switch at theappropriate threshold voltage, V
TH. In
addition, VTH
should be as close as pos-sible to the operating voltage across theLED string. This approach minimizesthe power dissipation of the constant-current regulator (CCR) while main-taining a constant LED current.
The circuit shown in Figure 3 isan example that follows the principlesdescribed above, with a power efficien-cy of about 85%. Voltage regulator IC
1
and R5 form a 20-mA CCR. The LED
string has a sufficient number of LEDs
to require 120V at 20 mA. The voltageacross R
6 provides a means for indirect
measurement of the LED current.
VTH is the diode bridge full-waverectified output voltage above which,when divided by R
1 to R
3, the 68V bias
of D5 is overcome, turning on Q
1 and
turning off Q2. C
1 charges quickly to V
TH
while Q2 is on, then discharges slowly
An improved offline driverlights an LED stringYan-Niu Ren, Southwest Petroleum University, Chengdu, China
DIs Inside
54 Low-duty-cycle LED flasherkeeps power draw at 4 mW
55 Rotary encoder with absolutereadout offers high resolutionand low cost
56 Two-IC circuit combines
digital and analog signalsto make multiplier circuit
58 Current loop transmitsac measurement
▶ To see and comment onall of EDN ’s Design Ideas, visitwww.edn.com/designideas.
READERS SOLVE DESIGN PROBLEMS
designideas
Q2NDD0350Z
R4101%
SENSE
C122 F
R3
56kR1
330k
R2390k
D21N4004
D11N4004
D41N4004
D31N4004
D6MMSZ15T1G
15V
D5
MMSZ5260BT1G43V
22 LEDs
CCR
NSI45020AT1G
Q1
MPSA44
85 TO265V AC
60 Hz
Figure 1 This circuit drives a string of LEDs with a constant current over the entire worldwide range of ac-mains voltages. The
resistor in series with the LED string provides a convenient point to measure LED current via its voltage drop.
into the LED string until the next half-cycle of the incoming ac.
VTH
must be no less than required tomaintain the LED operation voltage of
120V at the end of C1’s discharge and nomore than 1.414 times the V
RMS of the
lowest ac level. With 120V required forthe LEDs, plus the 3V input-to-outputdifferential required by IC
1, plus 1.25V
developed across R5, the minimum C
1
voltage will be 124.25V. For simplicity,this figure can be rounded up to 125V.
As shown in Figure 4, the C1 dis-
charge time is much longer than the
charge time during a 50-Hz half-cycleof 10 msec. During this period, thepeak-to-peak voltage across C
1 is almost
20 mA×10 msec/22 µf =9.09V. Thus,U
C1_MAX=125V+9.09V=134.09V. For
simplicity, this result can be rounded
up to 135V. This is VTH
; anyvoltage above this turns Q
1
on and gets chopped off by Q2.
When Q1 switches on, the
power consumption of R4 in
Figure 3 is less than 20 mW at260VRMS
input, and the R1-R
2-
R3-D
5 divider dissipates less
than 100 mW. This result isalmost negligible comparedwith the 2.4W consumed bythe LEDs. These resistors arelarge value so as to consumeas little power as possible.R
3 allows fine adjustment of
VTH
to match the actual dropacross the LED string.
A startup current limiter
has been included to limitthe large inrush current surgethrough C
1 and Q
2 that would
occur if the ac were switchedon at a time in its cycle justbefore V
TH was reached.
A current-limiting resistorwould reduce efficiency onevery cycle, but R
9 limits only
the surge to 1.35A at power-up until C2
charges sufficiently to turn on Q3.
As the ac input increases, the powerconsumption of the chopper rises a little
and power efficiency decreases some-what, as shown in Table 1.
This improved circuit can run at96V to 260V ac (at 50 Hz). For a largerLED current, increasing the capacity ofC
1 and decreasing the resistance of R
5
designideas
52 EDN | JANUARY 2013 [www.edn.com]
Q2IRF830 R5
100
C2220 F
63V
R4
470k1W
D215V
R310k
R2
39k
D1
39V
C1
100 nF
R1
101W
L12.2 mH
D3
1N4004
Q1
BC547
+
I=20 mA
1N4004 1N4004
1N4004 1N4004
LINE
NEUTRAL
Figure 2 The chopper operation is similar to the circuit of
Figure 1; the larger LED seriesresistor, instead of a constant-current source, provides the current-limit function.
Q2IRF830
D6BZX55-C7V5
D5BZX55C68
D31N4004
D41N4004
R65
1%
R43.3MR1
649k
R2649k
R320k
R563.4
C122 F200V
+
IC1
LM317AH
VIN VOUT
ADJ
20 mA AT 120V
Q1
MPSA44
D2
1N4004
D1
1N4004
_
+96 TO
260VRMS
AC
VOLTAGE CHOPPER
50 Hz
4A
D8
R10
6k
STARTUPCURRENT LIMITER
Q3
IRF830
B Z X 5 5 C 7 V 5
R8
178k
C2
0.1 µF
R7
2.67M
R9
100
D7
Figure 3 This circuit achieves an efficiency improvement by using tight control of the switching threshold to provide just barely
are suggested. For a different LED opera-tion voltage, some parameters should berecomputed in the same way as in theforegoing analysis. The lower the LEDoperation voltage is, the lower the ac
input voltage can be. This Design Ideacan also apply to ac at 60 Hz.
Author’s notes:1. Use high-voltage through-hole
resistors or series surface-mount resis-tors to achieve at least 400V withstand.A fuse is suggested for safety againstshorts.
2. Safety warning for novice experi-menters: Lethal voltages are presentin this circuit; use caution when test-ing and operating it. If scoping, use an
isolation transformer to float the cir-cuit’s ac input from earth ground; donot float the oscilloscope chassis. Thescope ground cannot be connected tothe circuit without isolation.
3. Donot
push the button with acvoltage applied. For safe maintenance,keep pressing the button to discharge C
1
through R10
until D8 goes out.EDN
REFERENCES1 Sheard, Steve, “Driver circuit lightsarchitectural and interior LEDs,” EDN , Aug 11, 2011, pg 41, www.edn.com/4368306.2 Babu, TA, “Offline supply drivesLEDs,” EDN , April 21 2011, pg 58,www.edn.com/4369648.
↘Battery-operated equipment oftenwill benefit from a power-on indi-
cator. The indicator, however, can wastesignificant power. In situations where a
low-duty-cycle blinking indicator pro-vides an adequate indication of the
power being turned on, the simple circuitdescribed here should prove useful.
A tiny, single-gate Schmitt-triggerlogic inverter, the SN74AHC1G14,
together with two resistors, a Schottkydiode, and a capacitor form the tim-
ing generator of the blinker, shown in Figure 1. The output waveform has aperiod of about 0.5 sec and a very lowduty-cycle value, of around 1%. Theinterval of low-output duration, T
L, of
the generator is expressed as
TL=RTC×ln 1+2
−1VCC
VHYST
,
where VHYST
is the hysteresis voltage atthe input of IC
1 and V
CCis the sup-
ply voltage of IC1.
For VCC=4.5V, the typical value
for VHYST
is 0.75V. For the requiredvalue of T
L=0.5 sec, a value for R
T
of 200k was selected. The value ofthe timing capacitor, C, can be cal-culated from the equation, with asmall amount of algebraic rearrang-ing, as 7.45 µF. The nearest standard
value is 6.8 µF; a tantalum solid-electrolytic capacitor is used forthis value. To achieve the low dutycycle of the generator, the high-output duration, T
H, is shortened
by speeding up the time to chargecapacitor C. This is done throughthe additional resistor, R
CH, and the
series-connected Schottky diode,D
1S. The forward voltage drop at
D1S
is no more than 200 mV andcan be neglected. The LED is on forapproximately (1/100)×T
L≈5 msec.
The LED driver comprises a
Low-duty-cycle LED flasher keepspower draw at 4 mWMarián Štofka, Slovak University of Technology, Bratislava, Slovakia
designideas
54 EDN | JANUARY 2013 [www.edn.com]
Figure 4 The yellow and blue traces,respectively, present the voltageacross C
1 and R
6 in the circuit at
220VRMS
(at 50 Hz ac). The two tracesremain at the same position whenthe ac input changes from 96V
RMS to
260VRMS
.
GND
VCC
IC1+C6.8 µF
TANTALUMSOLID
RT
240k
RCH2.2k
100 nF
D1S
TMM BAT42
D2S
TMM BAT42
D1
1N914
D2
1N914
RS
68 RB2k
RE
2k
Q1
4.4V
LED
2N4403
Q2
2N3904
NOTE: LED IS A HIGH-RADIANCE TYPE.
Figure 1 Q1 and Q
2 function as a current source and push a constant current through the
LED regardless of its forward voltage drop (within the compliant voltage limitations). TheSchmitt inverter forms a classic square-wave generator, modified with R
switchable current source. At a high logiclevel at the cathode of Schottky diodeD
2S, a constant current flows through the
LED with a value of roughly IO≈
0.7V/RS,or about 10 mA in this circuit.Series-connected silicon diodes D
1
and D2 provide strong nonlinear nega-
tive feedback. If for any reason the volt-age drop across the sensing resistor, R
S,
rises, the D1-to-D
2 connection will force
almost the same increase in voltage atthe emitter of Q
2. This increase reduces
the collector current of Q2 and, there-
fore, the base current of Q1 and closes
the loop; the net result is a reduction ofthe collector current of Q1 to maintain
a constant value. Note that when the output of IC
1
goes low, the current through D2S
andresistor R
B is negligible. This is due to
the fact that, with the output of IC1 low,
the base of Q2 is held low, turning it and
the current source off. With the currentsource off, the LED is off as well, andonly microamps of leakage current flow
through D2S and RB. If you use all surface-mount devices, you can build the circuiton a board no larger than 16×16 mm.
This work was supported by the SlovakResearch and Development Agencyunder contract no. APVV-0062-11.EDN
↘Rotary encoders are typicallyused in positioning systems with
servo feedback in which the cost of theencoder usually is of minor impor-tance. Encoders, however, are also usedin user interfaces to encode the posi-tions of knobs—the volume knob onan audio system, for example. For thoseknobs, you have the choice betweeneither a potentiometer boasting lowcost, high resolution, and absolute
readout but only limited travel—typi-cally less than 340°—or a mechanical-optical rotary encoder, which has end-less travel but a higher cost, low resolu-tion, and only relative readout. The
Design Idea presented here attempts tocombine the advantages of the poten-tiometer with the endless operation ofthe mechanical-optical rotary encoder.
The encoder uses standard poten-tiometer construction techniques andis thus easily produced. It basically is adual-wiper quadrature endless pot. Itconsists of a full ring of resistive mate-rial, which is powered from oppositesides and on which two electrically
independent wipers move. The wipersare mechanically connected to eachother at an angle of 90° ( Figure 1).
An ADC on a microcontrollerreads out the two signals; firmware uses
both signals todetermine inwhich quad-rant the axis islocated. Oncethe quadrant isknown, the sig-
nal of both wipers can be used to cal-culate the position of the axis. Whena wiper reaches the top or bottompower connections, its signal should beignored because of nonlinear response( Figure 2). Both wipers cannot be inthis nonlinear position at the sametime because of the 90° angle betweenthe wipers. Today, even the most basicmicrocontrollers offer a 10-bit ADC,so the combined signals give an 11-bit
resolution, or better than 0.2°. Themicrocontroller can ignore the abso-lute readout if the application doesnot require it or when a software resetis useful.
This quadrature endless pot pro-vides a user experience similar to theold tuning knob of a classical analogradio. It offers new possibilities inhuman-interface design and can givea quality feel in consumer products atlow cost.EDN
Rotary encoder with absolute readout offershigh resolution and low costMichael Korntheuer, Vrije Universiteit Brussel, Brussels, Belgium
V+
AIN0P1
P2 AIN1
MICROCONTROLLER
RESISTIVE MATERIAL
V+ P1
0°
0
180° 360° 540°
P2
NOT LINEAR
Figure 1 The encoder is a dual-wiper quadrature endless
potentiometer that consists of a full ring of resistive material,
which is powered from opposite sides and on which two
electrically independent wipers move.
Figure 2 When a wiper reaches the top or bottom power
connections, its signal should be ignored because of
↘The circuits presented here use ananalog switch—such as a DG419
or one-third of a CD4053—to combinean analog signal with a standard PWMsignal. Most microcontrollers can easilygenerate the PWM signal. Combiningthe PWM signal with the analog signaland lowpassing the result effectivelymultiplies the analog signal by a digitalvalue. Such a circuit can be useful insignal processing, power factor correc-tion, automatic gain control, and sensor
interfacing. All four circuit variants relyon the same principle: using the analogswitch to adjust the duty-cycle ratiobetween two analog input levels, and alowpass filter (LPF) to eliminate thePWM chopping frequency.
Figure 1a depicts a multiplier incor-porating a second-order Sallen-KeyLPF. The active filter provides the bestac performance, effectively eliminat-ing the chop frequency and passingslower ac signals through with minimalattenuation. Since the analog switch isselecting either the analog input signalor ground, the output voltage is equalto V
IN×D, where D is the duty cycle of
the PWM signal; its value ranges from0 to 1.
Figure 1b shows a variation of thiscircuit. Using the switch node former-ly grounded as an additional analoginput produces a circuit that gives anoutput equal to (A×D)+(B×(1–D)).The PWM duty cycle selects the ratio
between the two input signals and pres-ents the result at V
OUT.
The filter cutoff frequency shouldbe optimized for the PWM frequencyused. The values depicted provide a
∼10-kHz cutoff frequency. This shouldbe satisfactory in most applicationsfor an 8-bit PWM clocked at 16
MHz (a PWM frequencyof 62.5 kHz). Responsetime will be less than 200µsec; noise will be lessthan 1 LSB. The cutofffrequency can be easilychanged by adjusting R
1
and R2, or C1 and C2. It isimportant that R
1=R
2 and
C2≈0.5×C
1. Doubling the
resistor or capacitor val-ues will halve the cutofffrequency; halving themwill double the frequency.
Figures 2a and 2b showa simpler version of theprevious circuits; they havea much slower response,however, and hence are
useful only for generating a dc voltageor a low-frequency ac signal. Again, theroll-off of the LPF should be optimizedto block the PWM frequency. For the8-bit PWM frequency described earlier,the depicted 10k and 0.1 μF provide aresponse time of 5-msec and less than 1LSB of noise.
Since all of the circuit variationshave a dc gain of 1, the discrete compo-nent values affect ac performance only.These circuits are capable of high dcprecision without the use of expensive
precision components.EDN
Two-IC circuit combines digital and analog signalsto make multiplier circuitRick Mally, Independent Designs LLC, Denver
2
3
1 VOUTR2
10kR1
10k
S1
C2
0.01 F
C1
0.0047 F
VIN
A
PWM
(a) (b)
B
PWM
Figure 1 The use of an analog (CMOS) SPDT switch and an op amp configured as an LPF forms
a simple multiplier circuit that can be used as either a digitally controlled gain block (a) or a
cross-fader (b).
Figure 2 The active two-pole LPF can be replaced with a simpler single-pole passive
circuit when slower response times are acceptable. Again, depicted are a gain block
↘Process-control applications usecurrent loops to send information
as an analog signal over long distanceswith high noise immunity. Using thethree-chip circuit in Figure 1, you canmeasure alternating current or voltageand transmit the results on a 4- to20-mA current loop. The circuit accepts
a 0- to 10-mV ac RMS input and pro-vides a 4- to 20-mA output.
The input signal creates a floatingvoltage across sensing resistor R
SENSE,
whose size produces 0 to 10 mV RMSfrom the expected sensed current. This
floating voltage is the input to a differ-ential-input, single-ended AD22050sensor interface, IC
1.
IC1 operates at a gain of approxi-
mately 20 and drives the low-imped-ance (8-kΩ) input (pin 1) of theAD736 RMS-to-dc converter (IC
2).
This converter’s full-scale range is 200
mV RMS. IC2’s output drives IC3, anAD694 voltage to 4- to 20-mA current-loop interface.
Because of their low power consump-tion, both IC
1 and IC
2 can operate from
the 10V supplied by IC3’s reference out-
Current loop transmitsac measurementMark Fazio, David Scott, and Bob Clarke, Analog Devices, Wilmington, MA
Originally published in the Aug 6, 1992, issue of EDN
CLASSICS
Figure 1 This circuit measures alternating current or voltage and transmits the results on a 4- to 20-mA current loop.
put at pin 7. IC3, and hence the entire
circuit, operates from the standard 24Vloop supply. Because this circuit oper-ates from a single supply, you must biasIC
2’s common input at one-half of IC
3’s
10V output, or 5V. The voltage dividercomprising R1 and R
2 divides the 10V
to 5V. R2 is in parallel with a 10-kΩ
resistor inside IC3.
IC3’s internal buffer amplifies the
difference between IC2’s output at pin 6
and the 5V rail. This difference rangesfrom 0 to 200 mV dc for a 0- to 10-mVRMS input and produces a 4- to 20-mAcurrent output from IC
3. R
3 allows you
to adjust the circuit’s gain. R4 and R
5
set the gain of IC3’s internal ampli-
fier to 10. R5 matches R
4 to prevent
offsets due to the internal amplifier’sinput-bias current. This circuit’s accu-racy is 1.2% of readings from 20 Hzto 40 Hz and 1% of readings from 40Hz to 1 kHz. The −3-dB bandwidth is33 kHz.EDN
Microchip Technology Inc’s dsPIC33FJ09GS302 family of dsPIC33 GS
series digital signal controllers extends its dsPIC DSC portfolio, addinglower-cost options for digital-power conversion. The family enables higher effi-ciency in ac/dc and dc/dc power supplies, high-intensity-discharge and LEDlighting, solar inverters, and other power-conversion applications. The five-member family is optimized for digital-power applications via integrated high-speed ADCs; a zero-wait-state signal-processing core; and flexible, high-resolu-tion PWMs. The new DSCs offer the lowest power dissipation of any of the GSfamily members and are the first available in a 20-pin SSOP and the smaller36-pin VTLA package, which has a 5×5-mm footprint. Volume prices (5000)range from $2.17 to $2.56. The MPLAB Starter Kit for Digital Power, Part No.DM330017, sells for $129.Microchip Technology, www.microchip.com
productroundupE2PROM, and 32 kbytes of RAM. TheMCUs support in-packet antennadiversity, which lets systems choose thebest antenna on every packet received.Currently sampling with lead custom-ers, JN516x evaluation kits and chipsare scheduled to be available thismonth. NXP has provided a videoshowing an energy-harvesting demowith CHERRY using the JN5168 MCU;view it at www.edn.com/44017920.NXP Semiconductors,
www.nxp.com
TI MSP430 featuresseparate main and I/Osupply rails
↘The MCUs in Texas Instruments’MSP430F521x/F522x family fea-
ture a main supply rail (1.8 to 3.6V) andI/O supply rail (1.8V ±10%). Designedto reduce power requirements for co-processor designs, the dual-rail capabil-
ity allows for a seamless interface toother devices that have a nominal 1.8VI/O interface without the need forexternal level translation. The F522xMCUs are avail-able in configu-rations with four16-bit timers; ah i g h - p e r f o r -mance, 10-bitADC; two uni-ver sa l s e r i a l
communicationinterfaces; hardware multiplier; DMA;comparator; and real-time clock modulewith alarm capabilities. The F521xdevices include all the F522x peripher-als except the ADC. TI offers theMCUs in 48- and 64-pin QFN and80-pin BGA options with up to 128kmemory, as well as in a 3.5×3.5-mm YFFpackage (available in the first quarter).MSP430F521x/F522x MCUs are pricedfrom $2.05 (1000); samples are imme-diately available.
Texas Instruments, www.ti.com
62 EDN | JANUARY 2013 [www.edn.com]
NXP ultralow-power wireless family targetsthe Internet of Things
↘ NXP Semiconductors hasannounced the JN516x family of
ultralow-power wirelessmicrocont ro l l e r s f o r JenNet -IP, ZigBee , andother IEEE 802.15.4 appli-ca t i o n s u s i n g NX P802.15.4-based software
stacks. Designed for use
within the Internet of Things, theMCUs are intended for applications
ranging from smart lightingand home automation to wire-less sensor networks. The newdevices integrate an MCU; a2.45-GHz radio; analogperipherals; and up to 256
↘Digital Core Design’s DT8051,an area-optimized soft core of a
single-chip 8-bit embedded microcon-troller, can run in very small FPGAdevices or can be just a tiny fragment ofa system-on-chip ASIC. The DT8051soft core is 100% binary compatiblewith the industry-standard 8051 8-bitmicrocontroller but has a very low-gate-
count architecture,providing six 650ASIC gates for thecomplete systemwith peripheralsand the DoCD on-
chip debugger. TheDT8051 includes a
two-wire DoCD on-chip debugger, upto eight external interrupt sources, anadvanced power-management unit,timers zero and one, I/O bit-addressableports, full-duplex UART, and interfacefor external SFR.Digital Core Design, www.dcd.pl
ST extends on-chip
memory options forCortex-based MCUs
↘STMicroelectronics’ STM32F427 and F437 MCUs combine
an ARM Cortex-M4 core with 1 or2 Mbytes of flash and extra SRAM. Thedevices are intended for embedded sys-tems that need to run richer applica-
tions with extra communica-tion ports, enhanced secu-
rity, and low power con-sumption. All of the
ex t en d ed 1 - an d2-Mbyte variants have256-kbyte SRAM, allow-
ing designs using currentdevices with 1-Mbyte flash and up
to 192-kbyte SRAM to move easily toan MCU with higher SRAM if required.The F437 provides enhanced security toprotect developer IP and end-user dataagainst unauthorized access. The micro-controllers are slated to enter full pro-duction during the first quarter. Theprice of the STM32F427VGT6 with
1-Mbyte flash and 256-kbyte SRAM in
an LQFP100 package is $7.45 (1000).The price of the STM32F437IIH6 with2-Mbyte flash, 256-kbyte RAM, and acrypto/hash processor in a UFBGA176package is $9.50 (1000).
STMicroelectronics,www.st.com
Renesas ultralow-power series targetsautomotive-body apps
↘Renesas Electronics Corp’sRH850/F1x series of 32-bit
MCUs with on-chip flash for automo-tive-body applications comprises morethan 50 low- to high-end products in
three families: the RH850/F1L, RH850/F1M, and RH850/F1H. All share thesame CPU core architecture and thesame selection of peripheral functions,allowing common software to be usedfor different systemunits, and all prod-ucts in the seriesincorporate power-supply-shutoff cir-cuit technology forreduced currentconsumption. The series offers on-chip
flash capacity from 256 kbytes to 8Mbytes. Dual-core versions are alsoplanned to be available in the RH850/F1H group. Samples of the RH850/F1Lare scheduled to be available in thesecond quarter. Mass production of theRH850/F1L is scheduled to begin in2014.Renesas, am.renesas.com
Maxim adds single-chip
protection for portablefinancial systems
↘Maxim Integrated’s MAX32590,based on the ARM926EJ-S pro-
cessor core, provides improved securityfeatures targeting the latestsecurity standards forfinancial terminals andnew generations oftrusted devices,such as multime-d ia-enab led ,
portable EFT-
POS terminals. The MAX32590, thelatest member of Maxim’s DeepCoversecurity products, combines enhancedsecurity features with more connectiv-ity options. With new features for exter-
nal memory encryption and integritychecking, the device is designed to sim-plify system integration as well as pro-vide better IP protection and strongeroverall protection against attacks. Thechip is available now in productionquantities. Maxim also offers a finan-cial-terminal reference design based onthe MAX32590.Maxim, www.maximintegrated.com
is a high-performance radio capable of upto 600 kbits/sec using complex modula-tion schemes (GFSK, MSK, GMSK, andOOK). The radio operates at multiplefrequencies in the range of 290 to1,020 MHz, supporting ISM bands inmany regions of the world. For applica-tions connecting wireless sensors,
controls, displays, appliances,and machinery, theKW01 can support pro-prietary protocols aswell as such standardsas IEEE 802.15.4e/g,6LoWPAN, WMBUS(EN13757-4), KNX, andEchonet. The MCU is based onan ARM Cortex-M0+ processor runningup to 48 MHz with 128 kbytes of flashand 16 kbytes of SRAM, consuming as
little as 40 µA/MHz in typical condi-tions. Volume production is expected inthe first quarter.Freescale Semiconductor,
www.freescale.com
Atmel Cortex-M4-basedMCUs boost efficiency
↘Atmel Corp’s SAM4L ultralow-power MCUs, based on the ARM
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productroundupMHz in active mode, 1.5 µA in sleepmode with full RAM retention, and 700nA in backup mode. Intended for por-
table and battery-powered designs tar-geting industry, medical,and consumer applica-tions, the devices com-bine 48-MHz operationwith 128- to 256-kbyteflash; 32-kbyte SRAM;audio DAC; 15-chan-nel, 12-bit ADC; DAC;
multiple interface options; 4×40-segment LCD controller; and 32-chan-nel capacitive-touch controller. Pricedat $3.90 to $4.12 (1000), the devices are
available in a peripheral-limited LSseries and a fully configured LC series,and in 48-, 64-, and 100-pin options forboth QFP and QFN packages. TheSAM4L-EK evaluation kit is availablenow. Atmel, www.atmel.com
Infineon expands XMC4000 familywith high-res PWM
↘Infineon Technologies AG hasadded three performance classes
in its XMC4000 microcontroller family,which targets industrial applicationsand is based on the ARM Cortex-M4.The XMC4400, XMC4200, andXMC4100 are the first Cortex-basedmicrocontrollers to offer a high-resolu-tion pulse-width-modulation unit,according to Infineon. With a PWMresolution of 150 psec, they are suitedfor digital power conversion in inverters
as well as switching and uninterruptiblepower supplies. Other applicationsinclude I/O units in automation,
human-machine interfaces, and loggingand control systems. Samples of allthree series are available. High-volumeproduction is scheduled to start at theend of the second quarter.Infineon Technologies,
www.infineon.com
ARM 64-bit Cortex-A50serves single-processoror multicore apps
↘ ARM Ltd’s 64-bit Cortex-A50processor series comprises the
Cortex-A57, targeting high-perfor-mance app l i cat ions , and theCortex-A53, ARM’s most power-effi-cient application processor. The coresoffer higher performance for ARMv7
32-bi t code in theAArch32 execution statewhile also supporting
64-bit data and larger vir-tual addressing space in the
AArch64 execution state.
Accordingly, ARM expects theCortex-A50 processor series to drivea seamless transition from 32- to 64-bitapplications and to offer scalability foremerging mobile-computing clients andfuture “superphones.” The processorscan operate both in single-processorconfigurations and in ARM’s multicore,big.Little processor configuration,which lets applications use the optimumprocessor for each task. ARM,
www.arm.com
Fujitsu touts hardwaresecurity for automotiveinstrument cluster
↘Fujitsu Semiconductor Europehas expanded its scalable lineup
for automotive instrument clusters. Thenewest member of Fujitsu’s FCR4family, the MB9DF125 Atlas-L, is basedon the ARM Cortex-R4 core and
includes a Secure Hardware
Extension module that isfully hardware-imple-
mented to ensurethe highestlevels of secu-
rity. Operatingat up to 128 MHz,
the core offers process-ing power of more than
200 Dhrystone Mips, togetherwith 1 Mbyte of flash and 128
kbytes of RAM. Atlas-L will ship in an
LQFP-176 package. First samples areavailable now.Fujitsu Semiconductor,
www.fme.fujitsu.com
SiLabs 8-bit controllersintegrate temperaturesensors for accuracy
perature sensor with best-in-class accu-racy over an extended range withoutcalibration. The family combines inte-grated high-performance analog periph-erals with a fast 8051 CPU in a compactpackage. The on-chip temperature sen-sor provides ±2°C accuracy—five timeshigher, the company claims, than com-peting MCUs—in a 30% smaller pack-age. The devices are a first for SiliconLabs MCUs, with 512 bytes of E2PROMsupporting 10 times more write/erase
cycles (1 million, versus 100k typical)and faster pro-g r a m m i n gt imes thanstandard flashimplementa-tions. Pricing( 1 0 , 0 0 0 )begins at 98cents. The C8051F390-A-DK andC8051F370-A-DK development kitsare available for $69; the ToolStick370-A-DC daughtercard is available for $9.
Silicon Labs, www.silabs.com
Company Page
Agilent Technologies 17, 41, C-3
America II 21
Coilcraft 3
CST of America 19
Digi-Key Corp C-1, C-2
Ellsworth Adhesives 36
EMA Design Automation Inc 11
Emulation Technology 35
Epcos Inc 25
Interconnect Systems Inc 49
International Rectifier 8
Ironwood Electronics 65
Keystone Electronics 23
Linear Technology 50A–50B,C-4
LPKF 37
Maxim Integrated 53
Memory Protection Devices 12
Mill-Max Manufacturing 13
Mouser Electronics 6
National Instruments 4
Pico Electronics Inc 7, 43
RF Monolithics Inc 33, 45
Rohde & Schwarz 15, 30
Signal Consulting 50
Stanford Research Systems 29
UBM EDN 27, 57, 5961, 64
Wind River 46
ADVERT ISER INDEX
EDN provides this index as an additional service. Thepublisher assumes no liability for errors or omissions.
MCU
DATA SHEETS
Find data sheets on these andsimilar products, searchable bycategory, part number, descrip-tion, manufacturer, and more,at www.datasheets.com.
Such a fence behaves as an earth-return transmission line with an imped-ance of around 600Ω, depending onconstruction. The system polarity isdecided based on resistance to light-ning, which usually consists of nega-tive current into the fence from a direct
strike, though positive current maycome from a strike nearby. The systemI was developing used biased blockingdiodes to prevent the pulse from fryingthe electronics (not to mention avoid-ing the loud click in the ear). Detectionof a dc bias on the fence turned on aDTMF decoder to select the receiver.
Field trials were essential. On onefarm, the DTMF decoder provided anoutput burst a couple of times and thendied. Testing with a blocking diode andoscilloscope showed a positive pulse of
12 µsec after the negative controller
pulse. Assuming a velocity factor of0.7, that gave a range of 1.25 km, orabout three-quarters of a mile. WhenI checked the fence leakage to ground,however, it was more than 3 kΩ for thewhole farm. The controller included acircuit to eliminate positive pulses. How
could a low impedance have invertedthe pulse polarity?I drove out in a truck to the 1.25-km
distance on the odometer. I didn’t seeany stray wires going into the ground,a common problem. When I got out ofthe truck, though, I noticed an audibleclick with a 1-sec interval.
I took a look at the fence. The farmerhad used steel posts and had cut lengthsof plastic hose, with a lengthwise slit, forinsulators. A thin wire tied the hose tothe post. Though there was insulation,
the air gap was breaking down with the
FRANK W BELL • KYBERNETIX LLC
D A N I E L V A S C O N C E L L O S
Nonlinear transmission lineskeep developer on the fence
I
n 1982, I was developing a phone and telemetry system tooperate on New Zealand farmers’ electrified fences. Thecontroller that generated the jolt was usually a mains-poweredpulse generator, and better units produced mostly unipolar
pulses of up to 5 kV for a duration of about 20 msec, repeatedabout once a second—not lethal, but enough to kill any
notion of touching the fence again. The high voltages were eveneffective on unshorn, woolly sheep.
pulse from the controller and producinga positive polarity reflection. I explainedthe problem to the farmer, who laterinstalled proper insulators and told me
the fence worked “much better now.”After diagnosing the cause of thefailure of my prototype electric fencetelephone/DTMF controller, I installedadditional clamping so that positive puls-es would not reach the DTMF decoder. Normally, farmers did their testing with-out any instruments—though perhapswith rubber gumboots—by touching thefence and a blade of grass, but testing inthis environment required battery-pow-ered oscilloscopes, as the voltage on thegrounding points could easily exceed the
rated insulation of the mains-poweredequipment. The educational materialfor the controller installation made itclear that the controller ground had tobe well separated from the ground of theac mains because of such voltages.
On another farm, connectionsbetween phones along the fence wereintermittently dropping out betweencontroller pulses. I checked out thefence, which was so rusty that I had towork the alligator clips—with insulatedpliers, of course—to get a connection
to the metal underneath. The connec-tions between wires were simply loopsholding loops. These also were rustyconnections, and the arc of the pulsetemporarily welded the wires together.Poor connections also cause AM radiointerference when they get rusty. Thefarmer replaced the rusty fence, whichwas becoming unreliable anyway.
In order to examine the high-volt-age pulses, we modified a Heathkit TVhigh-voltage probe using a capacitor
made from car-ignition cable with ametal conductor, a braid on the outside,and a divider and a compensation cir-cuit to correct the square waves from acalibration source (tube scope) of high-er-than-normal voltage. The TektronixEHT probe would have been better, butit wasn’t affordable.
The patent for the telemetry systemeventually expired without resulting ina successful product.EDN