EDCII

Experiment No. -1

Aim: To Plot the Frequency Response of a single stage RC Coupled Amplifier with feed back and without feed back and find the following:

1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product

Apparatus: 1. Digital Storage Oscilloscope (DSO)2. Power Supply3. Bread Board4. Signal Generator

Component: Resistances: 100k Ω = 01, 4.7k Ω = 01, 22k Ω = 01, 220k Ω = 01, 220 Ω = 01Capacitors: 10µf = 02, 47 µf = 01 Transistor BC107 = 01Connecting wire and DSO Probe

Introduction

A practical amplifier circuit is meant to raise the voltage level of the input signal. This signal may be obtained from anywhere e.g. radio or TV receiver circuit. Such a signal is not of a single frequency. But it consists of a band of frequencies, e.g. from 20 Hz to 20 KHz. If the loudspeakers are to reproduce the sound faithfully, the amplifier used must amplify all the frequency components of signal by same amount. If it does not do so, the output of the loudspeaker will not be the exact replica of the original sound. When this happen then it means distortion has been introduced by the amplifier. Consider an RC coupled amplifier circuit shown fig 1 shows frequency response curve of a RC coupled amplifier. The curve is usually plotted on a semilog graph paper with frequency range on logarithmic scale so that large frequency range can be accommodated. The gain is constant for a limited band of frequencies. This range is called mid-frequency band and gain is called mid band gain. AVM. On both sides of the mid frequency range, the gain decreases. For very low and very high frequencies the gain is almost zero.

In mid band frequency range, the coupling capacitors and bypass capacitors are as good as short circuits. But when the frequency is low. These capacitors can no longer be replaced by the short circuit approximation.

At low frequency, output capacitor reactance increases. The voltage across RL reduces because some voltage drop takes place across XC. Thus output voltage reduces.

The XC reactance not only reduces the gain but also change the phase between input and output. It would not be exactly 180o but decided by the reactance. At zero frequency, the capacitors are open circuited therefore output voltage reduces to zero.

The gain is constant over a frequency range. The frequencies at which the gain reduces to 70.7% of the maximum gain are known as cut off frequencies, upper cut off and lower cut off frequency fig. 2, shows these two frequencies. The difference of these two frequencies is called Band width (BW) of an amplifier.

BW = f2 – f1.

fig. 2

At f1 and f2, the voltage gain becomes 0.707 Am(1 / 2). The output voltage reduces to 1 / 2 of maximum output voltage. Since the power is proportional to voltage square, the output power at these frequencies becomes half of maximum power. The gain on dB scale is given by

20 log10(V2 / V1) = 10 log 10 (V2 / V1)2 = 3 dB.

20 log10(V2 / V1) = 20 log10(0.707) =10 log10 (1 / 2)2 = 10 log10(1 / 2) = -3 dB.

If the difference in gain is more than 3 dB, then it can be detected by human. If it is less than 3 dB it cannot be detected.

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Circuit:

Q 1

B C 1 0 7 A

R 34 . 7 K

R 11 0 0 K

R 22 2 K

R 42 2 0

C 1

1 0 U F D

C 2

1 n

C 21 0 U F D

0

Signal Generator

F R E Q = 1 K H ZV A M P L = 2 0 M VV O F F = 0 V

VDC = + 12V

To Digital Storage Oscilloscope (DSO)

B

A

Procedure: 1. Connect the circuit as shown in the diagram.

2. Apply a sinusoidal input signal of = from a signal generator.

3. Connect the output to the DSO

4. Measure output voltage and calculate gain

5. Keeping the input voltage constant vary the input frequency and note the output

voltage of the Amplifier till the output decrease upto a -3dB point.

6. Draw a graph between input frequency Vs output voltage

7. For without feedback short terminal A and B by a connecting wire and repeat

procedure 1 to 6.

Observation table Vin = 20mv

S. No Frequency Output voltage Voltage Gain Voltage gain in dB

10 Hz100 Hz1k Hz10 kHz100 kHz1MHz

Result:

1. Voltage Gain ………………………….

2. Lower cut off Frequency ……………………………

3. Upper cut off Frequency …………………………….

4. Bandwidth ……………………………

5. Gain Bandwidth Product …………………………..

Experiment No. -2

Aim: To Plot the Frequency Response of a Double stage RC Coupled Amplifier find the following:

1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product and loading effect


Component: Resistances: 100k Ω = 02, 4.7k Ω = 02, 22k Ω = 02, 220k Ω = 02, 220 Ω = 02Capacitors: 10µf = 04, 47 µf = 02 Transistor BC107 = 02Connecting wire and DSO Probe

Introduction

To increases the voltage gain of the amplifier, multiple amplifier are connects in cascade. The output of one amplifier is the input to another stage. In this way the overall voltage gain can be increased, when number of amplifier stages are used in succession it is called a multistage amplifier or cascade amplifier. The load on the first amplifier is the input resistance of the second amplifier. The various stages need not have the same voltage and current gain. In practice, the earlier stages are often voltage amplifiers and the last one or two stages are current amplifiers. The voltage amplifier stages assure that the current stages have the proper input swing. The amount of gain in a stage is determined by the load on the amplifier stage, which is governed by the input resistance to the next stage. Therefore, in designing or analyzing multistage amplifier, we start at the output and proceed toward the input.

A n-stage amplifier can be represented by the block diagram as shown in fig. 1

Fig. 1

In fig. 1, the overall voltage gain is the product of the voltage gain of each stage. That is, the overall voltage gain is ABC.

To represent the gain of the cascade amplifier, the voltage gains are represents in dB. The two power levels of input and output of an amplifier are compared on a logarithmic scale rather than linear scale. The number of bels by which the output power P2 exceeds the input power P1 is defined as

Because of dB scale the gain can be directly added when a number of stages are cascaded.

Types of Coupling:

In a multistage amplifier the output of one stage makes the input of the next stage. Normally a network is used between two stages so that a minimum loss of voltage occurs when the signal passes through this network to the next stage. Also the dc voltage at the output of one stage should not be permitted to go to the input of the next. Otherwise, the biasing of the next stage are disturbed.

The three couplings generally used are.

1. RC coupling2. Impedance coupling3. Transformer coupling.

RC coupling:

Fig. 2 shows RC coupling the most commonly used method of coupling from one stage to the next. An ac source with a source resistance R S drives the input of an amplifier. The grounded emitter stage amplifies the signal, which is then coupled to next CE stage the signal is further amplified to get larger output.

In this case the signal developed across the collector resistor of each stage is coupled into the base of the next stage. The cascaded stages amplify the signal and the overall gain equals the product of the individual gains.

The coupling capacitors pass ac but block dc Because of this the stages are isolated as for as dc is concerned. This is necessary to avoid shifting of Q-points. The drawback of this approach is the lower frequency limit imposed by the coupling capacitor.

The bypass capacitors are needed because they bypass the emitters to ground. Without them, the voltage gain of each stage would be lost. These bypass capacitors also place a lower limit on the frequency response. As the frequency keeps decreasing, a point is reached at which capacitors no longer look like a.c. shorts. At this frequency the voltage gain starts to decrease because of the local feedback and the overall gain of the amplifier drops significantly. These amplifiers are suitable for frequencies above 10 Hz.


Circuit:

Q 1

B C 1 0 7 A

R 34 . 7 K

R 11 0 0 K

R 22 2 K

R 42 2 0

C 1

1 0 U F D

C 2

1 0 U F D

C 31 0 U F D

0

Signal Generator


VDC = + 12V


B

A

Q 2

B C 1 0 7 A

R 54 . 7 K

R 61 0 0 K

R 72 2 K

R 82 2 0

C 4

1 n

C 51 0 U F D

0B

A

Fig. 2

Procedure:

1. Connect the circuit as shown in the diagram.

2. Apply a sinusoidal input signal of 20mv from a signal generator.










Result:1. Voltage Gain ………………………….



4. Bandwidth ……………………………

5. Gain Bandwidth Product …………………………..

` Experiment No. -3

Aim: To Plot the Frequency Response of a FET Common Source Amplifier find the following:



Component: Resistances: 8.2kΩ = 01, 4.7kΩ = 01, 470Ω = 01, 100Ω = 01Capacitors: 10µf = 02, 100µf = 01 FET BFW 11 = 01Connecting wire and DSO Probe

Introduction

When a small ac signal is coupled into the gate it produces variations in gate source voltage. This produces a sinusoidal drain current. Since an ac current flows through the drain resistor. An amplified ac voltage is obtained at the output. An increase in gate source voltage produces more drain current, which means that the drain voltage is decreasing. Since the positive half cycle of input voltage produces the negative half cycle of output voltage, we get phase inversion in a CS amplifier.

The ac equivalent circuit is shown in fig. 1

Fig. 1

The ac output voltage is


vout = - gm v gS RD

Negative sign means phase inversion. Because the ac source is directly connected between the gate source terminals therefore ac input voltage equals

Vin = Vgs

The voltage gain is given by

Circuit:

R 34 7 0

R 18 . 2 K

R 24 . 7 K

R 41 0 0

C 1

1 0 U F D

C 2

1 0 U F D

C 31 0 0 U F D

0

Signal Generator


VDC = + 12V


B

A

F E TB F W 1 1

S

D

G

Procedure:

1. Connect the circuit as shown in the diagram.

2. Apply a sinusoidal input signal of 20mv from a signal generator.









Result:1. Voltage Gain ………………………….



4. Bandwidth ……………………………

5. Gain Bandwidth Product ……………………………

Experiment No. -4

Aim: To study and calculate the input and output impedance of Darlington Amplifier and also calculate the amplification factor. Apparatus:

1. Power Supply2. Bread Board3. DMM

Component: Resistances: 100Ω = 01Transistor BC107 = 01Transistor SL100 = 01Connecting wire and DSO Probe

Introduction

Theory: consists of two emitter followers in cascaded mode as shown in fig. 1. The overall gain is close to unity. The main advantage of Darlington amplifier is very large increase in input impedance and an equal decrease in output impedance .

Fig. 1


Output impedance:

The Thevenin impedance at the input is given by

RTH = RS || R1 || R2

Similar to single stage common collector amplifier, the output impedance of the two stages zout(1) and zout(2) are given by.

Therefore, t he output impedance of the amplifier is very small.

Circuit:

B C 1 0 7 A

S L 1 0 0

R 11 k

VDC

-

+B

-+

E

E

C

C

B

Vout

VinOutput

Driver

VDC= +12V

Darlington Trasistor Amplifier

Procedure:

1. Connect the circuit as shown in diagram.

2. Connect the DC voltage source to the input of BC 107 transistor through a DMM

connected in a ammeter mode.

3. Connect 100Ω resistance to the emitter , through another DMM connected as an ammeter

4. Adjust the input voltage to 5v and note down the reading of input current and output

current.

5. Also measure the output voltage (voltage gain is less then 1)

6. With the value of ammeter , calculate the amplification factor of a transistor β1

7. Repeat same procedure for SL 100 transistor and find out the amplification factor of

SL100, is β2

8. Now, connect dc voltage to the base of transistor BC107 , connect BC 107 emitter to base

of SL100 and 100Ω resistance to SL 100 emitter , which form the Darlington circuit.

9. Measure the input current and voltage , output current and voltage.

10. Total current gain = β1× β2

11. Ration of input voltage and input current gives impedance and ration of output voltage

and output current gives output impedance

Result:1. Amplification factor β1…………………………………

2. Amplification factor β2 …………………………………..

3. Total current gain β1× β2 ………………………………

4. Input impedance………………………………..

5. output impedance……………………………..

Experiment No. -5

Aim: To Study BJT Differential Amplifier and measure its CMRR

Apparatus: 1. Digital Storage Oscilloscope (DSO)2. Power Supply3. Bread Board4. Signal Generator 5. Multi meter

Component: Resistances: 1kΩ = 02, 470Ω = 02, 5.6KΩ = 01, Transistor BC107 = 02Connecting wire and DSO Probe

Introduction

A long tailed pair is a common design in electronics for implement a differential amplifier. Its amplifies the current with very little voltage gain. It consist of two bipolar junction transistor (BJT) , FET connected so that the BJT emitters or FET sources are connected together . The common electrode s are then connected to a large voltage source through a large resistor forming the long tail of the name the long tail providing an approximate constant current source. In more sophisticated designs a true (active ) constant current source may be substitute for a long tail.

Connect in fashion , this gives the circuit two input which are differentially amplifies (Subtracted and multiplied) by the pair. The output may be a single ended or differential depended on the need of the subsequent circuitry.

Circuit:

B C 1 0 7

B C 1 0 7

R 1

1 k R 21 k

R 35 . 6 k

R 4

4 7 0

R 5

4 7 0VDC

VC1 out

-

+

V2 inV1 in

VC2 out

-12v

+12vEmitter Coupled Diffential Amplifier

Fig. 1

Procedure: for DC characteristics

1. Connected the circuit as shown in figure.

2. Adjust the dc voltage of the voltage source to 0.15v with multi meter .

3. Connect DC voltage source output to one of the input terminals of the differential

amplifier and short the other input to ground.

4. Measure the DC out put voltage between two collector of the differential amplifier with

DMM

5. Calculate differential Gain AV output/ input

6. Now connect both the inputs together to the DC voltage source , and adjust the voltage to

2V

7. Again measure the DC output voltage between two collector out put of differential

amplifier with DMM

8. Calculate the common mode gain AC output/input

9. With the above value calculate the CMMR = Ad/AC

Procedure: for AC Characteristic

1. Adjust the AC voltage of the signal generator to 10mv RMS voltage (IKHz) 2. Connect signal generator out put to one of the input terminal of a differential amplifier

and short the other input to ground.3. Measure the AC output voltage between two collector output of a differential amplifier

with DMM4. Calculate the differential gain Ad = output/input5. Now connect both input together to the signal generator , and adjust the voltage to 200mv6. Again measure the AC output voltage between two collector outputs of the differential

amplification with DMM7. Calculate the common mode gain Ac output / input8. With the above values calculate the CMRR = Differential gain / common mode gain

Result:

Differential gain :………………………….

Common mode gain……………………….

CMRR :…………………………………..

Experiment No. -6

Aim: To Construct RC phase shift oscillator and to measure the output frequency


Component: Resistances: 100kΩ = 01, 10kΩ = 01, 5.1KΩ = 01, 1kΩ = 04Variable resistance = 10kΩ = 01 Transistor SL100 = 01Capacitor 0.1ufd = 06Connecting wire and DSO Probe

Introduction

Transistor Phase Shift Oscillator:

At low frequencies (around 100 kHz or less), resistors and capacitors are usually employed to determine the frequency of oscillation. Fig shows transistorized phase shift oscillator circuit employing RC network. If the phase shift through the common emitter amplifier is 180°, then the oscillation may occur at the frequency where the RC network produces an additional 180° phase shift.

Since a transistor is used as the active element, the output across R of the feedback network is shunted by the relatively low input resistance of the transistor, because input diode is a forward biased diode

Hence, instead of employing voltage series feedback, voltage shunt feedback is used for a transistor phase shift oscillator.

Circuit:

Q 1

B C 1 0 7 A

R 15 . 1 k

R 21 0 0 K

R 31 0 K

C 1

0 . 1 u f d

C 2

0 . 1 u f d

C 30 . 1 u f d

V 1

F R E Q = 1 k H z

V A M P L = 2 0 m v

BA

signal generatorOUTPUT

DSO

+12V

R 51 0 K

R 61 k

Fig.1

Q 1

B C 1 0 7 A

R 15 . 1 k

R 21 0 0 K

R 31 0 K

C 1

0 . 1 u f d

C 2

0 . 1 u f d

C 30 . 1 u f d

B OUTPUTDSO

+12V

R 51 0 K

R 61 k

R 71 k

C 4

0 . 1 u f d

R 1 01 k

R 1 11 k

C 5

0 . 1 u f d

C 6

0 . 1 u f d

0

Feedback

Fig.2

Procedure :

1. Connect the circuit diagram shown in fig.12. Apply a sine wave from a signal generator to the input terminal of the network and

observe the out put of the circuit on DSO3. Vary the frequency of the signal generator and find out the amplitude of output at each

frequency.4. Find the frequency of signal generator at which the output of circuit becomes 1/29of the

input.5. Also make sure that at this frequency the output and inputs of RC network are exactly

180o out of phase.6. Now connect the circuit shown in fig.27. Observe the output of the RC phase shift oscillator 8. Adjust the variable resistance until we get undistorted output9. Find frequency of the out put10. Calculate the theoretical frequency by fo = 1/2Π√6RC

Result:

Compare both theoretical and practical frequencies

Experiment No. -7

Aim: To study Wein Bridge Oscillator and to measure the output frequency

Apparatus: 1. Digital Storage Oscilloscope (DSO)2. Power Supply3. Bread Board4. Multi meter

Component: Resistances: 10kΩ = 03, 2.7kΩ = 02, 100Ω = 01, 1kΩ = 03Variable resistance = 1kΩ = 01 Transistor SL100 = 02Capacitor 0.1ufd = 02, 47ufd = 03Connecting wire and DSO Probe

Theory Wien Bridge Oscillator:

The Wien Bridge oscillator is a standard oscillator circuit for low to moderate frequencies, in the range 5Hz to about 1MHz. It is mainly used in audio frequency generators.

The Wien Bridge oscillator uses a feedback circuit called a lead lag network as shown in fig 1

Fig.1

At very low frequencies, the series capacitor looks open to the input signal and there is no output signal. At very high frequencies the shunt capacitor looks shorted, and there is no output. In between these extremes, the output voltage reaches a maximum value. The frequency at which the output is maximized is called the resonant frequency. At this

frequency, the feedback fraction reaches a maximum value of 1/3.

At very low frequencies, the phase angle is positive, and the circuit acts like a lead network. On the other hand, at very high frequencies, the phase angle is negative, and the circuit acts like a lag network. In between, there is a resonant frequency fr at which the phase angle equals 0°.

Circuit:

Q 1

S L 1 0 0

R 31 0 0

R 11 0 k

R 22 . 7 k

C 1

4 7 u f d

R 41 k

0

Feed

back

Q 2

S L 1 0 0

R 71 k

R 51 5 k

R 62 . 7 k

C 2

0 . 1 u f d

C 34 7 u f d

+12V

B

R 81 K

R 91 k

R 1 01 k

R 1 11 k

R 1 21 k

C 30 . 1 u f d

0 . 1 u f d

B

A

F

E

DC

OUTP

UT

TO DSO

Fig.1

Procedure :

1. Connect the circuit diagram shown in fig.12. Observe the output of the Wein Bridge Oscillator 3. Adjust the variable resistance until we get undistorted output4. Find frequency of the out put5. Calculate the theoretical frequency by fo = 1/2ΠRC

Result:


Experiment No. -8

Aim: To study Hartley and colpitts oscillator and to measure the output frequency


Component: Resistances: 100kΩ = 01, 10kΩ = 01, 5.1KΩ = 01, 1kΩ = 04Variable resistance = 10kΩ = 01 Transistor SL100 = 01Capacitor 0.1ufd = 06Connecting wire and DSO Probe

Introduction

Wein bridge and RC phase shift oscillator is not suited to high frequencies (above 1MHz). The main problem is the phase shift through the amplifier.

The alternative is an LC oscillator, a circuit that can be used for frequencies between 1MHz and 500MHz.. With an amplifier and LC tank circuit, we can feedback a signal with the right amplitude and phase is feedback to sustain oscillations. shows the circuit of LC oscillator. The voltage divider bias sets up a quiescent operating point. The circuit then has a low frequency voltage gain of rc / r'e where rc is the ac resistance seen by the selector. Because of the base and collector lag networks, the high frequency voltage gain is less then rc / r'e.

Circuit: Colpitt Oscillator

C 1

0 . 1 u f d

A

B

DC

Q 2

S L 1 0 0

R 35 . 1 k1 0 0 K

R 21 0 K

C 2

0 . 1 u f d

0 . 1 u f d

+12V

R 5

1 K

OUTPUT

TO DSO

R 41 k

1 0 m h

1

20 . 1 u f d

. 0 1 u f d

0

Fig.1

Circuit: Hartley Oscillator

C 1

0 . 1 u f d

A

BD

C

1 0 m h

1

2 0 . 1 u f d

0

Q 2

S L 1 0 0

R 35 . 1 k1 0 0 K

R 21 0 K

C 2

0 . 1 u f d

0 . 1 u f d

+12V

R 5

1 K

OUTPUT

TO DSO

R 41 k

1 0 m h

1

2

Fig.2

Procedure : for colpitts oscillator

1. Connect the circuit diagram shown in fig.12. Observe the output of the colpitts Oscillator 3. Adjust the variable resistance until we get undistorted output4. Find frequency of the out put5. Calculate the theoretical frequency by fo = 1/√2ΠLC

Result:


Procedure : Hartley oscillator

1. Connect the circuit diagram shown in fig.22. Observe the output of the Hartleys Oscillator 3. Adjust the variable resistance until we get undistorted output4. Find frequency of the out put5. Calculate the theoretical frequency by fo = 1/√2ΠLC

Result:


DELHI TECHNOLOGICAL UNIVERSITY

ELECTRONICS & COMMUNICATION ENGG. DEPTT.

ELECTRONICS DEVICES AND CIRCUITS- I LAB

List of Experiments for Odd Semester

1. To become familiar with the operation of basic laboratory instruments1. Power supply2. Signal generator3. Digital Storage Oscilloscope (DSO)4. Multi meter

2. To study the active and passive Electronic components

3. To plot forward and reverse bias characteristics for PN Junction diode and Zener diode

4. To study and plot the input and out put characteristics of the given transistor in CB (common base) configuration.

5. To study and plot the input and out put characteristics of the given transistor in CE(common emitter) configuration.

6. To study and plot drain characteristics and transfer characteristics of JFET

7. To study and plot drain characteristics and transfer characteristics of N-Channel metal oxide semiconductor junction field effect transistor (MOSFET)

8. To study of rectifier circuits1. Half wave rectifier2. Full wave rectifier3. Bridge rectifier

and find ripple factor with different filter circuits

9. To study different clipping and clamping circuits



ELECTRONICS DEVICES AND CIRCUITS- II LAB

List of Experiments for Even Semester

1. To Plot the Frequency Response of a single stage RC Coupled Amplifier with feed back and without feed back and find the following:


2. To Plot the Frequency Response of a Double stage RC Coupled Amplifier find the Following:

1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product and loading effect

3. To Plot the Frequency Response of a FET Common Source Amplifier find the following:


4. To study and calculate the input and output impedance of Darlington Amplifier and also calculate the amplification factor

5. To Study BJT Differential Amplifier and measure its CMRR

6. To Construct RC phase shift oscillator and to measure the output frequency

7. To study Wein Bridge Oscillator and to measure the output frequency

8. To study Hartley and colpitts oscillator and to measure the output frequency



FOR

ELECTRONICS DEVICES AND CIRCUITS- I LAB

Mr. Alok Kumar SinghLab In-charge

Delhi Technological university



FOR

ELECTRONICS DEVICES AND CIRCUITS- II LAB

Dr. Mrs. S.InduLab In-charge

Delhi Technological University

EDCII

Documents

digital storage

v2 v1

wien bridge

dc voltage

output decrease

sinusoidal

ac output

output voltage