ECE 581

– 1 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Oversampling ADC

– 2 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Nyquist-Rate ADC

• The “black box” version of the quantization process

• Digitizes the input signal up to the Nyquist frequency (fs/2)

• Minimum sampling frequency (fs) for a given input bandwidth

• Each sample is digitized to the maximum resolution of the converter

A/Dbn

Digital outputAnalog input

b1...

Vref

fs

– 3 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Anti-Aliasing Filter (AAF)

• Input signal must be band-limited prior to sampling

• Nyquist sampling places stringent requirement on the roll-off characteristic of AAF

• Often some oversampling is employed to relax the AAF design (better phase response too)

• Decimation filter (digital) can be linear-phase

Mfs

PSD

PSD

f

ffm

fm

PSD

ffm=fs/2

fs

AAF

AAFDF

– 4 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Oversampling ADC

• Sample rate is well beyond the signal bandwidth

• Coarse quantization is combined with feedback to provide an accurate estimate of the input signal on an “average” sense

• Quantization error in the coarse digital output can be removed by the digital decimation filter

• The resolution/accuracy of oversampling converters is achieved in a sequence of samples (“average” sense) rather than a single sample; the usual concept of DNL and INL of Nyquist converters are not applicable

OSR

Decimation filter

bn

b1

...A/D

Digital outputAnalog input

d1

Vref

fs

– 5 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Relaxed AAF Requirement

• Nyquist-rate converters

• Oversampling converters

|X(jf)|

f2fs 3fsfm=fs/2 fs/2

|X(jf)|

ffm

|X(jf)|

f2fs 3fs

Sub-sampling Band-pass oversampling

fs/2

|X(jf)|

f

OSR = fs/2fm

– 6 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Oversampling ADC

• Predictive type

– Delta modulation

• Noise-shaping type

– Sigma-delta modulation

– Multi-level (quantization) sigma-delta modulation

– Multi-stage (cascaded) sigma-delta modulation (MASH)

– 7 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

PSD

f-fs/2

A/Dbn

b1

... M

Decimation filter

bn

b1

...

fs

A/D

Mfs

fs/2

Δ2/12PSD

f-Mfs/2 Mfs/2

Δ2/12

-fs/2 fs/2

OversamplingNyquist Oversampled

Sample rate Noise power Power

Nyquist fs Δ2/12 P

Oversampled M*fs (Δ2/12)/M M*P

OSR = M

– 8 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Noise ShapingPSD

f-Mfs/2 Mfs/2-fs/2 fs/2

Push noise out of signal band

Large gain @ LF, low gain @ HF

→ Integrator?

A/DH(f)

Mfs

Vi

e

Vi

1 2H(f)

1 2

e e

― H(f)

fMfs/2fs/2

1― H-1(f)

– 9 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

A/D∫Vi

D/A

Do

Δ

Sigma-Delta (ΣΔ) Modulator

• Noise shaping obtained with an integrator

• Output subtracted from input to avoid integrator saturation

First-orderΣΔ modulator

z-1Σ

A/D∫Vi

D/A

Do

Δ

– 10 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Linearized Discrete-Time Model

H(z)X(z) Y(z)

E(z)

1

1

z1

zH(z)

zEz1zXzzY

zEzH1

1zX

zH1

zHzY

zEzYzXzHzY

11

DelayzzX

zYSTF

:Function Transfer Signal

1

HPz1zE

zYNTF

:Function Transfer Noise

1

Caveat: E(z) may be correlated with X(z) – not “white”!

– 11 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

PSD

ffs/2fm

First-Order Noise Shaping

3

π

f

2f

12

Δ

dff

f2π

2f

1

12

Δ

dff

fπ2sin

2f

1

12

Δ

dfNTF2f

1

12

ΔN

23

s

m2

2f

0 ss

2

2f

0 ss

2

2f

0 s

22e

m

m

m

2 2

2e 3

In - band quantization noise :

Δ πN

12 3M

Doubling OSR (M) increases SQNR by 9 dB (1.5 bit/oct)

2

sf

fπ2sin

– 12 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

SC Implementation

• SC integrator

• 1-bit ADC → simple, ZX detector

• 1-bit feedback DAC → simple, inherently linear

CI

Ф2Ф1

Ф1Ф2

Vi

Do

+VR 1-b DAC-VR

CS

– 13 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Second-Order ΣΔ ModulatorINT1 INT2

A/D

D/A

Doz-1Vi

2

z-1

2zSTF

:Function Transfer Signal

21z1NTF

:Function Transfer Noise

5

422e 5M

π

12

ΔN

:noise onquantizati band-In

Doubling OSR (M) increases SQNR by 15 dB (2.5 bit/oct)

– 14 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

2nd-Order ΣΔ Modulator (1-Bit Quantizer)

• Simple, stable, highly-linear

• Insensitive to component mismatch

• Less correlation b/t E(z) and X(z)

1-bitA/D

1-bitD/A

Doz-1Vi z-1 βα

2

zE1αz

1zzX

1αz

αzY

2

2

2

jy

z-plane

0 1x

(2) (2)

1β

1α

– 15 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Generalization (Lth-Order Noise Shaping)

12L

2L22e M12L

π

12

ΔN

:noise onquantizati band-In

zEz1zXzzY

:function transfer ModulatorL1n

• Doubling OSR (M) increases SQNR by (6L+3) dB, or (L+0.5) bit

• Potential instability for 3rd- and higher-order single-loop ΣΔ modulators

2L 1

2L

2L 1 M

π

– 16 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

ΣΔ vs. Nyquist ADC’s

ΣΔ ADC output (1-bit) Nyquist ADC output

• ΣΔ ADC behaves quite differently from Nyquist converters

• Digital codes only display an “average” impression of the input

• INL, DNL, monotonicity, missing code, etc. do not directly apply in ΣΔ converters → use SNR, SNDR, SFDR instead

+1

-1

– 17 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Tones

...

...

Vi = 0

Vi = 0.001

T

2000*T

• The output spectrum corresponding to Vi = 0 results in a tone at fs/2, and will get eliminated by the decimation filter

• The 2nd output not only has a tone at fs/2, but also a low-frequency tone – fs/2000 – that cannot be eliminated by the decimation filter

– 18 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Tones

• Origin – the quantization error spectrum of the low-resolution ADC (1-bit in the previous example) in a ΣΔ modulator is NOT white, but correlated with the input signal, especially for idle (DC) inputs.

(R. Gray, “Spectral analysis of sigma-delta quantization noise”)

• Approaches to “whitening” the error spectrum

– Dither – high-frequency noise added in the loop to randomize the quantization error. Drawback is that large dither consumes the input dynamic range.

– Multi-level quantization. Needs linear multi-level DAC.

– High-order single-loop ΣΔ modulator. Potentially unstable.

– Cascaded (MASH) ΣΔ modulator. Sensitive to mismatch.

– 19 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Cascaded (MASH) ΣΔ Modulator

H(z)X(z) Y(z)

E(z)

D/A

A/D DNTFE(z)

• Idea: to further quantize E(z) and later subtract out in digital domain

• The 2nd quantizer can be a ΣΔ modulator as well

– 20 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

2-1 Cascaded Modulator

INT1 INT2

z-1X(z)

2

z-1

INT3

z-1 (1-z-1)2

D/A

D/A

E1(z)

E2(z)

z-1 Y(z)

E1(z)

Y1(z)

Y2(z)

DNTF

– 21 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

2-1 Cascaded Modulator

11

2121 zzEz1zXzzY

zEz1zXz

zEz1zEz1zzEz1zzXz

zYzYzY

2

313

2

311

2111

2113

21

212

11

12 z1zEz1zEzzY

• E1(z) completely cancelled assuming perfect matching between the modulator NTF (analog domain) and the DNTF (digital domain)

• A 3rd-order noise shaping on E2(z) obtained

• No potential instability problem

– 22 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

Integrator Noise

2

311

213

212

11 Ez1Ez1δNz1Nz1NXY

INT1 INT2

H(z)X(z)

2

H(z)

INT3

H(z)

D/A

D/A

E1

E2

Y1(z)

Y2(z)

N1 N2

N3

Delay ignored

INT1 dominatesthe overall noise

Performance!

– 23 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

References

1. B. E. Boser and B. A. Wooley, JSSC, pp. 1298-1308, issue 6, 1988.

2. B. H. Leung et al., JSSC, pp. 1351-1357, issue 6, 1988.

3. T. C. Leslie and B. Singh, ISCAS, 1990, pp. 372-375.

4. B. P. Brandt and B. A. Wooley, JSSC, pp. 1746-1756, issue 12, 1991.

5. F. Chen and B. H. Leung, JSSC, pp. 453-460, issue 4, 1995.

6. R. T. Baird and T. S. Fiez, TCAS2, pp. 753-762, issue 12, 1995.

7. T. L. Brooks et al., JSSC, pp. 1896-1906, issue 12, 1997.

8. A. K. Ong and B. A. Wooley, JSSC, pp. 1920-1934, issue 12, 1997.

9. S. A. Jantzi, K. W. Martin, and A.S. Sedra, JSSC, pp. 1935-1950, issue 12, 1997.

10. A. Yasuda, H. Tanimoto, and T. Iida, JSSC, pp. 1879-1886, issue 12, 1998.

11. A. R. Feldman, B. E. Boser, and P. R. Gray, JSSC, pp. 1462-1469, issue 10, 1998.

12. H. Tao and J. M. Khoury, JSSC, pp. 1741-1752, issue 12, 1999.

13. E. J. van der Zwan et al., JSSC, pp. 1810-1819, issue 12, 2000.

14. I. Fujimori et al., JSSC, pp. 1820-1828, issue 12, 2000.

15. Y. Geerts, M.S.J. Steyaert, W. Sansen, JSSC, pp. 1829-1840, issue 12, 2000.

– 24 –

Advanced Analog IC Design Oversampling ADC Professor Y. ChiuECE 581 Fall 2009

References

16. T. Burger and Q. Huang, JSSC, pp. 1868-1878, issue 12, 2001.

17. K. Vleugels, S. Rabii, and B. A. Wooley, JSSC, pp. 1887-1899, issue 12, 2001.

18. S. K. Gupta and V. Fong, JSSC, pp. 1653-1661, issue 12, 2002.

19. R. Schreier et al., JSSC, pp. 1636-1644, issue 12, 2002.

20. J. Silva et al., CICC, 2002, pp. 183-190.

21. Y.-I. Park et al., CICC, 2003, pp. 115-118.

22. L. J. Breems et al., JSSC, pp. 2152-2160, issue 12, 2004.

23. R. Jiang and T. S. Fiez, JSSC, pp. 63-74, issue 12, 2004.

24. P. Balmelli and Q. Huang, JSSC, pp. 2161-2169, issue 12, 2004.

25. K. Y. Nam et al., CICC, 2004, pp. 515-518.

26. X. Wang et al., CICC, 2004, pp. 523-526.

27. A. Bosi et al., ISSCC, 2005, pp. 174-175.

28. N. Yaghini and D. Johns, ISSCC, 2005, pp. 502-503.

29. G. Mitteregger et al., JSSC, pp. 2641-2649, issue 12, 2006.

30. R. Schreier et al., JSSC, pp. 2632-2640, issue 12, 2006.