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ECE 420- Embedded DSP Laboratory Lecture 1 – Course Overview & Audio Processing Thomas Moon January 27, 2020
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ECE 420-Embedded DSP Laboratory

Apr 19, 2022

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Page 1: ECE 420-Embedded DSP Laboratory

ECE 420- Embedded DSP LaboratoryLecture 1 – Course Overview & Audio Processing

Thomas MoonJanuary 27, 2020

Page 2: ECE 420-Embedded DSP Laboratory

D S Pigital ignal rocessing

-signal processing done by β€œcomputer”

Page 3: ECE 420-Embedded DSP Laboratory

Signalsspeech/acoustic signalsmotion signals

images videos

Page 4: ECE 420-Embedded DSP Laboratory

Signals

RF signals

seismic signals stock prices

Extract useful information from the signal

Page 5: ECE 420-Embedded DSP Laboratory

filtering

low-pass filter

high-pass filter

Signal Processing

Page 6: ECE 420-Embedded DSP Laboratory

transforming

Signal Processing

Fourier Transform (FT) Wavelet Transform

Page 7: ECE 420-Embedded DSP Laboratory

modulation & demodulation

Signal Processing

frequency conversion

0 𝑓#βˆ’π‘“#

0 π΅βˆ’π΅

Baseband

Passband

βˆ’3 +3+1βˆ’1

βˆ’3

+3

+1

βˆ’1

𝐼

𝑄

16 QAM signal

Page 8: ECE 420-Embedded DSP Laboratory

Digital Signal Processingsampling

t

ADC DAC

t

β€’ β€’ β€’

Analog Digital Analog

Why DSP?

Page 9: ECE 420-Embedded DSP Laboratory

β€’ Digital circuits are less sensitive to external parameters (temperature, aging, etc).

β€’ Easy to adjust system characteristics (ex: changing filter response).

β€’ Digital signal can be stored almost indefinitely.

β€’ More suitable to process low-frequency signals.

Why DSP?

9

Page 10: ECE 420-Embedded DSP Laboratory

In this course:β€’ Implement the fundamental DSP concepts from

ECE 310.β€’ Learn to prototype & implement real-time DSP

systems.

Embedded Digital Signal Processing

10

Page 11: ECE 420-Embedded DSP Laboratory

How we learn:β€’ Work with hardware.β€’ Run practical experiment.

But, we will not build real-time DSP systems from scratch. Γ  Not a circuit course!

Embedded Digital Signal Processing

11

We will use Android Tablet!

Page 12: ECE 420-Embedded DSP Laboratory

β€’ CPU: 2.2 GHz ARM Cortex A15β€’ GPU: 192 core Keplerβ€’ RAM: 2 GBβ€’ Display: 8-inch 1920x1200 multi-touch Full-HD displayβ€’ Motion sensors: 3-axis gyro, 3-axis accelerometer, 3-axis compassβ€’ Cameras: Front 5MP HDR, Back 5MP auto-focus HDRβ€’ Stereo speakers & microphone

NVIDIA SHIELD Tablets

Page 13: ECE 420-Embedded DSP Laboratory

β€’ CPU: 2.2 GHz ARM Cortex A15β€’ GPU: 192 core Keplerβ€’ RAM: 2 GBβ€’ Display: 8-inch 1920x1200 multi-touch Full-HD displayβ€’ Motion sensors: 3-axis gyro, 3-axis accelerometer, 3-axis compassβ€’ Cameras: Front 5MP HDR, Back 5MP auto-focus HDRβ€’ Stereo speakers & microphone

NVIDIA SHIELD Tablets

YOU are responsible for the tablets.Please, use it carefully!

Page 14: ECE 420-Embedded DSP Laboratory

Software Tools You Need

PyCharm & Jupyterβ€’ run python script for simulation.

Android Studioβ€’ Upload algorithms into

Android platform.

Page 15: ECE 420-Embedded DSP Laboratory

1. Develop & Test DSP algorithms in high-level languages (Python or MATLAB)

β€’ More rapid developmentβ€’ Test/training signals available β€’ Provide a reference against embedded

implementation

2. Port tested algorithms into embedded platform

Basic Practice in Developing DSP Software

15

prelab + lab (1/2)

lab (2/2)

Page 16: ECE 420-Embedded DSP Laboratory

β€’ Webpage: https://courses.engr.illinois.edu/ece420/sp2020

β€’ Lectures: Mondays 2:00-2:50PM, 4070 ECEBβ€’ Learn theory/concept for the associated labβ€’ Come to lecture and ask questions

β€’ Labs: 5072 ECEBβ€’ ABA: 2:00-3:50 Tueβ€’ ABC: 2:00-3:50 Wedβ€’ ABD: 2:00-3:50 Thuβ€’ ABE: 2:00-3:50 Fri

β€’ TAsβ€’ Dimitrios Gotsisβ€’ Spencer Markowitz

Course Info

16

β€’ Prerequisite: ECE 310(We assume you know basic DSP concepts!)

Page 17: ECE 420-Embedded DSP Laboratory

Course Timeline

17

Backgroundfor Labs

Special Topics/ Guest Lectures

Final Quiz

Structured Labs

Assigned Project

Final Project Demo

Final Project

Lecture Labst = 0

t = End of Semester

Page 18: ECE 420-Embedded DSP Laboratory

β€’ First half: 7 Structured Labs

β€’ Embedded DSP development frameworkβ€’ High-level (Python) Γ  Embedded (Android with Java/C)

β€’ Different signal modalities and interfaces: IMU, audio, visual

β€’ Basic DSP algorithmsβ€’ Digital filtering (lab2)β€’ Spectral analysis (lab3)β€’ Auto-correlation analysis: pitch detection/correction (lab4,5)β€’ Image and multidimensional signal processing (lab6,7)

Course Overview

18

Page 19: ECE 420-Embedded DSP Laboratory

β€’ First half: 7 Structured Labs - Format

β€’ Prelab [Individual]β€’ Complete individually prior to lab, submit to TA

β€’ Quiz [Individual]β€’ Overview of concepts from previous lecture & lab

β€’ Demo [Group]β€’ Demonstrate work from previous week to TA, answer questions

β€’ Lab work [Group]

Please refer to β€œSubmission Instruction” page for details.

Course Overview

Page 20: ECE 420-Embedded DSP Laboratory

β€’ Second half: β€˜Student Choice’ Group Projects (subj. to approval)

β€’ Start with an Assigned Project Labβ€’ Explore implementation of a DSP algorithm from the literatureβ€’ In Python, 2-week durationβ€’ Jumping off point for the Final Project

β€’ Final projectβ€’ Proposal and Design Reviewβ€’ Deliverable, 2 weekly milestones, validation and test planβ€’ Final Project Demo and Presentationβ€’ Final Report (and optional Video)

β€’ Recommended not to wait until week 7 to start exploring options

Course Overview

20

Page 21: ECE 420-Embedded DSP Laboratory

β€’ Gradingβ€’ Structured Labs – 40%β€’ Assigned Project Lab – 15%β€’ Final Project – 40%β€’ Final Quiz – 5%

β€’ We use Gradescope for grading. If you are not invited, please contact us.

β€’ Office hourβ€’ TA Dimitrios Gotsis: Thursday 1-2pm, Friday 11am-2pm.β€’ Piazza

Course Overview

21

Page 22: ECE 420-Embedded DSP Laboratory

β€’ Goal: 1. Sample audio signals,2. Perform digital-filtering (notch filter),3. Generate a filtered sound.

Lab2 – Audio Filtering

22

Sampling Digital Filtering+

Page 23: ECE 420-Embedded DSP Laboratory

Sampling

23

Ts

ADC

π‘₯- 𝑑 π‘₯[𝑛]π‘₯ 𝑛 = π‘₯-(𝑛𝑇5)

How/when can we reconstruct π‘₯- 𝑑perfectly from π‘₯[𝑛]?

𝑛𝑑

Ts

DAC

π‘₯[𝑛]

𝑛

π‘₯- 𝑑𝑑

Page 24: ECE 420-Embedded DSP Laboratory

24

𝑋- 𝑗Ω = :;<

<π‘₯- 𝑑 𝑒;>?@𝑑𝑑

0 π΅βˆ’π΅

𝑋- 𝑗Ω

Ξ© = 2πœ‹π‘“

To avoid the overlap, 𝐡 < EFG

(or 𝑓 < HIFG

)

Nyquist rate : 𝐹K =HFG> 2𝑓

CTFT

𝑋 π‘—πœ” =N;<

<

π‘₯ 𝑛 𝑒;>OP

0 𝐡𝑇5βˆ’π΅π‘‡5

𝑋 π‘—πœ”

πœ”2πœ‹βˆ’2πœ‹

πœ‹

1. Scale by Ts

2. Periodic by 2πœ‹

β€’ β€’ β€’β€’ β€’ β€’

DTFT

Page 25: ECE 420-Embedded DSP Laboratory

Audio Signal

25

0𝐡 = 2πœ‹ Q 20π‘˜π»π‘§

βˆ’π΅

𝑋- 𝑗Ω

Ξ© = 2πœ‹π‘“

Highest frequency audible by humans

Hence, the sampling rate we need is HFG> 2 Q 20π‘˜π»π‘§ = 40π‘˜π»π‘§

We will use 48kHz sampling rate.

Page 26: ECE 420-Embedded DSP Laboratory

𝑋- 𝑗Ω = :;<

<π‘₯- 𝑑 𝑒;>?@𝑑𝑑

0 π΅βˆ’π΅

𝑋- 𝑗Ω

Ξ© = 2πœ‹π‘“

CTFT

βˆ’π΅π‘‡5 πœ”2πœ‹βˆ’2πœ‹

𝑋 π‘—πœ” =N;<

<

π‘₯ 𝑛 𝑒;>OP

0 𝐡𝑇5

𝑋 π‘—πœ”πœ‹

β€’ β€’ β€’β€’ β€’ β€’

DTFT

0

𝑋[π‘˜]

𝑋[π‘˜] = NPVW

X;H

π‘₯ 𝑛 𝑒;>IEYP/X

DFT

𝑁 βˆ’ 1

CTFT vs DTFT vs DFT

Page 27: ECE 420-Embedded DSP Laboratory

0 π΅βˆ’π΅

𝑋- 𝑗Ω

Ξ© = 2πœ‹π‘“

0 𝐡𝑇5βˆ’π΅π‘‡5

𝑋 π‘—πœ”

πœ”2πœ‹βˆ’2πœ‹

πœ‹

β€’ β€’ β€’β€’ β€’ β€’

CTFT

DTFT

0

𝑋[π‘˜] DFT

𝑁 βˆ’ 1

Relation

3rd DFT bin

πœ”?

𝑓?

Given 𝑇5, 𝑁

Page 28: ECE 420-Embedded DSP Laboratory

0 π΅βˆ’π΅

𝑋- 𝑗Ω

Ξ© = 2πœ‹π‘“

0 𝐡𝑇5βˆ’π΅π‘‡5

𝑋 π‘—πœ”

πœ”2πœ‹βˆ’2πœ‹

πœ‹

β€’ β€’ β€’β€’ β€’ β€’

CTFT

DTFT

0

𝑋[π‘˜] DFT

𝑁 βˆ’ 1

Relation

k?

πœ”?

10.3π‘˜π»π‘§

Given 𝑇5, 𝑁

Page 29: ECE 420-Embedded DSP Laboratory

0 π΅βˆ’π΅

𝑋- 𝑗Ω

Ξ© = 2πœ‹π‘“

0 𝐡𝑇5βˆ’π΅π‘‡5

𝑋 π‘—πœ”

πœ”2πœ‹βˆ’2πœ‹

πœ‹

β€’ β€’ β€’β€’ β€’ β€’

CTFT

DTFT

0

𝑋[π‘˜] DFT

𝑁 βˆ’ 1

Relation

2πœ‹π‘“π‘‡ = πœ”

𝑓𝐹5=

πœ”2πœ‹

πœ”2πœ‹

=π‘˜π‘

𝑓𝐹5=

πœ”2πœ‹

=π‘˜π‘

Page 30: ECE 420-Embedded DSP Laboratory

Digital Filter

30

+

+

+

π‘₯[𝑛] 𝑦[𝑛]

𝑍;H

𝑍;H

𝑍;H

𝑍;H

𝑏W

𝑏H

𝑏I

βˆ’π‘ŽH

βˆ’π‘ŽI

β€’ β€’ β€’

β€’ β€’ β€’

𝑦 𝑛 = 𝑏Wπ‘₯ 𝑛 + 𝑏H 𝑛 βˆ’ 1 +β‹―+ 𝑏cπ‘₯ 𝑛 βˆ’ 𝐾 βˆ’ (π‘ŽH𝑦 𝑛 βˆ’ 1 +β‹―+ π‘Že𝑦 𝑛 βˆ’ 𝐿 )

β€’ L = 0, FIRβ€’ L > 0, IIR

Page 31: ECE 420-Embedded DSP Laboratory

Examples of Filters

31

Low-pass High-pass

Band-stop Band-pass

Ramp

Page 32: ECE 420-Embedded DSP Laboratory

β€’ Large N (filter order)☺ Close to desired response☺ Sharper transition☺ Less ripples☹ More

computation/memory☹ Longer delay

Filter Design Spec

32

β€’ FIR vs IIR☺ Stable☺ Linear phase☹ Worse magnitude

response with same order

Page 33: ECE 420-Embedded DSP Laboratory

β€’ In lab2, we will implement the convolution using a circular buffer and process sample-by-sample.

Convolution

33

𝑦 𝑛 = NYV;<

<

β„Ž π‘˜ π‘₯[𝑛 βˆ’ π‘˜]

𝑦 𝑛 = NYVW

c

β„Ž π‘˜ π‘₯[𝑛 βˆ’ π‘˜] FIR filter (causal)