ECE 2799 ECE 2799 E E lectrical and Computer Engineering lectrical and Computer Engineering Design Design “ “ Op-Amp Selection” Op-Amp Selection” Prof. Bitar Prof. Bitar
ECE 2799 Electrical and Computer Engineering Design “Op-Amp Selection” Prof. Bitar.
Jan 18, 2018
S. J. Bitar Real Op-Amp Limitations Output Voltage Range Limits Output Voltage Range Limits Output Current Limit Output Current Limit Bandwidth Limit Bandwidth Limit Slew Rate Slew Rate Input Offset Voltages Input Offset Voltages Input Bias Currents Input Bias Currents Input Voltage Range Input Voltage Range Single Supply & Low Voltage Concerns Single Supply & Low Voltage Concerns
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ECE 2799 ECE 2799 EElectrical and Computer Engineering Designlectrical and Computer Engineering Design
““Op-Amp Selection”Op-Amp Selection”
Prof. BitarProf. Bitar
S. J. Bitar - 2007S. J. Bitar - 2007
Ideal Op-Amp Ideal Op-Amp CharacteristicsCharacteristics
Input Resistance (Rin = Input Resistance (Rin = ∞∞)) Open Loop Voltage Gain (A = Open Loop Voltage Gain (A =
∞∞)) Output Resistance (Rout = 0)Output Resistance (Rout = 0) Input Voltage Range (+/- Input Voltage Range (+/- ∞∞) ) Output Voltage Range (+/- Output Voltage Range (+/- ∞∞)) Output Current Limit (+/- Output Current Limit (+/- ∞∞)) Bandwidth (Bandwidth (∞∞) )
-
+Vout
Non-Inverting Input
Inverting Input
Avin Rout
Rinvin
Vout
Linear Model
S. J. Bitar - 2007S. J. Bitar - 2007
Real Op-Amp LimitationsReal Op-Amp Limitations Output Voltage Range LimitsOutput Voltage Range Limits Output Current LimitOutput Current Limit Bandwidth LimitBandwidth Limit Slew RateSlew Rate Input Offset VoltagesInput Offset Voltages Input Bias CurrentsInput Bias Currents Input Voltage RangeInput Voltage Range Single Supply & Low Voltage Single Supply & Low Voltage
ConcernsConcerns
S. J. Bitar - 2007S. J. Bitar - 2007
Output Voltage Range Output Voltage Range LimitsLimits
Clipping at (or below) Supply RailsClipping at (or below) Supply RailsT
Expected Output
Actual Output
Time (s)0.00 1.00m 2.00m
Out
put
-10.00
-5.00
0.00
5.00
10.00
Actual Output
Expected Output
V+
V+
V-
V-
+
VsR2
R1
Vout1-
+ +
OP1
5V
5V
V+
V+
V-
V-
+
VsVout1
-
+ +
OP1 uA741
V1 10
V2 10
R Load 25
S. J. Bitar - 2007S. J. Bitar - 2007
Output Current LimitOutput Current LimitCheck Output Current SpecCheck Output Current Spec
TExpected Output
Actual Output
Time (s)0.00 1.00m 2.00m
Out
put
-5.00
-2.50
0.00
2.50
5.00
Actual Output
Expected Output
S. J. Bitar - 2007S. J. Bitar - 2007
Bandwidth LimitationBandwidth LimitationGain x BW = Constant Gain x BW = Constant
Check Gain Bandwidth Product (GBWP) SpecCheck Gain Bandwidth Product (GBWP) Spec
V-
V+
V+
V-
+
Vs
V1
V2
-
+ +
OP1
Vout
R2
R1
T
Open Loop Response
Frequency (Hz)1 10 100 1k 10k 100k 1M
Gai
n (d
B)
0.0
20.0
40.0
60.0
80.0
100.0
120.0Open Loop Response
S. J. Bitar - 2007S. J. Bitar - 2007
Slew Rate Limitation Slew Rate Limitation (V/(V/μμsec)sec)
V+ V+
V-
V-
-
+
IOP1
+
VsIdeal
Vout1-
+ +
OP1 uA741
V1 10V
V2 10V
R2 4k
R1 1k
R2 4k
R1 1k
T
Time (s)0.00 10.00u 20.00u 30.00u 40.00u 50.00u
Out
put
-5.00
-2.50
0.00
2.50
5.00
VOFFSET
994.72 μV
S. J. Bitar - 2007S. J. Bitar - 2007
Input Offset VoltageInput Offset Voltage
V+
V+
V-
V-
V+
V-
V-
V+
Vout1-
+ +OP1 uA741
V1 10V
V2 10V
R2 1M
R1 1k
Vout1-
+ +OP1 uA741
R2 1M
R1 1k
P1 100k R3 1M
205.89uV1.06V
S. J. Bitar - 2007S. J. Bitar - 2007
Input Bias CurrentsInput Bias Currents
V+
V-
V+
V-
V-
V+ Vout1-
+ +OP1 uA741
R2 1M
R1 500k
Vout1-
+ +OP1 uA741
R2 1M
R1 500k
AM1
AM2
R3 333.3k
V2 10V
V1 10V
R3 = R1 || R2
80nA
80nA
2.98mV83mV
S. J. Bitar - 2007S. J. Bitar - 2007
Input Voltage Range IssuesInput Voltage Range IssuesKeep V- < Vin < V+ Keep V- < Vin < V+
T
Time (s)0.00 1.00m 2.00m
AM1
-5.00
5.00
Vs
-6.00
6.00
V+ V+
V-
V-
V-
V+
+
VsVout1
AM1
-
+ +U1
D1
D2
+
Vs
5V
5V
Excessive Input Currents due to ESD Diode Protected Excessive Input Currents due to ESD Diode Protected InputsInputs
S. J. Bitar - 2007S. J. Bitar - 2007
Input Voltage Range IssuesInput Voltage Range IssuesAdd Current Limiting ResistorAdd Current Limiting Resistor
T
Time (s)0.00 1.00m 2.00m
AM1
-40.00u
40.00u
Vs
-6.00
6.00V+
V+
V-
V-
+
Vs
V1 5V
Vout1
V1 5V
-
+ +U1 LMC6462A/NSR1 10k AM1
S. J. Bitar - 2007S. J. Bitar - 2007
Input Voltage Range IssuesInput Voltage Range IssuesVout Phase Inversion and Clipping Vout Phase Inversion and Clipping
w/ JFET Input Op-Ampsw/ JFET Input Op-AmpsV+ V+
+
Vs
V1 5VVout1
-
+ +OP1 LM358
Half-Wave Rectifier Attempt
T
Time (s)0.00 1.00m 2.00m
Vout1
0.00
4.00
Vs
-3.00
3.00
S. J. Bitar - 2007S. J. Bitar - 2007
Input Voltage Range Issues Input Voltage Range Issues Diode Clamp Fix Diode Clamp Fix
(for JFET Input Op-Amps)(for JFET Input Op-Amps)T
Time (s)0.00 1.00m 2.00m
Vout1
-3.00
0.00
3.00
Vs
-3.00
0.00
3.00
V+ V+
+
Vs
V1 5VVout1
-
+ +OP1 LM358
SD
1 1N
5817
R1 10k
Half-Wave Rectifier w/ Schottky Diode Clamp
S. J. Bitar - 2007S. J. Bitar - 2007
Single Supply & Low Voltage Single Supply & Low Voltage ConcernsConcerns
LM741 - A Bad Choice for Low Voltage Single Supply LM741 - A Bad Choice for Low Voltage Single Supply ApplicationsApplications
V+
5V
T
Actual
Expected
Vramp
Time (s)0.00 500.00u 1.00m 1.50m 2.00m
Out
put
0.00
1.00
2.00
3.00
4.00
5.00
Vramp
Actual
Expected
V+
R1 4k
R2 1k
Vout
+Vramp
-
+ +OP1 uA741
S. J. Bitar - 2007S. J. Bitar - 2007
V+
5V
T
Actual
Expected
Vramp
Time (s)0.00 500.00u 1.00m 1.50m 2.00m
Out
put
0.00
1.00
2.00
3.00
4.00
5.00
Vramp
Actual
ExpectedV+
R1 4k
R2 1k
Vout
+Vramp
-
+ +OP1 LM358
Single Supply & Low Voltage Single Supply & Low Voltage ConcernsConcerns
Improvement: Reaching the Ground Rail with the LM124, Improvement: Reaching the Ground Rail with the LM124, LM358LM358
S. J. Bitar - 2007S. J. Bitar - 2007
Low Voltage Single Supply Low Voltage Single Supply SolutionsSolutions
“Rail-To-Rail” Input AND/OR Output (CMOS) Op-Amps“Rail-To-Rail” Input AND/OR Output (CMOS) Op-Amps
V+
5V
T
LM358
LM741
LM741
OPA350
Vin
Time (s)0.00 500.00u 1.00m 1.50m 2.00m
Out
put
0.00
1.00
2.00
3.00
4.00
5.00
Vin
LM741
LM358
LM741
OPA350
V+
-
+ +U1 OPA350/BB
OPA350
+
Vin
R2
4kR
3 1k
S. J. Bitar - 2007S. J. Bitar - 2007
Single Supply IssuesSingle Supply IssuesProblem: Output Cannot Swing NegativeProblem: Output Cannot Swing Negative
Vcc
Vcc
-
+ +
OP11k
2k
Vout
+
Vin
9V
1Vpkf=1kHz
T
Vin
Vout
Time (s)0.00 500.00u 1.00m
Volta
ge (V
)
-1.00
0.00
1.00
2.00
Vout
Vin
Typical Inverting Amplifier
S. J. Bitar - 2007S. J. Bitar - 2007
Single Supply IssuesSingle Supply Issues
Vcc
Vcc Vcc
-
+ +
OP11k
2k
Vout
+
Vin
9V
R
R
C
1Vpkf=1kHz
Solution: Bias Ground Points to Vcc/2Use Capacitive Coupling to Block DC and Pass AC
T
Vin
Vout
Time (s)0.00 500.00u 1.00m
Volta
ge (V
)
-1.00
0.00
1.00
2.00
3.00
4.00
5.00
6.00
7.00
Vin
Vout
NOTE: Output Centered Around Vcc/2 (4.5V)
Copyright - Stephen J. Bitar 2006Copyright - Stephen J. Bitar 2006
Single-Supply IssuesSingle-Supply IssuesNon-Inverting AmplifierNon-Inverting Amplifier
T
Time (s)0.00 1.00m 2.00m
Out
put
-1.00
0.00
1.00
2.00
3.00
4.00
V+
V-
V+
V+
V+
Vin
+
Vin-
+ +
OP1 R2
R1
-
+ +
OP1 R2
C1R
R
2R1
2R1
Vth = (V+ )/ 2
Rth = 2R1 || 2R1
Vout
Vout
Copyright - Stephen J. Bitar 2006Copyright - Stephen J. Bitar 2006
Single-Supply IssuesSingle-Supply IssuesDifference AmplifierDifference Amplifier
T
Time (s)0.00 1.00m 2.00m
Out
put
-1.00
0.00
1.00
2.00
3.00
4.00V+
V-
V+
V+
-
+ +
OP1
Vout
R2R1
R2R1
+
Vd
-
+ +
OP1
Vout
R2R1
R1
+
Vd
2R2
2R2
Vth = (V+)/ 2
Rth = 2R2 || 2R2
Copyright - Stephen J. Bitar 2006Copyright - Stephen J. Bitar 2006
Single-Supply IssuesSingle-Supply IssuesSchmitt Trigger OscillatorSchmitt Trigger Oscillator
T
Time (s)0.00 5.00m 10.00m
Vol
tage
(V
)
-4.00
-2.00
0.00
2.00
4.00
T
Time (s)0.00 5.00m 10.00m
Out
put
0.00
1.00
2.00
3.00
4.00
5.00
V+
V-
V+
V-V-
V+
V+V+V+
Vref
Vref
V+
-
+ +
OP1
-
+ +
OP2
V1
V2 R1
R2R3
Vtri
Vsqr
-
+ +
OP1
-
+ +
OP2
R1
R2R3
Vtri
Vsqr
R
R
C1
V1
C1
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