EC522_8051_05

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8051 ADDRESSING MODES

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THE CPU CAN ACCESS DATA IN VARIOUS WAYS.

THE DATA COULD BE IN REGISTER.THE DATA COULD BE IN MEMORY.THE DATA COULD BE PART OF INSTRUCTION.

VARIOUS WAYS OF ACCESSING DATA ARE CALLED

ADDRESSING MODES OF PROCESSOR/CONTROLLER

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8051 ADDRESSING MODES ARE

IMMEDIATE

REGISTER

DIRECT

REGISTER INDIRECT

INDEXED

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IMMEDIATE ADDRESSING MODE

THE SOURCE OPERAND IS CONSTANT. THE IMMEDIATE DATA MUSTBE PRECEDED BY #. THIS MODE IS USED TO LOAD DATA IN ANY REGISTER INCLUDING DPTR REGISTER.

MOV A, #20H ;LOAD 20H IN A

MOV R4, #71 ;LOAD DECIMAL VALUE 71 IN R4

MOV B, #40H ;LOAD 40H IN B

MOV DPTR, #1234H ;DPTR=1234H

MOV DPL, #34H ;DPTR LOWER=34H

MOV DPH, #12H ;DPTR HIGHER=12H

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REGISTER ADDRESSING

REGISTER ADDRESSING MODE INVOLVES THE USE OF REGISTERS TO HOLD DATA TO BE MANIPULATED

MOV A, R0 ;A=R0MOV R2, A ;R2=AMOV A, R5 ;A=R5MOV A, R7 ;A=R7MOV R6,A ;R6=A

MOV DPTR, #1234HMOV R7, DPLMOV R6, DPH

THE DATA CAN NOT BE MOVED BETWEEN Rn REGISTERS

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ACCESSING MEMORY

DIRECT ADDRESSING MODE REGISTER INDIRECT ADDRESSING MODE

RAM 00 TO 1F REGISTER BANKS 7 STACK20 TO 2F BIT ADDRESABLE MEM.30 TO 7F BYTE MEMORY

IN DIRECT ADD. MODE THE DATA IS IN RAM, WHOSE ADDIS KNOWN. THE ADD IS A PART OF INSTRUCTION

MOV A, 4 ;IS SAME AS MOV A, R4 ;A=R4MOV A, 7 ;IS SAME AS MOV A, R7 ;A=R7MOV R0, 40H ;R0=CONTENTS OF RAM LOC. 40HMOV 56H, A ;RAM LOC 56H =CONTENT OF AMOV R4, 7FH ;R4=CONTENTS OF RAM LOC 7FH

# SIGN IS MISSING

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SPECIAL FUNCTION REGISTERS AND THEIR ADDRESSES

LIKE R0 TO R7, REGISTERS A, B, PSW, AND DPTR ARE

PART OF GROUP OF REGISTERS KNOWN AS SFR

(SPECIAL FUNCTION REGISTERS). THE SFRS ARE

ACCESSED BY THEIR NAME OR BY THEIR ADDRESS.

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MOV 0E0H, #55H;IS SAME ASMOV A, #55H ;A=55H

MOV 0F0H, #22H ;IS SAME ASMOV B, 22H ;B=22H

MOV 0E0H, R2 ;IS SAME ASMOV A, R2 ;A=(R2)

MOV 0F0H, R0 ;IS SAME ASMOV B, R0 ;B=(R0)

MOV P1, A ;IS SAME ASMOV 90H, A ;P1=(A)

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WRITE PROGRAM TO SEND 55H TO PORTS P1 AND P2 USING

A)THEIR NAMESB)THEIR ADDRESES

MOV A, #55H ;A=55HMOV P1, A ;P1=55HMOV P2, A ;P2=55H

MOV A, 55H ;A=55HMOV 90H, A ;P1=55HMOV 0A0H, A ;P2=55H

OR

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STACK AND DIRECT ADDRESSING

ONLY DIRECT ADDRESING MODE IS PERMITTED FOR PUSH ON STACK.THE IS TRUE FOR IS VALID FOR POP INSTRUCTION TOO.

WRITE CODE TO PUSH R5, R6 AND A ON STACK. POP THEM IN R2, R3 AND BWRITE CODE TO PUSH R5, R6 AND A ON STACK. POP THEM IN R2, R3 AND B

PUSH 05 POP 0F0HPUSH 06 POP 02PUSH 0E0H POP 03

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REGISTER INDIRECT ADDRESSING MODE

IN THIS A REGISTER IS USED AS POINTER TO THE DATA

IF DATA IS IN CPU, ONLY REGISTER R0 AND R1 ARE USED FOR THIS..R2 TO R7 CANNOT HOLD ADD OF OPERAND LOCATED IN RAM.

IN THIS MODE R0 AND R1 WILL BE PRECEDED BY @

MOV A, @R0 ;MOVE CONTENTS OF RAM LOCATION ;WHOSE ADDRESS IS IN R0 TO A

MOV @R1, B ;MOVE CONTENTS OF B TO RAM LOCATION;WHOSE ADDRESS IS IN R1.

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WRITE PROGRAMS TO COPY THE VALUE 55H INTO RAM LOCATIONS 40H TO 45H USING A) DIRECT ADD, B) REGISTER INDIRECT ADDRESING WITHOUT LOOP AND C) WITH A LOOP.

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WRITE PROGRAM TO COPY THE VALUE 55H INTO RAM LOCATIONS 40H TO 45H USING A) DIRECT ADD, B) REGISTER INDIRECT ADDRESING WITHOUT LOOP AND C) WITH A LOOP.

MOV A, #55HMOV 40H, AMOV 41H, AMOV 42H, AMOV 43H, AMOV 44H, AMOV 45H, A

DIRECT ADDRESING

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WRITE PROGRAM TO COPY THE VALUE 55H INTO RAM LOCATIONS 40H TO 45H USING A) DIRECT ADD, B) REGISTER INDIRECT ADDRESING WITHOUT LOOP AND C) WITH A LOOP.

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WRITE PROGRAM TO COPY THE VALUE 55H INTO RAM LOCATIONS 40H TO 45H USING A) DIRECT ADD, B) REGISTER INDIRECT ADDRESING WITHOUT LOOP AND C) WITH A LOOP.

MOV A,# 55HMOV R0, #40HMOV @R0, AINC ROMOV @R0, AINC ROMOV @R0, AINC ROMOV @R0, AINC ROMOV @R0, AINC R0MOV @R0, A

REGISTER INDIRECT ADDRESING WITHOUT LOOP

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WRITE PROGRAM TO COPY THE VALUE 55H INTO RAM LOCATIONS 40H TO 45H USING A) DIRECT ADD, B) REGISTER INDIRECT ADDRESING WITHOUT LOOP AND C) WITH A LOOP.

REGISTER INDIRECT ADDRESING WITH A LOOP.

MOV A, #55HMOV RO, #40HMOV R2, #05H

AGAIN:MOV @R0, AINC RODJNZ AGAIN

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WRITE A PROGRAM TO COPY A BLOCK OF 10 BYTES OF DATA FROM RAM LOCATIONS STARTING AT 35H TO RAM LOCATIONS 60H.

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MOV R0,#35H ;source pointerMOV R1,#60H ;destination pointerMOV R3,#10 ;counter

BACK: MOV A,@R0 ;get a byte from sourceMOV @R1,A ;copy it to destinationINC R0 ;increment source pointerINC R1 ;increment destination pointerDJNZ R3,BACK ;keep doing it for all ten

;bytes

WRITE A PROGRAM TO COPY A BLOCK OF 10 BYTES OF DATA FROM RAM LOCATIONS STARTING AT 35H TO RAM LOCATIONS 60H.

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ORG 0000H ;burn into ROM starting at 0 MOV DPTR,#200H ;DPTR=200H look-up table address CLR A ;clear A(A=0) MOVC A,@A+DPTR ;get the char from code space MOV R0,A ;save it in R0 INC DPTR ;DPTR=201 pointing to next char CLR A ;clear A(A=0) MOVC A,@A+DPTR ;get the next char MOV R1,A ;save it in R1 INC DPTR ;DPTR=202 pointing to next char CLR A ;clear A(A=0) MOVC A,@A+DPTR ;get the next char MOV R2,A ;save it in R2HERE:SJMP HERE ;stay here;Data is burned into code space starting at 200H ORG 200HDATA: DB “ABC" END ;end of program

IN THIS PROGRAM ABC IS BURNED IN ROM LOCATIONS STARTING AT 200H THE PROGRAM IS BURNED INTO ROM FROM 0. ANALYSE THE PROG.

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ASSUMING THAT ROM SPACE STARTING AT 250H CONTAINS ‘INDIA’ WRITE APROGRAM TO TRANSFER BYTES INTO RAM LOCATIONS AT 40H

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;(a) This method uses a counter ORG MOV DPTR,#MYDATA ;LOAD ROM POINTER MOV R0,#40H ;LOAD RAM POINTER MOV R2,#5 ;LOAD COUNTER BACK: CLR A ;A=0 MOVC A,@A+DPTR ;MOVE DATA FROM CODE

;SPACE MOV @R0,A ;SAVE IT IN RAM INC DPTR ;INCREMENT ROM

;POINTER INC R0 ;INCREMENT RAM POINTER DJNZ R2,BACK ;LOOP UNTIL COUNTER=0 HERE: SJMP HERE ;----------ON-CHIP CODE SPACE USED FOR STORING DATA ORG 250H MYDATA: DB “INDIA" END

ASSUMING THAT ROM SPACE STARTING AT 250H CONTAINS ‘INDIA’ WRITE APROGRAM TO TRANSFER BYTES INTO RAM LOCATIONS AT 40H

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;(b) This method uses null char for end of string ORG 0000 MOV DPTR,#MYDATA ;LOAD ROM POINTER MOV R0,#40H ;LOAD RAM POINTER BACK: CLR A ;A=0 MOVC A,@A+DPTR ;MOVE DATA FROM CODE SPACE JZ HERE ;EXIT IF NULL CHAR MOV @R0,A ;SAVE IT IN RAM INC DPTR ;INCREMENT ROM POINTER R0 ;INCREMENT RAM POINTER SJMP BACK ;LOOP HERE: SJMP HERE

;----------ON-CHIP CODE SPACE USED FOR STORING DATA ORG 250H MYDATA: DB “INDIA",0 ;notice null char for end of string END

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LOOK UP TABLE AND MOVC INSTRUCTION

WRITE A PROGRAM TO GET THE x VALUE FROM P1 AND SEND x*xTO P2 CONTINOUSLY

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ORG 0 MOV DPTR,#300H ;LOAD LOOK-UP TABLE ADDRESS MOV A,#0FFH ;A=FF MOV P1,A ;CONFIGURE P1 AS INPUT PORTBACK: MOV A,P1 ;GET X MOVC A,@A+DPTR ;GET X SQAURE FROM TABLE MOV P2,A ;ISSUE IT TO P2 SJMP BACK ;KEEP DOING IT

ORG 300HXSQR_TABLE: DB 0,1,4,9,16,25,36,49,64,81 END

WRITE A PROGRAM TO GET THE x VALUE FROM P1 AND SEND x*xTO P2 CONTINOUSLY

ADD= (A)+ 16 BIT ADD IN DPTR. MOVC ADDRESSES. CODE IN ROM.

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INDEXED ADDRESSING MODE AND MOVX INSTRUCTION

THE 8051 HAS 64K BYTES OF CODE SPACE WHICH CAN BE

ACCESSED USING PROGRAM COUNTER REGISTER.

MOVC INSTRUCTION ACCESS A PART OF THIS 64K BYTE CODE

SPACE AS DATA MEMORY.

IN SOME CASES THE PROGRAM CODE DOES NOT LEAVE ANY

ROOM TO SHARE WITH DATA.

ACCORDINGLY 8051 HAS ANOTHER 64K MEMORY SPACE

EXCLUSIVELY FOR DATA.

THIS DATA SPACE IS REFERED AS EXTERNAL MEMORY AND IS

ACCESSED ONLY BY MOVX INSTRUCTION. THE DATA SPACE CAN

NOT BE SHARED WITH CODE SPACE.

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ACCESSING RAM LOCATIONS 30 T0 7FH AS SCRATCH PAD

WRITE A PROGRAM TO TOGGLE P1 A TOTAL OF 200 TIMES. USERAM LOCATION 32H AS A COUNTER.

MOV P1, #55H ;P1=55HMOV 32H, 200 ;LOAD COUNTER VALUE IN RAM

;LOCATION 32HLOOP1: CPL P1 ;TOGGLE P1

ACALL DELAYDJNZ 32H, LOOP1 ;REPEAT 200 TIMES

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BIT ADDRESSES FOR I/O AND RAM

OF THE 128 BYTE OF INTERNAL RAM OF 8051, ONLY 16 BYTESARE BIT ADDRESSABLE. THE REST CAN BE ACCESSED IN BYTEFORM. THE BIT ADDRESSABLE RAM LOCATIONS ARE FROM 20HTO 2FH. A TOTAL OF 128 BITS OF RAM ARE BIT ADDRESSABLE.THESE ARE ADDRESSED AS 0 TO 127(IN DECIMAL) OR 00 TO 7FH.THE BIT ADD 0 TO 7 ARE FOR FIRST BYTE OF INTERNAL RAMLOCATION 20H, AND 8 TO 0FH ARE THE BIT ADDRESSSES OF 2nd

BYTE OF RAM LOCATION 21H AND SO ON. THE LAST BYTE OF2FH HAS BIT ADDRESSES 78H TO 7FH.

RAM LOCTIONS 20 TO 2FH ARE BOTH BYTE AND BIT ADDRESSABLE

BIT ADDRESSABLE RAM

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16 BYTES OF INTERNAL RAM

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SINGLE BIT INSTRUCTIONS

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EVERY SFR REGISTER IS ASSIGNED A BYTE ADDRESS.PORTS P0 TO P3 ARE PART OF SFR.

P0 HAS BYTE ADDRESS OF 80H.P1 HAS BYTE ADDRESS OF 90HP2 HAS BYTE ADDRESS OF A0HP3 HAS BYTE ADDRESS OF B0H

INSTRUCTION SETB P1.0 ASSEMBLED AS SETB 90H

AS P1.0 HAS RAM ADD. 90H

BIT ADDRESS 00 TO 7FH BELONG TO RAM BYTEADDRESS OF 20 TO 2FH. THE BIT ADDRESS 80 TO F7H BELONG TO SFR OF P0, TCON, P1, SCON ETC.

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I/O PORT BIT ADDRESSES

SFR RAM ADDRESS(BYTE & BIT)

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BIT MEMORY MAP

00 TO 7FH RAM LOCATIONS 20 TO 2FH80 TO 87H PORT P088 TO 8FH TCON REGISTER90 TO 97H PORT P198 TO 9FH SCON REGISTERA0 TO A7H PORT P2A8 TO AFH IE REGISTERB0 TO B7H PORT P3B8 TO BFH IP REGISTERC0 TO C7H NOT ASSIGNEDC8 TO CFH NOT ASSIGNEDD0 TO D7H PSW REGISTERD8 TO DFH NOT ASSIGNEDE0 TO E7H A REGISTERE8 TO EFH NOT ASSIGNEDF0 TO F7H B REGISTERF8 TO FFH NOT ASSIGNED

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BIT ADDRESSES FOR ALL PORTS

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SETB 86H SETS P0.6 BIT OF P0

CLR 87H CLEARS P0.7 BIT OF P0

SETB 92H SETS P1.2 BIT OF P1

SETB 0A7H SETS P2.7 BIT OF P2

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REGISTERS BIT ADDRESABILITY

ALL THE I/O PORTS ARE BIT ADDRESSABLE

FOLLOWING REGISTERS ONLY ARE BIT ADDRESSABLE

A

B

PSW

IP

IE

SCON

TCON

37

CY F0 RS1 RS0 OV -- P

RS1RS0 REGISTER BANK ADDRESS

0 0 0 00 TO 07H0 1 1 08 TO 0FH1 0 2 10 TO 1FH1 1 3 17 TO 1FH

BITS OF PSW

WRITE A PROGRAM TO SAVE THE ACCUMULATOR IN R7 OF BANK 2

CLR PSW.3SETB PSW.4MOV R7, A

AC

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THERE ARE NO INSTRUCTIONS TO CHECK THE OVERFLOW BIT.WRITE A PROGRAM TO CHECK STATUS OF OV

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T

THE OV FLAG IS THE PSW.2 OF PSW REGISTER. PSW IS BIT ADDRESSABLE REGISTER. FOLLOWING INSTRUCTION CAN CHECK THE STATUS OF THE BIT

JB PSW.2, TARGET ;JUMP IF PSW.2;THAT IS OV=1.

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WRITE PROGRAM TO CHECK IF THE RAM LOCATION 37H HAS AN EVEN VALUE. IF IT HAS, SEND IT TO P2, ELSE MAKE IT EVEN AND SEND TO P2.

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MOV A, 37H ;LOAD RAM ;LOCATION ;37H IN ACC

JNB ACC.0, YES ;IS D0 OF A ;0? IF SO ;JUMP

INC A

YES : MOV P2, A ;SEND TO P2

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THE STATUS OF BITS P1.2 AND P1.3 OF I/O PORT OF P1 MUST BE SAVED BEFORE THESE ARE CHANGED. WRITE A PROGRAM TO SAVE THE STATUS OF P1.2 IN BIT LOC. 06 AND OF P1.3 IN BIT LOC. 07.

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THE STATUS OF BITS P1.2 AND P1.3 OF I/O PORT OF P1MUST BE SAVED BEFORE THESE ARE CHANGED. WRITE A PROGRAM TO SAVE THE STATUS OF P1.2 IN BIT LOC. 06 AND OF P1.3 IN BIT LOC. 07.

CLR 06 ;CLEAR BIT ADD 06CLR 07 ;CLEAR BIT ADD 07JNB P1.2, OO ;IF P1.2=0 THEN JUMP OOSETB 06 ;IF P1.2=1, SET BIT LOC 06 TO 1

OO: JNB P1.3, NO ;IF P1.3=0 THEN JUMP NOSETB 07 ;IF P1.3=1, SET BIT LOC 07 TO 1

NO: -------

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WRITE A PROGRAM TO SAVE THE STATUS OF BIT P1.7 ON RAM ADDRESS BIT 05

MOV C, P1.7 ;GET BIT FROM PORTMOV 05, C ;SAVE THE BIT

WRITE A PROGRAM TO GET STATUS OF BITPIN P1.7 AND SEND TO PIN P2.0

HERE: MOV C, P1.7 ;GET BIT FROM PORTMOV P2.0, C ;SEND BIT TO PORTSJMP HERE

USE OF INSTRUCTIONSMOV BIT, CMOV C, BIT

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EXTRA 128 BYTE RAM IN 8052

DIRECT ACCESS(MOV 90H, #55H)

SFR REGISTERS ONLY

BANK 0

BANK 1

BANK 2

BANK 3

FF

80

7F

201F1817100F08

0700

FF

80

INDIRECT ACCESS (MOV @R0, A)

UPPER RAM

AccumulatorRegistersProgram Status WordStack PointerPorts TimersSerial ControlPower ControlOthers

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WRITE A PROGRAM FOR 8052 TO PUT 55H IN THE UPPERRAM LOCATIONS OF 90 TO 99H

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WRITE A PROGRAM FOR 8052 TO PUT 55H IN THE UPPERRAM LOCATIONS OF 90 TO 99H

OR ORG 0

MOV A, #55HMOV R2, #10MOV R0, #90H ;ACCESS THE UPPER 128

;BYTES OF ON CHIP RAMBACK: MOV @R0, A ;USE INDIRECT ADDRESSING

;MODEINC R0DJNZ R2, BACK ;REPEAT FOR ALL

;LOCATIONSSJMP $ ;STAY HEREEND

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ASSUME THAT THE ON-CHIP ROM HAS A MESSAGE. WRITE APROGRAM TO COPY IT FROM CODE SPACE TO UPPER MEMORYSPACE STARTING AT 80H. ALSO PLACE THE BYTE STORED AT RAM AT PORT P0.

O

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ASSUME THAT THE ON-CHIP ROM HAS A MESSAGE. WRITE APROGRAM TO COPY IT FROM CODE SPACE TO UPPER MEMORYSPACE STARTING AT 80H. ALSO PLACE THE BYTE STORED AT RAM AT PORT P0.

OO

ORG 0MOV DPTR, #MYDATA ;LOAD STARTING ADDRESS

;OF MESSAGEMOV R1, #80H ;THE STARTING ADDRESS

;OF UPPER 128 BYTESB1: CLR A

MOVC A, @A+DPTR ;COPY FROM CODE ROMMOV @R1, A ;STORE IN UPPER RAMMOV P0, A ;SEND COPY TO P0JZ EXIT ;JUMP IF LAST BYTE=0INC DPTR ;POINT TOWARD NEXT

;ROM LOCATIONINC R1 ;POINT TO NEXT RAMSJMP B1 ;REPEAT

EXIT: SJMP $ ;STAY HERE; ------------

ORG 300HMYDATA: DB “THIS IS A TEST PROGRAM”, 0

END

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AN EXTERNAL 256 BYTES RAM USING MULTIPLEXED ADD/DATA (COULD BE 8155) IS CONNECTED TO 8051 PORT P0. PORT P3 PROVIDES CONTROL LINES FOR EXTERNAL RAM. PORTS P1 AND P2 ARE USED FOR NORMAL I/O. REGISTERS 0 AND 1 CONTAIN 12HAND 34H. LOCATION 34H OF EXTERNAL RAM HOLDS THE VALUE 56H. WRITE INSTRUCTIONS TO COPY CONTENTS OF LOCATION 34H TO 12H.

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AN EXTERNAL 256 BYTES RAM USING MULTIPLEXED ADD/DATA (COULD BE 8155) IS CONNECTED TO 8051 PORT P0. PORT P3 PROVIDES CONTROL LINES FOR EXTERNAL RAM. PORTS P1 AND P2 ARE USED FOR NORMAL I/O. REGISTERS 0 AND 1 CONTAIN 12HAND 34H. LOCATION 34H OF EXTERNAL RAM HOLDS THE VALUE 56H. WRITE INSTRUCTIONS TO COPY CONTENTS OF LOCATION 34H TO 12H.

MOVX A, @R1 ;COPY CONTENTS OF(34) TO AMOVX @R0, A ;COPY CONTENTS OF A TO (12)