ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY EC 8392 – DIGITAL ELECTRONICS EC 8392 – DIGITAL ELECTRONICS UNIT – II : COMBINATIONAL CIRCUIT DESIGN MULTIPLEXER: (Data Selector) A multiplexer or MUX, is a combinational circuit with more than one input line, one output line and more than one selection line. A multiplexer selects binary information present from one of many input lines, depending upon the logic status of the selection inputs, and routes it to the output line. Normally, there are 2 n input lines and n selection lines whose bit combinations determine which input is selected. The multiplexer is often labeled as MUX in block diagrams. A multiplexer is also called a data selector, since it selects one of many inputs and steers the binary information to the output line. Fig : 2.30 - Block diagram of Multiplexer 2-to-1- line Multiplexer : The circuit has two data input lines, one output line and one selection line, S. When S= 0, the upper AND gate is enabled and I 0 has a path to the output. When S=1, the lower AND gate is enabled and I 1 has a path to the output.
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ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY
EC 8392 – DIGITAL ELECTRONICS
EC 8392 – DIGITAL ELECTRONICS
UNIT – II : COMBINATIONAL CIRCUIT DESIGN
MULTIPLEXER: (Data Selector)
A multiplexer or MUX, is a combinational circuit with more than one input line, one
output line and more than one selection line. A multiplexer selects binary information
present from one of many input lines, depending upon the logic status of the selection
inputs, and routes it to the output line. Normally, there are 2n input lines and n
selection lines whose bit combinations determine which input is selected. The
multiplexer is often labeled as MUX in block diagrams.
A multiplexer is also called a data selector, since it selects one of many inputs and
steers the binary information to the output line.
Fig : 2.30 - Block diagram of Multiplexer
2-to-1- line Multiplexer:
The circuit has two data input lines, one output line and one selection line, S.
When S= 0, the upper AND gate is enabled and I0 has a path to the output.
When S=1, the lower AND gate is enabled and I1 has a path to the output.
ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY
EC 8392 – DIGITAL ELECTRONICS
Fig : 2.31 - Logic diagram
The multiplexer acts like an electronic switch that selects one of the two sources.
Truth table:
S Y
0 I0
1 I1
4-to-1-line Multiplexer:
A 4-to-1-line multiplexer has four (2n) input lines, two (n) select lines and one output
line. It is the multiplexer consisting of four input channels and information of one of the
channels can be selected and transmitted to an output line according to the select
inputs combinations. Selection of one of the four input channel is possible by two
selection inputs.
Each of the four inputs I0 through I3, is applied to one input of AND gate. Selection lines
S1 and S0 are decoded to select a particular AND gate. The outputs of the AND gate are
applied to a single OR gate that provides the 1-line output.
ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY
EC 8392 – DIGITAL ELECTRONICS
Fig : 2.32 - 4-to-1-Line Multiplexer
Function table:
S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3
To demonstrate the circuit operation, consider the case when S1S0= 10. The AND gate
associated with input I2 has two of its inputs equal to 1 and the third input connected to
I2. The other three AND gates have atleast one input equal to 0, which makes their
outputs equal to 0. The OR output is now equal to the value of I2, providing a path from
the selected input to the output.
ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY
EC 8392 – DIGITAL ELECTRONICS
The data output is equal to I0 only if S1= 0 and S0= 0; Y= I0S1‘S0‘. The
data output is equal to I1 only if S1= 0 and S0= 1; Y= I1S1‘S0.
The data output is equal to I2 only if S1= 1 and S0= 0; Y= I2S1S0‘.
The data output is equal to I3 only if S1= 1 and S0= 1; Y= I3S1S0. When these
terms are ORed, the total expression for the data output is,
Y= I0S1’S0’+ I1S1’S0 +I2S1S0’+ I3S1S0.
As in decoder, multiplexers may have an enable input to control the operation of the
unit. When the enable input is in the inactive state, the outputs are disabled, and when
it is in the active state, the circuit functions as a normal multiplexer.
Quadruple 2-to-1 Line Multiplexer:
This circuit has four multiplexers, each capable of selecting one of two input lines.
Output Y0 can be selected to come from either A0 or B0. Similarly, output Y1 may have
the value of A1 or B1, and so on. Input selection line, S selects one of the lines in each
of the four multiplexers. The enable input E must be active for normal operation.
Although the circuit contains four 2-to-1-Line multiplexers, it is viewed as a circuit that
selects one of two 4-bit sets of data lines. The unit is enabled when E= 0. Then if S= 0,
the four A inputs have a path to the four outputs. On the other hand, if
S=1, the four B inputs are applied to the outputs. The outputs have all 0‘s when E= 1,
regardless of the value of S.
ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY
EC 8392 – DIGITAL ELECTRONICS
Fig : 2.33 – Quadruple 2 to 1 MUX
Application:
The multiplexer is a very useful MSI function and has various ranges of applications in
data communication. Signal routing and data communication are the important
applications of a multiplexer. It is used for connecting two or more sources to guide to
a single destination among computer units and it is useful for constructing a common
ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY
EC 8392 – DIGITAL ELECTRONICS
bus system. One of the general properties of a multiplexer is that Boolean functions
can be implemented by this device.
Implementation of Boolean Function using MUX:
Any Boolean or logical expression can be easily implemented using a multiplexer. If a
Boolean expression has (n+1) variables, then ‗n‘ of these variables can be connected to
the select lines of the multiplexer. The remaining single variable along with constants 1
and 0 is used as the input of the multiplexer. For example, if C is the single variable,
then the inputs of the multiplexers are C, C‘, 1 and 0. By this method any logical
expression can be implemented.
In general, a Boolean expression of (n+1) variables can be implemented using a
multiplexer with 2n inputs.
1. Implement the following boolean function using 4: 1
multiplexer,
F (A, B, C) = ∑m (1, 3, 5, 6). Solution:
Variables, n= 3 (A, B, C) Select lines= n-
1 = 2 (S1, S0) 2n-1 to MUX i.e., 22 to 1 = 4
to 1 MUX
Input lines= 2n-1 = 22 = 4 (D0, D1, D2, D3)
Implementation table:
Apply variables A and B to the select lines. The procedures for implementing the
function are:
i. List the input of the multiplexer
ROHINI COLLEGE OF ENGINEERING AND TECHNOLOGY
EC 8392 – DIGITAL ELECTRONICS
ii. List under them all the minterms in two rows as shown below.
The first half of the minterms is associated with A‘ and the second half with A. The
given function is implemented by circling the minterms of the function and applying the
following rules to find the values for the inputs of the multiplexer.
1. If both the minterms in the column are not circled, apply 0 to the corresponding
input.
2. If both the minterms in the column are circled, apply 1 to the corresponding
input.
3. If the bottom minterm is circled and the top is not circled, apply C to the input.
4.If the top minterm is circled and the bottom is not circled, apply C‘ to the input.