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ABSTRACT

This project is a prototype boat that can travel in water. The direction of the robot can be

controlled by DTMF. This can be moved forward bac!ward direction. Also this robot can ta!e

sharp t"rnin#s towards left and ri#ht directions "sin# DC Motors. This project "ses AT$%S&'

MC( as its controller.

This project "ses DTMF technolo#y for controllin# Robot in a way s"ch that

near the controllin# side we are provided with any type of comm"nication device s"ch as a

mobile phone or a landline. )ow comin# to the other side we are provided with the mobile phoneonly beca"se a landline cannot move accordin#ly with the movement of the boat. *n the mobile

phone we allot the n"mber !eys as o"r direction movements for the Robot to move.

)ow when we dial the n"mbers in the mobile phone from the controllin#

side then it a"tomatically reco#ni+es which n"mber has been recorded and it follows with the

correspondin# ne,t step to be ta!en i.e. movement of the robot in water. This -roject "ses

DTMF Decoder which is controlled by a battery and in t"rn is connected to the mobile phone.

This is controlled by the controller and is a#ain connected to the driver circ"it for drivin# the

motor.

This project "ses battery. This project is m"ch "sef"l for mines detection and ceanic

Research Applications.

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$%S&'

MC(

DTMF

Decoder

//.0&%'M1+

Crystal scillator

-ower 2 n

Reset

13Brid#eCirc"it

Battery

Mobile-hone

DC Motor

To all sections

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INTRODUCTION

An embedded system is a combination of software and hardware to perform a

dedicated tas!.

Some of the main devices "sed in embedded prod"cts are Microprocessors and

Microcontrollers.

Microprocessors are commonly referred to as #eneral p"rpose processors as they

simply accept the inp"ts process it and #ive the o"tp"t.

*n contrast a microcontroller not only accepts the data as inp"ts b"t also

manip"lates it interfaces the data with vario"s devices controls the data and th"s finally

#ives the res"lt. *n this project we "se RF mod"le as well as the DTMF decoder for

comm"nication. )ow when we dial the n"mbers in the mobile phone from the controllin#

side then it a"tomatically reco#ni+es which n"mber has been recorded and it follows with

the correspondin# ne,t step to be ta!en i.e. movement of the robot in water.

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INTRODUCTION TO EMBEDDED SYSTEMS

INTRODUCTION TO EMBEDDED SYSTEMS

Introduction:

An embedded system is a system which is #oin# to do a predefined specified tas! is the

embedded system and is even defined as combination of both software and hardware. A #eneral3

p"rpose definition of embedded systems is that they are devices "sed to control monitor or assist

the operation of e4"ipment machinery or plant. 56mbedded5 reflects the fact that they are an

inte#ral part of the system. At the other e,treme a #eneral3p"rpose comp"ter may be "sed to

control the operation of a lar#e comple, processin# plant and its presence will be obvio"s.

All embedded systems are incl"din# comp"ters or microprocessors. Some of these

comp"ters are however very simple systems as compared with a personal comp"ter.

The very simplest embedded systems are capable of performin# only a sin#le f"nction or

set of f"nctions to meet a sin#le predetermined p"rpose. *n more comple, systems an application

pro#ram that enables the embedded system to be "sed for a partic"lar p"rpose in a specific

application determines the f"nctionin# of the embedded system. The ability to have pro#rams

means that the same embedded system can be "sed for a variety of different p"rposes. *n some

cases a microprocessor may be desi#ned in s"ch a way that application software for a partic"lar

p"rpose can be added to the basic software in a second process after which it is not possible to

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ma!e f"rther chan#es. The applications software on s"ch processors is sometimes referred to as

firmware.

The simplest devices consist of a sin#le microprocessor 7often called a 5chip89 which

may itself be pac!a#ed with other chips in a hybrid system or Application Specific *nte#rated

Circ"it 7AS*C9. *ts inp"t comes from a detector or sensor and its o"tp"t #oes to a switch or

activator which 7for e,ample9 may start or stop the operation of a machine or by operatin# a

valve may control the flow of f"el to an en#ine.

As the embedded system is the combination of both software and hardware

Figure: Block diagram of Emedded S!"tem

Software deals with the lan#"a#es li!e A:- C and ;B etc. and 1ardware deals with

-rocessors -eripherals and Memory.

Memor!:*t is "sed to store data or address.

#eri$%eral":These are the e,ternal devices connected

#roce""or:*t is an *C which is "sed to perform some tas!

&$$lication" of emedded "!"tem"

Man"fact"rin# and process control

Constr"ction ind"stry

Transport

Emedded S!"tem

Soft'are (ard'are

&)#

C

*B

Etc+,

#roce""or

#eri$%eral"

memor!

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B"ildin#s and premises

Domestic service

Comm"nications

ffice systems and mobile e4"ipment

Ban!in# finance and commercial

Medical dia#nostics monitorin# and life s"pport

Testin# monitorin# and dia#nostic systems

#roce""or" are cla""ified into four t!$e" like:

Micro -rocessor 7

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A microprocessor has three basic elements as shown above. The A:( performs all arithmetic

comp"tations s"ch as addition s"btraction and lo#ic operations 7A)D R etc9. *t is controlled

by the Control (nit and receives its data from the Re#ister Array. The Re#ister Array is a set of

re#isters "sed for storin# data. These re#isters can be accessed by the A:( very 4"ic!ly. Some

re#isters have specific f"nctions 3 we will deal with these later. The Control (nit controls the

entire process. *t provides the timin# and a control si#nal for #ettin# data into and o"t of the

re#isters and the A:( and it synchroni+es the e,ec"tion of instr"ctions 7we will deal with

instr"ction e,ec"tion at a later date9.

T%ree Ba"ic Element" of a Micro$roce""or

Micro Controller -.c/:

A microcontroller is a small comp"ter on a sin#le integrated circuitcontainin# a processor core

memory and pro#rammable in$ut0out$utperipherals. -ro#ram memory in the form of NOR

fla"%or OT# ROMis also often incl"ded on chip as well as a typically small amo"nt of RAM.

Microcontrollers are desi#ned for embedded applications in contrast to the micro$roce""or"

"sed in $er"onal com$uter"or other #eneral p"rpose applications.

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Figure: Block Diagram of Micro Controller -.c/

Digital Signal #roce""or" -DS#"/:

Di#ital Si#nal -rocessors is one which performs scientific and mathematical operation.

Di#ital Si#nal -rocessor chips 3 speciali+ed microprocessors with architect"res desi#ned

specifically for the types of operations re4"ired in di#ital si#nal processin#. :i!e a #eneral3

p"rpose microprocessor a DS- is a pro#rammable device with its own native instr"ction code.

DS- chips are capable of carryin# o"t millions of floatin# point operations per second and li!e

their better3!nown #eneral3p"rpose co"sins faster and more powerf"l versions are contin"ally

bein# introd"ced. DS-s can also be embedded within comple, 5system3on3chip5 devices often

containin# both analo# and di#ital circ"itry.

&$$lication S$ecific Integrated Circuit -&SIC/

AS*C is a combination of di#ital and analo# circ"its pac!ed into an *C to achieve the desired

controlcomp"tation f"nction

&SIC t!$icall! contain"

C-( cores for comp"tation and control

-eripherals to control timin# critical f"nctions

Memories to store data and pro#ram

Analo# circ"its to provide cloc!s and interface to the real world which is analo# in nat"re

Timer Co"nter serialcomm"nication RM

ADC DAC Timers(SART scillators

6tc.

&)U

CU

Memor!

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*s to connect to e,ternal components li!e :6Ds memories monitors etc.

Com$uter In"truction Set

There are two different types of comp"ter instr"ction set there are=

/. R*SC 7Red"ced *nstr"ction Set Comp"ter9 and

'. C*SC 7Comple, *nstr"ction Set comp"ter9

Reduced In"truction Set Com$uter -RISC/

A R*SC 7red"ced instr"ction set comp"ter9 is a microprocessor that is desi#ned to perform a

smaller n"mber of types of comp"ter instr"ction so that it can operate at a hi#her speed 7perform

more million instr"ctions per second or millions of instr"ctions per second9. Since each

instr"ction type that a comp"ter m"st perform re4"ires additional transistors and circ"itry a

lar#er list or set of comp"ter instr"ctions tends to ma!e the microprocessor more complicated

and slower in operation.

Besides performance improvement some advanta#es of R*SC and related desi#n improvements

are=

A new microprocessor can be developed and tested more 4"ic!ly if one of its aims is to be less

complicated.

peratin# system and application pro#rammers who "se the microprocessors instr"ctions will

find it easier to develop code with a smaller instr"ction set.

The simplicity of R*SC allows more freedom to choose how to "se the space on a

microprocessor.

1i#her3level lan#"a#e compilers prod"ce more efficient code than formerly beca"se they have

always tended to "se the smaller set of instr"ctions to be fo"nd in a R*SC comp"ter.

RISC c%aracteri"tic"

Sim$le in"truction "et:

*n a R*SC machine the instr"ction set contains simple basic instr"ctions from which more

comple, instr"ctions can be composed.

Same lengt% in"truction"+

6ach instr"ction is the same len#th so that it may be fetched in a sin#le operation.

1 mac%ine2c!cle in"truction"+

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Most instr"ctions complete in one machine cycle which allows the processor to handle several

instr"ctions at the same time. This pipelinin# is a !ey techni4"e "sed to speed "p R*SC

machines.

Com$le3 In"truction Set Com$uter -CISC/

C*SC which stands for Comple, *nstr"ction Set Comp"ter,is a philosophy for desi#nin# chips

that are easy to pro#ram and which ma!e efficient "se of memory. 6ach instr"ction in a C*SC

instr"ction set mi#ht perform a series of operations inside the processor. This red"ces the n"mber

of instr"ctions re4"ired to implement a #iven pro#ram and allows the pro#rammer to learn a

small b"t fle,ible set of instr"ctions.

T%e ad4antage" of CISC

At the time of their initial development C*SC machines "sed available technolo#ies to optimi+e

comp"ter performance.

Micropro#rammin# is as easy as assembly lan#"a#e to implement and m"ch less e,pensive than

hardwirin# a control "nit.

The ease of micro3codin# new instr"ctions allowed desi#ners to ma!e C*SC machines "pwardly

compatible= a new comp"ter co"ld r"n the same pro#rams as earlier comp"ters beca"se the new

comp"ter wo"ld contain a s"perset of the instr"ctions of the earlier comp"ters.

As each instr"ction became more capable fewer instr"ctions co"ld be "sed to implement a #iventas!. This made more efficient "se of the relatively slow main memory.

Beca"se micro pro#ram instr"ction sets can be written to match the constr"cts of hi#h3level

lan#"a#es the compiler does not have to be as complicated.

T%e di"ad4antage" of CISC

Still desi#ners soon reali+ed that the C*SC philosophy had its own problems incl"din#=

6arlier #enerations of a processor family #enerally were contained as a s"bset in every new

version 333 so instr"ction set chip hardware become more comple, with each #eneration of

comp"ters.

So that as many instr"ctions as possible co"ld be stored in memory with the least possible wasted

space individ"al instr"ctions co"ld be of almost any len#th333this means that different

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instr"ctions will ta!e different amo"nts of cloc! time to e,ec"te slowin# down the overall

performance of the machine.

Many speciali+ed instr"ctions arent "sed fre4"ently eno"#h to j"stify their e,istence 333

appro,imately '0 of the available instr"ctions are "sed in a typical pro#ram.

C*SC instr"ctions typically set the condition codes as a side effect of the instr"ction. )ot only

does settin# the condition codes ta!e time b"t pro#rammers have to remember to e,amine the

condition code bits before a s"bse4"ent instr"ction chan#es them.

Memor! &rc%itecture

There two different typeEs memory architect"res there are=

1arvard Architect"re

;on3)e"mann Architect"re

(ar4ard &rc%itecture

Comp"ters have separate memory areas for pro#ram instr"ctions and data. There are two or more

internal data b"ses which allow sim"ltaneo"s access to both instr"ctions and data. The C-(

fetches pro#ram instr"ctions on the pro#ram memory b"s.

The (ar4ard arc%itectureis a comp"ter architect"rewith physically separate stora#eand si#nal

pathways for instr"ctions and data. The term ori#inated from the 1arvard Mar! * relay3based

comp"ter which stored instr"ctions on p"nched tape 7' bits wide9 and data in electro3

mechanical co"nters. These early machines had limited data stora#e entirely contained within

the central processin# "nitand provided no access to the instr"ction stora#e as data. -ro#rams

needed to be loaded by an operator the processor co"ld notbootitself.

Figure: (ar4ard &rc%itecture

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Modern uses of the Harvard architecture

The principal advanta#e of the p"re 1arvard architect"re 3 sim"ltaneo"s access to more than one

memory system 3 has been red"ced by modified 1arvard processors "sin# modern C-( cache

systems. Relatively p"re 1arvard architect"re machines are "sed mostly in applications where

tradeoffs s"ch as the cost and power savin#s from omittin# caches o"twei#h the pro#rammin#

penalties from havin# distinct code and data address spaces.

Di#ital si#nal processors 7DS-s9 #enerally e,ec"te small hi#hly3optimi+ed a"dio or video

processin# al#orithms. They avoid caches beca"se their behavior m"st be e,tremely

reprod"cible. The diffic"lties of copin# with m"ltiple address spaces are of secondary concern to

speed of e,ec"tion. As a res"lt some DS-s have m"ltiple data memories in distinct address

spaces to facilitate S*MDand ;:*Gprocessin#. Te,as *nstr"ments TMS?'0C&&, processors

as one e,ample have m"ltiple parallel data b"sses 7two write three read9 and one instr"ction

b"s.

Microcontrollers are characteri+ed by havin# small amo"nts of pro#ram 7 flash memory9 and data

7SRAM9 memory with no cache and ta!e advanta#e of the 1arvard architect"re to speed

processin# by conc"rrent instr"ction and data access. The separate stora#e means the pro#ram

and data memories can have different bit depths for e,ample "sin# /@3bit wide instr"ctions and

$3bit wide data. They also mean that instr"ction pre3fetchcan be performed in parallel with other

activities. 6,amples incl"de the A;Rby Atmel Corp the -*Cby Microchip Technolo#y *nc.

and the ARMCorte,3M? processor 7not all ARM chips have 1arvard architect"re9.

6ven in these cases it is common to have special instr"ctions to access pro#ram memory as data

for read3only tables or for repro#rammin#.

*on2Neumann &rc%itecture

A comp"ter has a sin#le common memory space in which both pro#ram instr"ctions and data

are stored. There is a sin#le internal data b"s that fetches both instr"ctions and data. They cannot

be performed at the same time

The *on Neumann arc%itectureis a desi#n model for a stored3pro#ram di#ital comp"ter that

"ses a central processin# "nit7C-(9 and a sin#le separate stora#e str"ct"re 75memory59 to hold

both instr"ctions and data. *t is named after the mathematicianand early comp"ter scientistHohn

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von )e"mann. S"ch comp"ters implement a "niversal T"rin# machineand have a se4"ential

architect"re.

A "tored2$rogramdi#ital comp"ter is one that !eeps itspro#rammedinstr"ctions as well as its

data in read3write random3access memory 7RAM9. Stored3pro#ram comp"ters were

advancement over the pro#ram3controlled comp"ters of the /%0s s"ch as the Coloss"sand the

6)*AC which were pro#rammed by settin# switches and insertin# patch leads to ro"te data and

to control si#nals between vario"s f"nctional "nits. *n the vast majority of modern comp"ters the

same memory is "sed for both data and pro#ram instr"ctions. The mechanisms for transferrin#

the data and instr"ctions between the C-( and memory are however considerably more

comple, than the ori#inal von )e"mann architect"re.

The terms 5von )e"mann architect"re5 and 5stored3pro#ram comp"ter5 are #enerally "sed

interchan#eably and that "sa#e is followed in this article.

Figure: Sc%ematic of t%e *on2Neumann &rc%itecture+

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Ba"ic Difference et'een (ar4ard and *on2Neumann &rc%itecture

The primary difference between 1arvard architect"re and the ;on )e"mann architect"re is in

the ;on )e"mann architect"re data and pro#rams are stored in the same memory and mana#ed

by the same information handlin# system.

Ghereas the 1arvard architect"re stores data and pro#rams in separate memory devices and they

are handled by different s"bsystems.

*n a comp"ter "sin# the ;on3)e"mann architect"re witho"t cacheI the central processin# "nit

7C-(9 can either be readin# and instr"ction or writin#readin# data tofrom the memory. Both of

these operations cannot occ"r sim"ltaneo"sly as the data and instr"ctions "se the same system

b"s.

*n a comp"ter "sin# the 1arvard architect"re the C-( can both read an instr"ction and access

data memory at the same time witho"t cache. This means that a comp"ter with 1arvard

architect"re can potentially be faster for a #iven circ"it comple,ity beca"se data access and

instr"ction fetches do not contend for "se of a sin#le memory pathway.

Today the vast majority of comp"ters are desi#ned and b"ilt "sin# the ;on )e"mann

architect"re template primarily beca"se of the dynamic capabilities and efficiencies #ained in

desi#nin# implementin# operatin# one memory system as opposed to two. ;on )e"mann

architect"re may be somewhat slower than the contrastin# 1arvard Architect"re for certain

specific tas!s b"t it is m"ch more fle,ible and allows for many concepts "navailable to 1arvard

architect"re s"ch as self pro#rammin# word processin# and so on.

1arvard architect"res are typically only "sed in either speciali+ed systems or for very specific

"ses. *t is "sed in speciali+ed di#ital si#nal processin# 7DS-9 typically for video and a"dio

processin# prod"cts. *t is also "sed in many small microcontrollers "sed in electronics

applications s"ch as Advanced R*SJ Machine 7ARM9 based prod"cts for many vendors.

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&T56S78 MICROCONTRO))ER

MICROCONTRO))ERS:

Microprocessors and microcontrollers are widely "sed in embedded systems

prod"cts.Microcontroller is a programmable device. A microcontroller has a C-( in addition to

a fi,ed amo"nt of RAM RM * ports and a timer embedded all on a sin#le chip. The fi,ed

amo"nt of on3chip RM RAM and n"mber of * ports in microcontrollers ma!es them ideal

for many applications in which cost and space are critical.

The *ntel $0&' is 1arvard architect"re sin#le chip microcontroller 7

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FE&TURES

K Compatible with MCS3&/L -rod"cts

K $J Bytes of *n3System -ro#rammable 7*S-9 Flash Memory

2 6nd"rance= /000 Grite6rase Cycles

K .0; to &.&; peratin# Ran#e

K F"lly Static peration= 0 1+ to ?? M1+

K Three3level -ro#ram Memory :oc!

K '&@ , $3bit *nternal RAM

K ?' -ro#rammable * :ines

K Three /@3bit TimerCo"nters

K 6i#ht *nterr"pt So"rces

K F"ll D"ple, (ART Serial Channel

K :ow3power *dle and -ower3down Modes

K *nterr"pt Recovery from -ower3down Mode

K Gatchdo# Timer

K D"al Data -ointer

K -ower3off Fla#

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DESCRI#TION

The AT$%S&' is a low3power hi#h3performance CMS $3bit microcontroller with $J

bytes of in3system pro#rammable Flash memory. The device is man"fact"red "sin# AtmelEs

hi#h3density nonvolatile memory technolo#y and is compatible with the ind"stry3 standard

$0C&/ instr"ction set and pino"t. The on3chip Flash allows the pro#ram memory to be

repro#rammed in3system or by a conventional nonvolatile memory pro#rammer. By combinin# a

versatile $3bit C-( with in3system pro#rammable Flash on a monolithic chip the Atmel

AT$%S&' is a powerf"l microcontroller which provides a hi#hly3fle,ible and cost3effective

sol"tion to many embedded control applications.

The AT$%S&' provides the followin# standard feat"res= $J bytes of Flash '&@ bytes of

RAM ?' * lines Gatchdo# timer two data pointers three /@3bit timerco"nters a si,3vector

two3level interr"pt architect"re a f"ll d"ple, serial port on3chip oscillator and cloc! circ"itry.

*n addition the AT$%S&' is desi#ned with static lo#ic for operation down to +ero fre4"ency and

s"pports two software selectable power savin# modes.

The *dle Mode stops the C-( while allowin# the RAM timerco"nters serial port and

interr"pt system to contin"e f"nctionin#. The -ower3down mode saves the RAM contents b"t

free+es the oscillator disablin# all other chip f"nctions "ntil the ne,t interr"pt or hardware reset.

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#IN CONFI9UR&TIONS

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#IN DESCRI#TION

*CC

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S"pply volta#e.

9ND

>ro"nd.

#ort

-ort 0 is an $3bit open drain bidirectional * port. As an o"tp"t port each pin can sin! ei#ht

TT: inp"ts. Ghen /s are written to port 0 pins the pins can be "sed as hi#h impedance inp"ts.

-ort 0 can also be confi#"red to be the m"ltiple,ed low order addressdata b"s d"rin# accesses to

e,ternal pro#ram and data memory. *n this mode -0 has internal p"ll"ps. -ort 0 also receives the

code bytes d"rin# Flash pro#rammin# and o"tp"ts the code bytes d"rin# pro#ram verification.

6,ternal p"ll"ps are re4"ired d"rin# pro#ram verification.

#ort 1

-ort / is an $3bit bidirectional * port with internal p"ll"ps. The -ort / o"tp"t b"ffers can

sin!so"rce fo"r TT: inp"ts. Ghen /s are written to -ort / pins they are p"lled hi#h by the

internal p"ll"ps and can be "sed as inp"ts. As inp"ts -ort / pins that are e,ternally bein# p"lled

low will so"rce c"rrent 7**:9 beca"se of the internal p"ll"ps. *n addition -/.0 and -/./ can be

confi#"red to be the timerco"nter ' e,ternal co"nt inp"t 7-/.0T'9 and the timerco"nter '

tri##er inp"t 7-/./T'69 respectively as shown in the followin# table. -ort / also receives the

low3order address bytes d"rin# Flash pro#rammin# and verification.

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#ort 8

-ort ' is an $3bit bidirectional * port with internal p"ll"ps. The -ort ' o"tp"t b"ffers can

sin!so"rce fo"r TT: inp"ts. Ghen /s are written to -ort ' pins they are p"lled hi#h by the

internal p"ll"ps and can be "sed as inp"ts. As inp"ts -ort ' pins that are e,ternally bein# p"lled

low will so"rce c"rrent 7**:9 beca"se of the internal p"ll"ps. -ort ' emits the hi#h3order address

byte d"rin# fetches from e,ternal pro#ram memory and d"rin# accesses to e,ternal data memory

that "se /@3bit addresses 7M; N D-TR9. *n this application -ort ' "ses stron# internal p"ll3

"ps when emittin# /s. D"rin# accesses to e,ternal data memory that "se $3bit addresses 7M;

N R*9 -ort ' emits the contents of the -' Special F"nction Re#ister. -ort ' also receives the

hi#h3order address bits and some control si#nals d"rin# Flash pro#rammin# and verification.

#ort ;

-ort ? is an $3bit bidirectional * port with internal p"ll"ps. The -ort ? o"tp"t b"ffers can

sin!so"rce fo"r TT: inp"ts. Ghen /s are written to -ort ? pins they are p"lled hi#h by the

internal p"ll"ps and can be "sed as inp"ts. As inp"ts -ort ? pins that are e,ternally bein# p"lled

low will so"rce c"rrent 7**:9 beca"se of the p"ll"ps. -ort ? also serves the f"nctions of vario"s

special feat"res of the AT$%S&' as shown in the followin# table. -ort ? also receives some

control si#nals for Flash pro#rammin# and verification.

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RST

Reset inp"t. A hi#h on this pin for two machine cycles while the oscillator is r"nnin# resets the

device. This pin drives 1i#h for %@ oscillator periods after the Gatchdo# times o"t. The D*SRT

bit in SFR A(R 7address $619 can be "sed to disable this feat"re. *n the defa"lt state of bit

D*SRT the R6S6T 1*>1 o"t feat"re is enabled.

&)E0#RO9

Address :atch 6nable 7A:69 is an o"tp"t p"lse for latchin# the low byte of the address d"rin#

accesses to e,ternal memory. This pin is also the pro#ram p"lse inp"t 7-R>9 d"rin# Flash

pro#rammin#. *n normal operation A:6 is emitted at a constant rate of /@ the oscillator

fre4"ency and may be "sed for e,ternal timin# or cloc!in# p"rposes. )ote however that one

A:6 p"lse is s!ipped d"rin# each access to e,ternal data memory. *f desired A:6 operation can

be disabled by settin# bit 0 of SFR location $61. Gith the bit set A:6 is active only d"rin# a

M; or M;C instr"ction. therwise the pin is wea!ly p"lled hi#h. Settin# the A:63disable

bit has no effect if the microcontroller is in e,ternal e,ec"tion mode.

#SEN

-ro#ram Store 6nable 7-S6)9 is the read strobe to e,ternal pro#ram memory. Ghen the

AT$%S&' is e,ec"tin# code from e,ternal pro#ram memory -S6) is activated twice each

machine cycle e,cept that two -S6) activations are s!ipped d"rin# each access to e,ternal data

memory.

E&0*##

6,ternal Access 6nable. 6A m"st be strapped to >)D in order to enable the device to fetch code

from e,ternal pro#ram memory locations startin# at 00001 "p to FFFF1. )ote however that if

loc! bit / is pro#rammed 6A will be internally latched on reset.

6A sho"ld be strapped to ;CC for internal pro#ram e,ec"tions. This pin also receives the /'3

volt pro#rammin# enable volta#e 7;--9 d"rin# Flash pro#rammin#.

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1 $F for Cr!"tal"

= ? $F > 1 $F for Ceramic Re"onator"

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Fig: E3ternal Clock Dri4e Configuration

578 MICROCONTRO))ER MEMORY OR9&NI@&TION

The microcontroller memory is divided into -ro#ram Memory and Data Memory. -ro#ram

Memory 7RM9 is "sed for permanent savin# pro#ram bein# e,ec"ted while Data Memory

7RAM9 is "sed for temporarily storin# and !eepin# intermediate res"lts and variables. Dependin#

on the model in "se 7still referrin# to the whole $0&' microcontroller family9 at most a few Jb of

RM and /'$ or '&@ bytes of RAM can be "sed. 1oweverO

All $0&' microcontrollers have /@3bit addressin# b"s and can address @ !b memory. *t is

neither a mista!e nor a bi# ambition of en#ineers who were wor!in# on basic core development.

*t is a matter of very clever memory or#ani+ation which ma!es these controllers a real

Ppro#rammersE tidbitP.

#rogram Memor!

The oldest models of the $0&' microcontroller family did not have any internal pro#ram

memory. *t was added from o"tside as a separate chip. These models are reco#ni+able by their

label be#innin# with $0? 7for e,. $0?/ or $0?'9. All later models have a few Jbytes RM

embedded 6ven tho"#h it is eno"#h for writin# most of the pro#rams there are sit"ations when

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additional memory is necessary. A typical e,ample of it is the "se of so called loo!"p tables.

They are "sed in cases when somethin# is too complicated or when there is no time for solvin#

e4"ations describin# some process. The e,ample of it can be totally e,otic 7an estimate of self3

#"ided roc!etsE meetin# point9 or totally common 7meas"rin# of temperat"re "sin# non3linear

thermo element or asynchrono"s motor speed control9. *n those cases all needed estimates and

appro,imates are e,ec"ted in advance and the final res"lts are p"t in the tables 7similar to

lo#arithmic tables9.

1ow does the microcontroller handle e,ternal memory depend on the pin 6A lo#ic stateQ

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E&=*n this case internal pro#ram memory is completely i#nored only a pro#ram stored in

e,ternal memory is to be e,ec"ted.

E&=1*n this case a pro#ram from b"ilt3in RM is to be e,ec"ted first 7to the last location9.

Afterwards the e,ec"tion is contin"ed by readin# additional memory.

in both cases -0 and -' are not available to the "ser beca"se they are "sed for data and addresstransmission. Besides the pins A:6 and -S6) are "sed too.

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Data Memor!

As already mentioned Data Memory is "sed for temporarily storin# and !eepin# data and

intermediate res"lts created and "sed d"rin# microcontrollerEs operatin#. Besides this

microcontroller family incl"des many other re#isters s"ch as= hardware co"nters and timers

inp"to"tp"t ports serial data b"ffers etc. The previo"s versions have the total memory si+e of

'&@ locations while for later models this n"mber is incremented by additional /'$ available

re#isters. *n both cases these first '&@ memory locations 7addresses 03FFh9 are the base of the

memory. Common to all types of the $0&' microcontrollers. :ocations available to the "ser

occ"py memory space with addresses from 0 to Fh. First /'$ re#isters and this part of RAM is

divided in several bloc!s.

The first bloc! consists of ban!s each incl"din# $ re#isters desi#nated as R0 to R. -rior to

access them a ban! containin# that re#ister m"st be selected. )e,t memory bloc! 7in the ran#e

of '0h to 'Fh9 is bit3 addressable which means that each bit bein# there has its own address

from 0 to Fh. Since there are /@ s"ch re#isters this bloc! contains in total of /'$ bits with

separate addresses 7The 0th bit of the '0h byte has the bit address 0 and the th bit of the 'Fh

byte has the bit address Fh9. The third #ro"ps of re#isters occ"py addresses 'Fh3Fh 7in total of

$0 locations9 and does not have any special p"rpose or feat"re.

&dditional Memor! Block of Data Memor!

*n order to satisfy the pro#rammersE permanent h"n#er for Data Memory prod"cers have

embedded an additional memory bloc! of /'$ locations into the latest versions of the $0&'

microcontrollers. )at"rally itEs not so simpleOThe problem is that electronics performin#

addressin# has / byte 7$ bits9 on disposal and d"e to that it can reach only the first '&@ locations.

*n order to !eep already e,istin# $3bit architect"re and compatibility with other e,istin# models a

little tric! has been "sed.

(sin# tric! in this case means that additional memory bloc! shares the same addresses with

e,istin# locations intended for the SFRs 7$0h3 FFh9. *n order to differentiate between these two

physically separated memory spaces different ways of addressin# are "sed. A direct addressin#

is "sed for all locations in the SFRs while the locations from additional RAM are accessible

"sin# indirect addressin#.

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Fig: Microcontroller internal "tructure

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(o' to e3tend memor!A

*n case on3chip memory is not eno"#h it is possible to add two e,ternal memory chips with

capacity of @Jb each. * ports -' and -? are "sed for their addressin# and data transmission.

From the "sersE perspective everythin# f"nctions 4"ite simple if properly connected beca"se the

most operations are performed by the microcontroller itself. The $0&' microcontroller has two

separate readin# si#nals RD7-?.9 and -S6). The first one is activated byte from e,ternal data

memory 7RAM9 sho"ld be read while another one is activated to read byte from e,ternal

pro#ram memory 7RM9. These both si#nals are active at lo#ical +ero 709 level. A typical

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e,ample of s"ch memory e,tension "sin# special chips for RAM and RM is shown on the

previo"s pict"re. *t is calledHardward architecture.

6ven tho"#h the additional memory is rarely "sed with the latest versions of the

microcontrollers it will be described here in short what happens when memory chips are

connected accordin# to the previo"s scheme. *t is important to !now that the whole process is

performed a"tomatically i.e. with no intervention in the pro#ram.

Ghen the pro#ram d"rin# e,ec"tion enco"nters the instr"ction which resides in e,ternal

memory 7RM9 the microcontroller will activate its control o"tp"t A:6 and set the first

$ bits of address 7A03A9 on -0. *n this way *C circ"it 1CT&? which 5lets in5 the

first $ bits to memory address pins is activated.

A si#nal on the pin A:6 closes the *C circ"it 1CT&? and immediately afterwards $

hi#her bits of address 7A$3A/&9 appear on the port. *n this way a desired location in

additional pro#ram memory is completely addressed. The only thin# left over is to read

its content.

-ins on -0 are confi#"red as inp"ts the pin -S6) is activated and the microcon troller

reads content from memory chip. The same connections are "sed both for data and lower

address byte.

Similar occ"rs when it is a needed to read some location from e,ternal Data Memory. )ow

addressin# is performed in the same way while readin# or writin# is performed via si#nals

which appear on the control o"tp"ts RD or GR.

&ddre""ing

Ghile operatin# processor processes data accordin# to the pro#ram instr"ctions. 6ach

instr"ction consists of two parts. ne part describes what sho"ld be done and another part

indicates what to "se to do it. This later part can be data 7binary n"mber9 or address where the

data is stored. All $0&' microcontrollers "se two ways of addressin# dependin# on which part of

memory sho"ld be accessed=

Direct &ddre""ing

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n direct addressin# a val"e is obtained from a memory location while the address of that

location is specified in instr"ction. nly after that the instr"ction can process data 7how depends

on the type of instr"ction= addition s"btraction copyO9. bvio"sly a n"mber bein# chan#ed

d"rin# operatin# a variable can reside at that specified address. For e,ample=

Since the address is only one byte in si+e 7 the #reatest n"mber is '&&9 this is how only the first

'&& locations in RAM can be accessed in this case the first half of the basic RAM is intended to

be "sed freely while another half is reserved for the SFRs.

Indirect &ddre""ing

n indirect addressin# a re#ister which contains address of another re#ister is specified in the

instr"ction. A val"e "sed in operatin# process resides in that another re#ister. For e,ample=

nly RAM locations available for "se are accessed by indirect addressin# 7never in the SFRs9.

For all lSatest versions of the microcontrollers with additional memory bloc! 7those /'$

locations in Data Memory9 this is the only way of accessin# them. Simply when d"rin#

operatin# the instr"ction incl"din# PN8 si#n is enco"ntered and if the specified address is hi#her

than /'$ 7F he,.9 the processor !nows that indirect addressin# is "sed and j"mps over memory

space reserved for the SFRs.

n indirect addressin# the re#isters R0 R/ or Stac! -ointer are "sed for specifyin# $3bit

addresses. Since only $ bits are available it is possible to access only re#isters of internal RAM

in this way 7/'$ locations in former or '&@ locations in latest versions of the microcontrollers9. *f

memory e,tension in form of additional memory chip is "sed then the /@3bit D-TR Re#ister

7consistin# of the re#isters D-TR: and D-TR19 is "sed for specifyin# addresses. *n this way it

is possible to access any location in the ran#e of @J.

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SFR" -S$ecial Function Regi"ter"/

SFRs are a !ind of control table "sed for r"nnin# and monitorin# microcontrollerEs operatin#.

6ach of these re#isters even each bit they incl"de has its name address in the scope of RAM

and clearly defined p"rpose 7 for e,ample= timer control interr"pt serial connection etc.9. 6ven

tho"#h there are /'$ free memory locations intended for their stora#e the basic core shared by

all types of $0&' controllers has only '/ s"ch re#isters. Rest of locations are intensionally left

free in order to enable the prod"cers to f"rther improved models !eepin# at the same time

compatibility with the previo"s versions. *t also enables the "se of pro#rams written a lon# time

a#o for the microcontrollers which are o"t of prod"ction now.

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& Regi"ter -&ccumulator/

This is a #eneral3p"rpose re#ister which serves for storin# intermediate res"lts d"rin# operatin#.

A n"mber 7an operand9 sho"ld be added to the acc"m"lator prior to e,ec"te an instr"ction "pon

it. nce an arithmetical operation is preformed by the A:( the res"lt is placed into the

acc"m"lator. *f a data sho"ld be transferred from one re#ister to another it m"st #o thro"#h

acc"m"lator. For s"ch "niversal p"rpose this is the most commonly "sed re#ister that none

microcontroller can be ima#ined witho"t 7more than a half $0&' microcontrollers instr"ctions

"sed "se the acc"m"lator in some way9.

B Regi"ter

B re#ister is "sed d"rin# m"ltiply and divide operations which can be performed only "pon

n"mbers stored in the A and B re#isters. All other instr"ctions in the pro#ram can "se this

re#ister as a spare acc"m"lator 7A9.

D"rin# pro#rammin# each of re#isters is called by name so that their e,act address is not so

important for the "ser. D"rin# compilin# into machine code 7series of he,adecimal n"mbers

reco#ni+ed as instr"ctions by the microcontroller9 -C will a"tomatically instead of re#istersE

name write necessary addresses into the microcontroller.

R Regi"ter" -R2R/

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This is a common name for the total $ #eneral p"rpose re#isters 7R0 R/ R' ...R9. 6ven they

are not tr"e SFRs they deserve to be disc"ssed here beca"se of their p"rpose. The ban! is active

when the R re#isters it incl"des are in "se. Similar to the acc"m"lator they are "sed for

temporary storin# variables and intermediate res"lts. Ghich of the ban!s will be active depends

on two bits incl"ded in the -SG Re#ister. These re#isters are stored in fo"r ban!s in the scope of

RAM.

De"cri$tion:

The AT$%S&' is a low3volta#e hi#h3performance CMS $3bit microcomp"ter with J

bytes of Flash pro#rammable memory. The device is man"fact"red "sin# AtmelEs hi#h3density

nonvolatile memory technolo#y and is compatible with the ind"stry3standard MCS3&/

instr"ction set. By combinin# a versatile $3bit C-( with Flash on a monolithic chip the Atmel

AT$%S&' is a powerf"l microcomp"ter which provides a hi#hly fle,ible and cost3effective

sol"tion to many embedded control applications.

*n addition the AT$%S&' is desi#ned with static lo#ic for operation down to +ero

fre4"ency and s"pports two software selectable power savin# modes. The *dle Mode stops the

C-( while allowin# the RAM timerco"nters serial port and interr"pt system to contin"e

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f"nctionin#. The power3down mode saves the RAM contents b"t free+es the oscillator disablin#

all other chip f"nctions "ntil the ne,t hardware reset.

Mac%ine c!cle for t%e 578

The C-( ta!es a certain n"mber of cloc! cycles to e,ec"te an instr"ction. *n the $0&' family

these cloc! cycles are referred to as machine cycles. The len#th of the machine cycle depends on

the fre4"ency of the crystal oscillator. The crystal oscillator alon# with on3chip circ"itry

provides the cloc! so"rce for the $0&' C-(.

The fre4"ency can vary from M1+ to ?0 M1+ dependin# "pon the chip ratin# and

man"fact"rer. B"t the e,act fre4"ency of //.0&%' M1+ crystal oscillator is "sed to ma!e the

$0&' based system compatible with the serial port of the *BM -C.

*n the ori#inal version of $0&' one machine cycle lasts /' oscillator periods. Therefore to

calc"late the machine cycle for the $0&' the calc"lation is made as //' of the crystal fre4"ency

and its inverse is ta!en.

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T(EORY OF DC MOTOR

DC motorA DC motor is an electric motor that r"ns on direct c"rrent 7DC9 electricity.

DC Motor Connection"

Fi#"re shows schematically the different methods of connectin# the field and armat"re circ"its in

a DC Motor. The circ"lar symbol represents the armat"re circ"it and the s4"ares at the side

of the circle represent the br"sh comm"tator system. The direction of the arrows indicates the

direction of the ma#netic fields.

T16R F DC MTR

The speed of a DC motor is directly proportional to the s"pply volta#e so if we red"ce

the s"pply volta#e from /' ;olts to @ ;olts the motor will r"n at half the speed. 1ow can this be

achieved when the battery is fi,ed at /' ;oltsQ The speed controller wor!s by varyin# the

avera#e volta#e sent to the motor. *t co"ld do this by simply adj"stin# the volta#e sent to the

motor b"t this is 4"ite inefficient to do. A better way is to switch the motors s"pply on and off

very 4"ic!ly. *f the switchin# is fast eno"#h the motor doesnt notice it it only notices the

avera#e effect.

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Ghen yo" watch a film in the cinema or the television what yo" are act"ally seein# is a

series of fi,ed pict"res which chan#e rapidly eno"#h that yo"r eyes j"st see the avera#e effect 3

movement. o"r brain fills in the #aps to #ive an avera#e effect.

)ow ima#ine a li#ht b"lb with a switch. Ghen yo" close the switch the b"lb #oes on and

is at f"ll bri#htness say /00 Gatts. Ghen yo" open the switch it #oes off 70 Gatts9. )ow if yo"

close the switch for a fraction of a second then open it for the same amo"nt of time the filament

wont have time to cool down and heat "p and yo" will j"st #et an avera#e #low of &0 Gatts.

This is how lamp dimmers wor! and the same principle is "sed by speed controllers to drive a

motor. Ghen the switch is closed the motor sees /' ;olts and when it is open it sees 0 ;olts. *f

the switch is open for the same amo"nt of time as it is closed the motor will see an avera#e of @

;olts and will r"n more slowly accordin#ly. The #raph below shows the speed of a motor that is

bein# t"rned on and off.

#rinci$le" of o$eration

*n any electric motor operation is based on simple electroma#netism. A c"rrent3carryin#

cond"ctor #enerates a ma#netic fieldI when this is then placed in an e,ternal ma#netic field it

will e,perience a force proportional to the c"rrent in the cond"ctor and to the stren#th of the

e,ternal ma#netic field. As yo" are well aware of from playin# with ma#nets as a !id opposite

7)orth and So"th9 polarities attract while li!e polarities 7)orth and )orth So"th and So"th9

repel. The internal confi#"ration of a DC motor is desi#ned to harness the ma#netic interaction

between a c"rrent3carryin# cond"ctor and an e,ternal ma#netic field to #enerate rotational

motion.

:ets start by loo!in# at a simple '3pole DC electric motor 7here red represents a ma#net or

windin# with a 5)orth5 polari+ation while #reen represents a ma#net or windin# with a 5So"th5

polari+ation9.

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6very DC motor has si, basic parts 33 a,le rotor 7a.!.a. armat"re9 stator comm"tator field

ma#net7s9 and br"shes. *n most common DC motors 7and all that Beamers will see9 the e,ternal

ma#netic field is prod"ced by hi#h3stren#th permanent ma#nets. The stator is the stationary part

of the motor 33 this incl"des the motor casin# as well as two or more permanent ma#net pole

pieces. The rotor 7to#ether with the a,le and attached comm"tator9 rotates with respect to the

stator. The rotor consists of windin#s 7#enerally on a core9 the windin#s bein# electrically

connected to the comm"tator. The above dia#ram shows a common motor layo"t 33 with the

rotor inside the stator 7field9 ma#nets.

The #eometry of the br"shes comm"tator contacts and rotor windin#s are s"ch that when power

is applied the polarities of the ener#i+ed windin# and the stator ma#net7s9 are misali#ned and

the rotor will rotate "ntil it is almost ali#ned with the stators field ma#nets. As the rotor reachesali#nment the br"shes move to the ne,t comm"tator contacts and ener#i+e the ne,t windin#.

>iven o"r e,ample two3pole motor the rotation reverses the direction of c"rrent thro"#h the

rotor windin# leadin# to a 5flip5 of the rotors ma#netic field drivin# it to contin"e rotatin#.

*n real life tho"#h DC motors will always have more than two poles 7three is a very common

n"mber9. *n partic"lar this avoids 5dead spots5 in the comm"tator. o" can ima#ine how with

o"r e,ample two3pole motor if the rotor is e,actly at the middle of its rotation 7perfectly ali#ned

with the field ma#nets9 it will #et 5st"c!5 there. Meanwhile with a two3pole motor there is a

moment where the comm"tator shorts o"t the power s"pply 7i.e. both br"shes to"ch both

comm"tator contacts sim"ltaneo"sly9. This wo"ld be bad for the power s"pply waste ener#y

and dama#e motor components as well. et another disadvanta#e of s"ch a simple motor is that

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it wo"ld e,hibit a hi#h amo"nt of tor4"e 5ripple5 7the amo"nt of tor4"e it co"ld prod"ce is cyclic

with the position of the rotor9.

So since most small DC motors are of a three3pole desi#n lets tin!er with the wor!in#s of one

via an interactive animation.

o"ll notice a few thin#s from this 33 namely one pole is f"lly ener#i+ed at a time 7b"t two

others are 5partially5 ener#i+ed9. As each br"sh transitions from one comm"tator contact to the

ne,t one coils field will rapidly collapse as the ne,t coils field will rapidly char#e "p 7this

occ"rs within a few microsecond9. Gell see more abo"t the effects of this later b"t in the

meantime yo" can see that this is a direct res"lt of the coil windin#s series wirin#=

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The "se of an iron core armat"re 7as in the Mab"chi above9 is 4"ite common and has a n"mber

of advanta#es. First off the iron core provides a stron# ri#id s"pport for the windin#s 33 a

partic"larly important consideration for hi#h3tor4"e motors. The core also cond"cts heat away

from the rotor windin#s allowin# the motor to be driven harder than mi#ht otherwise be the

case. *ron core constr"ction is also relatively ine,pensive compared with other constr"ction

types.

B"t iron core constr"ction also has several disadvanta#es. The iron armat"re has a relatively hi#h

inertia which limits motor acceleration. This constr"ction also res"lts in hi#h windin#

ind"ctances which limit br"sh and comm"tator life.

*n small motors an alternative desi#n is often "sed which feat"res a coreless armat"re windin#.

This desi#n depends "pon the coil wire itself for str"ct"ral inte#rity. As a res"lt the armat"re is

hollow and the permanent ma#net can be mo"nted inside the rotor coil. Coreless DC motors

have m"ch lower armat"re ind"ctance than iron3core motors of comparable si+e e,tendin# br"sh

and comm"tator life.

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DC motor e%a4ior

1i#h3speed o"tp"t

This is the simplest trait to "nderstand and treat 33 most DC motors r"n at very hi#h o"tp"t

speeds 7#enerally tho"sands or tens of tho"sands of R-M9. Ghile this is fine for some B6AM

bots 7say photo poppers or solar rollers9 many B6AM bots 7wal!ers heads9 re4"ire lower

speeds 33 yo" m"st p"t #ears on yo"r DC motors o"tp"t for these applications.

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(2BRID9E:

An 13brid#e is an electronic circ"it which enables DC electric motors to be r"n forwards or

bac!wards. These circ"its are often "sed in robotics. 13brid#es are available as inte#rated

circ"its or can be b"ilt from discrete components.

The two basic states of a 13brid#e.The term 513brid#e5 is derived from the typical #raphical

representation of s"ch a circ"it. An 13brid#e is b"ilt with fo"r switches 7solid3state or

mechanical9. Ghen the switches S/ and S 7accordin# to the first fi#"re9 are closed 7and S' and

S? are open9 a positive volta#e will be applied across the motor. By openin# S/ and S switches

and closin# S' and S? switches this volta#e is reversed allowin# reverse operation of the motor.

(sin# the nomenclat"re above the switches S/ and S' sho"ld never be closed at the same

time as this wo"ld ca"se a short circ"it on the inp"t volta#e so"rce. The same applies to the

switches S? and S. This condition is !nown as shoot3thro"#h.

O$eration

The 13Brid#e arran#ement is #enerally "sed to reverse the polarity of the motor b"t can also be

"sed to bra!e the motor where the motor comes to a s"dden stop as the motors terminals are

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shorted or to let the motor free r"n to a stop as the motor is effectively disconnected from the

circ"it. The followin# table s"mmari+es operation.

S1 S8 S; S? Re"ult

/ 0 0 / Motor moves ri#ht

0 / / 0 Motor moves left

0 0 0 0 Motor free r"ns

0 / 0 / Motor bra!es

(2Bridge Dri4er:

The switchin# property of this 13Brid#e can be replace by a Transistor or a Relay or a Mosfet or

even by an *C. 1ere we are replacin# this with an *C named :'%?D as the driver whose

description is as #iven below.

Feature":

@00mA (T-(T C(RR6)T CA-AB*:*T

-6R C1A))6:

/.'A -6AJ (T-(T C(RR6)T 7non repetitive9

-6R C1A))6:

6)AB:6 FAC*:*T

;6RT6M-6RAT(R6 -RT6CT*)

:>*CA: 505 *)-(T ;:TA>6 (- T /.& ;

71*>1 )*S6 *MM()*T9

*)T6R)A: C:AM- D*D6S

DESCRI#TION

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The Device is a monolithic inte#rated hi#h volta#e hi#h c"rrent fo"r channel driver desi#ned to

accept standard DT: or TT: lo#ic levels and drive ind"ctive loads 7s"ch as relays solenoides

DC and steppin# motors9 and switchin# power transistors. To simplify "se as two brid#es each

pair of channels is e4"ipped with an enable inp"t. A separate s"pply inp"t is provided for the

lo#ic allowin# operation at a lower volta#e and internal clamp diodes are incl"ded. This device

is s"itable for "se in switchin# applications at fre4"encies "p to & !1+. The :'%?D is assembled

in a /@ lead plastic pac!aa#e which has center pins connected to#ether and "sed for heatsin!in#

The :'%?DD is assembled in a '0 lead s"rface mo"nt which has $ center pins connected

to#ether and "sed for heatsin!in#.

B)OC DI&9R&M

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&BSO)UTE M&

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DTMF Decoder=

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DTMF Decoder

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DTMF:

Dual2tone multi2freuenc! "ignaling7DTMF9 is "sed for telecomm"nication

si#nalin#over analo# telephone lines in the voice3fre4"ency band between telephonehandsets

and other comm"nications devices and the switchin# center. The version of DTMF that is "sed

inp"sh3b"tton telephonesfor tone dialin# is !nown as Touc%2Tone. *t was first "sed by ATT

in commerce as a re#istered trademar! and is standardi+ed by *T(3TRecommendation U.'?. *t

is also !nown in the (J asMF4.

therm"lti3fre4"encysystems are "sed for internal si#nalin# within the telephone networ!.

The To"ch3Tone system "sin# the telephone !eypad #rad"ally replaced the "se ofrotary

dialstartin# in /%@? and since then DTMF or To"ch3Tone became the ind"stry standard for

bothcell phonesand landlineservice.

The DTMF !eypad is laid o"t in a V matri, with each row representin# a lowfre4"ency and

each col"mn representin# a highfre4"ency. -ressin# a sin#le !ey 7s"ch as / 9 will send

asin"soidaltone for each of the two fre4"encies 7@% and /'0%hert+71+99. The ori#inal

!eypads had levers inside so each b"tton activated two contacts. The m"ltiple tones are the

reason for callin# the system m"ltifre4"ency. These tones are then decoded by the switchin#

center to determine which !ey was pressed.

DTMF ke!$ad freuencie" -'it% "ound cli$"/

186

(

1;;

(

1?

(

1;;

(

6 ( / ' ? A

( & @ B

578 ( $ % C

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6?1 ( W 0 D

K The DTMF is a pop"lar si#nalin# method between telephones and switchin# centers

K DTMF is also "sed for si#nalin# between the Telephone networ! and comp"ter networ!s

K The DTMF si#nals are Transmitted over a telephone line

K (ses speech fre4"ency si#nals

K DTMF si#nals are the s"perposition of ' sine waves with different fre4"encies

X

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Description:

The MT$$0DMT$$0D3/ is a complete DTMF receiver inte#ratin# both the band split

filter and di#ital decoder f"nctions. The filter section "ses switched capacitor techni4"es for hi#h

and low #ro"p filtersI the decoder "ses di#ital co"ntin# techni4"es to detect and decode all /@

DTMF tone pairs into a 3bit code. 6,ternal component co"nt is minimi+ed by on chip provision

of a differential inp"t amplifier cloc! oscillator and latched three3state b"s interface.

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CODE

incl"deYre#&'.hZdefine dtmfdata -/

void stop7void9Ivoid forward7void9I

void left7void9I

void ri#ht7void9I

void bac!ward7void9I

void main79

[

dtmfdata\0,ffI-0\0I

-?\0Iwhile7/9

[

if7dtmfdata\\0,0f9 [

while7dtmfdata\\0,0f9

[

stop79I ]

]

if7dtmfdata\\0,0e9 [

while7dtmfdata\\0,0e9

[ forward79I

]

]

if7dtmfdata\\0,0d9 [

while7dtmfdata\\0,0d9

[ left79I

]

] if7dtmfdata\\0,0b9

[

while7dtmfdata\\0,0b9

[

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ri#ht79I

]

]

if7dtmfdata\\0,09

[ while7dtmfdata\\0,09

[

bac!ward79I ]

]

]

]

void stop7void9

[

-0\0,00I-?\0,00I

]

void forward7void9

[-0\0,CAI

-?\0I

]

void left7void9

[

-0\0,'I-?\0,'I

]

void ri#ht7void9

[

-0\0,$$I

-?\0,$$I]

void bac!ward7void9[

-?\0,CAI

-0\0I]

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Software Tools

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EI) SOFTG&RE:

Jeil compiler is a software "sed where the machine lan#"a#e code is written and

compiled. After compilation the machine so"rce code is converted into he, code which is to be

d"mped into the microcontroller for f"rther processin#. Jeil compiler also s"pports C lan#"a#e

code.

STE#S TO GRITE &N &SSEMB)Y )&N9U&9E #RO9R&M IN EI) &ND (OG TO

COM#I)E IT:

/. *nstall the Jeil Software in the -C in any of the drives.

'. After installation an icon will be created with the name PJeil ";ision?8. H"st dra# thisicon onto the des!top so that it becomes easy whenever yo" try to write pro#rams in !eil.

?. Do"ble clic! on this icon to start the !eil compiler.

. A pa#e opens with different options in it showin# the project wor!space at the leftmost

corner side o"tp"t window in the bottom and an ash colo"red space for the pro#ram to be

written.

&. )ow to start "sin# the !eil clic! on the option Pproject8.

@. A small window opens showin# the options li!e new project import project open project

etc. Clic! on P)ew project8.

. A small window with the title bar PCreate new project8 opens. The window as!s the "ser

to #ive the project name with which it sho"ld be created and the destination location. The

project can be created in any of the drives available. o" can create a new folder and then

a new file or can create directly a new file.

$. After the file is saved in the #iven destination location a window opens where a list of

vendors will be displayed and yo" have to select the device for the tar#et yo" have

created.

%. The most widely "sed vendor is Atmel. So clic! on Atmel and now the family of

microcontrollers man"fact"red by Atmel opens. o" can select any one of the

microcontrollers accordin# to the re4"irement.

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/0. Ghen yo" clic! on any one of the microcontrollers the feat"res of that partic"lar

microcontroller will be displayed on the ri#ht side of the pa#e. The most appropriate

microcontroller with which most of the projects can be implemented is the AT$%S&'.

Clic! on this microcontroller and have a loo! at its feat"res. )ow clic! on PJ8 to select

this microcontroller.

//. A small window opens as!in# whether to copy the start"p code into the file yo" have

created j"st now. H"st clic! on P)o8 to proceed f"rther.

/'. )ow yo" can see the TAR>6T and S(RC6 >R(- created in the project wor!space.

/?. )ow clic! on PFile8 and in that P)ew8. A new pa#e opens and yo" can start writin#

pro#ram in it.

/. After the pro#ram is completed save it with any name b"t with the .asm e,tension. Save

the pro#ram in the file yo" have created earlier.

/&. o" can notice that after yo" save the pro#ram the predefined !eywords will be

hi#hli#hted in bold letters.

/@. )ow add this file to the tar#et by #ivin# a ri#ht clic! on the so"rce #ro"p. A list of

options open and in that select PAdd files to the so"rce #ro"p8. Chec! for this file where

yo" have saved and add it.

/. Ri#ht clic! on the tar#et and select the first option Pptions for tar#et8. A window opens

with different options li!e device tar#et o"tp"t etc. First clic! on Ptar#et8.

/$. Since the set fre4"ency of the microcontroller is //.0&%' M1+ to interface with the -C

j"st enter this fre4"ency val"e in the tal 7M1+9 te,t area and p"t a tic! on the (se on3

chip RM. This is beca"se the pro#ram what we write here in the !eil will later be

d"mped into the microcontroller and will be stored in the inb"ilt RM in the

microcontroller.

/%. )ow clic! the option P"tp"t8 and #ive any name to the he, file to be created in the

P)ame of e,ec"table8 te,t area and p"t a tic! to the PCreate 16 file8 option present in

the same window. The he, file can be created in any of the drives. o" can chan#e the

folder by clic!in# on PSelect folder for bjects8.

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'0. )ow to chec! whether the pro#ram yo" have written is errorless or not clic! on the icon

e,actly below the Ppen file8 icon which is nothin# b"t B"ild Tar#et icon. o" can even

"se the shortc"t !ey F to compile the pro#ram written.

'/. To chec! for the o"tp"t there are several windows li!e serial window memory window

project window etc. Dependin# on the pro#ram yo" have written select the appropriate

window to see the o"tp"t by enterin# into deb"# mode.

''. The icon with the letter Pd8 indicates the deb"# mode.

'?. Clic! on this icon and now clic! on the option P;iew8 and select the appropriate window

to chec! for the o"tp"t.

'. After this is done clic! the icon Pdeb"#8 a#ain to come o"t of the deb"# mode.

'&. The he, file created as shown earlier will be d"mped into the microcontroller with the

help of another software called -roload.

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#RO)O&D:

-roload is a software which accepts only he, files. nce the machine code is converted

into he, code that he, code has to be d"mped into the microcontroller placed in the pro#rammer!it and this is done by the -roload. -ro#rammer !it contains a microcontroller on it other than the

one which is to be pro#rammed. This microcontroller has a pro#ram in it written in s"ch a way

that it accepts the he, file from the !eil compiler and d"mps this he, file into the microcontroller

which is to be pro#rammed. As this pro#rammer !it re4"ires power s"pply to be operated this

power s"pply is #iven from the power s"pply circ"it desi#ned above. *t sho"ld be noted that this

pro#rammer !it contains a power s"pply section in the board itself b"t in order to switch on that

power s"pply a so"rce is re4"ired. Th"s this is accomplished from the power s"pply board with

an o"tp"t of /'volts or from an adapter connected to '?0 ; AC.

/. *nstall the -roload Software in the -C.

'. )ow connect the -ro#rammer !it to the -C 7C-(9 thro"#h serial cable.

?. -ower "p the pro#rammer !it from the ac s"pply thro"#h adapter.

. )ow place the microcontroller in the >*F soc!et provided in the pro#rammer !it.

&. Clic! on the -roload icon in the -C. A window appears providin# the information li!e

1ardware model com port device type Flash si+e etc. Clic! on browse option to select

the he, file to be d"mped into the microcontroller and then clic! on PA"to pro#ram8 to

pro#ram the microcontroller with that partic"lar he, file.

@. The stat"s of the microcontroller can be seen in the small stat"s window in the bottom of

the pa#e.

. After this process is completed remove the microcontroller from the pro#rammer !it and

place it in yo"r system board. )ow the system board behaves accordin# to the pro#ram

written in the microcontroller.

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Advantages:

/. )ot line of si#ht

'. )ot bloc!ed by common materials= can penetrate most solids and pass thro"#h walls

?. :on#er ran#e

. )ot li#ht sensitive

&. )ot as sensitive to weatherenvironmental conditions

&$$lication":

/. Can travel in Gater.

'. Can be "sed in oceanic research centers.

?. Sec"rity p"rpose

. Remote monitorin#

&. Transportation and lo#istics

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CONC)USION

This project presents a Mobile phone controlled DTMF based robotic boat to travel in water for

ocean research applications and it is desi#ned and implemented with Atmel $%S&' MC( in

embedded system domain. The robot is moved in partic"lar direction "sin# DTMF Si#nals and

the ima#es are capt"red alon# with the a"dio and ima#es are watched on the television

.6,perimental wor! has been carried o"t caref"lly. The res"lt shows that hi#her efficiency is

indeed achieved "sin# the embedded system. The proposed method is verified to be hi#hly

beneficial for the sec"rity p"rpose and ind"strial p"rpose.

REFERENCE:

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/9 The $0&' Microcontrollers 6mbedded systems (sin# assembly C by

M"hammad Ali ma+idi Hanice >illispie Ma+idi Rolin D.Mc!inlay second

edition.

'9 Di#ital F"ndamentals by Floyd Hain.

?9 6lectronic Devices circ"its by Hacob Millman Christos C.1al!ies.

9 Di#ital :o#ic comp"ter Desi#n by M.Morris Mano.

&9 6mbedded Systems by Raj Jamal.

@9 www.wi!ipedia.com

9 www.#oo#le.com

$9 www.circ"it h"t.com

%9 www.electrofriends.com

/09 Ale,ander >raham Bell= The :ife and Times of the Man Gho *nvented the

Telephone.