DSPA 15d

USN 10EC751

Seventh Semester B.E. Degree Examination, Dec.20l4/Jan.20l5DSP Algorithms & Architecture

Time: 3 hrs. Max. Marks:100_--.------' :''1,, Note: Answer FIVE full questions, selecting

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,,,''' ,ir1.,,,,,r.',,, pART - A , ,,,,,. ,,",.r: aI a. Eiplainp digital signal processing system with the help of a block diagragr:'" (07 Marks)b. List ih€:,ihajor unique architecturil features implemented in any proqiqr-uble DSP devices.

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,. ;i 1,.) (03 Marks)c' Derive tne''iilatonship between DFT and frequency responseijffii'also define frequencyresolution and'signpl record length. (06 Marks)

d. An FFT is emplo,pd for determining the frequency co,q,pbfi€nts of a random signal. It isrequired that the iesotution of FFT to be <:5 Hz,,for;oa signal with fn,'u* : 1.25 kHz.Determine i) Sampling."ialprval, TS.

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ii) FFT length(,N) as a power of 2. i"j1';r',t

iii) Minimum sr$n4l pecord length. ' , (04 Marks)'1li ,,::,, :,: , :: ::: 't

2 a. Drawthestructureofa 4x4 Bram,,n'lqhiil[erandalsoexplainitsoperation. (08Marks)b. Explain the pointer updating algorithm fbr circular addressing mode. (08 Marks)c. Compute the sequence in which th ,,.-i put data should be ordered for a 16 point DIT FFT

using Bit reversed addressing mode. (04 Marks)

3 a. Describe the following units of fffrfs:ZOC54XX processor: i) Barrel shifter iD Centralprocessing unit. .,,,.,,t't".' (0g Marks)

b. What is meant by addibssing mode? Explain the absolute,.accumulator, direct and indirectaddressing modes of fMS:ZOC54XX DSP processor. .. ! (12 Marks)

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4 a. Describe ,l::l.rilio1 .of

tfe following instructions' ,.i) MAC *AR3-. xAR4+. B. A

ii) MAs *AR3-, *AIt+, B, Aiii),RpTZ and RPTB. ,,,,, (06 Marks)

b. E*filain the hardware timer of TMS320C54XX DSP with logical block diagr4m. (07 Marks)

*.,,.*n*Otutn the pipe line operation of TMS32}C54xxprocessor.

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'rl ,'"lir.;. PART_Ba. What is the significance of Q-notation in DSP?b. Represent each of the following numbers in desired Q-notation format:

i) -352 as Qs number.ii) 3.125 as Q7 number.iii) BDAFh in Q7 and Q15 number.iv) -0.160123 as Qrs number.v) 4400h as Q6 number.

c. Explain with the help of block diagram and mathematicaldecimation filter on TMS320C54XX processor.

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10EC751

6 a. What minimum size FFT must be used to compute 500 points DFT? What must be done tcthe samples before the chosen FFT is applied?

b. Derive the optimum scaling factor for the DIT FFT butterfly.(04 Marks)(08 Marks)

c. Write an assernbly language program for implementing following on TMS320C54XX..r 'lilr

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"r;;=;",f;,1 ii) Spectrum of the transformed data. ffi,t*t 9

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i*' qZ What is an intemrpt? With a neat flow chart explain handling of ,,:i4!emrpt by*9.

$MSSz0C54XX processor. _*, ,, lr;_' 1to Marks)

b. fitlw.does DMA help in increasing the speed of a DSP processor andplffiexnlain register

sub dffifpssing technique for configuring DMA. -.,.'0" (10 Marks)

',:F=. rj,,\ \,8 a. With nearblbbk diagram explain the DSP based bio^telemetry reggffii (10 Marks)

b. With neat df@*tgtam explain the CODEC interface circuitffi:'ctrcu;1.6" (10 Marks)

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