DSP5636XEVMUM

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DSP5636XEVMUM/AD

10/01REV # 1.3

DSP5636XEVM

Users Manual

Motorola, IncorporatedSemiconductor Products Sector6501 William Cannon Drive WestAustin, TX 78735-8598

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This document (and other documents) can be viewed on the World WideWeb at the following URL:

http://e-www.motorola.com/webapp/sps/prod_cat

This manual is one of a set of documents. You may need the followingmanuals to have complete product information:

DSP56300 Family ManualDSP563xx Users ManualsTechnical Data Sheets

OnCE is a trademark of Motorola, Inc.MOTOROLA INC. 2000, 2001

Rev. 1.3; published 10/01Order this document by DSP5636XEVMUM/AD

Motorola reserves the right to make changes without further notice to any products herein to improvereliability, function, or design. Motorola does not assume any liability arising out of the application or use

of any product or circuit described herein; neither does it convey any license under its patent rights nor therights of others. Motorola products are not authorized for use as components in life support devices orsystems intended for surgical implant into the body or intended to support or sustain life. Buyer agrees tonotify Motorola of any such intended end use whereupon Motorola shall determine availability andsuitability of its product or products for the use intended. Motorola andb are registered trademarks ofMotorola, Inc. Motorola, Inc. is an Equal Employment Opportunity /Affirmative Action Employer.

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MOTOROLA 3

CONTENTS

ParagraphNumber

TitlePage

Number

Section 1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

Section 2 Setup and Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12.1 Software and Hardware setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12.1.1 Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12.1.2 Hardware setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22.2 Running the Pass Through Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-52.3 Pass Through Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-52.3.1 ESAI Receive Interrupt Service Routines. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-52.3.2 ESAI Transmit Interrupt Service Routines . . . . . . . . . . . . . . . . . . . . . . . . . . 2-62.3.3 DAX and DMA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-62.3.4 Main Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

Section 3 System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13.1 Debug Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13.2 External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23.3 Analog I/O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23.3.1 Analog Output Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33.3.2 Analog Input channels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33.4 A/D Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33.4.1 A/D Operational Procedure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33.5 Digital I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-43.6 DSP Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6

3.7 Host Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-63.8 Operation Mode Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-63.9 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7

Section 4 Component Datasheets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14.1 Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

Section 5 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15.1 Evaluation Module Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

AppendixA Parallel Port Interface (PPI) Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1

A.1 PPI Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1A.2 PPI Cable Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-1A.2.1 Connecting to the Target System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2A.3 Connecting to the DSP5636XEVM for SPI mode . . . . . . . . . . . . . . . . . . . . . . . A-2A.4 Connecting to the DSP5636XEVM for I2C mode . . . . . . . . . . . . . . . . . . . . . . .A-3A.5 PPI Software Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5A.6 PPI Driver Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-5A.7 Demo Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-6

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4 MOTOROLA

CONTENTS

ParagraphNumber

TitlePage

Number

A.8 PPP Debugger Development Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6A.9 PPI Communication Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7

AppendixB Pass Through Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1B.1 Pass Through Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1

AppendixC Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1

INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I-i

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MOTOROLA 5

List of Figures

FigureNumber

TitlePage

Number

1-1 DSP5636XEVM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

2-1 DSP5636XEVM Cable Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2

2-2 EVM Board Layout and Default Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . .2-43-1 External Memory Interface Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2

3-2 Analog I/O Connectors (Rear View of EVM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-4

3-3 Digital I/O Connectors (Rear View of EVM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-5

3-4 Evaluation Module Power Supply Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-7

A-1 Adapter Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4

A-2 Standard PPI Target Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
http://-/?-http://-/?-

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6 MOTOROLA

List of Figures

FigureNumber

TitlePage

Number

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MOTOROLA 7

List of Tables

TableNumber

TitlePage

Number

2-1 Jumpers as Installed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-32-2 DSP Core Voltage Selection Jumper (JP14). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3

3-1 Digital S/PDIF Output Source Selection Jumper (JP26) . . . . . . . . . . . . . . . . . . . .3-53-2 S/PDIF Transmitter Serial Data Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-53-3 DSP Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-64-1 Documentation Location. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-14-2 Other Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-25-1 EVM Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1A-1 SPI and I2C Required Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
http://-/?-http://-/?-http://-/?-http://-/?-

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8 MOTOROLA

List of Tables

TableNumber

TitlePage

Number

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9/66MOTOROLA About This Manual i

About This ManualThis manual describes the functionality and use of the DSP5636XEVM (Evaluation Module).

The DSP5636XEVM supports the DSP56362, DSP56364, DSP56366, and DSP56367 processors.Motorola offers several different ROM software versions of the DSP56362, DSP56366, andDSP56367 processors that are supported with this EVM. The various ROM versions are availableto support technologies from third party licenses, such as Dolby Laboratories, DTS, andothers.

Note: To use the DSP56364, users must install an adaptor module into the EVM. Order thisadapter from a Motorola distributor using part number DSP56364ADAPTER.

OrganizationThis book is organized into 5 sections and three appendices:

Section 1, Overview

Section 2, Setup and Operation

Section 3, System Description

Section 4, Component Datasheets Section 5, Bill of Materials

Appendix A, Parallel Port Interface (PPI) Cable

Appendix B, Pass Through Code

Appendix C, Schematics

Suggested ReadingAdditional reading that provides background for the information in this guide as well as generalinformation about the Multimedia Architecture:

IEC 958 Digital Audio Interface Standard

Appropriate device users manual

DSP56300 Family Manual

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ConventionsThis document uses the following notational conventions:

Messages displayed on screen and example code are presented in the courier fixed-width font.

Information entered by users is shown in bold font.

File names, program names, and directories are in italics.

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Overview

Introduction

MOTOROLA DSP5636XEVM Users Manual 1-1

SECTION 1

OVERVIEW

1.1 INTRODUCTION

The DSP5636XEVM supports the DSP56362, DSP56364, DSP56366, and the DSP56367processors.

The following list highlights the primary features of the DSP5636XEVM.

24-bit DSP5636x Digital Signal Processors operating at speeds up to 150MHz.

256k x 24-bits of external SRAM and 128k x 8-bits of Flash ROM.

One 20-bit stereo Analog-to-Digital converter (ADC), two 24-bit 6 channelDigital-to-Analog converters (DACs).

RCA jacks for all analog audio input and output connections.

Optical and transformer-isolated electrical S/PDIF stereo digital audio inputs andoutputs.

50-pin expansion connector that provides capability for expansion and/or substitutionof other input/output peripherals. This connector also simplifies interprocessorcommunication between other Motorola Evaluation Modules.

MC68HC705C8 microcontroller that performs RS-232-to-OnCE port commandconversions.

Socketed DSP on the board for ease of changing the device.

MC68HC908GP32 8 bit microcontroller for EVM intitialization, LCD display andbutton controls.

The following figure shows the DSP5636XEVM block diagram.

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1-2 DSP5636XEVM Users Manual MOTOROLA

Overview

Introduction

Figure 1-1 DSP5636XEVM Block Diagram

DSP5636XSRAM FLASH

68HC908GP32

LCD Display

Buttons/Keypad

68HC05C3RS-232

SPDIFTransmitter

DIRAKM4112A

A/DPCM1800

D/APCM1600

256Kx 8256Kx 24

SDI0

SDI1

SDO0

SDO1SDO2

Optical/Electrical

L/R Main

L/R SurroundCenter/Sub

Auxiliary Surround

Digital Input

Analog Input

User Interface

Debug

External Memory

Audio I/O

JTAG

SHI

Par

allel P

ort

D/APCM1600

2nd ESAI

SDO3

SDO4

ESAI

Mix down

DAX

68HC705C3

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Setup and Operation

Software and Hardware setup


SECTION 2

SETUP AND OPERATION

2.1 SOFTWARE AND HARDWARE SETUP

This section describes the hardware setup and software installation which is required to load,run, and debug programs in the DSP.

2.1.1 SOFTWARE INSTALLATION

The Evaluation Module demonstration software consists of a Domain Technologies CDcontaining Windows style user interface debug software and demonstration/test code.

Use the following steps to install the software:

1. Insert the Domain Technologies CD into the CD-ROM drive.

2. Select and run the setup.exe program.

3. Select DSP563xxEVM from the menu.

4. Select Debug 56k from the menu.

5. A Software License Agreement will appear. To install EVM563xx, users must acceptthis agreement. Click on Yes from the menu.

6. A new screen will appear. Enter your name and company. Then click on NEXT.

7. Setup will install EVM563xx in the following directory:C:\Program Files\DomTech\EVM563xx

Click on NEXT.

8. Setup will add program icons to the Program Folder. Users may enter a new foldername, or select one from the existing Folders list. Click on NEXT to continue.

9. Setup has enough information to start copying the program files. Click on NEXT tobegin copying files.

10. The screen will clear and the Domain menu will appear. ClickEXIT.

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Setup and Operation


2.1.2 HARDWARE SETUP

Figure 2-1 shows the interconnection diagram for connecting the PC and the external powersupply to the Evaluation Module board.

Figure 2-1 DSP5636XEVM Cable Connections

Several jumpers on the board are available to set up the correct modes and other hardwaresettings. The jumpers should be in the default configuration, as shown in Figure 2-2.

Note: It is critical that the DSP core voltage is set correctly using jumper JP14. Once thejumpers are set, use the following check list to proceed. Pin 1 can be identified bythe notched corner on the silk-screening.

1. If a DSP56362 is installed on the board, then the jumper must be installed at pins 1 and

2 of JP29. If this is not done correctly, the DSP may not be properly grounded.In the case of a DSP56366 or a DSP56367 this jumper setting does not apply.

2. Set the DSP core voltage according to Table 2-2. See the specific datasheet todetermine appropriate core voltage.

3. Connect the DB9P interface cable to the RS-232 port connection on the PC and P1 onthe Evaluation Module board. This provides the connection that allows the PC tocontrol board function.

4. Apply 8.5-9V AC/DC 1 amp power to the P2 or P3 connector on the EvaluationModule board.

5. The green Power LED will light when power is correctly applied.

PC-compatible

Cable

Computer

DB9 Interface

DSP5636XEVM

P1

Connect cableto RS-232 port

P2

or

P3

External8.5-9VPower

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Setup and Operation



The DSP core voltage can be either 3.3v or 1.8v. It is critical that the correct voltage is set forthe type of DSP installed on the board. See the specific DSP datasheet to determineappropriate core voltage.

Table 2-1 Jumpers as Installed

Jumper From To Jumper From To Jumper From To

JP1 1 2

JP12

3 4 JP25 1 2

JP2 1 2 5 6 JP31 3 4

JP4 1 2 7 8 JP29 1 2

JP5 1 2 9 10

JP26 1 2

JP14 1 2 15 16

17 18

JP27

1 2 19 20

5 6 21 22

JP8

1 2 23 24

5 6 25 26

7 8 29 30

31 32

33 34

35 36

43 44

45 46

47 48

Table 2-2 DSP Core Voltage Selection Jumper (JP14)

Core Voltage JP14

3.3v 1-2

1.8v 2-3

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Setup and Operation


Figure 2-2 EVM Board Layout and Default Jumper Settings

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Setup and Operation

Running the Pass Through Code


2.2 RUNNING THE PASS THROUGH CODE

An example program, passthru.asm, is provided to demonstrate EVM operation. Followthe procedures in the previous sections to configure the hardware and the Domain Debugger

software. All jumpers should be installed as described in Table 2-1 and Figure 2-2. Thefollowing steps describe the hardware connections and how to load and run the Pass ThroughCode.

1. Connect an analog or digital output from a source such as a DVD or CD player to thecorresponding input(s) on the EVM. Refer to Figure 3-2 and Figure 3-3 for location ofthe connectors on the EVM.

Note: If using a digital input, use the Setup menu on the LCD display described inDigital I/O on page 3-4 to select either electrical or optical input.

2. Connect audio cables from the analog outputs, L and R at J7, to an audio amplifier.See Figure 3-2 for location of the connectors.

3. Apply power to the EVM and start the Domain Debugger software.

4. Load the passthru.cld program and run it using the Domain Debugger. Refer tothe documentation for the Domain Debugger for information on loading and running aprogram.

2.3 PASS THROUGH OPERATION

The example program is a pass through routine where the DSP receives and passes back theaudio data unaltered through the ESAI and DAX ports. The following sections brieflydescribe the main sections of the Pass Through code. All source code for the pass throughcode is included and does contain comments.

2.3.1 ESAI RECEIVE INTERRUPT SERVICE ROUTINES

The receive interrupt service routine esai_rx_isr moves the left data word from the

receive data register (RX1) into the receive data buffer RX_BUFF_BASE. This routine alsomoves the right data word from the receive data register (RX1) into the receive data bufferRX_BUFF_BASE+1. The pointer to the receive data buffer (RX_PTR) has modulo of 2, so italternates between the left and right data.

If the serial receive shift register SDI1 is filled and ready to transfer to the receiver dataregister RX1 and RX1 is already filled, then the Receiver Overrun Error Flag (ROE) is set and

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Setup and Operation

Pass Through Operation

the receive with exception interrupt service routine esai_rxe_isr is called. This routineclears the ROE bit and continues execution through the esai_rx_isr routine.

The receive last slot interrupt service routine esai_rxls_isr resets the buffer pointer to

RX_BUFF_BASE in case the pointer is corrupted after the last slot of the frame.

2.3.2 ESAI TRANSMIT INTERRUPT SERVICE ROUTINES

The transmit interrupt service routine moves the left and right data words from the transmitdata buffer, TX_BUFF_BASE and TX_BUFF_BASE+1 respectively, to the transmit dataregisters TXn (TX0, TX1, TX2 and TX3). The pointer to the transmit data buffer (TX_PTR)has modulo of 2 so it alternates between the left and right data.

If the serial transmit data register TXn is already filled and the processor tries to write anotherdata sample to TXn, then the Transmitter Underrun Error Flag (TUE) is set and the transmitwith exception interrupt service routine esai_txe_isr is called. This routine clears theTUE bit and continues execution through the esai_rx_isr routine.

The transmit last slot interrupt service routine esai_txls_isr resets the buffer pointer toTX_BUFF_BASE in case the pointer is corrupted after the last slot of the frame.

2.3.3 DAX AND DMA OPERATION

The DAX port outputs the same audio information that is present at the analog outputs, only ina digital bitstream. The DAX port runs off a clock equal to 256 x fs making it compatiblewith most digital receiver inputs. The DAX port is serviced by a DMA channel rather thanbeing interrupt driven like the ESAI. This means that when the DAX port is ready to senddata a DMA channel is triggered to move the left and right audio data from the transmit databuffer to the DAX Audio Data Register. The transfer is made as a two word burst transfer (i.e.both left and right channels are moved each trigger).

Note: For DAX information to appear on J3, the jumper at JP26 must be removed.

2.3.4 MAIN LOOP

In the main loop of the code a polling routine is performed on bit 6 of the ESAI StatusRegister (SAISR) which is the receive frame sync flag. Each time a frame sync occurs thecontents of the receive data buffer is copied to accumulators A and B. After the moves to the

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Setup and Operation



accumulators a jump to the subroutine Stereo Process occurs. The Stereo Process subroutineis where a user can locate a processing routine of choice. The default content of the StereoProcess routine is nothing. After the Stereo Process routine, the data from the accumulators ismoved to the transmit data buffer and code jumps back to the polling routine to wait for the

next frame sync.

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Setup and Operation


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System Description

Debug Interface


SECTION 3

SYSTEM DESCRIPTIONThis section describes some of the component blocks within the DSP5636XEVM such as thememory interface, A/D converter, and the D/A converters. For detailed information onspecific components, such as the S/PDIF receiver at U10, refer to the specific manufacturersdata sheet.

3.1 DEBUG INTERFACE

The JTAG/OnCE port of the DSP can be accessed using the standard Motorola toolsetthrough the 14 pin header (JP10) on the board. Connect the command converter hardwarepurchased separately from Motorola or a third party to this header to use the debug tools.

The on-board command converter also allows debugging using the JTAG/OnCE port. In thiscase, the Domain Debugger software is used. The RS-232/OnCE interface receives the serialdata from the RS-232 transceiver and executes commands sent by the host computer. Thesecommands perform the following:

Reset the DSP

Put the DSP in debug mode

Release the DSP from debug mode

Read and write to the OnCE port

Read and write to the DSP

The RS-232 serial communication is performed in software on the MC68HC705microcontroller. To use this port, connect a DB9 serial cable from a PC to the DB9 (P1) on theEvaluation Module.

If the 14 pin JTAG/OnCE port is used for debugging, users must ensure that the serial DB9connector at P1 is not connected. Similarly, the 14 pin connector at JP10 must not be attachedif the Domain Debugger is used.

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System Description

External Memory

3.2 EXTERNAL MEMORY

The external memory port of the DSP is interfaced to a 256x24 bit Fast Static RAM chip andto a 256x8 bit Flash ROM.

Select the SRAM by configuring the DSPs address attribute register to assert the AA2 line.To keep the address stable during the entire bus cycle, insert a minimum of 1 wait state to thebus operation.

Select the EPROM by configuring the DSPs address attribute register to assert the AA1 line.The Flash memory is written from the DSP.

Note: The software required for writing to the flash is not currently completed.This feature will be added in a future version.

Figure 3-1 External Memory Interface Diagram

3.3 ANALOG I/O

The Evaluation Module has two analog input channels (Left and Right), and eight analogoutput channels. Two additional channels can be added in future versions bringing the total totwo input and ten output channels.

The following lists show the current configuration for the EVM. The I/O connector is shownin Figure 3-2.

SRAM EPROM

DATA

D0..D7

ADDRESS

DSP

D0..D23

A0..A17 A0..A16

A0..A17

AA2 CECEAA1

A18

D0..D23

JP16

JP17

JP15

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System Description

A/D Converter


3.3.1 ANALOG OUTPUT CHANNELS

Left (L)

Right (R) Center (C)

Subwoofer (S)

Left Surround (LS)

Right Surround (RS)

Auxiliary channel 1 (Laux)

Auxiliary channel 2 (Raux)

Not implemented (Laux2)

Not implemented (Raux2)

3.3.2 ANALOG INPUT CHANNELS

Left analog input (Lin)

Right analog input (Rin)

3.4 A/D CONVERTER

The A/D converter is clocked by the AKM4112A digital receiver. The analog input is routedusing the AKM4112A. When the PLL of the AK4112A is unlocked, the digital clocks arederived from the 12.288 MHz clock connected to the AKM4112A. This means that thesampling rate is 48 KHz and other rates are not supported for A/D operation.

The following operational procedure is used.

3.4.1 A/D OPERATIONAL PROCEDURE

1. If a valid S/PDIF digital input is present at J1, then this digital signal is sent to the DSPthrough the SDI1 input of the ESAI. In this case, the analog signal at Rin and Lin at J8

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System Description

Digital I/O

will not be selected. This condition is verified if the LED at D7 is illuminated, whichindicates valid digital signal at J1 or J2.

2. If a valid S/PDIF input is not present at J1 or J2, in which case D7 is not lit, then theanalog inputs at Lin and Rin at J8 are selected. Then the AD output is routed to SDI1

of the ESAI of the DSP. For reliable operation of the A/D do not connect a digitalsignal to J1 or J2.

Figure 3-2 Analog I/O Connectors (Rear View of EVM)

3.5 DIGITAL I/O

The Evaluation Module has a coaxial input at J1 and an optical S/PDIF input at J2. To selectbetween the optical or the electrical S/PDIF input, follow the Setup menu on the LCDdisplay. The EVM also has a coaxial output and an optical S/PDIF output. This set of outputsis multiplexed between one of the ESAI output channels of the DSP or the Digital AudioTransmitter (DAX) port.

The selection between the DAX and the ESAI output of the DSP is determined by jumperJP26. Available jumper settings are shown in Table 3-1.

If the ESAI output is selected, then one of the ESAI ports, SDO0-SDO3, are selectedaccording to the jumper set at JP25.

The S/PDIF transmitter receives data from the DSP on the serial data output SDOx line. TheSDOx is configured by placing a jumper on the JP25 header as shown in Table 3-2.

R

L

RS

LS C

S

J7 J8

Raux

Laux

Raux2

Laux2

Rin

Lin

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System Description

Digital I/O


Note: Only one jumper should be installed at JP25. If more that one jumper is installed,then two ESAI output lines will drive each other.

The Evaluation Module supports digital coaxial I/Os and optical I/Os. The primary set ofdigital outputs are connected to the DSP Digital Audio Transmitter (DAX). The secondary setof digital outputs are connected to the S/PDIF transmitter. Figure 3-3 shows the digital inputand output connector configuration.

Figure 3-3 Digital I/O Connectors (Rear View of EVM)

Table 3-1 Digital S/PDIF Output Source Selection Jumper (JP26)

JP 26

Pins 1-2MODE

ON ESAI output is transmitted

OFF DAX output is transmitted

Table 3-2 S/PDIF Transmitter Serial Data Output

SDOx JP25

SDO0 1-2

SDO1 3-4

SDO2 5-6

SDO3 7-8

J1COAX

J2OPTICAL

J4OPTICAL

J3COAX

ESAI/DAX OUTPUTS/PDIF INPUTS/PDIF

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System Description

DSP Clock

3.6 DSP CLOCK

The DSP clock is derived from the 9.8304 MHz oscillator Y6. The PINIT signal is tied low,which disables the PLL when it resets. Because of this, the PLLs multiplication factor must

be configured in user software. If the multiplication factor is not set, the DSP operating clockis 4.9152 MHz. (One half of 9.8304 MHz).

3.7 HOST MICROCONTROLLER INTERFACE

The MC68HC908GP32 micro controller is intended for host communication with the DSP,initialization of the EVM, and for LCD control.

3.8 OPERATION MODE SELECTION

The DSP operating modes are selected by configuring JP8 to one of the modes shown inTable 3-3.

Table 3-3 DSP Operating Mode

MODE DESCRIPTION

JP8

PINS 7-8

MODD

PINS 5-6

MODC

PINS 4-3

MODB

PINS 2-1

MODA

0 EXPANDED MODE ON ON ON ON

1 BOOTSTRAP FROM BYTE-WIDE MEMORY ON ON ON OFF

2 JUMP TO PROM STARTING ADDRESS ON ON OFF ON

5 BOOTSTRAP FROM SHI (SLAVE SPI MODE) ON OFF ON OFF

7 BOOTSTRAP FROM SHI (SLAVE I2C MODE) ON OFF OFF OFF

8 EXPANDED MODE OFF ON ON ON

C HI08 BOOTSTRAP IN ISA MODE OFF OFF ON ON

D HI08 BOOTSTRAP IN MC68HC711 NON-MUX MODE OFF OFF ON OFF

E HI08 BOOTSTRAP IN 8051 MUX BUS MODE OFF OFF OFF ON

F HI08 BOOTSTRAP IN 68302 BUS MODE OFF OFF OFF OFF

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System Description

Power Supply


Refer to the appropriate device users manual for a detailed description of the operatingmodes.

3.9 POWER SUPPLY

The Evaluation Module requires an input voltage of 8.5-9V at 1 amp for both analog anddigital circuits. It has separate digital and analog power and ground planes and voltageregulators to output the +5V, -5V, +3.3V, and 1.8V supplies. The DC-DC converter outputsthe -5V supply. When power is supplied to the 2.5mm power connector P2 or to the 2-pinterminal block P3, the green LED D8 is illuminated. The polarity of the voltage applied to theEVM is not reversible. The power connector at P2 requires a supply with a center positiveplug. The terminal block (P3) is color coded red for positive (closest to P2) and black fornegative. To achieve best performance from the EVM, Motorola recommends the use of a

grounded supply. For example, negative and earth ground should be tied together.

Note: While the voltage regulators can accommodate higher input voltage potentials, theadded heat dissipation required at these input voltage levels results in the regulatorbecoming dangerously warm. It is recommended that users do not subject theboard to power inputs in excess of 10V.

Figure 3-4 Evaluation Module Power Supply Diagram

5V REGULATOR

3.3V REGULATOR

DC-DC CONVERTER

8.5 9V AC/DCP2 OR P3

- 5V

3.3V

+5V

+5VA

1.8V REGULATOR 1.8V

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System Description

Power Supply

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Component Datasheets

Documentation


SECTION 4

COMPONENT DATASHEETS

4.1 DOCUMENTATION

Documentation for the audio components can be downloaded from the manufacturer websitesshown in the following table. The Motorola web site for the appropriate manuals are:

http://e-www.motorola.com/webapp/sps/prod_cat

Table 4-1 Documentation LocationMotorola

DevicesDESCRIPTION Motorola Document Order Number

DSP56362 Product Brief DSP56362P/D

User Manual DSP56362UM/AD

Family Manual DSP56300FM/D

Datashee t DSP56362/D


User Manual DSP56364UM/AD




User Manual DSP56366UM/D




User Manual DSP56367UM/D


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Component Datasheets

Documentation

Table 4-2 Other Devices

Other

DevicesDESCRIPTION Location

PCM1800 Technical Datasheet http://www-s.ti.com/sc/psheets/sbas071/sbas071.pdf

PCM1600 Technical Datasheet http://www-s.ti.com/sc/psheets/sbas116/sbas116.pdf

CS8404 Technical Datasheet http://www.cirrus.com/ftp/pubs/8403.pdf

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Bill of Materials

Evaluation Module Parts


SECTION 5

BILL OF MATERIALS

5.1 EVALUATION MODULE PARTS

The following table contains information on the parts and devices in the Evaluation Module.

Table 5-1 EVM Parts List

Reference Designator Description Manufacturer Part Number

C2, C4, C6, C8, C50, C63 0.01uF, CHIPCAP 0805X7R 50V/10% TOL

PANASONIC ECU-V1H103KBG

C1, C3, C5, C7, C9, C10,

C11, C12, C13, C14, C16,

C18, C19, C21, C23, C24,

C25,C29,C30, C40, C41,

C43, C44, C48, C49, C51,

C52, C53, C54, C55, C56,

C57, C58, C60, C64, C70,

C71, C84, C85, C95, C109,

C111,

C118, C134, C135, C136,

C137

0.1uF CHIPCAP 0805 50V/20% TOL AVX 08055E104MATMA

C15 22uF TANTALUM LECTROLYTIC

SMD 6.3V/EIA SIZE B/2K Reel

PANASONIC ECS-T0JX226R

C17 0.027uF CHIPCAP 0805 X7R 50V/10%

TOL

PANASONIC ECU-V1H273KBX

C20, C72, C73 4.7uF TANTAL UM E LECTROL. SMD

6.3V/EIA SIZE A/2K Reel

PANASONIC ECS-T0JY475R

C59, C46, C138, C139 100pF CHIPCAP 0805 50V/5% TOL PANASONIC ECU-V1H101 JCG

C42, C45, C47, C68, C69,

C80, C83, C86, C88, C89,

C93, C94, C99, C103,

C107, C110, C112, C113,

C116, C117, C122, C126,

C130, C140

10uF TANTALUM ELECTROL. SMD

6.3V/EIA SIZE A

PANASONIC ECS-T0JY106R

C31, C74, C75, C79, C81,

C92, C96, C102, C104,

C115, C119, C125, C127

1uF TANTALUM ELECTROL SMD

CHIPCAP 1206 16V/20% TOL

PANSONIC ECS-T1CY105R

C76, C77 470pF CHIPCAP 0805 50V/5% TOL PANASONIC ECU-V1H471JCX

C27, C28, C132, C133 22pF CHIPCAP 0805 NPO

50V/5% TOL

NEWARK 92F5697

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Bill of Materials


U3 8-BIT MICROCONTROLLER MOTOROLA MC68HC705C8ACFB

C82, C90, C97, C100,

C105, C108, C120, C123,

C128, C131

2700pF CHIPCAP 0805 NPO 50V/10%

TOL

PANASONIC ECU-V1H272KBN

C39 470uF RADIAL ALUMINUM

ELECTROLYTIC 10V 8mmX11mm

LS=3.5mm

XICON XRL10V470

C32 1000uF MINI ALUM ELECTROL

16V/AXIAL/0.394X0.984

XICON XAL16V1000

C33,C34,C37 0.33uF CHIPCAP TANTALUM

35V/20% TOL

PANASONIC ECS-T1VY334R

C35,C36,C38 47uF SUBMINI ALUM ELECROL

10V/RADIAL/5X7

XICON MLRL10V47

C78, C87, C91, C98, C101,

C106, C114, C121, C124,C129

270pF CHIPCAP 0805 NPO 50V/10%

TOL

AVX 08055A2711KAT1A

D1 YELLOW LED SMD 1206 QT OPTOELECTRONICS QTLP650D-3

D7 RED LED SMD 1206 QT OPTOELECTRONICS QTLP650C-2

D6 GREEN LED SMD 1206 QT OPTOELECTRONICS QTLP650C-4

D2, D3, D4, D5, D8 RECTIFIER 1.0 AMP SMD RECTRON FM4001

XXU14 DOUBLE ROW 16-PIN FEMALE

HEADER RECEPTACLE FOR U14

BERG 68683-608

JP1, JP2, JP4, JP5, JP26 SINGLE ROW 2 PIN HEADER 1X2 BERG 68001-402

JP14 SINGLE ROW 3 PIN HEADER 1X3 BERG 68001-403

JP8, JP25 DOUBLE ROW 8 PIN HEADER 2X4 BERG 67997-408

JP10, JP13, JP17 DOUBLE ROW 14 PIN HEADER 2X7 BERG 67997-414

JP11,JP16 DOUBLE ROW 20 PIN HEADER 2X10 BERG 67997-420

JP12 DOUBLE ROW 50 PIN HEADER 2X25 BERG 67997-450


JP30 DOUBLE ROW RIGHT ANGLE

8 PIN HDR 2X4

DIGI-KEY S2122-04-ND

JP22 SINGLE ROW 8 PIN HEADER 1X8 BERG 68001-408


JP27,JP29 DOUBLE ROW 6 PIN HEADER 2X3 BERG 67997-406

J1,J3 RCA JACK VIMEX SCJ-0358B

J4 OPTICAL TRANSMIT CONNECTOR SHARP GP1F32T

J2 OPTICAL RECEIVE CONNECTOR SHARP GP1F32R


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Bill of Materials



J7,J8 RCA JACK 3X2 VIMEX JA0600731G

K1 SMD RELAY MOUSER EB2-5NU

L1 1uH INDUCTOR SMD/2.5X3.2 TOKO TKS1025CT

L2, L3, L4, L5 FERRITE BEAD FUTURE BL01RN1-A62

P1 DB9 CONNECTOR RT ANGLE/PCB

MOUNT

MOUSER 152-3409

P2 2.5MM POWER CONNECTOR SWITCHCRAFT RAPC-712

P3 2 PIN TERMINAL BLOCK AUGAT 2SV-02

D10 DIODE 350mW, 75V, SOD-123 DIGI-KEY 1N4148W-7

R2, R3, R4, R5, R6, R9,

R10, R11, R12, R14, R20,

R21, R22, R87, R88, R89,

R93

10K CHIP RES 0805 1/10WATT 5% PANASONIC ERJ-6GEYJ103V

R40, R44, R48, R52, R56,

R60, R64, R68, R72, R76

15K CHIP RES 0805 1/10WATT 5% ROHM MCR10EZHJ153

R29 2.7K CHIP RES 0805 1/10WATT 5% PANASONIC ERJ-6GEYJ272V

R7,R18 619 CHIP RES 0805 1/10WATT 1% PANASONIC ERJ-6ENF6190V

R31 182 CHIP RES 0805 1/10WATT 1% PANASONIC ERJ-6ENF1820V


R41, R45, R49, R53, R57,

R61, R65, R69, R73, R77

8.2K CHIP RES 0805 1/10WATT 5% PANASONIC ERJ-6ENYJ822V

R16 71.5 CHIP RES 0805 1/10WATT 1% PANASONIC ERJ-6ENF71R5V

R1, R15, R42, R46, R50,

R54, R58, R62, R66, R70,

R74, R78

1K CHIP RES 0805 1/10WATT 5% PANASONIC ERJ-6GEYJ102V

R90,R91 100K CHIP RES 0805 1/10WATT 5% FUTURE CR21-104J-T

R17 18K CHIP RES 0805 1/10WATT 5% PANASONIC ERJ-6GEYJ183V

R30 3.92K CHIP RES 0805 1/10WATT 1% PANASONIC ERJ-6ENF3921V

R43, R47, R51, R55, R59,

R63, R67, R71, R75, R79

100 CHIP RES 0805 1/10WATT 1% PANASONIC ERJ-6ENF101V

R13,R81 10M CHIP RES 0805 1/10WATT 5% PANASONIC ERJ-6GEYJ106V

R28 56 CHIP RES 0805 1/10WATT 5% PANASONIC ERJ-6GEYJ560V

S1,S2,S3,S4,S5 6MM PUSHBUUTON SWITCH PANASONIC EVQ-QS205K

T1,T2 96KHZ DIGITALTRANSFORMER SCIENTIFIC

CONVERSION

SC979-03

U1 DSP 144PIN/TQFP *please see note #90 MOTOROLA DSP56367

U11 256KX24 SRAM 3.3V/BGA GSI GS76024B-10


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Bill of Materials


U12 EPROM 3.3V/32 PIN TQFP ATMEL AT29LV020-20TI

U13 MICROCONTROLLER MOTOROLA MC68HC908GP32CFB

U14 LCD 20CHAR X 2LINE POWERTIP PC2002LRU-AEA-B

U15 GP1U28Y SHARP GP1U28Y

U4 MAX3387ECUG MAXIM MAX3387ECUG

U16 MAX3485ECSA MAXIM MAX3485ECSA

U28 PLD LATTICE ISP2064VE-100LT100

U18 DIGITAL AUDIO TRANSMITTER CRYSTAL CS8404A-CS

U19 20-BIT A/D CONVERTER

24-PIN/SSOP

BURR-BROWN PCM1800E

U5 REG1117_3.3 BURR-BROWN REG1117-3.3

U8 REG1117_1.8 BURR-BROWN REG1117A-1.8

U21,U24 DELTA-SIGMA D/A CONVERTER BURR-BROWN PCM1600Y

U20,U22,U23,U25,U26 OP-AMP SO-8 Burr Brown BBOPA2134UA

U10 DIGITAL AUDIO RECEIVER AKM AKM4112AVF

U6 3.3V REGULATOR TO-220 LINEAR TECH. LT1085CT-3.3

U7 5V REGULATOR TO-220 MOTOROLA MC7805ACT

U9 DC-DC CONVERTER NEWPORT TECH. NMF0505S

Y5 12.288MHZ CRYSTAL MMD B20AA1-12.288MHZ

Y6 9.8304MHZ OSCILLATOR SMD CITIZEN 300-7018-1-ND

Y1 3.6864MHZ CRYSTAL MMD B20BA1-3.6864MHZ-3I

Mounting hardware for

U14 and standoffs for the

four corners of the PC

board.

Standoffs H.H. Smith 30F1463

Mounting hardware for

U14 and standoffs for the

four corners of

the PC board.

Screws Waldom FN-817-C

PC Board Westak DSP56367EVM

REV. 1.0

XU6, XU7 Heatsink for U6, U7 T0-220, L=0.75,W=0.520, H=0.500

(above dimensions are in inches)

DigiKey HS107-ND

XU14 DOUBLE ROW 16-PIN MALE

HEADER MOUNTS TO BOTTOM

SIDE OF U14 LCD

BERG 78933-416H

SHUNTS SHUNT CONN., 2 POSITION 3M 929955-06


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Bill of Materials



XU1 (This part is mounted

on a socket and the part

information for the socket is

given in the following

columns)

Yamaichi 144 pin TQFP socket Yamaichi Electronics IC149-144-145-S5

XXU7 4-40 -3/8 BOLT SPC Technology SRH-0440-024-SN

XXXU7 4-40 WASHER SPC Technology WLS04017SZ-C

XXXXU7 4-40 NUT SPC Technology NH0440006SN-C


R85,R86 5.62K CHIP RES 0805 1/10WATT 1% PANASONIC ERJ-6ENF5621V

R92 8.66K CHIP RES 1206 1/10WATT 1% XICON ME290-8.66K/REEL

P3.1 RED POWER LEVER TYCO 1447732-3

P3.2 BLACK POWER LEVER TYCO 1447732-2

R94,R95 150 CHIP RES 0603 1/10WATT 5% BC Components 231220171501


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Bill of Materials


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Parallel Port Interface (PPI) Cable

MOTOROLA DSP5636XEVM Users Manual A-1

APPENDIX A

PARALLEL PORT INTERFACE (PPI)CABLE

A.1 PPI OVERVIEW

This document describes the functionality and use of the Parallel Port Interface (PPI) cable(Revision A) with the DSP5636XEVM for developing applications. The PPI cable kitincludes a PPI software installation disk consisting of the following:

Dynamic Linking Library (DLL)

Demo Application

PPI interface software development tool for developing an application

Note: The PPI cable does not function with the generic B ROM version of the DSPs. Itis only applicable with software ROM versions.

The PPI Interface cable allows a personal computer (PC) to use a standard IBM compatibleparallel port, to communicate with the DSP using the SHI port in SPI or I2C mode. Libraries

are available which link into Microsoft Visual C++ 5.0, allowing user applications tocommunicate directly to the SPI or I2C port. Motorola provides implementation exampleswhich allow users to communicate with a Motorola DSP5636XEVM according to the SHIprotocol. This allows users the capability to read and write memory, run script files, andexecute SHI commands. The Rev A PPI cable connects to a standard 10 pin Berg connectoron the target board.

A.2 PPI CABLE INSTALLATION

This section describes the physical layout of the PPI cable and how to install the PPI cable onthe DSP5636XEVM and on target systems in SPI or I2C mode.

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A-2 DSP5636XEVM Users Manual MOTOROLA


A.2.1 Connecting to the Target System

The PPI cable connects to the target board using a 10 pin IDC cable. The connector on thetarget board should be a 10-pin Berg connector, with 0.025" square posts, on 0.100" centers.

The signals required for SPI and I2C modes are shown in the following table.

If users cannot provide enough board space to place a full 10-pin header on the target board,then users must reduce the number of lines going to the target. Contact P&E MicrocomputerSystems Inc. (www.pemicro.com) for production ready Gerber files of a small, pin reducingadapter board.

The pin reducing adapter board takes the 10-pin PPI connector and breaks it into a 4-pin I2Cconnector and a 6-pin SPI connector. All that is needed to connect to these boards is either a 4

or 6 pin IDC cable that connects to their target.

Note: If you are using the I2C capabilities of the PPI cable, the target must have pull-upresistors on the SDA and SCL lines.

A.3 CONNECTING TO THE DSP5636XEVM FOR SPI MODE

The current version of the DSP5636XEVM board does not have a standard PPI connector. Tofacilitate connection to the EVM, an adapter board has been provided with the PPI cable. This

adapter board allows the PPI cable to be used with both the EVM board and other targetswhich support the standard PPI connector. The adapter board plugs into a portion of theEVM's JP12 jumper connector, and has a header which allows connection to the PPI cable. Ithas an additional connector which allows access to the jumper headers covered by the adapter.To connect the PPI cable to the EVM perform the following tasks:

Table A-1 SPI and I2C Required Signals

SPI Signals I2C Signals

SS SDA

MISO SCL

MOSI VDD

SCK GND

VDD

BND

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1. Make sure power to the EVM board is OFF.

2. Ensure that the jumpers on pins 1-12 of header J3 of the adapter board are connectedin the same way as the jumpers on pins 15-26 of header JP12 of the EVM.

3. Remove EVM JP12 jumpers on pins 1-28.4. Plug the adapter board onto pins 1-28 of JP12 making sure to orient pin 1 to pin 1.

5. Ensure that the adapter J3 jumper settings correspond to the way the jumpers were seton JP12 in Step 2.

6. Plug in the PPI cable ribbon connector onto J2, making sure to orient pin 1 to pin 1.

7. Connect the PPI cable to the parallel port of your PC. The adapter board hardware isshown later in this section.

A.4 CONNECTING TO THE DSP5636XEVM FOR I2C MODE

The DSP5636XEVM does not have pull-ups on the SDA and SCL lines. The adapter isconfigured from the factory to use the SPI protocol to communicate to the DSP5636XEVM. Ifusers want to use the I2C protocol instead, it is required to set up the jumpers on the EVM andmake hardware modifications to the 10-pin berg connector on the adapter board. Thefollowing modification are required:

Add a pull-up resistor between pins 7 and 9 (VDD)

Add a pull-up resistor between pins 4 and 9

Short pins 7 and 10 together on J2 of the adapter board bottom

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Figure A-1 Adapter Board Layout

Top Side

PPI Cable

2x5 Berg

Male

Connector

(J2)

Jumpers

2x6 Berg

Male

Connector

(J3)

Bottom Side

(J1)

2x14

Female

Connector

Pin 1

Note: 2x6 Jumper Connector

allows user to still connect

jumpers for pins 15-26 of

the JP12 Connector on the

adapter

3-D View

Pin 1

Plug into the

JP12 Connector on

DSP56362EVM

Plug PPI Cable

into 2x5

Berg Connector

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Figure A-2 Standard PPI Target Connector

A.5 PPI SOFTWARE SUPPORT

Motorola provides a CD which contains an installation program for the PPI cable drivers, asample application, a simple debugger, and documentation. To install this software, executeSETUP.EXE on the CD and follow the directions.

Note: When running under Windows NT, a driver must be installed before the PPIroutines will operate properly. This driver installation only has to be done once,and is described in the document titled Running under Windows NT. However,if you have a Privileged instruction error, reinstall the NT driver again. Thisdriver may be freely distributed with applications built on these libraries.

A.6 PPI DRIVER LIBRARIES

The installed drivers allow PPI cable support to be built directly into an application created inany environment which can link to a 32-Bit DLL (Dynamically Linked Library). The driver iscalled UNIT_PPI.DLL. These interface routines are designed to be called from visual andnon-visual applications running on Windows 95, Windows 98, and Windows NT.

The drivers allow user applications to utilize the SPI or I2C protocol to communicate with a

slave target.

For example, if users want to allow changes to surround sound volumes of the DSP decoder.This example was created in Microsoft Visual C++ 5.0, and only provides a framework forusers to create their own application. The call prototypes to the DLL are all located in a filecalled UNIT_PPI.H.

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Before making use of any calls in the DLL, users must call the load_dll( ) function in theheader file to load the DLL into memory.

A.7 DEMO SOFTWARE

The sample executable applications included are titled SPIDEMO for the SPI interface andI2CDEMO for I2C interface. These applications are compiled and renamed versions of thePPIDEMO MSVC applications included in the kit. This demonstrates SHI communicationthrough either the SPI (default) or I2C protocol. To switch the demo protocol to I2C, openSPIorI2C.H, and replace the following line:

#define use_spi_for_demo

with:

#define use_i2c_for_demo

Users must recompile the project for this change to take effect. The UNIT_PPI.H file containsthe DLL prototype calls for both the I2C and SPI protocols.

Note: Both protocols can not be used simultaneously.

A.8 PPP DEBUGGER DEVELOPMENT SOFTWARE

Motorola also provides a limited functionality debugger which works through the PPI cableand communicates to the DSP in real-time using Motorola's Post Processing Phase (PPP)protocol. The PPP and existing OnCE/JTAG debuggers offer different debugging features andcapabilities. The PPP debugger is not a source level debugger like a OnCE/JTAG debugger, itonly provides an SHI communication interface to a running DSP.

The PPI debugger for Windows 95, Windows 98, and Windows NT allows users to loadCOFF files into memory, inspect memory, send DSP software architecture (SA) commands,and run macro files when the DSPs SA is running. For Post Processing Phase (PPP)

applications debugging within the DSPs SA, the most effective debugging feature is to beable to monitor PPP control and status from the SHI interface when the DSPs SA is running.The PPI cable, through the SHI, can send debugging commands such as real-time read/writememory or registers and receive PPP responses from a running DSP, which traditionalOnCE/JTAG port debug interfaces cannot provide. However, there are some advantages to

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using the PPI and OnCE/JTAG simultaneously for the PPP applications. The following stepsprovide an example on how to use the PPI and OnCE/JTAG interfaces together.

1. Set up hardware breakpoints using the OnCE/JTAG debugger to where the PPP

program needs to be stopped for viewing registers or memory contents.2. Start running the DSPs SA. The breakpoints have not occurred yet since the PPP has

not been loaded.

3. Load a developing PPP application into the running DSP using the PPI cable.

4. Use the PPP debugger to send commands through the SHI to enable SA and activatethe PPP program.

5. The program should run until the hardware breakpoint event occurs. Then users willbe able to unfold the necessary debugging information for the problems in the PPPprogram.

The executable is titled PPIDEVNT.EXE and comes with a help file that documents thedebugger's functionality. Depending on whether the SPI or I2C interface is the target, userscan select the proper PPP debugger icon from PPP Development Interface program icons inStart menu. Users can also do this from the command prompt by adding I2C to thedebugger's command line. The default for PPPdevnt is SPI.

A.9 PPI COMMUNICATION RECOVERY

A very fast PC, or a long DB25 extension, may introduce occasional communications errorsbetween the host PC and target DSP processor. When this happens in the debugger, thefollowing error dialog box appears

Lost contact with board

To remedy this issue, increase either the IO_DELAY_CNT or CMD_DELAY_CNTparameters. Do this by creating a shortcut on the desktop and adding the parameter into theTarget box after the PPPdevnt.exe in the properties. Refer to the PPDEVNT help file formore information. The default values for the debugger are IO_DELAY_CNT=25 (decimal)and CMD_DELAY_CNT=1000 (decimal).

These values can be increased up to a value of $FFFF. Motorola recommends that you do notuse a DB25 extension cable longer than 6 foot between the PC and PPI cable and do not use aribbon cable longer than 18 inches from the PPI cable to the DSP.

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Pass Through Code

MOTOROLA DSP5636XEVM Users Manual B-1

APPENDIX B

PASS THROUGH CODE

B.1 PASS THROUGH CODE

;**************************************************************************

; passthru.asmv1.0

; meb 05/01/01

;

; Copyright (c) MOTOROLA 2001

; Audio Solutions Organization

; Digital Audio Applications;

;Program Operation:

;

;**************************************************************************

page 132,60

include ioequ.asm

include vectors.asm

list

org x:$00

RX_BUFF_BASEequ *

RX_data_1_2 ds 1 ; left input sample

RX_data_3_4 ds 1 ; right input sample

TX_BUFF_BASEequ *

TX_data_1_2 ds 1 ; left output sample

TX_data_3_4 ds 1 ; right output sample

RX_PTR ds 1

TX_PTR ds 1

flags ds 1

RightReceiveequ 0

;**************************************************************************

org p:$100

START

main

ori #$03,mr ; mask interrupts

movep #$050009,x:M_PCTL ; DSP core at 9.8304x10=98.3MHz

move #0,omr

movec #0,sp ; reset hardware stack pointer

movep #$000003,x:M_IPRP ; ESAI ints enabled and top Priority

move #$40,r6 ; initialize stack pointer

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B-2 DSP5636XEVM Users Manual MOTOROLA

Pass Through Code

move #>$FFFF,m6 ; linear addressing

move #>RX_BUFF_BASE,r0 ; initialize inputs, outputs to 0

move #>$FFFF,m0

move #0,x0

rep #4

move x0,x:(r0)+

move #>RX_BUFF_BASE,x0

move x0,x:RX_PTR

move #>TX_BUFF_BASE,x0

move x0,x:TX_PTR

;**************************************************************************

; FST/FSR and SCKT/SCKR are generated from the PLD

; and fed to the DSP, A/D and D/A converters

;**************************************************************************

movep #$000000,x:M_PCRC ;disable ESAI port

movep #$000000,x:M_PRRC

movep #$0c0200,x:M_TCCR ;init transmit clock control register

;FST is input (bit22=0)

;SCKT is driven externally (bit21=0)

;FST polarity is negative (bit19=1)

;clockout on rising, latch in on falling(bit18=1)

;2 words per frame (bit13:9=00001)

;all other bits are not relevant and are initialized to 0

movep #$0c0200,x:M_RCCR ;init receive clock control register

;FSR is input (bit22=0)

;SCKR is driven externally (bit21=0)

;FSR polarity is negative (bit19=1)

;clockout on falling, latch in on rising(bit18=0)

;2 words per frame (bit13:9=00001)


movep #$000000,x:M_SAICR;init ESAI common control register

;data left aligned to bit 23 (bit8=0)

;asynchronous mode (bit6=0)

;bits 23:9 and 5:3 are reserved and are initialized to 0


movep #$d17d00,x:M_TCR ;init trasmit control register

;last slot interrupt enabled (bit23=1)

;transmit interrupt enabled (bit22=1)

;even slot interrupt disabled (bit21=0);exception interrupt enabled (bit20=1)

;transmitter normal operation (bit19=0)

;reserved (bit18=0)

;zero padding disabled (bit17=0)

;FS occurs 1 bit clock early (bit16=1)

;word length FS (bit15=0)

;32-bit slot length, 24-bit word length(bit14:10=11111)

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Pass Through Code

MOTOROLA DSP5636XEVM Users Manual B-3

;network mode (bit9:8=01)

;data left aligned (bit7=0)

;MSB shifted out first (bit6=0)

;all transmitters disabled (bit5:0=000000)

movep #$d17D02,x:M_RCR ;init receive control register;last slot interrupt enabled (bit23=1)

;receive interrupt enabled (bit22=1)

;even slot interrupt disabled (bit21=0)

;exception interrupt enabled (bit20=1)

;receiver normal operation (bit19=0)

;reserved (bit18:17=00)

;FS occurs 1 bit clock early (bit16=1)

;word length FS (bit15=0)

;32-bit slot length, 24-bit word length(bit14:10=11111)

;network mode (bit9:8=01)

;data left aligned (bit7=0)

;MSB shifted out first (bit6=0)

;reserved (bit5:4=00)

;receivers 3 and 2 disabled (bit3:2=00)

;receiver 1 enabled (bit1=1)

;receiver 0 disabled (bit0=0)

movep #$000fdb,x:M_PCRC ;Enable ESAI port

movep #$000fdb,x:M_PRRC

;reserved (bit23:12=000000000000)

;all pins enabled as ESAI except HCKT & HCKR(bit11:0=111111011011)

movep #$000003,x:M_TSMA ;init transmit slot mask registers

;reserved (bit23:16=00000000)

;enable slots 15:0 (bit15:0=1111111111111111)

movep #$000003,x:M_TSMB

;reserved (bit23:16=00000000)

;enable slots 15:0 (bit15:0=1111111111111111)

movep #$00ffff,x:M_RSMA ;init receive slot mask registers

;reserved (bit23:16=00000000)

;enable slots 15:0 (bit15:0=1111111111111111)

movep #$00ffff,x:M_RSMB

;reserved (bit23:16=00000000)

;enable slots 15:0 (bit15:0=1111111111111111)

movep #$000000,x:M_TX0 ;zero out transmitter 0



movep #$000000,x:M_TX3 ;zero out transmitter 3bset #0,x:M_TCR ;enable TX0

bset #1,x:M_TCR ;enable TX1



andi #$FC,mr ;enable all interrupt levels

;**************************************************************************

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B-4 DSP5636XEVM Users Manual MOTOROLA

Pass Through Code

; Main loop

;**************************************************************************

LOOP

jclr #RightReceive,X:flags,*

bclr #RightReceive,X:flagsmove x:RX_BUFF_BASE,a ;receive left

move x:RX_BUFF_BASE+1,b ;receive right

move a,x:TX_BUFF_BASE ;transmit left

move b,x:TX_BUFF_BASE+1;transmit right

jmp LOOP

;**************************************************************************

; Subroutines

;**************************************************************************

STEREO_PROCESS

nop

nop

rts

include isr_dig.asm

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Schematics

MOTOROLA DSP5636XEVM Users Manual C-1

APPENDIX C

SCHEMATICSThe section contains the schematics for the DSP5636XEVM.

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C-2 DSP5636XEVM Users Manual MOTOROLA

Schematics

AA

BB

CC

DD

EE

4

4

3

3

2

2

1

1

*Groundpinonthe

DSP56362

SecondESA

I

DSP563

62

DSP56366/7

_____

TRST

DSP_SD04_1

__DE

DSP_SCKT_1

GNDp1

DSP_SD05_1

CLKOU

T

DSP_FSR_1

AA3

DSP_FST_1

NC

DSP_SCKR_1

Friday,September21,2001

1.33

1

13

DSP56367EVMDSP56367

A

Title

Rev

Date:

Sheet

of

MOTOROLA

IMAGINGANDENTERTAINMENTSOLUTIONS

DIGITALAUDIOAPPLICATIONS

Size

AA0

~WR

~RD

~BR

~CAS

~TA

~BG~BB

DSP_CLK

FS_CLK

BIT_CLK

SDI1

SDO3

SDO1

MISO

SDI0

SDO2

SDO0

ADO

AA1

AA2

TDI

TCK

TMS

TDO

A17A16A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0

MOSI

SCK

FS256_CLK

D8D7D6D5D4D3D2D1D0

D9D10

D12D11

D13D14

D15D16D17

D18D19D20D21

D22

D23

~RESET

~RESET

SYSTEM_RESET

CORE_SUPPLY

~RESET

PLD_SDO5_1

PLD_FST_1

PLD_FSR_1

PLD_SCKR_1

PLD_SDO4_1

PLD_SCKT_1

DSP_SDO4_1

DSP_SDO4_1

DSP_SDO5_1

DSP_SDO5_

1

AA3

DSP_SCKT_1

DSP_SCKT_1

~DSP_SS

DSP_MISO

DSP_SCK

DSP_MOSI

PB13

PB14

DSP_MISO

DSP_SCK

CORE_SUPPLY

+3.3V

+3.3V

+3.3V

+3.3V

+3.3V+3.3V+3.3V+3.3V

+3.3V

+3.3V

+3.3V

+5V

+3.3V

+5V

+3.3V

+3.3V

+3.3V

+3.3V

+3.3V

JP4

1 2

JP2

1 2

JP1

1 2

JP8

1

2

3

4

5

6

7

8

JP5

1 2

S1

RESET

+

C20

4.7uF

L11uH

+

C15

22uF

C19

0.1uF

C21

0.1uF

C18

0.1uF

C10

0.1uF

C11

0.1uF

C9

0.1uF

C13

0.1uF

C12

0.1uF

C

17

0.02

7uF

C14

0.1uF

C16

0.1uF

R6

10K

R5

10K

R4

10K

R3

10K

R2

10K

R7620

D1

JP11

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

C5

0.1uF

C7

0.1uF

C3

0.1uF

C2

0.01uF

C8

0.01uF

C1

0.1uF

C4

0.01uF

C6

0.01

uF

JP10

1

2

3

4

5

6

7

8

9

10

11

12

13

14

DSP56362

U1

NC60

Vcca074

GNDa075

Vcca180

GNDa181

Vcca286

GNDa287

GNDa3

96

Vcch38

GNDh39

Vccp 45

GNDp47

GNDp148

Vccs08

GNDs09

Vccs125

GNDs126

D0

100

D1

101

D2

102

D3

105

D4

106

D5

107

D6

108

D7

109

D8

110

D9

113

D10

114

D11

115

D12

116

D13

117

D14

118

D15

121

D16

122

D17

123

D18

124

D19

125

D20

128

D21

131

D22

132

D23

133

Vccc057

GNDc058

Vccc165

GNDc166

Vccd0103

GNDd0104

Vccd1111

GNDd1112

Vccd2119

GNDd2120

Vccd3129

GNDd3130

PCAP46

MODA/IRQA

137

MODB/IRQB

136

MODC/IRQC

135

MODD/IRQD

134

RESET

44

EXTAL55

CLKOUT59

PINIT/NMI61

SCK1 MISO

144 MOSI143

SS2

HREQ3

ACI

28 ADO27

TIO029

AA0

70

AA1

69

AA2

51

AA3

50

A0

72

A1

73

A2

76

A3

77

A4

78

A5

79

A6

82

A7

83

A8

84

A9

85

A10

88

A11

89

A12

92

A13

93

A14

94

A15

97

A16

98

A17

99

Vccql0

18

GNDq0

19

Vccqh0

20

Vccql1

56

GNDq1

54

Vccqh1

49

Vccql2

91

GNDq2

90

Vccqh2

95

Vccql3

126

GNDq3

127

TMS142

TRST138

DE53

TCK141

TDO139

TDI140

HCKR17 HCKT16

FSR13 FST12

SCKR15 SCKT14

SDO04

SDO15

SDO2/SDI36

SDO3/SDI27

SDO4/SDI110

SDO5/SDI011

H043

H142

H241

H340

H437

H536

H635

H734

HA033

HA132

HA231

HRW22

HDS/HDS21

HCS30

HOREQ/HOREQ24

HACK/HACK23

CAS

52

RD

68

WR

67

TA

62

BR

63

BG

71

BB

64

JP12

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

JP13

1

2

3

4

5

6

7

8

9

10

11

12

13

14

R86

5.6K

R85

5.6K R

11K

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Schematics


A A

B B

C C

D D

E E

4

4

3

3

2

2

1

1

*bypasscaps

for

thememorydevice

Friday,

September21,

2001

1.3

3

2

13

DSP56367EVMEXTERNALMEMORY

A

Title

Rev

Date:

Sheet

of

MOTOROLA



Size

A17

A2

A3

A6

A7

A10

A11

A14

A0

A1

A4

A5

A8

A9

A12

A13

A15

A16

D5

D12

D19

D8

D0

D10

D7

D11

D21

D13

D16

D4

D20

D23

D1

D22

D2

D14

D15

D9

D18

D3

D6

D17

D1

D3

D5

D9

D11

D22

D21

D10

D4

D0

D6

D7

D15

D18

D19

D14

D20

D8

D2

D17

D12

D23

D13

D16

A13

A7

A5

A11

A12

A15A16

A4

A0

A8

A3

A14

A2A1

A9

A6

A17

A10

D1

D3

D5

D4

D0

D6

D7

D2

AA2

~RD

~WR

~BB

AA2

~BR

~RD

~WR

AA1

~CAS

~TA

~BG

AA0

AA1

AA3

A16

A14

A15

A10

A8

A9

A6

A7

A3

A4

A11

A5

A12

A13

A17

A2

A0

+3

.3V

+3

.3V

+3

.3V

+3.3V

+3

.3V

+3

.3V

JP16

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

JP15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

U11

GS76024B-10

NC0

A1

NC1

A7

NC2

B1

NC3

B7

NC4

C2

A17

C4

NC6

C6

NC7

R2

NC8

R3

NC9

R4

NC10

R5

NC11

R6

NC12

T1

NC13

T7

NC14

U1

NC15

U7

GND3E2GND2D5

VCC2

G3

VCC3

G5

GND1D4

GND0D3

VCC1

E5

VCC0

E3

GND5E6

GND4E4

VCC5

J5

VCC4

J3

D5H7

D6K7

D7L7

D8M7

D9N7

D10P7

D13N1

D14P1

D17D1

D18E1

D21H1

D22K1

D23L1

D4G7

D1D7

D2E7

D3F7

D11R7

D12M1

D15R1

D16C1

D19F1

D20G1

D0C7

GND6F3GND7F4

GND8F5

GND9G2

GND10G4GND11G6GND12H3

GND17J6

GND18K3

GND30P3

GND19K4

VCC8

N3

VCC9

N5

GND20K5

GND21L2

VCC6

L3

VCC7

L5

GND13H4

GND24M3

VCCQ0

D2

VCCQ1

D6

GND15J2GND16J4

VCCQ7

J7

VCCQ8

K2

GND22L4

GND23L6

VCCQ11

M6

VCCQ13

P6

GND14H5

GND29N6

VCCQ12

P2

VCCQ6

J1

GND31P4

GND32P5

VCCQ9

K6

VCCQ10

M2

GND27N2

GND28

N4

VCCQ4

H2

VCCQ5

H6

A0

T5

A1

T6

A2

U6

A3

B6

A4

A6

A5

B5

A6

U5

A7

U3

A8

T3

A9

U2

A10

T2

A11

A2

A12

B2

A13

B3

A14

A3

A15

A4

A16

A5

CE1

B4

GND33C5

VCC10

C3

WE

T4

OE

U4

GND25M4GND26M5

VCCQ2

F2

VCCQ3

F6

C52

0.1

uF

C53

0.1

uF

C54

0.1u

F

C55

0.1

uF

JP17

1

2

3

4

5

6

7

8

9

10

11

12

13

14

R21

10K

R20

10K

R22

10K

U12

AT29LV020

_VS

A16

10

A15

11

A14

5

A13

4

A12

12

A11

1

A9

2

A8

3

WE

7

A7

13

A6

14

A5

15

A4

16

A3

17

A2

18

A1

19

A0

20

CE

30

OE

32

I/O0

21

I/O1

22

I/O2

23

I/O3

25

I/O4

26

I/O5

27

I/O6

28

I/O7

29

A10

31

A17

6

VCC

8

NC

9

GND

24

C

51

0

.1u

F

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Schematics

AA

BB

CC

DD

EE

4

4

3

3

2

2

1

1

*approx

3.1v

*1IRreceiveroutputconnectedtotimer

input

*usedformonitormode


1.33

3

13

DSP56367EVMMICROCONTROLLER

ANDLCD

A

Title

Rev

Date:

Sheet

of

MOTOROLA


DIGITALAUDIOAPPLICATIO

NS

Size

HC08_RXD

HC08_TXD

SCK

MOSI

MISO

HC08_CLK

PLD_SEL1

PLD_SEL2

PLD_SEL3

P

LD_IO1

PLD_IO0

PLD_IO2

P

LD_IO3

HC08_PTA0

HC08_PTA7

~HC08_RESET

+5V

+5V

+3.3V

+3.3V

+5V

+3.3V

R28

56

U14

LCD20CHARX2LINE

D0

7

D1

8

D2

9

D3

10

D4

11

D5

12

D6

13

D7

14

E

6

R/W

5

RS

4

Vo

3

Vss

1

Vdd

2

A

15

K

16

U15

GP1U28YVout1

Vcc2

GND3

C56

0.1uF

C57

0.1uF

S5

1 2

S3

1 2

S4

1 2

S2

1 2

R29

2.7K

R30

3.9K

R89

10K

JP30

HEADER2X4

1

2

3

4

5

6

7

8

R92

8.6K

U13

MC68HC908GP32

RST

1

IRQ

11

PTA0/KBD0

32

PTA1/KBD1

33

PTA2/KBD2

34

PTA3/KBD3

35

PTA4/KBD4

36

PTA5/KBD5

37

PTA6/KBD6

38

PTA7/KBD7

39

PTD4/T1CH0

18

PTD5/T1CH1

19

PTD6/T2CH0

20

PTD7/T2CH1

21

VDD17

VSS16

OSC144

OSC243

CGMXFC42

VDDA40

VSSA41

VDDAD/VREFH

30

VSSAD/VREFL

31

PTB0/AD0

22

PTB1/AD1

23

PTB2/AD2

24

PTB3/AD3

25

PTB4/AD4

26

PTB5/AD5

27

PTB6/AD6

28

PTB7/AD7

29

PTC0

2

PTC1

3

PTC2

4

PTC3

5

PTC4

6

PTC5

7

PTC6

8

PTE0/TXD

9

PTE1/RXD

10

PTD1/MISO

13

PTD2/MOSI

14

PTD3/SPSCK

15

PTD0/SS

12

7/29/2019 DSP5636XEVMUM

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Schematics


A A

B B

C C

D D

E E

4

4

3

3

2

2

1

1

DSP

SoftwareBoot

Modeselect


1.3

3

4

13

DSP56367EVMS/PDIFI/OPLD

A

Title

Rev

Date:

Sheet

of

MOTOROLA

IMAGINGA

ND

ENTERTAINMENTSOLUTIONS

DIGITALAUDIO

APPLICATIONS

Size

PB13

PB14

+3

.3V

+3

.3V

R87

10K

R88

10K

JP31

HEADER2X2

1

2

3

4

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Schematics

A

B

C

D

E

4

4

3

3

2

2

1

1


1.33

5

13

DSP56367EVMSECONDARYS/PDIFOUTPUT

A

Title

Rev

Date:

Sheet

of

MOTOROLA

IMAGINGAND

ENTERTAINMENTSO

LUTIONS

DIGITALAUDIO

APPLICATIONS

Size

SDO0

SDO1

SDO2

SDO3

BIT_C

LK

FS_CLK

FS128_C

LK

SYSTEM_RES

ET

SPDIF_ELECT

SPDIF_OPTICAL

+5V

+5V

+5V

JP25

1

2

3

4

5

6

7

8

U18

CS8404A

C7/C3

1

PRO

2

C1/FC0

3

C6/C2

4

MCK

5

SCK

6

FSYNC

7

SDATA

8

V

9

C/SBF

10

U

11

C9/C15

12

TRNPT/FC1

24

M2

23

M1

22

M0

21

TXP

20

VD+

19

GND

18

TXN

17

RST

16

CBL/SBC

15

EM0/C9

14

EM1/C8

13

C64

0.1uF

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Schematics


A A

B B

C C

D D

E E

4

4

3

3

2

2

1

1


1.3

3

6

13

DSP56367EVMANALOGINPUT

A

Title

Rev

Date:

Sheet

of

MOTOROLA

IMAGINGA

ND


DIGITALAUDIO

APPLICATIONS

Size

SYSTEM

_RESET

FS

_CLK

BIT

_CLK

PLD

_AD

_IN

FS256

_CLK

AD

_INL A

D_

INR

+5VA

+5VA

+5VA

+5VA

+

C74

1u

F

+

C75

1u

F

+

C72

4.7

uF

+

C73

4.7

uF

C70

0.1

uF

C71

0.1

uF C

76

470p

F

C77

470p

F

U19

PCM1800

VINL

1

VREF1

2

REFCOM

3

VREF2

4

VINR

5

RSTB

6

BYPAS

7

FMT0

8

FMT1

9

MODE010

MODE111

FSYNC

12

LRCK

13

BCK

14

DOUT

15

SYSCLK

16

DGND

17

VDD

18

CINNR

19

CINPR

20

CINNL

21

CINPL

22

VCC

23

AGND

24

+

C69

10u

F

+

C68

10u

F

R90

100K

R91

100K

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Schematics

AA

BB

CC

DD

EE

4

4

3

3

2

2

1

1

RIGHTOUT

LEFTOUT

LEFTSURROUNDOUT

RIGHTSURROUNDOUT

CENTER

SUBWOOFEROUT


1.33

7

13

DSP56367EVM

ANALOGOUTPUTS

A

Title

Rev

Date:

Sheet

of

MOTOROLA

IMAGINGAND

ENTERTAINMENTSO

LUTIONS

DIGITALAUDIO

APPLICATION

S

Size

SDO0

FS256_CLK

FS_CLK_U21

BIT_CLK

SDO1

SDO2

MC

MD

ML_DA1

SYSTEM_RESET

+5VA

-5V

+5VA

-5V

+5VA

-5V

+5VA

-5V

+5VA

-5V

+5VA

-5V

+5VA

+3.3V

R61

8.2K

R62

1K

R60

15K

C106

270pF

C108

2700pF

R63

100

R57

8.2K

R56

15K

R59

100

R46

1K

R44

15K

C87

270pF

C90

2700pF

R47

100

R42

1K

R43

100

R41

8.2K

C78

270pF

R40

15K

+ -

U23B

MC33078

5 6

7

+ -

U20B

MC33078

5 6

7

+ -

U20A

MC330783 2

1

4 8

+

C83

10uF

+

C79

1uF

+

C81

1uF

+

C104

1uF

+

C102

1uF

J7

RCA_3X2

147 369 258

+ -

U23A

MC330783 2

1

4 8

C101

270pF

C105

2700pF

R58

1K

R53

8.2K

R54

1K

R52

15K

C98

270pF

C100

2700pF

R55

100

R50

1K

R49

8.2K

C91

270pF

R48

15K

+ -

U22B

MC3

3078

5 6

7+ -

U22A

MC330783 2

1

4 8

+

C96

1uF

+

C93

10uF

+

C80

10uF

+

C103

10uF

+

C107

10uF

C85

0.1uF

+

C86

10uF

C84

0.1uF

C95

0.1uF

+

C94

10uF

C82

2700pF

+

C99

10uF

+

C88

10uF

R51

100

+

C92

1uF

C97

2700pF

+

C89

10uF

R45

8.2K

U21

PCM1600

ZERO1

1

ZERO2

2

ZERO3

3

ZERO4

4

ZERO5

5

ZERO6

6

AGND

7

VCC

8

VOUT6

9

VOUT5

10

VOUT4

11

VOUT3

12

VOUT2

13

VOUT1

14

VCOM2

15

VCOM1

16

AGND6

17

VCC6

18

AGND5

19

VCC5

20

AGND3

21

VCC4

22

AGND4

23

VCC3

24

AGND2

25

VCC2

26

AGND1

27

VCC1

28

AGND0

29

VCC0

30

NC0

31

NC1

32

MDO

33

MDI

34

MC

35

ML

36

RST

37

SCLKI

38

SCLKO39

BCK

40

LRCK

41

TEST

42

VDD

43

DGND

44

DATA1

45

DATA2

46

DATA3

47

ZEROA

48

C138

100pF

R94

150

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Schematics


A A

B B

C C

D D

E E

4

4

3

3

2

2

1

1

AUX1LEFTOUT

AUX1RIGHTOUT

AUX2LEFTOUT

AUX2RIGHTOUT

LEFTIN

RIGHTIN


1.3

3

8

13

DSP56367EVM

ANALOGOUTPUTS

A

Title

Rev

Date:

Sheet

of

MOTOROLA

IMAGINGA

ND


DIGITALAUDIO

APPLICATIONS

Size

BIT

_CLK

FS

_CLK

FS256

_CLK

PLD

_SDO4

_OUT

SDO3

MC

MD

ML

_DA2

SYSTEM

_RESET

AD

_INR

AD

_INL

+5VA

+5VA

-5V

+5VA

-5V

+5VA

-5V

+5VA

-5V

+3

.3V

R69

8.2

K

R70

1K

R68

15K

C121

270p

F

R71

100

R66

1K

R67

100

R65

8.2

K

C114

270p

F

R64

15K

+-

U25B

MC33078

56

7

+-

U25A

MC33078 32

1

48

+

C115

1u

F

+

C119

1u

F

+

C116

10u

F

C111

0.1

uF

+

C112

10u

F

C118

0.1

uF

+

C117

10u

F

+

C113

10u

F

+

C122

10u

F

R77

8.2

K

R78

1K

R76

15K

C129

270p

F

R79

100

R73

8.2

K

R72

15K

R75

100

+-

U26B

MC33078

56

7+

C127

1u

F

+

C125

1u

F

+-

U26A

MC33078

32

1

48

C124

270p

F

C128

2700p

F

R74

1K

+

C126

10u

F

+

C130

10u

F

C131

2700p

F

J8

RCA

_3X2

1 4 73 6 92 5 8

C123

2700p

F

C109

0.1

uF

U24

PCM1600

ZERO1

1

ZERO2

2

ZERO3

3

ZERO4

4

ZERO5

5

ZERO6

6

AGND

7

VCC

8

VOUT6

9

VOUT5

10

VOUT4

11

VOUT3

12

VOUT2

13

VOUT1

14

VCOM2

15

VCOM1

16

AGND6

17

VCC6

18

AGND5

19

VCC5

20

AGND3

21

VCC4

22

AGND4

23

VCC3

24

AGND2

25

VCC2

26

AGND1

27

VCC1

28

AGND0

29

VCC0

30

NC0

31

NC1

32

MDO

33

MDI

34

MC

35

ML

36

RST

37

SCLKI

38

SCLKO39

BCK

40

LRCK

41

TEST

42

VDD

43

DGND

44

DATA1

45

DATA2

46

DATA3

47

ZEROA

48

+

C110

10u

F

C120

2700p

F

R95

150

C139

100p

F

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Schematics

AA

BB

CC

DD

EE

4

4

3

3

2

2

1

1

jumperout->DAXout

jumperin->ESAIout


1.33

9

13

DSP56367EVMSPIDFOUT

A

Title

Rev

Date:

Sheet

of

MOTOROLA



Size

ADO

SPDIF_ELECT

SPDIF_OPTICAL

+3.3V

+

3.3V

+5V

+5V

C60

0.1uF

U16

MAX3485

RO

1

~RE

2

DE

3

DI

4

GND5

A

6

B

7

VCC8

K1

EB2-5NU 3

24

8

97

110

5

6

T2

1

5

4

8

R31

180

J3

S/PDIFOUT

1

2

C58

0.1uF

R32

130

J4

GP1F32T

GND

3

Vcc

2

Vin

1

D8

FM4001

JP26

1 2

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Schematics


A A

B B

C C

D D

E E

4

4

3

3

2

2

1

1

*bodyground

Friday,

September21,

2001

1.3

3

10

13

DSP56367EVMRS-232/OnCEINTERFACE

A

Title

Rev

Date:

Sheet

of

MOTOROLA



Size

~HC05_R

ESET

TCK

TDO

TDI

TMS

~RESET

RS232

_R1OUT

CLK

_3.6

86

MHZ

HC05_TDO

HC05_RDI

HC05

_PC1

RS232

_R2OUT

RS232

_R3OUT

RS232

_T1IN

RS232

_T2IN

RS232

_T3IN

+3

.3V

+3

.3V

+3

.3V

+3

.3V

+3

.3V

+3

.3V

+3

.3V

+3

.3V

P1

594837261

C28

22p

F

C27

22p

F

C23

0.1

uF

R

14

1

0K

R9

10K

R11

10K

R12

10K

R13

10M

DSP5636XEVMUM

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