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Digital system Design Chapter 1

Mar 07, 2016

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Zain Nadeem

Digital System Design by Dr. Shoaib Chapter 1 Slides
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  • DigitalSystemDesign

    Introduction

  • IntroDigitalDesignm

    eans

    Mappingalgorithm

    s/applicationsinsiliconApplyingtransform

    ationsandtricksthatresultsinoptim

    almappingincom

    petingdesignspaceofArea

    Pow

    erdissipationPerform

    anceTestabilityTestability

    VLSIhasenabledsolutionstointractableengineeringproblem

    sRapidadvancem

    enthasledtonewdim

    ensionsinthetechnology

    VLSIhasrevolutionized

    thecom

    mercialm

    arketVLSIhasrevolutionizedthecom

    mercialm

    arket

  • DigitalSystemsinDSPApplications

  • DigitalSystemstechnologies&

    constraints

    Usually

    suchasystem

    consistsofUsuallysuchasystem

    consistsofheterogeneousphysicaldevicessuchasMicrocontrollers

    Microcontrollers

    Microprocessors

    DSPsDSPs

    FPGAs

    Chi

    dd

    lii

    Choicedependsonapplication

    Constraints?

  • MooresLaw

    Moore

    sLaw

  • Intelcontinuestopursue

    MooresLaw

    IntelcontinuestopursueMoore

    sLaw

  • Intelticktockmodel

    Intelticktockm

    odel

    https://en

    wikipedia

    org/wiki/Intel

    TickTockhttps://en.w

    ikipedia.org/wiki/Intel_Tick

    Tock

  • Algorithmim

    plementedinC

  • HWm

    appingofthecodeinpreviousslide

  • DigitalTransceiverforaVoiceCom

    municationSystem

  • Algorithmsdistribution

    Algorithmsdistribution

    Codeintensivealgorithm

    sphonebookm

    anagement,keyboardinterface

    Structuredandcom

    putationallyintensivel

    ihalgorithm

    sdigitalupanddow

    nconversion,d

    dl

    id

    hi

    il

    dem

    odulationandsynchronizationloopsforw

    arderrorcorrection(FEC)C

    di

    id

    ill

    ii

    Codeintensiveandcom

    putationallyintensivealgorithm

    sVid

    /Sh

    iVideo/Speechcom

    pression

  • Designexam

    plesDesignexam

    ples

    Realtimesurveillancesystem

  • IXCL

    MICRO

    BLAZESRAMChi

    XilinxMultichannel

    DLMB

    MICRO

    BLAZE

    FIFO

    Chipmem

    oryinterface

    DXCL

    VdectoFIFO

    interfaceFIFO

    tomem

    oryinterface

    Comp.

    VideoInput

    VideoDecoder

    interface

    VideoDecoderChip

    Comp.

    Video

    CursorGenerator

    VideoMux

    VideoEncoder

    Output

    CharacterGenerator

    CharacterBRAM

    VideoMux

    Chip

    GraphicsGenerator

    GraphicsBRAM

    Mainblockdiagram

  • Hardware

    Hardware

  • Designexam

    plesDesignexam

    ples

    Realtimesurveillancesystem

    Advancedversion

    Advancedversion

  • Taskanalysis140

    000Machinecycles

    126,000

    106,000120,000

    140,000

    88,000

    80,000

    100,000

    40,000

    60,000

    15,000

    8500

    20,000

    Image

    decimation

    Kernelweighted

    histogram

    MeanShiftvector

    Bhattacharyyacoefficient

    SSRLSpredictionfilter

    16

  • Hd

    /ft

    Hardware/softw

    arepartitioningof

    MeanShifttracking

    algorithmalgorithm

    17

  • f t

    s o r

    n S h i f

    o c e s s

    M e a n

    e r )

    c o p r o

    u r e ( M

    r a c k e

    m a g e

    t e c t u

    t r

    i m

    a r c h i ta

    18

  • g n

    u r e

    d e s i g

    h i t e c t

    r e c o

    d a r c h

    f t w a r

    p o s e d

    r e / s o f

    P r o p

    d w a rh a r

    19

  • Pf

    iPerform

    ancecomparison

    Softw

    arebased

    Mean

    Codesign

    basedMean

    SoftwarebasedM

    eanShifttracker

    Fram

    eRate=10fps

    CodesignbasedM

    eanShifttracker

    Fram

    eRate=290fpsp

    pAcceleration=29x

    20