1 Digital Signal Processing in VLSI Design Shao-Yi Chien 簡韶逸 Fall 2021
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1
Digital Signal
Processing in VLSI
Design
Shao-Yi Chien 簡韶逸
Fall 2021
DSP in VLSI Design Shao-Yi Chien 2
Targets of This Course
◼ Introduction to the design skills of digital
signal processing VLSI systems
◼ The main focuses of this course are VLSI
hardware architectures for DSP, not
DSP algorithms, and not general-purpose
digital signal processor (DSP) design
DSP in VLSI Design Shao-Yi Chien 3
Role of Architecture Design
-- From ASIC Point of View
Specification
Algorithm Development
Architecture Design
Chip Implementation
DSP in VLSI Design Shao-Yi Chien 4
Role of Architecture Design
-- From SoC Point of View
Algorithm Design & Analysis
Dataflow Analysis
System Architecture Design
ConstraintsHW
ImplementationSW
Implementation
System Integration
Architecture
Design
Implementation
Specification
Constraints
DSP in VLSI Design Shao-Yi Chien 5
In an SoC, the Role of DSP
Architecture?
DSP in VLSI Design Shao-Yi Chien 6
Architecture Design?
◼ Computer architecture
◼ DSP architecture
◼ The boundary is getting blur
DSP in VLSI Design
Example: Google TPU
Shao-Yi Chien 7
DSP in VLSI Design Shao-Yi Chien 8
Course Outline (1/2)◼ Part I: Basic Design Skills
◼ Introduction to digital signal processing systems
◼ Iteration bound
◼ Pipeline and parallel processing
◼ Retiming
◼ Unfolding
◼ Folding
◼ Systolic array architecture
◼ Scheduling and resource allocation
◼ Processing element design
◼ SoC and DSP architecture
DSP in VLSI Design Shao-Yi Chien 9
Course Outline (2/2)
◼ Part II: Case Study
◼ Case study
FFT
Motion estimator
Neural network
DSP in VLSI Design Shao-Yi Chien 10
ScheduleWeek Date Topic
1 9/23Introduction to digital signal processing systems
2 9/30Iteration bound
3 10/7Pipeline and parallel processing
4 10/14Retiming
5 10/21Unfolding
6 10/28Folding
7 11/4Systolic array architecture
8 11/11Scheduling and resource allocation
9 11/18Processing element design (I)
10 11/25Processing element design (II)
11 12/2SoC and DSP Architecture
12 12/9Midterm Exam
13 12/16FFT
14 12/23Motion Estimator
15 12/30Neural Network Architecture
16 1/6CES
17 1/13Final presentation
18 1/20
DSP in VLSI Design Shao-Yi Chien 11
Grading
◼ Homework 40%
About 10 homeworks
◼ Midterm 35%
◼ Final project 25%
DSP in VLSI Design
Policies for COVID-19
◼ Course website:
https://cool.ntu.edu.tw/courses/10160
◼ Will record the lecture
Pre-record course content + on-line interaction
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DSP in VLSI Design Shao-Yi Chien 13
References
◼ K. K. Parhi, VLSI Digital Signal Processing Systems, John Wiley & Sons, 1999.
◼ L. Wanhammar, DSP Integrated Circuits, Academic Process, 1999.
◼ K. K. Parhi and T. Nishitani Ed., Digital Signal Processing for Multimedia Systems, Marcel Dekker, 1999.
◼ B. Venkataramani and M. Bhaskar, Digital Signal Processors: Architecture, Programming and Applications, McGraw-Hill, 2002
◼ P. Lapsley, J. Bier, A. Shoham, E. A. Lee, DSP Processor Fundamentals, IEEE Press, 1996.
◼ L.-G. Chen, C.-T. Huang, C.-Y. Chen, and C.-C. Cheng, VLSI Design of Wavelet Transform, Imperial College Press, 2006.
◼ D. Markovic and R. W. Brodersen, DSP Architecture Design Essentials, Springer, 2012.
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