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Digital Logic & Design Lecture 05
27

Digital logic design DLD Logic gates

Jan 22, 2018

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Salman Khan
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Page 1: Digital logic design DLD Logic gates

Digital Logic & Design

Lecture 05

Page 2: Digital logic design DLD Logic gates

Recap

• Octal Number System• Alternate Representations

– Excess Code– BCD Code– Gray Code

• Alphanumeric Code (ASCII)• Error Detection using Parity Bit

Page 3: Digital logic design DLD Logic gates

Logic Gates

• Basic Building Blocks• Logic Gate Symbol• Unique function• Truth or Function Table• Function Expression• Timing Diagram

Page 4: Digital logic design DLD Logic gates

AND Gate

• 1 output• 2 inputs• 3 inputs• 4 inputs• Multiple inputs

Page 5: Digital logic design DLD Logic gates

AND Gate function

• Logical Multiplication function

Input Output

A B F

0 0 0

0 1 0

1 0 0

1 1 1

BAF •=

NCBAF ••••= ....

Page 6: Digital logic design DLD Logic gates

AND Gate Timing Diagram

Page 7: Digital logic design DLD Logic gates

AND Gate function

BAF •=

Page 8: Digital logic design DLD Logic gates

AND Gate Timing Diagram

BAF •=

Page 9: Digital logic design DLD Logic gates

OR Gate

• 1 output• 2 inputs• 3 inputs• 4 inputs• Multiple inputs

Page 10: Digital logic design DLD Logic gates

OR Gate function

• Boolean Add function

Input Output

A B F

0 0 0

0 1 1

1 0 1

1 1 1

BAF +=

NCBAF ++++= ..

Page 11: Digital logic design DLD Logic gates

OR Gate Timing Diagram

Page 12: Digital logic design DLD Logic gates

NOT Gate

• 1 input• 1 output

Page 13: Digital logic design DLD Logic gates

NOT Gate function

• Invert function

Input Output

A F

0 1

1 0

AF =

Page 14: Digital logic design DLD Logic gates

NOT Gate Timing Diagram

Page 15: Digital logic design DLD Logic gates

AND Gate Applications

• Enable/Disable Device– Counter counts when it receives pulses

Page 16: Digital logic design DLD Logic gates

OR Gate Applications

• Car door open alarm

Page 17: Digital logic design DLD Logic gates

NOT Gate Applications

• 1’s Complement

Page 18: Digital logic design DLD Logic gates

Alternate Representations

Page 19: Digital logic design DLD Logic gates

NAND Gate

• 1 output• 2 inputs• 3 inputs• 4 inputs• Multiple inputs

Page 20: Digital logic design DLD Logic gates

NAND Gate function

• NOT-AND function

Input Output

A B F

0 0 1

0 1 1

1 0 1

1 1 0

BAF •=

NCBAF ••••= ....

Page 21: Digital logic design DLD Logic gates

NAND Gate Timing Diagram

t0 t4 t5 t6t1 t2 t3

A

B

F

Page 22: Digital logic design DLD Logic gates

NAND Universal Gate

Input Output

A B F

0 0 1

0 1 1

1 0 1

1 1 0

Page 23: Digital logic design DLD Logic gates

NAND Universal Gate

Input Output Output

A B F1 F

0 0 1 0

0 1 1 0

1 0 1 0

1 1 0 1

Page 24: Digital logic design DLD Logic gates

NAND Universal Gate

Input Output

A B F

0 0 0

0 1 1

1 0 1

1 1 1

Page 25: Digital logic design DLD Logic gates

NOR Gate

• 1 output• 2 inputs• 3 inputs• 4 inputs• Multiple inputs

Page 26: Digital logic design DLD Logic gates

NOR Gate function

• NOT-OR function

Input Output

A B F

0 0 1

0 1 0

1 0 0

1 1 0

BAF +=

NCBAF ++++= ....

Page 27: Digital logic design DLD Logic gates

NOR Gate Timing Diagram