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IT 6313 DIGITAL COMMUNICATION LAB MANUAL
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IT 6313

DIGITAL COMMUNICATION

LAB MANUAL

SYLLABUS

IT6313 DIGITAL COMMUNICATION LABORATORY

L T P C

0 0 3 2

OBJECTIVES:

The purpose of this lab is to explore digital communications with a software radio to understand how each component works together. The lab will cover, analog to digital conversion, modulation, pulse shaping, and noise analysis.

LIST OF EXPERIMENTS

EXPERIMENTS IN THE FOLLOWING TOPICS:

1. Signal Sampling and reconstruction

2. Amplitude modulation and demodulation

3. Frequency modulation and demodulation

4. Pulse code modulation and demodulation.

5. Delta modulation, adaptive delta Modulation

6. Line Coding Schemes

7. BFSK modulation and Demodulation (Hardware(Kit based) & Simulation using MATLAB / SCILAB / Equivalent)

8. BPSK modulation and Demodulation (Hardware& Simulation using MATLAB/SCILAB/ Equivalent)

9. FSK, PSK and DPSK schemes (Simulation)

10. Error control coding schemes (Simulation)

11. Spread spectrum communication (Simulation)

12. Communication link simulation

13. TDM and FDM

TOTAL: 45 PERIODS

OUTCOME:

To develop necessary skill in designing, analyzing and constructing digital electronic circuits.

LAB REQUIREMENT FOR A BATCH OF 30 STUDENTS, 3 STUDENTS / EXPERIMENT:

i) Kits for Signal Sampling, TDM, AM, FM, PCM, DM and Line Coding Schemes

ii) Software Defined Radio platform for link simulation studies

iii) MATLAB / SCILAB for simulation experiments

iv) PCs - 10 Nos

v) Signal generator / Function generators / Power Supply / CRO / Bread Board each -15 nos

CIRCUIT CONNECTION FOR NATURAL SAMPLING

OBSERVATION FOR NATURAL SAMPLING

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Message signal

2

Sampling pulse

3

Sampled output

4

Reconstructed output

MODEL GRAPH

NATURAL SAMPLING WAVEFORM

EX.NO:

DATE:

ANALOG SIGNAL SAMPLING AND RECONSTRUCTION

AIM:

To obtain the samples of the given sinusoidal signal by the following types of signal sampling methods and reconstruct the signal from samples

1) Natural Sampling,

2) Sample and Hold,

3) FIat top sampling.

EQUIPMENTS REQUIRED:

S.No

Equipments/ Components required

Specification

Quantity

Module

DCS

1

Connecting Chords & Probes

As req.

Power supply

+ 12v

1

Dual Trace Oscilloscope

20 MHz

1

THEORY:

Both Analog and digital signal are used to carry information in communication system. Sometime it is necessary to convert analog signal into digital to transmit over digital network. Sampling is a process of converting analog continuous signal into discrete time signal.

To transmit analog over digital communication system, only samples of the message are required to be transmitted at regular intervals. The receiver will receives only samples of the message from which it reconstructs the original information.

Sampling Theorem:

A continuous time message signal m(t) can be completely represented in its sampled form and recovered back from its sampled form if the sampling frequency fs 2fm where is fm the maximum frequency of the message signal m(t).

Nyquist rate:

The minimum sampling rate of 2fm samples per second is called as nyquist rate. The reciprocal of nyquist rate is called nyquist interval.

Natural sampling:

In this method of sampling, an electronic switch is used to periodically shify between the two contacts at a rate of fs = (1/Ts ) Hz, staying on the input contact for C seconds and on the grounded contact for the remainder of each sampling period.

The output of the sampler considered as the product of m(t) and sampling pulse p(t).

Flat top sampling:

In this method the continuous analogue waveform is converted into a series of pulses whose amplitude is equal to the amplitude of the analogue signal at the start of thesampling process. Since the sampled pulses have a uniform amplitude, the process is called flat top sampling.

CIRCUIT CONNECTION FOR FLAT TOP SAMPLING

OBSERVATION FOR FLAT TOP SAMPLING

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Message signal

2

Sampling pulse

3

Sampled output

4

Reconstructed output

MODEL GRAPH

FLAT TOP SAMPLING WAVEFORM

Sample and hold:

The Sample-and-Hold circuit consists of an amplifier of unity gain and low output impedance, a switch and a capacitor; it is assumed that the load impedance is large. The switch is timed to close only for the small duration of each sampling pulse, during which time the capacitor charges up to a voltage level equal to that of the input sample. When the switch is open, the capacitor retains the voltage level until the next closure of the switch. Thus the sample-and-hold circuit produces an output waveform that represents a staircase interpolation of the original analog signal.

PROCEDURE :

1. Connection are given as per the circuit diagram

2. The amplitude and time period of input message signal, sampling pulse, sampled output (for natural sampling, flat top sampling and sample & hold circuit), and its corresponding reconstructed waveform are observed.

3. The reading are noted and drawn as graph.

CIRCUIT CONNECTION FOR SAMPLE AND HOLD

OBSERVATION FOR SAMPLE AND HOLD

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Message signal

2

Sampling pulse

3

Sampled output

4

Reconstructed output

MODEL GRAPH

SAMPLE AND HOLD CIRCUIT WAVEFORM

RESULT:

The input analog signal is sampled through

1) Natural Sampling,

2) Sample and Hold,

3) Flat top sampling circuits and the signal is reconstructed and the characteristics of the reconstructed signal were compared with the input signal.

CIRCUIT CONNECTION FOR AM MODULATION AND DEMODULATION

EX.NO:

DATE:

AMPLITUDE MODULATION AND DEMODULATION

AIM:

To modulate the analog message signal using AM modulator and demodulate the AM wave to original message signal.

EQUIPMENTS REQUIRED:

S.No

Equipments/ Components required

Specification

Quantity

1.

Modules

ACL-01 & ACL-02

1

2.

Power supply

+/- 12v

1

3.

Oscilloscope

20MHz

1

4.

Connecting patch chords and probes

-

As req

THEORY:

Amplitude Modulation:

In Amplitude Modulation the amplitude of carrier wave is varied in accordance with the instantaneous value of the modulating signal.

Modulation index:

The AM modulation index is a measure based on the ratio of the modulation excursions of the RF signal to the level of the unmodulated carrier. It is thus defined as:

MI= VMessage / VCarrier

Modulation index is normally expressed as a percentage.

If MI=0.5 carrier amplitude varies by 50% above (and below) its unmodulated level. If modulation index is less than 1 it is known as under modulation. If MI = 1.0, then 100% modulation the wave amplitude is achieved this is known as critical modulation, and this represents full modulation using standard AM and is often a target (in order to obtain the highest possible signal to noise ratio) but mustn't be exceeded. Increasing the modulating signal beyond that point, is known as over modulation,

PROCEDURE :

1. Connection are given as per the circuit diagram

2. The amplitude and time period of input message signal, high frequency carrier, AM modulated wave (for over modulation, critical modulation, under modulation), and its corresponding demodulated waveform are observed.

3. The reading are noted and drawn as graph.

MODEL GRAPH

TABULAR COLOUMN:

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

Modulating Signal

Carrier Signal

AM Modulated Signal

a. Under Modulation

b. Critical Modulation

c. Over Modulation

Emax

Emin

d.

Demodulated signal

CALCULATION:

RESULT:

The input analog signal is modulated using AM modulation technique and Demodulated. By varying the amplitude of the modulating signal the under modulation, critical modulation and over modulation waveforms were verified and modulation index are calculated.

Modulation index =(over modulation)

=(under modulation)

=(critical modulation)

CIRCUIT CONNECTION FOR FM MODULATION AND DEMODULATION

EX.NO:

DATE:

FREQUENCY MODULATION AND DEMODULATION

AIM:

To modulate the analog message signal using FM modulator and demodulate the FM wave to original message signal. Also to calculate the frequency deviation and modulation index of FM

EQUIPMENTS REQUIRED:

S.No

Equipments/ Components required

Specification

Quantity

1.

Modules

ACL-03& ACL 04

1

2.

Power supply

+/- 12v

1

3.

Oscilloscope

20MHz

1

4.

Connecting patch chords and probes

As req

THEORY:

TABULAR COLOUMN:

SI NO

SIGNAL

AMPLITUDE(Volts)

TIME PERIOD in

( msec or sec )

FREQUENCY (KHz)

1

Modulating Signal

2

Carrier Signal

3

Modulated Signal

TMAX

TMIN

FMAX

FMIN

4

Demodulated Signal

MODEL GRAPH:

RESULT:

The input analog signal is Frequency modulated & demodulated. The modulated and demodulated waveforms were drawn in the graph. The frequency deviation and modulation index of FM were calculated.

Frequency deviation =

Modulation index =

CIRCUIT CONNECTION FOR PULSE CODE MODULATION AND DEMODULATION

EX.NO:

DATE:

PULSE CODE MODULATION AND DEMODULATION

AIM:

To convert the given sinusoidal analog signal into digital signal using Pulse code modulation and recover the analog signal from binary information.

EQUIPMENTS REQUIRED:

S.No

Equipments/ Components required

Specification

Quantity

5.

Modules

DCS

1

6.

Power supply

+/- 12v

1

7.

Oscilloscope

20MHz

1

8.

Connecting patch chords and probes

As req

THEORY:

Pulse code modulation (PCM) is a digital representation of an analog signal that takes samples of the amplitude of the analog signal at regular intervals. The sampled analog data is encoded as binary data.. Each sample in a PCM is quantized, approximating a very large set of possible values by a relatively small set of values, which may be integers or even discrete symbols. The practical implementation of PCM involves following processes:

Filtering

Sampling

Quantizing

Encoding

Advantages of PCM

Effect of noise is reduced.

PCM permits the use of pulse regeneration.

Multiplexing of various PCM signals is possible.

PROCEDURE:

1. Connection are given as per the circuit diagram

2. The amplitude and time period of input message signal, high frequency carrier, Pulse code modulated wave and its corresponding demodulated waveform are observed.

3. The reading are noted and drawn as graph.

TABULAR COLOUMN:

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Modulating Signal

2

Carrier Signal

3

PCM signal

4

Demodulated signal

MODEL GRAPH

RESULT:

Thus the given analog signal is converted into digtal signal using PCM and the modulated wave is demodulated to its original message signal.

CIRCUIT CONNECTION FOR DELTA MODULATION AND DEMODULATION

TABULAR COLOUMN:

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Modulating Signal

2

Carrier Signal

3

DELTA modulated signal

4

Demodulated signal

EX.NO:

DATE:

DELTA MODULATION AND ADAPTIVE DELTA MODULATION

AIM:

To modulate and demodulate the signal using Delta Modulation and adaptive delta modulation

EQUIPMENTS REQUIRED:

S.No

Equipments/Components

Specifications

Quantity

1.

Module

DCS 01 kit

1

2.

Connecting Chords & Probes

As req.

3.

Power supply

+ 12v

1

4.

Dual Trace Oscilloscope

20 MHz

1

THEORY:

Delta modulation (DM) may be viewed as a simplified form of DPCM in which a two level (1-bit) quantizer is used in conjunction with a fixed first-order predictor. Over sampling" means that the signal is sampled faster than is necessary. In the case of Delta Modulation this means that the sampling rate will be much higher than the minimum rate of twice the bandwidth. Delta Modulation requires "over sampling" in order to obtain an accurate prediction of the next input. Since each encoded sample contains a relatively small amount of information Delta Modulation systems require higher sampling rates than PCM systems. At any given sampling rate, two types of distortion, limit the performance of the DM encoder.

Slope overload distortion: This type of distortion is due to the use of a step size delta that is too small to follow portions of the waveform that have a steep slope. It can be reduced by increasing the step size. Granular noise: This results from using a step size that is too large too large in parts of the waveform having a small slope. Granular noise can be reduced by decreasing the step size.

Even for an optimized step size, the performance of the DM encoder may still be less satisfactory. An alternative solution is to employ a variable step size that adapts itself to the short-term characteristics of the source signal. That is the step size is increased when the waveform has a step slope and decreased when the waveform has a relatively small slope. This strategy is called adaptive DM (ADM).

PROCEDURE FOR DELTA MODULATION

1. Ensure that Group 5(GP5) clock is selected in the clock generation section. Selection is done with the help of switch S1 and observe the corresponding LED indication.

2. Select the transmitter clock of frequency 8 KHz using Switch S2 and the selected clock is indicated on the corresponding LED indication in the clock generation section.

3. Connect the patch cords as per circuit diagram.

4. Observe the delta modulated output at OUT 8 post of the digital sampler.

5. Observe the integrated output at OUT 9 post of the integrator 1 section; we observe that as the clock rate increases, the amplitude of the triangular wave decreases.

6. Increase the amplitude of the 250 Hz sine wave up to 0.5 V using pot P3 in the function generator section. Signal approximating 250 Hz sine wave is available at OUT 9 post of the integrator 1 section. This signal is obtained by integrating the digital output resulting from delta modulation.

MODEL GRAPH FOR DELTA MODULATION

7. Increase the amplitude of the 250 Hz sine wave up to 2 Vpp using Pot P3 in the Function generator section .Observe that the digital HIGH makes the integrator output to go upward and digital LOW makes the integrator output to go downwards .

8.Increase the amplitude of the 250 Hz sine wave further high using Pot P3 and observe that the integrator output cannot follow the input signal .This is because of the fact that as the frequency of the i/p analog signal increases there is less conversion of 1s and 0s in the delta modulated o/p.

9.Observe the reconstructed signal through 2nd order LPF and 4th order LPF.

PROCEDURE FOR ADAPTIVE DELTA MODULATION

1. Ensure that group5 (GP5) clock is selected in clock generation section. Selection is done with the help of switch S1.

2. Select the transmitter clock of frequency 32 KHz using switch S2 .

3. Connect the 1 KHz signal having amplitude 2 Vpp ,using pot 5 to IN 13 post and TXCLK to CLK3 DELTA post of the digital sampler.

4. Keep switch S5 in delta position.

5. Connect OUT 8 post of digital sampler to IN 19 post of integrator 2.

6. Keep the switch S6 of integrator 2 to low position.

7. Connect OUT14 post of integrator 2 to IN14 post of digital sampler.

8. Observe the modulated output at OUT 8 post of digital sampler.

9. Adjust the pot 8 and observe the integrated output at OUT 14 post of integrator 2.

10. Connect the OUT8 post of digital sampler to IN 25 post of the demodulator section.

11. Connect the OUT21 post of the demodulator section to the IN 25 post of the integrator3 section.

12. Keep the switch S9 of integrator 3 to low position Connect the OUT 25 post to the IN 33 post of 2nd order LPF.

13. Connect OUT 30 post of 2nd order LPF to IN 34 post of 4th order LPF.

14.Observe the reconstructed signal of 2nd and 4th order LPF.

15. Repeat the above procedure for different input signals and clock frequencies.

MODEL GRAPH FOR ADAPTIVE DELTA MODULATION:

TABULAR COLOUMN FOR ADAPTIVE DELTA MODULATION

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Modulating Signal

2

Carrier Signal

3

Adaptive delta modulated signal

4

Demodulated signal

RESULT:

CIRCUIT CONNECTION FOR LINE CODING AND DECODING TECHNIQUES

CLK 2

IN 16

Encoded Data Section

OUT 10

NRZ-L

IN 27

NRZ-M

Decoder

Decoded Data

Clock Recovery

Logic

OUT 23

REC.CLK 2

NRZ-S

URZ

BIO-L

Clock

Generation

(GP 4)

TX CLK

S4- SDATA

BIO-M

Block diagram for data coding and decoding

MODEL GRAPH:

1 0 1 1 0 0 0 1 1 0 1

NRZ-L

NRZ-M

Biphase L

Biphase M

Biphase S

NRZ-S

+V

-V

+V

+V

+V

+V

+V

-V

-V

-V

-V

EXP.NO:

DATE:

LINE CODING AND DECODING TECHNIQUE

AIM:

To encode and decode the digital data using various channel encoding and decoding techniques and to obtain the encoded and decoded formats.

EQUIPMENTS REQUIRED:

DCS-01 kit

Power supply

Oscilloscope.

Connecting Links

THEORY:

Different PCM Formats:

The digital data in the PCM systems can be encoded in several formats. All these PCM waveforms can be broadly classified into the following four groups:

Non Return to zero formats

Return to zero formats

Phase Encode formats

Multilevel binary formats.

1) Non Return to zero formats:

The reason for having so many encoding formats for simply representing 1 s and 0s relates to the difference in performances that characterize each waveform.

2) Return to zero formats:

These signals are called Return to zero signals, since they return to zero with the clock. This is not discussed in DCS 01 kit.

3) Biphase Signals (Phase Encoded Signals):

a) BiPhase LEVEL (Manchester Coding)

b) Biphase MARK and

c) Biphase Space Signals

These schemes are used in magnetic recording, optical communications and in satellite telemetry links. These phase encoded signals are special in the sense that they are composed of both the in-phase and out-of-phase components of the clock.

a) Manchester Coding (Biphase With the Biphase-Level), a one is represented by a half bit wide pulse positioned during the first half of the bit interval and a zero is represented by a half bit wide pulse positioned during the second half of the bit interval.

b) Biphase Mark Coding (Biphase-M):

With the Bi-phase-M, a transition occurs at the beginnli gif every bit interval. A one is represented by a second transition, one half bit later whereas a zero has no second transition

c) Biphase-S coding:

With a Biphase-S also a transition occurs at the beginning of every bit interval. A zero, is marked by a second transition, one half bit later, where as a one has no second transition.

4) Multilevel signals:

Multilevel signals use three or more levels of voltages to represent the binary digits, ones and zeroes - instead of the normal highs and lows. Return to zero- Alternate Mark Inversion (R.Z-AMI) is the most commonly used multilevel signal.

a) Return to zero - Alternate Mark Inversion Coding (RZ-AMI):

This coding scheme is most often used in telemetry systems. This scheme comes wider both the category of return to zero scheme and multilevel scheme.

In this scheme, ones are represented by equal amplitude of alternating pulses, which alternate between a +5V and 5V. These alternating pulses return to zero volts, after every half bit interval. The zero is marked by absence of pulses.

Code Name

Code Definition

NRZ-L

Non-Return-to-zero Level

One is represented by one level

Zero is represented by another level lower the one but not zero.

NRZ-M

Non-Return-to-Zero Mark

One is represented by a change in level

Zero is represented by no change in level.

NRZ-S

Non-Return-to-Zero Space

One is represented by no change in level

Zero is represented by change in level.

NRZ-I

Non-Return-to-Zero Inverse

One is represented by no change in level

Zero is represented by change in level.

Bi-Phase-L

Bi-Phase Level (Split Phase)

Level change occurs at the beginning of every bit period

One is represented by a One level with transition to the Zero level

Zero is represented by a Zero level with transition to the One level.

Bi-phase-M

Bi Phase Mark

Level change occurs at the beginning of every bit period

One is represented by a midbit level change

Zero is represented by no mitbit level change.

Bi-Phase-S

Bi-Phase Space

Level change occurs at the beginning of every bit period

One is represented by no midbit level change

Zero is represented by a mitbit level change.

PROCEDURE :

1. Ensure that group 4 (GP4) clock is selected in the clock generation section.Selection is done with switch S1.

2. Observe the transmitter clock of frequency 250 kHz at TXCLK post.

3. Set the data pattern using switch S4 and observe the 8 bit data pattern at SDATA post.

4. Connections are given as per the block diagram.

5. Observe the encoded data at the OUT10 post. Selection of different encoded scheme is done using switch S3.

6. Observe the recovered clock at REC.CLK2 and decoded data at OUT 23 post.

RESULT:

CIRCUIT CONNECTION FOR PSK MODULATION AND DEMODULATION

Clock

Generation

(GP 4)

TX CLK

SDATA

CLK 2

IN 16

Encoded Data Section

OUT 10

NRZ-L

PSK MOD

SIN2

SIN3IN3

IN2

OUT 2

IN4

Carrier

Carrier

Modulation

PSK DEMOD

IN 30

OUT 27

TABULAR COLOUMN FOR BPSK

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Binary Signal

2

Carrier Signal

3

PSK modulated signal

4

Demodulated signal

CIRCUIT CONNECTION FOR FSK MODULATION AND DEMODULATION

Clock

Generation

(GP 4)

TX CLK

SDATA

CLK 2

IN 16

Encoded Data Section

OUT 10

NRZ-L

FSK MOD

SIN3

SIN1IN3

IN2

OUT 2

IN4

Carrier

Carrier

Modulation

FSK DEMOD

IN 28

OUT 24

TABULAR COLOUMN FOR BFSK

SI NO

SIGNAL

AMPLITUDE (VPK TO VPK) Volts

TIME PERIOD in ( msec or sec )

FREQUENCY in KHz

1

Binary Signal

2

Carrier Signal 1

3

Carrier Signal 2

4

FSK modulated signal

5

Demodulated signal

EXP.NO:

DATE:

DIGITAL MODULATION BPSK AND BFSK MODULATION AND DEMODULATION

AIM:

To modulate the digital signal using Binary Phase shift keying & Binary Frequency Shift Keying and demodulate it.

EQUIPMENTS REQUIRED:

S.No

Equipments/ Components required

Specification

Quantity

1.

Module

DCS

1

2.

Connecting Chords & Probes

As req.

3.

Power supply

+ 12v

1

4.

Dual Trace Oscilloscope

20 MHz

1

THEORY:

The techniques used in Digital Modulation systems normally fall under three broad categories:

1. Amplitude Shift Keying (ASK)

2. Frequency Shift Keying (FSK)

3. Phase Shift Keying (PSK)

Frequency Shift Keying (FSK):

A frequency shift keyed transmitter has its frequency shifted by the message. Although there could be more than two frequencies involved in an FSK signal, in binary Frequency shift keying experiment the message will be a binary bit stream, and so only two frequencies will be involved. Frequency f1 represent binary 1 and f2 represent binary 0.

In this type of modulation, the modulated output shifts between two frequencies for all one to zero transitions.

Phase Shift Keying:

In the PSK modulation, for all one to zero transitions of the modulating data, the modulated output switches between the in phase and out-of-phase components of the modulating frequency.

MODEL GRAPH:

Experimental Procedure for PSK:

1. Ensure that the group 4(GP4) clock is selected in the clock generation section. Selection is done with the help of switch s1.Observe the LED indication.

2. Observe the transmitter clock of frequency 250 KHz at TXCLK post

3. Set the data pattern using switch S4

4. Observe the 8 bit data pattern at SDATA post.

5. Observe the carrier sine wave of frequency 1MHz at SIN2 post and 1MHz with 180 degree phase at SIN3 post in carrier section.

6. Give the connections as per the block diagram

7. Select NRZ-L data with the help of the switch S3 and observe the corresponding LED indication in the encoded data section

8. Observe the PSK modulated wave at OUT2 post of carrier modulation section and PSK demodulated data at OUT 27 of the PSK demodulator section.

9. Verify the recovered data with the SDATA..

Experimental Procedure for FSK:

1. Ensure that the group 4(GP4) clock is selected in the clock generation section. Selection is done with the help of switch s1.Observe the LED indication.

2. Observe the transmitter clock of frequency 250 KHz at TXCLK post

3. Set the data pattern using switch S4

4. Observe the 8 bit data pattern at SDATA post.

5. Observe the carrier sine wave of frequency 500 KHz at SIN1 post and 1MHz at SIN3 post in carrier section.

6. Give the connections as per the block diagram

7. Select NRZ-L data with the help of the switch S3 and observe the corresponding LED

indication in the encoded data section

8. Observe the FSK modulated wave at OUT2 post of carrier modulation section and PSK demodulated data at OUT 24 of the FSK demodulator section.

9. Verify the recovered data with the SDATA..

RESULT:

CIRCUIT CONNECTION FOR FREQUENCY DIVISION MUX AND DEMUX

MODEL GRAPH

EXP.NO:

DATE:

FREQURNCY DIVISION MULTIPLEXING AND DEMULTIPLEXING

AIM:

To multiplex and demultiplex the sinusoidal signals of various frequencies using Frequency Division Multiplexing.

EQUIPMENTS REQUIRED:

S.No

Equipments/ Components required

Specification

Quantity

1

Module

Kitek ACT 11 kit

1

2

Connecting Chords & Probes

As req.

3

Power supply

+ 12v

1

4

Dual Trace Oscilloscope

20 MHz

1

THEORY:

PROCEDURE:

1. Connection are given as per block diagram

2. Switch on the power supply

3. Observe the FDM output at OUT post of summing amplifier.

4. Observe the demultiplex output at LPF1&LPF 2.

RESULT:

CIRCUIT CONNECTION FOR PSK MODULATION AND DEMODULATION

MODEL GRAPH

EXP.NO:

DATE:

TIME DIVISION MULTIPLEXING AND DEMULTIPLEXING

AIM:

To multiplex and demultiplex the sinusoidal signals of various frequencies using Time Division Multiplexing.

EQUIPMENTS REQUIRED:

S. No

Equipments/ Components required

Specification

Quantity

1.

Module

DCL-02

1

2.

Connecting Chords & Probes

As req.

3.

Power supply.

+ 12v

1

4.

Dual Trace Oscilloscope.

20 MHz

1

THEORY:

One of the greatest benefits to be derived from sampling is that of Time Division Multiplexing (TDM). By inter-leaving samples of several source waveforms in time, it is possible to transmit enough information to a receiver, via only one channel to recover all message waveforms. This process is called Time Division Multiplexing (TDM).

Synchronization:

To maintain proper positions of Sample Pulses in the Multiplexer, it is necessary to synchronize the Sampling Process. Because the sampling operations are usually electronic, there is typically a Clock Pulse Train that serves as a reference for all samples. At the Receiving Station, a similar Clock Synchronization can be derived from the received waveforms by observing the Pulse Sequence over many pulses and averaging the pulses (in a closed loop with the Clock derived on the Voltage Controlled Oscillator). Clock Synchronization does not guarantee that the proper sequence of samples is synchronized. Proper alignment of the Time Slot Sequence requires Frame Synchronization. Hence one or more Time Slots per Frame may be used to send Synchronization Information

OBSERVATIONS:

TABLE:

Waveforms

Amplitude(V)

Frequency(Hz)

Input signals:

CH0

CH1

CH2

CH3

Sampling clock signal

Demultiplexed signals

CH0

CH1

CH2

CH3

PROCEDURE:

1. connection are given as per block diagram.

2. Connect power supply in proper polarity to the kit DCL-02 & switch it on.

3. Connect 250Hz, 500Hz, 1 KHz, and 2 KHz sine wave signal from the Function Generator to the multiplexer input channel CHO, CHI, CH2, CH3 by means of the connecting chords provided.

4. Connect the multiplexer output TXD of the transmitter section to the demultiplex input RXD of the receiver section.

5. Connect the output of the receiver section CHO, CHI, CH2, CH3 to the INO, INI, 1N2, lN3 of the filter section.

6. Connect the sampling clock TX CLK and Channel Identification Clock TXSYNC of the transmitter section to the corresponding RX CLK and RX SYNC of the receiver section respectively.

7. Set the amplitude of the input sine wave as desired.

8. Observe the following waveforms on oscilloscope and plot them on the graph.

a. Input Channel CH0, CH1, CH2, CH3.

b. Multiplexer Output TXD.

c. Reconstructed signal OUT 0, OUT l, OUT 2, OUT 3.

RESULT:

Four sinusoidal signals with different frequencies are multiplexed and demultiplex using Time Division Multiplexing and Demultiplex techniques. The output waveforms are verified. Characteristics of the output waveforms are compared with the input signals.

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