Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University of California, Santa Barbara, CA, 93106-9560, USA Xiao-Ming Fang, Dmitri Loubychev, Ying Wu, Joel M. Fastenau, and Amy Liu IQE Inc. 119 Bethlehem, PA 18015, USA 560 GHz f t , f max InGaAs/InP DHBT in a novel dry-etched emitter process
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Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University.
Standard figures of merit / Effects of Scaling Small signal current gain cut-off frequency (from H 21 ) Charging time for digital logic Power gain cut-off frequency (from U) Thinning epitaxial layers ( vertical scaling ) reduces base and collector transit times… But increases capacitances Reduce R bb and C cb, through lateral scaling More efficient heat transfer
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Device Research Conference 2007
Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. RodwellDepartment of Electrical and Computer EngineeringUniversity of California, Santa Barbara, CA, 93106-9560, USA
Xiao-Ming Fang, Dmitri Loubychev, Ying Wu, Joel M. Fastenau, and Amy LiuIQE Inc. 119 Bethlehem, PA 18015, USA
power amplifiers 250 350 500 GHz digital clock rate 160 230 330 GHz(static dividers)
What parameters are needed for THz HBTs?
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✓✓ c<1 m2 U. Singisetti
DRC 2007
Ohmic contacts and epitaxial scaling good for 64nm HBT node!
Develop technology suitable for aggressive lateral scaling
TiW emitter dry etch formation
TiW
Cr
• Lift-off no good at <300 nm!• Dry etching – very high aspect ratio• Optical Lithography
O2 plasmaICP Cl2O2 etch
Mask Plate
SiO2
ICP SF6/Ar etch
•Refractory Ti0.1W0.9 is thermally stable
• c < 1m2 possible – no degradation of contact resistance for anneals up to 400C
TiW dry etching results• 250-300 nm emitters routinely formed• Demonstrated scalability down to 150 nm • ~ 50-100 nm tapering during etch sets scaling limit
•Emitter metal height ~ 500-600 nm
150 nm
Wet etch does not scale
{111}A planes – slow{101}A planes – fast
InGaAs etch ~ 30-40nmInP etch ~ 40 nm
Minimum emitter width ~ 150 nm!
Collector
Base
baseInP emitter
InGaAs emitter
TiW metal
Hybrid dry/wet etch• Anisotropic dry etch InGaAs, part of InP emitter, Cl2N2
• Formidable problem – InClx formation• Extensive UCSB know how on dry etching• Solution – low power ICP etch @ 200C, low Cl2 concentration• Short InP wet etch
TiW
InGaAs
InP
InGaAs Base
Current UCSB TiW emitter process
SiO2
TiW
InGaAs n++
InGaAs p++ Base
InP n
CrSF6/Ar ICP Cl2/N2 ICPSiNx sidewall
Wet EtchHCl:H3PO4
BHF
Ti
a b c d e
InGaAs p++ Base InGaAs p++ Base InGaAs p++ Base InGaAs p++ Base
InP nInGaAs n++ InGaAs n++
• 5 nm Ti layer for improved adhesion• 25 nm SiNx sidewalls protects Ti/TiW during Cl2 and BHF etch, improves adhesion• Standard triple mesa• BCB pasivation
Emitter prior to InP wet etch
Layer structure -- 70 nm collector DHBTThickness
(nm) Material Doping cm-3 Description
30 In0.53Ga0.47As 51019 : Si Emitter cap
10 In0.53Ga0.47As 41019 : Si Emitter
60 InP 31019 : Si Emitter
10 InP 1.21019 : Si Emitter
20 InP 1.01018 : Si Emitter
22 InGaAs 5-91019 : C Base
5.0 In0.53Ga0.47 As 21017 : Si Setback
11 InGaAs / InAlAs 21017 : Si B-C Grade
3 InP 6.2 1018 : Si Pulse doping
51 InP 21017 : Si Collector
5 InP 11019 : Si Sub Collector
5 In0.53Ga0.47 As 21019 : Si Sub Collector
300 InP 21019 : Si Sub Collector
Substrate SI : InP
Objective:• Thin collector and base for decreased electron transit time• Collector doping designed for high Kirk threshold, designed for 128 nm node• Setback and grade thinned for improved breakdown
Vbe = 1.0 V, Vcb = 0.0 V
Je = 0, 14, 21 mA/m2-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
80 100 120 140 160 180 200 220 240
Ener
gy (e
V)
distance (nm)
emitterbase
collector
valence band
conduction band
Je = 0mA/m2, 15mA/m2, 30mA/m2
RF & DC data –70 nm collector, 22 nm base InP Type-I DHBT