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ENTWURF VON SOFTWARE FÜR EINGEBETTETE SYSTEME (SWES) DESIGN OF SOFTWARE FOR EMBEDDED SYSTEMS (SWES) Dr. Peter Tröger Operating Systems Group, TU Chemnitz
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Design of Software for Embedded Systems

Jan 09, 2017

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  • ENTWURF VON SOFTWARE FR EINGEBETTETE SYSTEME (SWES)

    DESIGN OF SOFTWARE FOR EMBEDDED SYSTEMS (SWES)

    Dr. Peter TrgerOperating Systems Group, TU Chemnitz

  • PT 15/16Design of Software for Embedded Systems (SWES)

    COURSE ORGANIZATION Weekly lectures (starting today) + tutorials (starting next week)

    5 assignment sheets, minimum of 50% of all points needed

    OPAL: News, slides (after lecture !), discussion forum, time plans

    Written final exam

    Module 565050 (adopted from Dr. habil. D. Mller)

    Basic concepts and terminology

    Control theory for practitioners

    Programming for embedded systems in C and Ada

    Model-driven development for embedded systems, PLC systems

    Safety and security standards

    2

  • PT 15/16Design of Software for Embedded Systems (SWES)

    THE PROJECT 5 weeks of project work

    Work on a piece of embedded (real-time) software

    Targeting Raspberry PI with extension board, available in our lab

    Project results are submitted as assignment solutions

    Teams of 2 persons

    Q&A in tutorial sessions and OPAL forum

    First project-related task with assignment sheet 3 (mid-November)

    Submission system for both non-project and project assignments

    You hand-in either code or a PDF document > DEMO

    3

  • BASIC CONCEPTS AND TERMINOLOGY

    DESIGN OF SOFTWARE FOR EMBEDDED SYSTEMS (SWES)

    Dr. Peter TrgerOperating Systems Group, TU Chemnitz

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EMBEDDED SYSTEM Computer system in a context

    Specific dedicated task (vs. all-purpose computer)

    Often hardware/software co-design

    Optimize design based on application characteristics

    Often non-visible for user

    Often real-time systems (max. response time deadline) High cost pressure - low memory size, simple CPUs

    Energy efficiency

    Everywhere: Cell phones, printer,s automobiles, aviation products, household devices, medical devices, children toys,

    5

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EMBEDDED SYSTEMS

    6

    [http

    ://di

    dik.b

    log.u

    ndip.

    ac.id

    /]

    http://didik.blog.undip.ac.id/

  • PT 15/16Design of Software for Embedded Systems (SWES)

    SOFTWARE FOR EMBEDDED SYSTEMS

    Ebert and Jones, 2009

    Worldwide market of 160 billion

    ~30 embedded processors per person in developed countries

    98% of all produced microprocessors for embedded applications

    7

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CHALLENGES How to minimize power consumption and costs ?

    Amount and type of hardware needed

    Power-aware software and operating systems

    How can you interact with the physical world ?

    Hardware sensors and actuators

    Real-time software constraints

    How to ensure non-functional properties ?

    1990-2000: 40% of recalled pacemakers due to firmware errors

    New cars with > 20 electronic control units (ECU),1GB of software in premium car

    8

  • PT 15/16Design of Software for Embedded Systems (SWES)

    PROBLEM AREAS

    9

    Hardware

    Software

    Non

    -func

    tiona

    l pro

    pert

    ies

  • PT 15/16Design of Software for Embedded Systems (SWES)

    HARDWARE

    10

    Desired functionality

    General purpose Application-specific Single-purpose

  • PT 15/16Design of Software for Embedded Systems (SWES)

    HARDWARE

    11

    General purpose Application-specific Single-purpose

    [Vah

    id /

    Giva

    rgis]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    HARDWARE General-purpose hardware

    Main goal is flexible usage with best-possible performance

    Programmable for all use cases

    Application-specific hardware

    Programmable for restricted performance-optimized uses cases

    Examples: Video stream processing, audio encoding

    Single-purpose hardware

    Integrated circuit to perform exactly one task in the fastest way

    Not programmable, algorithms fixed in hardware

    12

  • PT 15/16Design of Software for Embedded Systems (SWES)

    FLEXIBLE OR EFFICIENT?

    13

    [Alte

    ra]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    HARDWARE

    14

    General purpose Application-specific Single purpose

    Programmable in Software Hardware Software -

    Performance low medium medium high

    Energy Efficiency low medium medium high

    Feature Flexibility very high medium low very low

    Per unit price savings low low medium very high

    Example Microprocessor PLD / FPGA DSP ASIC / ASSP

  • PT 15/16Design of Software for Embedded Systems (SWES)

    GENERAL PURPOSE CHIP

    Microprocessor: Multi-purpose, programmable device

    Central Processing Units (CPUs) + volatile memory + I/O devices

    15

    [Stallings]

    Fetch instruction and execute it - typically memory access, computation, and / or I/O

    I/O devices and memory controller may interrupt the instruction processing

  • PT 15/16Design of Software for Embedded Systems (SWES)

    GENERAL PURPOSE CHIP RISC - Reduced Instruction Set Computer

    MIPS, ARM, DEC Alpha, Sparc, IBM 801, Power, etc.

    Small number of instructions, few data types in hardware

    Instruction size constant, few addressing modes

    Relies on optimization in software

    CISC - Complex Instruction Set Computer

    VAX, Intel X86, IBM 360/370, etc.

    Large number of complex instructions, may take multiple cycles

    Variable length instructions, smaller code size

    Focus on optimization in hardware

    RISC designs lend themselves to exploitation of instruction level parallelism

    16

  • PT 15/16Design of Software for Embedded Systems (SWES)

    ARM ARM design started in 1983 by Acorn Computers Ltd. Roger Wilson and Steve Furber

    1990 renamed to Advanced RISC Machines Ltd., 1998 renamed to ARM Ltd. 32-Bit and 64-Bit RISC processor architecture

    ARM does not manufacture itself, licenses to others: ATMEL, Intel, IBM, Nintendo, ...

    ARM targets low-power and low-cost embedded applications

    17

    [ent

    erpr

    isete

    ch.co

    m]

    http://enterprisetech.com

  • PT 15/16Design of Software for Embedded Systems (SWES)

    GENERAL PURPOSE CHIP Programmable logic device

    (PLD)

    Type of semiconductor hardware that can be re-wired after production

    18

    [Ty

    Gar

    ibay

    , Alte

    ra]

    FPGA Design Cost 3.200.000$

    FPGA Starting Unit Price 4x375 $ = 1500$

    ASIC Design Cost 85.000.000$

    ASIC Starting Unit Price 400$

    ASIC market delay 3 months

    Early entry device volume 49%

    Processor Blade Example [Xilink]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    GENERAL PURPOSE CHIP Field Programmable Gate Arrays (FPGA)

    Reconfigurable technology

    Hardware (!) functionality can be changed

    Errors can be corrected/masked

    Very short development times, suitable for low number of units

    Hardware description languages: VHDL and Verilog

    May be used to validate ASIC design

    SRAM- and Flash-based FPGAs allow reconfigurable computing

    19

  • PT 15/16Design of Software for Embedded Systems (SWES)

    APPLICATION-SPECIFIC CHIP Digital signal processor (DSP)

    Specialized microprocessor for digital processing of analogous signals

    A/D converter for input (e.g., camera), D/A converter for output

    Often fixed point arithmetics (faster)

    Real-time requirements (mostly soft RT), no multitasking

    Multimedia applications (image and audio processing)

    Cryptography

    Programmable in software

    20

  • PT 15/16Design of Software for Embedded Systems (SWES)

    SINGLE PURPOSE CHIP Application-specific

    integrated circuit (ASIC)

    Hardware device for being used in one product

    Application-specific standard part (ASSP)

    ASIC for re-use in multiple products (e.g. USB host controller)

    21

    [xilin

    k.com

    ]

    http://xilink.com

  • PT 15/16Design of Software for Embedded Systems (SWES)

    MICROCONTROLLER Integrated circuit with processor, memory, and I/O hardware

    (C, uC, MCU)

    Example: Atmel AT89S8253 8-bit microcontroller

    MCS 51 instruction set

    12 kByte Flash memory, 2 kByte EEPROM data memory

    256 x 8 Bit internal RAM

    32 programmable I/O lines

    UART serial port

    Three 16-bit timers

    2.7V - 5.5V operating range

    Power saving mode

    22

    [mikr

    oe.co

    m]

    http://mikroe.com

  • PT 15/16Design of Software for Embedded Systems (SWES)

    SYSTEM ON CHIP System on chip (SoC)

    Combines functional blocks (IP cores) in one large IC

    CPU, ROM, RAM, flash, Ethernet, Bluetooth, audio, USB, time, voltage,

    Soft-IP-Core in hardware description language (Verilog, VHDL)

    Can be parameterized (cache sizes, bus sizes, ), see opencores.org

    Licensed by companies such as ARM and MIPS

    Hard-IP-Core already built or integrated in FPGA

    Replace multi-chip setup, reduces power and space demands

    Typically with debugging interface (JTAG, USB)

    23

    http://opencores.org

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE: APPLE IPHONE 6

    24

    [tech

    insigh

    ts.co

    m]

    http://techinsights.com

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE: APPLE IPHONE 6

    25

    [tech

    insigh

    ts.co

    m]

    http://techinsights.com

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE: APPLE IPHONE 6

    26

    [tech

    insigh

    ts.co

    m]

    http://techinsights.com

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE: APPLE A8 SOC

    27

    [ww

    w.an

    andt

    ech.c

    om]

    http://www.anandtech.com

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE: RASPBERRY PI Broadcom BCM2835 SoC

    ARM11 processor

    Videocore 4 GPU

    General purpose I/O (GPIO) pins

    Audio, USB, HDMI, I2C,UART

    Timers

    Interrupt controller

    28

    [rasp

    berr

    ypi.o

    rg]

    http://raspberrypi.org

  • PT 15/16Design of Software for Embedded Systems (SWES)

    PROBLEM AREAS

    29

    Hardware

    Software

    Non

    -func

    tiona

    l pro

    pert

    ies

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EMBEDDED SOFTWARE Embedded software interacts with the physical world

    Often written by domain experts, not computer scientists

    Timeliness becomes more important (e.g. deadlines)

    Concurrency becomes more important (e.g. physical events)

    Liveness becomes crucial (e.g. deadlock prevention)

    Heterogeneity becomes default

    In general: Predictable behavior, from nice-to-have to mission-critical

    30

    http://ptolemy.eecs.berkeley.edu/publications/papers/02/embsoft/embsoftwre.pdf

    http://ptolemy.eecs.berkeley.edu/publications/papers/02/embsoft/embsoftwre.pdf

  • PT 15/16Design of Software for Embedded Systems (SWES)

    Controlled Process

    TYPICAL STRUCTURE

    31

    SensorsControllerSoftware

    Clock

    Operator

    Envir

    onm

    ent

    Actuators Display

  • PT 15/16Design of Software for Embedded Systems (SWES)

    STARTING POINT

    32

    Understanding of resources

    Describe resources available to the application (CPU, memory, OS)

    Driven by cost factors and environmental conditions

    Understanding of algorithms

    Which resources will be used in which way

    Relevant resulting performance metrics

    Understanding of workload

    Must consider control and data dependencies

    Driven by environmental conditions

    Describe tasks to be handled + timeliness constraints

  • PT 15/16Design of Software for Embedded Systems (SWES)

    TIMELINESS Embedded systems are often real-time systems

    Hard real-time systems are often embedded systems

    A real-time system is one in which the correctness of the computations not only depends on the logical correctness of the computation, but also on the time at which the result is produced (deadline). If the timing constraints of the system are not met, system failure is said to have occurred.

    Autopilot in airplane vs. YouTube video player

    Position calculation vs. 30 images / s

    Do all tasks have to be executed before their deadline ?

    How to deal with missed deadlines ?

    When is the result produced ?

    33

  • PT 15/16Design of Software for Embedded Systems (SWES)

    REAL-TIME Hard real-time: Missing a deadline is not acceptable

    Aircraft control systems

    Nuclear power / chemical plant safety mechanisms

    Medical devices

    Soft real-time: Missing a deadline is undesirable

    Multimedia

    Airline reservation

    High-speed trading applications

    Real-time objectives may change during operation

    Example: Grounded airplane vs. flying airplane

    34

  • PT 15/16Design of Software for Embedded Systems (SWES)

    TASK / VALUE FUNCTIONS

    35

    Value

    deadline

    Value

    deadline

    Value

    deadline

    Value

    deadline

    Value

    deadline

    Value

    deadline

    Value

    deadline

    Value

    deadline

    Value

    deadline

    Deadline missed

    Hard real-time: Task result has no more value

    Soft real-time: Task result has reduced value

  • PT 15/16Design of Software for Embedded Systems (SWES)

    HARD REAL-TIME

    36

    ReleaseTime

    SchedulingTime

    Completiontime

    AbsoluteDeadline

    Execution Time

    Relative Deadline

    Zeitliche Parameter (Timing constraints) eines Jobs.

    t0

    Response Time

  • PT 15/16Design of Software for Embedded Systems (SWES)

    SOFT REAL-TIME

    37

    ReleaseTime

    SchedulingTime

    Completiontime

    t0 AbsoluteDeadline

    Tardiness

    Relative Deadline

    Execution Time

    Response Time

  • PT 15/16Design of Software for Embedded Systems (SWES)

    REAL-TIME TASKS Periodic tasks

    Examples: Sensor data acquisition, action planning, system monitoring

    Must be regularly activated (once per period)

    Aperiodic tasks

    Example: Background services, logging, operator requests

    Triggered by well-known event at any time

    Sporadic tasks

    Example: Collision detection in a roboter, I/O device interrupt

    Aperiodic task with minimum inter-arrival time (rate restriction)

    38

  • PT 15/16Design of Software for Embedded Systems (SWES)

    REAL-TIME SCHEDULING Scheduling: Define order of task execution

    Mature theory for real-time schedules on uniprocessors since 1970s

    Theory for real-time multiprocessor schedules still under research

    On small embedded systems (micro-controller scale)

    Only one / a few tasks

    Manual scheduling by developer good enough

    On larger embedded systems

    Real-time operating system

    Implements appropriate scheduling concepts

    Supports prioritization and synchronization of concurrent tasks

    39

  • PT 15/16Design of Software for Embedded Systems (SWES)

    REAL-TIME SCHEDULING

    40

    Real-Time Scheduling

    SoftHard

    Dynamic Static

    Preemptive Non-Preemptive Preemptive Non-Preemptive

  • PT 15/16Design of Software for Embedded Systems (SWES)

    REAL-TIME SCHEDULING

    Manual scheduling

    Simple round-robin implementation, based on polling

    Device C needs periodic attention, A and C are purely event-driven

    42

    8

    Embedded Operating Systems

    HPI

    Embedded Operating Systems

    HPI

    Device A(rain sensor)

    Device B(ABS)

    Device C(speed display)

  • PT 15/16Design of Software for Embedded Systems (SWES)

    REAL-TIME SCHEDULING

    Manual scheduling with round robin with interrupts

    43

    8

    Embedded Operating Systems

    HPI

    Embedded Operating Systems

    HPI

    9

    Embedded Operating Systems

    HPI

    void Task2(){ while(true){ // wait for signal Y // handle device B }

    }

    Embedded Operating Systems

    HPI

    high priority

    low priority

    Round Robin Round Robin with Interrupts

    RTOS

    all code

    device A ISR

    device B ISR

    all other code

    device A ISR

    device B ISR

    Task 1

    Task 2

    With support from real-time operating system

  • PT 15/16Design of Software for Embedded Systems (SWES)

    REAL-TIME SCHEDULING

    44

    Real-Time Operating System (RTOS) features

    Real-time scheduling with priorities

    Support for concurrency, preemption and prioritization

    Predictable timing behavior of interrupt routines and system calls9

    Embedded Operating Systems

    HPI

    void Task2(){ while(true){ // wait for signal Y // handle device B }

    }

    Embedded Operating Systems

    HPI

    high priority

    low priority

    Round Robin Round Robin with Interrupts

    RTOS

    all code

    device A ISR

    device B ISR

    all other code

    device A ISR

    device B ISR

    Task 1

    Task 2

  • PT 15/16Design of Software for Embedded Systems (SWES)

    PROBLEM AREAS

    45

    Hardware

    Software

    Non

    -fun

    ctio

    nal p

    rope

    rtie

    s

  • PT 15/16Design of Software for Embedded Systems (SWES)

    DEPENDABILITY Umbrella term for operational requirements on a system

    Laprie: Trustworthiness of a computer system such that reliance can be placed on the service it delivers to the user

    Adds a third dimension to system quality

    General question: How to deal with unexpected events ?

    46

  • PT 15/16Design of Software for Embedded Systems (SWES)

    DEPENDABILITY IN EMBEDDED Critical application domains always considered dependability

    Aviation industry, power industry, military equipment, But all embedded systems have actuators, people count on them

    Dangerous real-world interactions may be less explicit Examples: Heating devices, power / water supply devices

    Today more domain experts than software engineering experts New challenging through increasingly interconnected devices

    Internet of Things (IoT)

    47

  • PT 15/16Design of Software for Embedded Systems (SWES)

    DEPENDABILITY TREE [LAPRIE]

    48

  • PT 15/16Design of Software for Embedded Systems (SWES)

    THREATS System failure - ,Ausfall

    Event that occurs when the service no longer complies with the specification / deviates from the correct service.

    System error - ,Fehler(zustand)

    Part of system state that can lead to subsequent failure

    Some sources define errors as active faults - not in this course ...

    System fault - ,Fehler(ursache)

    Adjudged or hypothesized cause of an error Failure occurs when error state alters the provided service Systems are build from connected components, which are again systems Fault is the consequence of a failure of some other system to deliver its service

    49

    Fault Error

    Failure

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CONSEQUENCES [KNIGHT] Human injury or loss of life Damage to the environment Damage to or loss of equipment Damage to or loss of data Financial loss by theft Financial loss through production of useless or defective products Financial loss through reduced capacity for production or service Loss of business reputation, customer base, or jobs

    50

  • PT 15/16Design of Software for Embedded Systems (SWES)

    FAULT MODEL Faults can be classified into categories on different abstraction levels

    Physics

    Circuit level / switching circuit level

    Interesting for hardware design research (not this course)

    Investigate logical signals on connections

    stuck-at-zero, stuck-at-one, bridging faults, stuck-open

    Register transfer level

    Processor-memory-switch (PMS) level

    Hardware system level

    ... (Software) ...

    51

  • PT 15/16Design of Software for Embedded Systems (SWES)

    FAILURE TYPES Duration of the failure

    Permanent failures - no possibility for repairing or replacement

    Recoverable failures - back in operation after the system recovered from error state

    Transient failures - short duration, no major recovery action

    Effect of the failure

    Functional failures - system does not operate according to its specification

    Performance failures - performance or SLA specifications not met

    Scope of the failure

    Partial failure - only parts of the system become unavailable

    Total failure - all services go down

    52

  • PT 15/16Design of Software for Embedded Systems (SWES)

    FAILURE SEVERITY Denotes consequences of failure

    Benign failures (,unkritische Ausflle)

    Failure costs and operational benefits are similar

    Sometimes also umbrella term for failures only detected by inspection

    A system with only such failures is fail-safe

    Catastrophic failures (,kritische Ausflle)

    Costs of failure consequences are much larger than service benefit

    Significant / serious failures - Intermediate steps expressing reduced service

    Grading of failure consequences on overall system depends on application Flying airplane - Catastrophic stopping failure, Train - Benign stopping failure

    Criticality - Highest severity of possible failure modes in the system

    53

  • PT 15/16Design of Software for Embedded Systems (SWES)

    ATTRIBUTES Reliability - Function R(t)

    Probability that a system is functioning properly and constantly over time

    Assumes that system was fully operational at t=0

    Denotes failure-free interval of operation

    Availability - Statement if a system is operational at a point in time / fraction of time

    Describe system behavior in presence of error treatment mechanisms

    Steady-state availability - Probability that a system will be operational at any random point of time,

    Fraction of time a system is operational during its expected lifetime: As = Uptime / Lifetime

    54

  • PT 15/16Design of Software for Embedded Systems (SWES)

    SAFETY Different levels of critical participation for a computer system

    Information provisioning to human controller on request

    Interpretation of data and presentation to the user

    Issues command on behalf of the human controller

    Replaces human controller

    Trend to realize critical systems with commercial-of-the-shelf components

    Driven by budget cuts and performance advantage

    Puts sole responsibility on software layer, in contrast to early hardware-only redundancy approaches

    55

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE: DO-178D Software Considerations in Airborne Systems and Equipment Certification

    Mature document, developed for more than 20 years

    Definition of severity of failure for airplane, crew, and passengers

    Catastrophic - Loss of ability to continue safe flight and landing

    Major - Reduced airplane or crew capability to cope with operating conditions

    Reduction in safety margins and functional capabilities

    Higher workload or physical distress for the crew

    Minor - Not significantly reduced airplane safety, slight increase in workload (Example: Change of flight plan)

    No effect - Failure results in no loss of operational capabilities and no increase in crew workload

    56

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE: DO-178D

    57

  • PT 15/16Design of Software for Embedded Systems (SWES)

    SAFETY VS. SECURITY

    Different technical foundations, e.g. for recovery from errors Embedded system development may need to consider both aspects

    58

    Safety Security

    Assumes trustworthy operators Assumes fault-free system

    Assumes closed system Assumes open, connected system

    Existing standards(DO-178C, ISO26262, )

    Existing standards(ISO 27002, Common Criteria, )

  • PT 15/16Design of Software for Embedded Systems (SWES)

    PROBLEMS AREAS

    59

    Hardware

    Software

    Non

    -func

    tiona

    l pro

    pert

    ies

    Microprocessor CISC vs. RISC Microcontroller SoC ASIC vs. PLC ARM

    Real-Time Code-driven Model-driven Cross-Compile Control loops

    Dependability Safety Security Reliability Availability

  • CONTROL THEORYDESIGN OF SOFTWARE FOR EMBEDDED SYSTEMS (SWES)

    Dr. Peter TrgerOperating Systems Group, TU Chemnitz

  • PT 15/16Design of Software for Embedded Systems (SWES)

    Controlled Process

    EMBEDDED SYSTEM

    61

    SensorsController Software

    Clock

    Operator

    Envir

    onm

    ent

    Actuators Display

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CONTROL THEORY Create abstract models for a controlled process

    Typical challenge in connected embedded systems

    Focus on static and dynamic behavior

    Results in the behavioral design of a controller

    Abstraction from specific implementation details (e.g. car speed control) creates a dedicated mathematical problem

    How to consider measured input to control some regulation output

    Mathematical principles as glue between engineering disciplines

    Everybody has some kind of control problem

    Example: Control unit (Steuergert) in automotive systems

    62

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CONTROL THEORY Open loop / non-feedback control (Steuerung)

    Controller activity based on current state Output of the controlled system is not observed External deviations must be considered at design-time Example: Power supply for electric motor with constant load

    63

    Example: Branch point (Fig. 6)

    A branch point is represented by a point. Here, a line of action splits up intotwo or more lines of action. The signal transmitted remains unchanged.

    Example: Signal flow diagram of open loop and closed loop control

    The block diagram symbols described above help illustrate the differencebetween open loop and closed loop control processes clearly.

    In the open action flow of open loop control (Fig. 7), the operator positionsthe remote adjuster only with regard to the reference variable w. Adjustmentis carried out according to an assignment specification (e.g. a table: set pointw1 = remote adjuster position v1; w2 = v2; etc.) determined earlier.

    14

    Fundamentals Terminology and Symbols in Control Engineering

    SAM

    SON

    AG

    V74

    /DK

    E

    x1

    x2x1 = x2 = x3

    x3

    Fig. 6: Branch point

    xw

    Fig. 7: Block diagram of manual open loop control

    manremoteadjuster system

    controlvalve

    signal flow diagramof open loop control

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CONTROL THEORY Closed loop / feedback control (Regelung)

    Feedback from system output used to adjust controller operation

    Error between output and reference used to adopt the operation

    System can react on external disturbances Instability can happen

    64

    In the closed action flow of closed loop control (Fig. 8), the controlled varia-ble x is measured and fed back to the controller, in this case man. The con-troller determines whether this variable assumes the desired value of thereference variable w. When x and w differ from each other, the remote ad-juster is being adjusted until both variables are equal.

    Device-related representation

    Using the symbols and terminology defined above, Fig. 9 shows the typicalaction diagram of a closed loop control system (abbreviations see page 10).

    15

    Part 1 L101 ENSA

    MSO

    NA

    G0

    0/03

    xw +_

    Fig. 8: Block diagram of manual closed loop control

    man

    remoteadjuster

    controlvalve

    system

    z

    ew +

    yr y x

    r

    Fig. 9: Block diagram of a control loop

    controllingelement

    measuringequipment

    controller

    finalcontrolelement

    system

    actuator

    signal flow diagramof closed loop control

    elements and signalsof a control loop

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CLOSED LOOP CONTROL

    65

    In the closed action flow of closed loop control (Fig. 8), the controlled varia-ble x is measured and fed back to the controller, in this case man. The con-troller determines whether this variable assumes the desired value of thereference variable w. When x and w differ from each other, the remote ad-juster is being adjusted until both variables are equal.

    Device-related representation

    Using the symbols and terminology defined above, Fig. 9 shows the typicalaction diagram of a closed loop control system (abbreviations see page 10).

    15

    Part 1 L101 EN

    SAM

    SON

    AG

    00/

    03

    xw +_

    Fig. 8: Block diagram of manual closed loop control

    man

    remoteadjuster

    controlvalve

    system

    z

    ew +

    yr y x

    r

    Fig. 9: Block diagram of a control loop

    controllingelement

    measuringequipment

    controller

    finalcontrolelement

    system

    actuator

    signal flow diagramof closed loop control

    elements and signalsof a control loop

    Regulatory control: Manage with respect to a reference value (w)

    Disturbance rejection: Eliminate effect of a disturbance (z)

    Optimization: Achieve the best value of the outputs (x) [Sam

    son

    AG]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    Sensor

    Controller

    System

    CLOSED LOOP CONTROL

    66

    Disturbance (d)

    Controlled Variable (y)

    Measured Output (yM)

    Actuator

    Actuating Variable (uS)

    Controller Output (u)

    Envir

    onm

    ent

    Error / Control deviation:

    e=w-yM

    Reference / Set Point (w)

    Symbols differ in German DIN notation and English notations!

  • PT 15/16Design of Software for Embedded Systems (SWES)

    Sensor

    Controller

    System

    DIGITAL CONTROLLER

    67

    Disturbance (d)

    Controlled Variable (y)

    Measured Output (yM)

    Actuator

    Actuating Variable (uS)

    Controller Output (u)

    Envir

    onm

    ent

    Error / Control deviation:

    e=w-yM

    Reference / Set Point (w)

    A/D

    D/A

    Symbols differ in German DIN notation and English notations!

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CLOSED LOOP CONTROL Set point given by user, or higher-level system, or both

    Examples

    Biology: Upright walk, body temperature, eye adaption on light

    Home devices: Heating based on internal temperature sensor, fridges

    Industry: ABS in cars, power grid control, servo systems

    Time dependency of set point

    Constant set point: Fixed set point control

    Example: Boiler temperature control

    Varying set point: Follow-up control

    Example: Weather-compensated temperature control

    68

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE

    69

    18

    1.6 Application examples 1.6.1 Heating control In the following examples from the domain of heating, closed-loop and open-loop control will again be compared and the differences indicated.

    1.6.1.1 Room temperature control

    Fig. 1-16 shows a simple room temperature control system in which, unlike the system shown in Fig. 1-5, controller 1 acts on a mixing valve (3). The room temperature is measured by temperature sensor 2 and passed to the controller as the controlled variable x. The controller compares the reference variable with the controlled variable and, in case of a control difference, the valve is further opened or closed depending on polarity until the controlled variable and the reference variable are equal again. The closed control loop is clearly identifiable, as the corresponding block diagram also shows.

    Fig. 1-16 Room temperature control

    1 Temperature controller 2 Temperature sensor 3 Mixing valve 4 Circulation pump 5 Radiator 6 Boiler 7 Controlled system 8 Controlling equipment

    w x

    T1

    2T

    5

    y

    3 4

    6

    w

    x

    8

    7y

    z B31-12

    . 1 Temperature controller

    . 2 Temperature sensor

    . 3 Mixing valve

    . 4 Circulation pump

    . 5 Radiator

    . 6 Boiler

    Closed loop clearly identifiable

    Valve is opened and closed tobring controlled variable andreference variable together

    [Siemens]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    EXAMPLE 1 - Outside temperature sensor

    2 - Heating curve setting

    3 - Supply temperature sensor

    4 -Supply temperature controller 5 -Control valve (actuator + control element) w - Supply temperature setpoint

    (open-loop control variable 1)

    x1 - Supply temperature actual value(closed-loop controlled variable)

    x2 - Room temperature actual value (open-loop control variable 2)

    z1 - Interference variable 1(external heat gain)

    z2 -Interference variable 2 (fluctuating boiler water temperature) y - Manipulated variable

    70

    20

    Fig. 1-17 Weather-compensated supply temperature control

    1 Outside temperature sensor 2 Heating curve setting 3 Supply temperature sensor 4 Supply temperature controller 5 Control valve (actuator + control element) a Open-loop control equipment 1 b Closed-loop control equipment (supply) c Closed-loop controlled system (supply) b+c Open-loop control equipment 2 (room) d Open-loop controlled system 2 (room) A Open control loop 1 B Closed-loop control C Open control loop 2 w Supply temperature setpoint (open-loop control variable 1) x1 Supply temperature actual value (closed-loop controlled variable) x2 Room temperature actual value (open-loop control variable 2) y Manipulated variable z1 Interference variable 1 (external heat gain) z2 Interference variable 2 (fluctuating boiler water temperature)

    z1

    x2

    1

    y 4

    2

    3

    5

    z2

    x1

    a b

    d c

    w

    x2

    z1 z2

    B31-13

    w

    x

    y

    1x2

    A B C

    [Siemens]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    VARIATIONS Disturbance feed-forward control

    Disturbance is directly used by controller, allows faster reaction

    Disturbance must be locatable and measurable

    Cascade control

    One controller feeding another one

    Robust control, adaptive control

    Modification of controller through self-feedback

    Example: Flying missile with decreasing fuel mass

    71

  • PT 15/16Design of Software for Embedded Systems (SWES)

    STABILITY Control loop is an oscillatory system

    Controlled and manipulated variable influence each other

    System therefore may escalate into instability

    Bounded input / bounded output (BIBO) stability

    Output signal should not grow indefinitely when the input is limited

    Mandatory condition for every serious control system

    72

    81

    For a given controlled system, therefore, the loop gain VO is decisive for the control quality. Since the transfer coefficient KS of the system can be considered as given, the necessary loop gain VO is set simply by adjusting the transfer coefficient KR of the P-controller.

    4.2 Stability investigations As already known, the degree of difficulty S of the controlled system and the loop gain VO are decisive for the oscillatory characteristics of a control loop.

    In stability investigations, a distinction is made between the response to interference and the response to setpoint changes:

    The response to interference of a control loop is obtained by investigating the reaction of the controlled variable x to a sudden interference or interference variable change.

    The response to setpoint changes of the control loop describes the reaction of the controlled variable x to a setpoint step w.

    4.2.1 Response to interference If, without external intervention, the controlled variable in the control loop fails to assume a constant value even after an infinite period of time since the occurrence of the last interference (sustained oscillation), the term self-excitation is used, and the control loop is said to be unstable. This state must be avoided at all costs by correct adjustment of the controller.

    In unstable control loops two different types of oscillation can be distinguished periodically undamped oscillation and periodically excited oscillation:

    In the case of periodically undamped oscillation, the amplitude and frequency of the sustained oscillation occurring after occurrence of the interference z are constant (Fig. 4-3). The control element must not travel to either the upper or lower limit position. The time required for one full oscillation is referred to as the period of oscillation TP. The loop gain that gives rise to undamped oscillation in the control loop is referred to as the critical loop gain Vokrit. The proportional band Xp and the transfer coefficient KR KP of the P-controller that produce this undamped oscillation are referred to as Xp krit. and KR KP krit. respectively.

    TPx

    t

    z

    Fig. 4-3 Undamped oscillation

    Tp Period of oscillation z Interference

    82

    Periodically excited oscillation is characterised by a continuously increasing amplitude of the sustained oscillation that occurs (Fig. 4-4). It occurs if the loop gain VO of the control loop is set higher than its critical value.

    x

    z

    t Fig. 4-4 Excited oscillation

    z Interference

    In practice, the amplitude of oscillation continues to increase as described until it is limited by the end stops, e.g. valve fully open or valve closed.

    In a stable control loop, oscillations of the controlled variable also occur after interference, but their amplitude decreases over time until they disappear completely. This is referred to as damped oscillation. A steady state, i.e. rest, is achieved (Fig. 4-5).

    z

    x

    t Fig. 4-5 Damped oscillation

    z Interference

    A steady state, and therefore rest, occurs if the loop gain VO of the control loop is set lower than its critical value:

    In order to achieve sufficient damping of a control process, a simple, generally applied rule of thumb recommends that the loop gain VO should be set to half of the critical loop gain.

    In higher order controlled systems and in systems with dead time the loop gain VO should not be too high, otherwise the control process will exhibit poor damping or can even become unstable.

    On the other hand, too low a loop gain makes the control loop sluggish and imprecise.

    In many cases, fast correction is desirable. Therefore, a certain amount of overshoot is accepted. So there is always a trade-off between speed and overshoot.

    Undamped oscillation Damped oscillation

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CONTROL QUALITY Places of disturbance may vary

    Influence on measured output, system input or system output Control deviation should be minimized over time

    Especially relevant for real-time systems

    73

    11/10/13Dirk Mller: Design of SW for embedded Sys., Winter term 2013/14

    14/61

    Relationship to RT (2/2)

    t

    r

    Latency or settling time (e.g. until deviation below 3%)

    y

    e(t3): here overshoot

    (as maximum)

    t3

    t 1

    t 2

    r (t) y (t)dt

    t1 t2 Error e and integral give inspiration for first (simple)

    control path and controller types=> P controller and I controller

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CONTROLLER How to create a reasonable controller ?

    Desired value of controlled variable given by set point

    Compute new value of a control / actuating variable to correct the error between measured variable and set point

    Often, controlled variable is physical, while measured variable is the representation of it

    Create a control path from basic elements Proportional (P) element

    Integral (I) element

    Derivative (D) element

    74

    [Wiik

    iped

    ia]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    ELEMENTS Proportional (P) element

    Perform immediate proportional reaction to error at output

    Adjusted by gain factor kP Integral (I) element

    Accumulate past errors and react on them

    Adjusted by gain factor kI Derivative (D) element

    Based on current rate of change of the error, predict the future

    Adjusted by gain factor kD

    75

  • PT 15/16Design of Software for Embedded Systems (SWES)

    PROPORTIONAL ELEMENT Output is proportional

    to the current error

    Gain factor too low:Reaction not good enough to fix the error

    Gain factor too high:Reaction to error is too extreme (stability)

    Only instantaneous reaction, therefore steady-state error

    76

  • PT 15/16Design of Software for Embedded Systems (SWES)

    P CONTROLLER Example: Mechanical water level

    control systems

    Adjustable inflow with valve 1

    Variable outflow with valve 2

    Float sensor 3

    Gate valve as control element

    Controlled variable is water level x

    Output variable y is position of gate valve

    Keep water level constant, regardless of water drawing

    Desired water level (set point) defined by lever attachment height h

    77

    49

    3.3 The P, PI, PID response characteristic 3.3.1 The proportional-action controller (P-controller) 3.3.1.1 Operating principle

    The operating principle of a P-controller can be explained most simply using the example of a mechanical water level control system as per Fig. 3.5. The illustration shows an open water tank with adjustable inflow (gate valve 1) and variable outflow (gate valve 2). The control system consists of float 3 (sensor), lever a + b (comparator and amplifier) and gate valve 1 (control element). The controller's input variable, controlled variable x, is the water level measured by the float. The output variable, manipulated variable y, is the position of gate valve 1 in the inlet pipe. The variable water outlet (depending on the position of gate valve 2) represents the load Q on the system. The control task is to keep the water level in the tank as constant as possible in spite of varying load (drawing of water). The desired water level (setpoint w) is set by the attachment height h of the lever.

    Fig. 3-5 Model of a P-controller

    1 Gate valve in inlet 2 Gate valve in outlet 2 Float (sensor) 4,5 Float attachment points V1 Inlet volume V2 Outlet volume a+b Lever h Attachment height of the lever w Reference variable x Controlled variable (water level) Xp Proportional band Yh Positioning range

    V2

    V1

    h

    4 5

    a b1

    Yh

    Xp

    3

    x230 cm

    200

    170

    w

    2

    B33-4

    [Siemens]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    INTEGRAL ELEMENT

    Output is proportional to past error behavior

    Delayed reaction to accumulated errors

    Can fix steady-state error resulting from proportional reaction

    May produce output that exceeds the target(overshoot)

    78

  • PT 15/16Design of Software for Embedded Systems (SWES)

    I CONTROLLER Integral-action controller

    Output variable formed from sum of consecutive input variables over time

    Example: Tank with inlet and outlet

    Flow rate at inlet as input variable

    Level at output as output variable

    With constant flow rate, level remains constant

    With increased incoming flow, output flow is the same

    With input greater than discharge rate, level will raise

    Proportional reaction no longer suitable

    Needs integral reaction

    79

    [Siemens]

    55

    3.3.2 The integral-action controller (I-controller) 3.3.2.1 General Example 1

    Integrate, in this context has the sense of combining or adding. In control loop elements with integral action, the output variable is formed from the sum of consecutive input

    variables over a period of time.

    This can be demonstrated with a simple example

    Fig. 3-10 Container as level controller, Example of a control loop with integral action response

    The controlled system in the example is used to control level, represented by a tank

    with an inlet and an outlet. The input variable is the flow rate at the inlet, and the output

    variable is the level (not the flow rate) at the output. If we assume that the flow rate at

    the inlet is equal to theat at the outlet, then the level will remain constant. To record the

    step rsponse, we need mentally to increase the flow by a sudden large amount. For

    example, the inlet valve could be opended manually, so that now, the flow rate at the

    inlet is 300l/h instead of 200l/h. The discharge rate will remain unchanged. The output

    variable, i.e. the level, will increase continuously until the tank overflows.

    We can now no longer maintain that there is a given output variable for every input

    variable, since in our example, for any input variable which is greater than the

    discharge rate, the level will rise until it overflows. This type of response is defined as

    integral action. The contents of the tank are given by the sum of the liquid flowing into

    the tank minus the quantity discharged. Only the length of the time taken to fill the tank

    will be affected by the input variable. In other words, it is not the output variable itself,

    but the rate of change of the outut variable, which depends on the input variable. This is

    expressed by the formula:

    va = KI . xe

    KI is the so called integral control action constand and in this example u.a. is

    dependent upon the container.

    For an integral action controller the speed of the output variable is dependent upon the

    input variable. For a step change in the input variable then the output variable changes

    consecutively.

    N.B.

    S0169

    xe2

    t

    xa

    xe

    xe1

    xa1

    xa2

    xa

    xe

    berlauf

    t

    200 l/h

    200 l/h

    200 l/h

    300 l/h

    55

    3.3.2 The integral-action controller (I-controller) 3.3.2.1 General Example 1

    Integrate, in this context has the sense of combining or adding. In control loop elements with integral action, the output variable is formed from the sum of consecutive input

    variables over a period of time.

    This can be demonstrated with a simple example

    Fig. 3-10 Container as level controller, Example of a control loop with integral action response

    The controlled system in the example is used to control level, represented by a tank

    with an inlet and an outlet. The input variable is the flow rate at the inlet, and the output

    variable is the level (not the flow rate) at the output. If we assume that the flow rate at

    the inlet is equal to theat at the outlet, then the level will remain constant. To record the

    step rsponse, we need mentally to increase the flow by a sudden large amount. For

    example, the inlet valve could be opended manually, so that now, the flow rate at the

    inlet is 300l/h instead of 200l/h. The discharge rate will remain unchanged. The output

    variable, i.e. the level, will increase continuously until the tank overflows.

    We can now no longer maintain that there is a given output variable for every input

    variable, since in our example, for any input variable which is greater than the

    discharge rate, the level will rise until it overflows. This type of response is defined as

    integral action. The contents of the tank are given by the sum of the liquid flowing into

    the tank minus the quantity discharged. Only the length of the time taken to fill the tank

    will be affected by the input variable. In other words, it is not the output variable itself,

    but the rate of change of the outut variable, which depends on the input variable. This is

    expressed by the formula:

    va = KI . xe

    KI is the so called integral control action constand and in this example u.a. is

    dependent upon the container.

    For an integral action controller the speed of the output variable is dependent upon the

    input variable. For a step change in the input variable then the output variable changes

    consecutively.

    N.B.

    S0169

    xe2

    t

    xa

    xe

    xe1

    xa1

    xa2

    xa

    xe

    berlauf

    t

    200 l/h

    200 l/h

    200 l/h

    300 l/h

  • PT 15/16Design of Software for Embedded Systems (SWES)

    CONTROLLERS P controllers are load-dependent

    Controlled variable cannot be kept constant at all loads Output variable is proportional to the input variable Quick reaction Residual derivation: Steady-state deviation

    I controllers are load-independent Control action builds up slowly, therefore time-dependent Manipulated variable changes as long as deviation is given

    80

  • PT 15/16Design of Software for Embedded Systems (SWES)

    Combine best of both worlds: PI controller

    Remove steady-state error, get medium speed of reaction

    Fast P controller + load-independent I controller

    Can be implemented in different ways Mechanical / hydraulic /

    electrical / electronic solution

    PI CONTROLLER

    81

    59

    3.3.3 The proportional-plus-integral controller (PI-controller)

    3.3.3.1 Operating principle and step response

    A PI-controller can be imagined as a P-controller and an I-controller connected in

    parallel (Fig. 3-15). This combines the advantages of the P-controller (fast) with those

    of the I-controller (load-independent).

    Fig. 3-15 Combination of P-controller and I-controller to a PI-controller

    Therefore, the step response of a PI-controller (Fig. 3-16) is the sum of the step

    responses of a P-controller and an I-controller, i.e. it consists of a proportional

    component (P-component) with a superimposed integral-action component (I-

    component).

    As in the P-controller, the P-component initially gives rise to an adjustment yP of the manipulated variable y that is proportional to the control difference e:

    yP = eP

    K

    However, due to the I-component, the valve does not remain in that position but

    continues to travel at a positioning speed vy that is dependent on the integral-action

    coefficient Kl of the I-controller and proportional to the control difference e until it is

    limited by the end stops, e.g. valve stroke = 0...20 mm.

    vy = eI

    K

    Therefore, after a certain time (t0t1), the manipulated variable change yPI is made up of the sum of the two variables:

    ( ) ( )tI

    xI

    KeP

    KI

    yP

    yPI

    y =+=

    Fig. 3-16 Step response of the PI-controller

    yp P-component yI I-component yPI P-component and I-component

    e

    t

    t

    y

    PI

    I

    P yP I

    y I

    yP

    0

    t0

    t1 B33-14

    e y

    P

    I

    PI

    +

    +

    59

    3.3.3 The proportional-plus-integral controller (PI-controller)

    3.3.3.1 Operating principle and step response

    A PI-controller can be imagined as a P-controller and an I-controller connected in

    parallel (Fig. 3-15). This combines the advantages of the P-controller (fast) with those

    of the I-controller (load-independent).

    Fig. 3-15 Combination of P-controller and I-controller to a PI-controller

    Therefore, the step response of a PI-controller (Fig. 3-16) is the sum of the step

    responses of a P-controller and an I-controller, i.e. it consists of a proportional

    component (P-component) with a superimposed integral-action component (I-

    component).

    As in the P-controller, the P-component initially gives rise to an adjustment yP of the manipulated variable y that is proportional to the control difference e:

    yP = eP

    K

    However, due to the I-component, the valve does not remain in that position but

    continues to travel at a positioning speed vy that is dependent on the integral-action

    coefficient Kl of the I-controller and proportional to the control difference e until it is

    limited by the end stops, e.g. valve stroke = 0...20 mm.

    vy = eI

    K

    Therefore, after a certain time (t0t1), the manipulated variable change yPI is made up of the sum of the two variables:

    ( ) ( )tI

    xI

    KeP

    KI

    yP

    yPI

    y =+=

    Fig. 3-16 Step response of the PI-controller

    yp P-component yI I-component yPI P-component and I-component

    e

    t

    t

    y

    PI

    I

    P yP I

    y I

    yP

    0

    t0

    t1 B33-14

    e y

    P

    I

    PI

    +

    +

    [Siem

    ens]

  • PT 15/16Design of Software for Embedded Systems (SWES)

    DERIVATIVE ELEMENT Compute derivative

    (slope of change) of the error

    Again adjusted by gain factor

    Initially, the error changes dramatically, so D-element compensates directly

    Afterwards, influence reduces and P+I parts are taking over

    82

  • PT14/15Design of Software for Embedded Systems (SWES)

    PID CONTROLLER

    Initial charge by D

    Reduction almost to P level

    Rises again from I influence

    83

    [Siemens]

    68

    3.3.6 The proportional-plus-integral-plus-derivative controller (PID-controller)

    3.3.6.1 Operating principle and step response

    A PID-controller can be imagined as a proportional-action controller (P-controller), an integral-action controller (I-controller) and a derivative-action element (D-element) connected in parallel (Fig. 3-25a). The controller's output signal (manipulated variable change) is generated not only from the magnitude of the control difference e but, due to the D-element, also its rate of change. As already known, with a D-component, the magnitude of the manipulated variable change is proportional to the rate of change of the controlled variable or control difference.

    Fig. 3-25 PID-controller a) Model b) Step response P P-component I I-component D D-component

    The step response of the PID-controller (Fig. 3-25b) consists of the additive superimposition of the P-component, I-component and D-component. The illustration shows that an initial large change of the manipulated variable is produced by the D-element. This means that interference will not give rise to too great a control difference. The manipulated variable y is then reduced almost to the level of the P-controller, from where it rises again in a linear fashion under the influence of the I-component. Due to the I-component, the PID controller compensates for setpoint changes and disturbances with no residual deviation and is faster than a PI or P-controller. It is especially suitable for difficult controlled systems.

    e y

    P

    I

    D

    PID

    DI

    Tn

    y

    t

    a)

    b)

    B33-22

    1XP

    = KP

    68

    3.3.6 The proportional-plus-integral-plus-derivative controller (PID-controller)

    3.3.6.1 Operating principle and step response

    A PID-controller can be imagined as a proportional-action controller (P-controller), an integral-action controller (I-controller) and a derivative-action element (D-element) connected in parallel (Fig. 3-25a). The controller's output signal (manipulated variable change) is generated not only from the magnitude of the control difference e but, due to the D-element, also its rate of change. As already known, with a D-component, the magnitude of the manipulated variable change is proportional to the rate of change of the controlled variable or control difference.

    Fig. 3-25 PID-controller a) Model b) Step response P P-component I I-component D D-component

    The step response of the PID-controller (Fig. 3-25b) consists of the additive superimposition of the P-component, I-component and D-component. The illustration shows that an initial large change of the manipulated variable is produced by the D-element. This means that interference will not give rise to too great a control difference. The manipulated variable y is then reduced almost to the level of the P-controller, from where it rises again in a linear fashion under the influence of the I-component. Due to the I-component, the PID controller compensates for setpoint changes and disturbances with no residual deviation and is faster than a PI or P-controller. It is especially suitable for difficult controlled systems.

    e y

    P

    I

    D

    PID

    DI

    Tn

    y

    t

    a)

    b)

    B33-22

    1XP

    = KP

  • PT14/15Design of Software for Embedded Systems (SWES)

    PID CONTROLLER Date back to 1890 governor design and ship steering

    Based on observation of human ship controller

    Compensates based on current error, past error and change rate

    Optimum behavior

    Disturbance rejection - Stay at a given setpoint

    Command tracking - Implement setpoint changes

    Rise time - How fast going close to the final value

    Settling time - How fast settling into some range around the final value

    84

  • PT 15/16Design of Software for Embedded Systems (SWES)

    DIGITAL PID CONTROLLER Digital microcontrollers implement control function

    Easier realization of non-linear behavior and adaptive control

    Reconfiguration of software possible

    Time-discrete, quantized behavior

    A/D and D/A conversion requires sampling

    Danger of instability through phase shift

    Restricted data word length

    Accumulation of rounding errors

    Quantization errors

    Overflow in calculation with wrap-around

    85

    7

    Institut fr Robotik und Prozessinformatik Technische Universitt Braunschweig- 37/64 -

    Einfhrung in die diskrete Signalverarbeitung

    A/D-Wandlung

    D/A-Wandlung

    Institut fr Robotik und Prozessinformatik Technische Universitt Braunschweig- 38/64 -

    Abhngigkeit der Abtastperiode T

    Institut fr Robotik und Prozessinformatik Technische Universitt Braunschweig- 39/64 -

    berblick - Einfhrung in die Regelungstechnik II

    1. Wiederholung

    2. Reglerentwurf fr kontinuierliche Systeme

    3. Beispiel zum Reglerentwurf

    4. Einfhrung in die diskrete Signalverarbeitung

    5. Z-Transformation und digitale Regelung

    6. Beispiel zur digitalen Regelung

    7. Zusammenfassung

    8. Literatur

    Reglerentwurf und diskrete Systeme

    Institut fr Robotik und Prozessinformatik Technische Universitt Braunschweig- 40/64 -

    Z-Transformation

    DA

    diskretkontinuierlich

    Z-Transformation

    Inverse Z-Transformation

    T Abtastperiode

    Institut fr Robotik und Prozessinformatik Technische Universitt Braunschweig- 41/64 -

    Korrespondenz-tabelle zur Z-

    Transformation

    Institut fr Robotik und Prozessinformatik Technische Universitt Braunschweig- 42/64 -

    Z-Transformation

  • PT 15/16Design of Software for Embedded Systems (SWES)

    ADJUSTING THE CONTROLLER Controller adjustment by determining gain factors / coefficients

    Heuristic method by Ziegler / Nichols for P / PI / PID controllers

    Only suitable for stable systems, focus on disturbance compensation

    I-gain and D-gain set to zero, increase P-gain until oscillation

    Table lookup for gain parameters, based on oscillation period

    Empirical method

    Response too slow:-> Increase influence of P component, reduce influence of I component afterwards

    Response oscillates slowly towards goal signal -> Increase influence of P component, reduce influence of D component afterwards

    Overshooting -> Reduce influence of P component, increase influence of I component afterwards

    86

  • Design of Software for Embedded Systems

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    Design of Software for Embedded Systems

    Chair of Operating Systems

    Jafar Akhundov

    Mathematical Theory of Systems

    and Control

    Chapter 3

  • http://osg.informatik.tu-chemnitz.de

    Purpose of this Extended Lecture

    Control system engineering is a complex task What (I hope) you will take away from this lecture: Necessary basics to:

    Be able to understand simple systems Read further literature (if necessary) Communicate with engineers Build better systems

    Motivation to use math and modelling more frequently Appreciate another view on systems

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    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    Contents1.Control System Design Process 2.Math Background

    1.Complex Variables 2.Differential Equations 3.Laplace Transform

    3.Modeling in Frequency Domain 1.Transfer Functions 2.Use case: translational mechanical systems 3.Block Diagram Composition

    4. Time Response Analysis 1. Poles and Zeros of Transfer Function 2.1st-order Systems 3.2nd-order Systems

    5. System Stability Analysis 6. PID-control Tuning

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    1.1 Control System Definition (refreshment)

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    Definition: A control system consists of subsystems and processes (or plants) assembled for the purpose of obtaining a desired output with desired performance, given a specified input.

    Two major goals of performance: Transient response Steady-State Error

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • Input Command

    2

    1

    http://osg.informatik.tu-chemnitz.de

    Example: Elevator

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    t

    h

    Elevator Response

    Steady-state error

    Transient Response

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    1.2 Open-Loop vs. Closed-Loop (refreshment)

    Open-Loop Stable No feedback Not precise Cannot compensate disturbances Simple Cheap

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    Closed-Loop Can become unstable Has a feedback loop Precise Compensates disturbances Complex Expensive

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    1.3 Objectives of Analysis and Design Three major goals: Producing the desired transient response Reducing steady-state error Achieving Stability

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    Definition: Control system is stable if its natural response a) eventually approaches zero or b) oscillates. If the natural response of the system grows without bound and becomes much greater than forced response, the system is considered unstable.

    Other goals:

    Finances Robust design

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    Control System Design Process: Overview

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    Determine a physical

    system and specifications

    from the requirements.

    Draw a functional

    block diagram.

    Transform the physical system

    into a schematic.

    If multiple blocks, reduce the block

    diagram to a single block or

    closed-loop system.

    Analyze, design, and test to see

    that requirements and

    specifications are met.

    Use the schematic to obtain a

    block diagram, signal-flow diagram,

    or state-space representation.

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    Control System Design Process: Stages

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    1.Transform requirements into a physical system 1.Determine physical dimensions, e.g. position, mass 2.Using the requirements, define specifications for the design, e.g. transient response, steady-state accuracy

    2.Functional block diagram 1.Translate qualitative description into functional subsystems 2.Define interconnections between subsystems

    3.Create schematic 1.Make approximations of the system 2.Make assumptions about subsystems 3.Simplify, but not oversimplify 4.Instantiate the modules from functional block diagram

    Controller

    Engine Air Intake

    User Input

    Velocity of a car

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

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    Control System Design Process: Stages (2)

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    4.Develop a mathematical model (block diagram) 1.From schematic and physical laws (Kirchhoff, Newton's) 2.Many systems can be described by a linear ODE which relates input with the output

    3.Assumptions and approximations may simplify this ODE 4.Often other representations are used instead:

    1.For linear, time-invariant (LTI) systems, Laplace transform derives a transfer function 2.Alternatively, one can-use state-space representation (possible for non-LTI systems)

    5.Reduce Block Diagram 1.Single block 2.Only system input and output present

    andnc(t)

    dtn+ an1

    dn1c(t)

    dtn1+ a0c(t) = bm

    dmr(t)

    dtm+ bm1

    dm1r(t)

    dtm1+ b0r(t)

    Input Output

    r(t) c(t)System

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    Control System Design Process: Stages (3)

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    6.Analyze and Design 1.Mostly testing and verification 2.Redesign if necessary 3.Test signals commonly used:

    Input Function Use

    Impulse Transient response

    Step Transient response Steady-state errorRamp Steady-state error

    Parabola Steady-state error

    Sinusoid Transient response Steady-state error

    (t)

    u(t)

    u(t)t1

    2u(t)t2

    sin!t

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.1. Complex Numbers (refreshment) Complex numbers were introduced to solve equations like:

    A complex number written in rectangular form:

    j is called the imaginary unit. Alternatively,

    R is the magnitude and is the phase of

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    z = x+ jy, j =p1

    x

    2 = 1

    x = R cos

    y = R sin

    Real

    Imaginary

    z

    = x jy

    z = x+ jy

    R

    RzSource: [1]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    Complex Numbers Properties (refreshment) Complex numbers written in the Euler form:

    Addition/Subtraction is easier to do in the rectangular form:

    Multiplication/Division are more convenient in the Euler form:

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    z = R cos + jR sin

    = R(cos + j sin )

    = Rej

    z1 z2 = (x1 x2) j(y1 y2)

    z1z2 = (R1R2)ej(1+2)

    z1z2

    = (R1R2

    )ej(12)

    Source: [1]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.2 Differential Equations (refreshment)

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    Definition: Differential equation is any equation which contains derivatives, either ordinary derivatives or partial.

    Definition: Solution to a differential equation on an interval is any function which satisfies the equation on this interval.

    < t < y(t)

    Definition: Order of differential equation is the larges derivative present in it.

    Source: [3]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.2 Differential Equations (refreshment)

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    Example (Newton's Second Law):F = ma

    F = md

    2x

    dt

    2

    Definition: Linear differential equation is any differential equation that can be written in the following form:

    an(t)y(n)(t) + an1(t)y

    (n1)(t) + ...+ a1(t)y0(t) + a0(t)y(t) = g(t)

    Note: there are no products of the function and its derivatives and neither the the function or its derivatives occur to any power other than the first power.

    Source: [3]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.2 Differential Equations (refreshment)

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    Definition: Differential equation is time-invariant if it does not depend explicitly on time.

    Many techniques for solving ODEs: Linear 1st order ODEs Separable ODEs Exact ODEs Bernoulli ODEs

    ...

    N(y)dy

    dx

    = M(x)

    dy

    dt+ p(t)y = g(t)

    M(x, y) +N(x, y)dy

    dx

    = 0

    y

    0 + p(x)y = q(x)yn

    Source: [3]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Laplace Transform

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    Motivation: Differential equation relates input to output, yes But: All system parameters, input and output are mixed up in the equation Hence: it is not a satisfying representation from a system perspective

    Note: the notation for the lower limit means that even if the function is discontinuous at t=0, it is possible to start integration prior to discontinuity.

    Definition: The Laplace transform is defined as

    where is a complex variable. Condition for existence:

    s = + j!

    L|f(t)| = F (s) =Z 1

    0f(t)estdt

    Z 1

    0

    f(t)ektdt

  • http://osg.informatik.tu-chemnitz.de

    2.3 Laplace Transform Simple Example

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    Problem: Find the Laplace transform of

    Solution:

    f(t) = Aeatu(t)

    F (s) =

    Z 1

    0f(t)estdt

    =

    Z 1

    0Aeatestdt

    = A

    Z 1

    0e(s+a)tdt

    = As+ a

    e(s+a)t1

    t=0

    =A

    s+ a

    This integral converges only if

    (s+ a) < 0s+ a > 0

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Laplace Transform table

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    Function Transform

    (t)

    u(t)

    u(t)t

    eatu(t)

    sin(!t)u(t)

    cos(!t)u(t)

    1

    1

    s1

    s2

    1

    s+ a!

    s2 + !2s

    s2 + !2

    tnn!

    sn+1

    ...

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Laplace Transform Theorems

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    Linearity Theorem

    Frequency Shift Theorem

    Time Shift Theorem

    Scaling Theorem

    Differentiation Theorem

    L|kf(t)| = kF (s)

    L|eatf(t)| = F (s+ a)

    L|f1(t) + f2(t)| = F1(s) + F2(s)

    L|f(t T )| = esTF (s)

    L|f(at)| = 1aF (

    s

    a)

    L|dfdt

    | = sF (s) f(0)

    L|d2f

    dt2| = s2F (s) sf(0) f 0(0)

    ...

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Laplace Transform Another Example

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    Problem: Find the Laplace transform of

    Solution:

    f(t) = 6e5t + e3t + 5t3 9

    F (s) = 61

    s (5) +1

    s 3 + 53!

    s3+1 91

    s

    =6

    s+ 5+

    1

    s 3 +30

    s4 9

    s

    Source: [3]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Laplace Transform Complex Example

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    Problem: Find the Laplace transform of

    Solution:

    f(t) = t2sin(2t)

    F (s) =4s

    (s2 + 4)2

    F 0(s) = 12s2 16

    (s2 + 4)3

    H(s) =12s2 16(s2 + 4)3

    L|tf(t)| = F 0(s) L|tsin(at)| =2as

    (s2 + a2)2Using the fact that and

    Source: [3]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Inverse Laplace Transform

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    Definition: The inverse Laplace transform is defined as

    where is a complex variable, is real and u(t) is a

    unit-step function. s = + j!

    L1|F (s)| = 12j

    Z +j1

    j1F (s)estds = f(t)u(t)

    ExampleProblem: Find inverse Laplace transform of F (s) = 1

    (s+ 3)2

    Solution: We use frequency shift theorem and the transform of L|u(t)t| =1

    s2

    L1| 1(s+ a)2

    | = eatu(t)tSo, and f(t) = e3tu(t)t

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Partial-Fraction Expansion

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    Problem: how to find an ILT of a complex function? Solution: we can convert the function into a sum of simpler terms, for which we know

    the ILT. This method is called partial fraction expansion Assume that , where the order of is lower than that of If this is not the case, divide polynomials until this condition is fulfilled Three cases are possible: Roots of the denominator are real and distinct Roots of the denominator are real and repeated Roots of the denominator are complex or imaginary (not considered here)

    F (s) =N(s)

    D(s)N(s) D(s)

    D(s)

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Partial-Fraction Expansion (Case 1)

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    Roots of denominator are real and distinct It is possible to write the PFE as a sum of terms Constants, called residues, form numerators For example,

    To find , we multiply this equation by (s+1) which isolates

    Then we let s approach -1 which eliminates last term and we get Similarly solving this for the second residue, we get The resulting function can be transformed now:

    F (S) =2

    (s+ 1)(s+ 2)=

    K1s+ 1

    +K2s+ 2

    K1 K1

    2

    s+ 2= K1 +

    (s+ 1)K2s+ 2

    K1 = 2

    K2 = 2f(t) = (2et 2e2t)u(t)

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Partial-Fraction Expansion (Case 2)

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    Case 2: Roots of denominator are real and repeated

    To find the residues for the roots of multiplicity greater than unity:

    For all other residues, use the method of PFE for the case 1

    F (s) =N(s)

    D(s)=

    N(s)

    (s+ p1)r(s+ p2)...(s+ pn)

    K1(s+ p1)r

    +K2

    (s+ p1)r1+ ...+

    Krs+ p1

    +Kr+1s+ p2

    + ...+Kn

    s+ pn

    Ki =1

    (i 1)!di1F (s)

    dsi1

    s!p1

    , i = 1, .., r

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Using Laplace Transform To Solve Linear ODE

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    Problem: Solve this differential equation if all initial conditions are zero.d2y

    dt2+ 12

    dy

    dt+ 32y = 32u(t)

    s2Y (s) + 12sY (s) + 32Y (s) =32

    s

    Y (s) =32

    s(s2 + 12s+ 32)=

    32

    s(s+ 4)(s+ 8)

    Y (s) =32

    s(s+ 4)(s+ 8)=

    K1s

    +K2s+ 4

    +K3s+ 8

    K1 =32

    (s+ 4)(s+ 8)

    s!0

    = 1

    K2 =32

    s(s+ 8)

    s!4

    = 2

    K3 =32

    s(s+ 4)

    s!8

    = 1

    Y (s) = (1 2e4t + e8t)u(t)

    Solution: Using differentiation properties and Laplace transform of unit-step response, we get:

    Y (s) =1

    s 2

    s+ 4+

    1

    s+ 8

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    2.3 Using Laplace Transform To Solve Linear ODE

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    In general: 1. Having a linear ODE, take a Laplace transform of the ODE using Laplace transform rules

    and initial conditions 2. Algebraically solve the resulting equation 3. Take the inverse Laplace transform using PFE

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.1 Transfer Functions

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    It is now possible for us to give a definition of a function that algebraically relates output of the system to its input

    Take a general n-th order linear time-invariant ODE:

    Here, a, b are constants and c(t) and r(t) are output and input, respectively Assuming that all initial conditions are =0 and taking Laplace transform of both sides:

    The ratio

    is called the transfer function. It is evaluated with zero initial conditions.The output can be found by:

    andnc(t)

    dtn+ an1

    dn1c(t)

    dtn1+ ...+ a0c(t) = bm

    dmr(t)

    dtm+ bm1

    dm1r(t)

    dtm1+ ...+ b0r(t)

    (ansn + an1s

    n1 + ...+ a0)C(s) = (bmsm + bm1s

    m1 + ...+ b0)R(s)

    C(s)

    R(s)= G(s) =

    (bmsm + bm1sm1 + ...+ b0)

    ansn + an1sn1 + ...+ a0

    C(s) = G(s)R(s)Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.1 Transfer Functions - Example

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    Problem: Find the transfer function represented by ODE:

    Solution: Taking Laplace transform of both sides and assuming zero initial conditions,

    If a system response is needed for a unit-step input:

    Using PFE and taking inverse Laplace transform:

    dc(t)

    dt+ 2c(t) = r(t)

    sC(s) + 2C(s) = R(s)

    G(s) =1

    s+ 2

    C(s) = R(s)G(s) =1

    s(s+ 2)

    C(s) =1/2

    s 1/2

    s+ 2c(t) =

    1

    2 1

    2e2t

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.2 Mechanical Translational Transfer Functions

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    Component Force-Displacement Transfer Function

    Viscous damperf(t), x(t)

    b

    f(t) = bdx(t)

    dt

    bs

    M

    Mass

    f(t), x(t)f(t) = M

    d

    2x(t)

    dt

    2Ms2

    f(t), x(t)

    K

    Springf(t) = Kx(t) K

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

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    118

    M

    f(t), x(t)

    Problem: Derive a transfer function for this system

    Solution: First, write down the differential equation describing the system

    M

    d

    2x(t)

    dt

    2+ b

    dx(t)

    dt

    +Kx(t) = f(t)

    Taking the Laplace Transform:

    Ms2X(s) + bsX(s) +KX(s) = F (s)

    After some algebraic manipulations:

    (Ms2 + bs+K)X(s) = F (s)

    1

    Ms2 + bs+K

    X(s)F (s)

    3.2 Mechanical Translational Transfer Functions Example

    X(s)

    F (s)=

    1

    Ms2 + bs+K

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    Summary of the last lecture

    WS15/16

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    Previous lecture was about step 4 of control design: creating a mathematical model How do we do that?

    Describe a system as a differential equation If the differential equation is ordinary, time-invariant and linear, we use Laplace

    transform

    As a result, we get representation of the system in complex domain (transfer function) Why do we do that?

    Easy solution of differential equations Easy reduction of complex systems (step 5): discussed in this lecture Easy reasoning about time response, stability (step 6): discussed in this lecture

    119

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    3.3 Block diagrams

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    Design of Software for Embedded SystemsChapter 3: Mathematical Theory of Systems and Control

    Complex systems are represented by interconnections of many subsystems Our goal: represent response of the whole system as a single transfer function Block diagrams are used for frequency-domain analysis and design Signal flow graphs are used for state-space methods Subsystem is represented as a block with: input, output and transfer function

    Input Output

    R(s) C(s)G(s)

    System

    ++

    R1(s)

    R2(s)R3(s)

    C(s) = R1(s) +R2(s)R3(s)

    Summing junction Pickoff point

    R(s)R(s)

    R(s)

    R(s)

    For building more complex systems, two more elements are needed:

    Source: [2]

    120

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    3.3 Cascade Form of Transfer Functions

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    R(s) C(s)G3(s)G2(s)G1(s)

    Source: [2]

    R(s)

    G1(s) G2(s) G3(s)

    G1(s)R(s) G2(s)G1(s)R(s) G3(s)G2(s)G1(s)R(s)

    C(s) =

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.3 Parallel Form of Transfer Functions

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    122

    R(s)

    G1(s)R(S)G1(s)

    G2(s)

    G3(s)

    G2(s)R(s)

    G3(s)R(s)

    C(s) = (G1(s)G2(s)G3(s))R(s)

    R(s) C(s)G1(s)G2(s)G3(s)

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.3 Feedback Form of Transfer Functions

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    123

    R(s) +

    C(s)E(s)G(s)

    H(s)

    error

    Plant and Controller

    Input Output

    Feedback

    R(s) C(s)

    G(s)H(s) is called loop gain or open loop transfer function

    G(S)

    1G(s)H(s)

    E(s) = R(s) C(s)H(s)

    Using

    C(s) = E(s)G(s)) E(s) = C(s)G(s)

    and

    G(S)

    1G(s)H(s)we get:

    and solving for C(s)

    R(s)= Ge(s)

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.3 Restructuring Topologies (Summing Junction)

    WS15/16

    Design of Software for Embedded SystemsChapter 3: Mathematical Theory of Systems and Control

    124

    R(s) +

    G(s)

    X(s)

    R(s) +

    G(s)

    X(s)

    G(s)C(s) C(s)

    Source: [2]

    R(s) +

    G(s)

    X(s)

    R(s) +

    X(s)

    G(s)C(s) C(s)

    1

    G(s)

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.3 Restructuring Topologies (Summing Junction)

    WS15/16

    Design of Software for Embedded SystemsChapter 3: Mathematical Theory of Systems and Control

    125

    R(s)

    G(s)

    1

    G(s)

    R(s)

    R(s)

    R(s)G(s)

    R(s)

    R(s)

    R(s)

    R(s)G(s)

    G(s)1

    G(s)

    R(s)G(s)

    R(s)G(s)

    R(s)G(s)

    R(s)G(s)

    R(s)

    R(s)G(s)

    G(s)

    G(s)

    G(s)

    R(s)G(s)

    R(s)G(s)

    Source: [2]

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.3 Example

    WS15/16

    Design of Software for Embedded SystemsChapter 3: Mathematical Theory of Systems and Control

    126

    Problem: reduce the block diagram and find the transfer function of the system:

    Source: [2]

    R(s) + C(s)G1(s) G2(s)

    H2(s)

    H1(s)

    H3(s)

    G3(s)

    +

    + +

    http://osg.informatik.tu-chemnitz.de

  • http://osg.informatik.tu-chemnitz.de

    3.3 Example

    WS15/16

    Design of Software for Embedded SystemsChapter 3: Mathematical Theory of Systems and Contro