Design considerations of radio frequency power converte

Stanford University Power Electronics Research Laboratory (SUPER Lab)

Design considerations of radio frequency power converters

Prof. Juan Manuel Rivas [email protected]

November 2, 2019

CPSSC’19: RF power converters Prof. Juan Rivas 1 / 65 Stanford University

作者授权中国电源学会发布，未经作者同意禁止转载

Introduction: WBG at MHz?



Power converters density vs. switching frequency

I Capacitors, magnetic components and heatsinks dominate sizeand volumeI Improvements in dielectric and magnetic materials take a long timeI Value of L’s and C’s (& size) ∝ 1

fsI fsw of most power converters 20 kHz to 300 kHz

Kolar, J.W.; Biela, J.; Waffler, S.; Friedli, T.; Badstuebner, U., “Performance trends and limitations of power electronic systems,” CIPS, 2010 6th Int. Conf.,vol., no., pp.1,20, 16-18 March 2010



Widebandgap semiconductors to the rescue!

I High voltage operation

I High switching frequency

I High temperature operationSi SiC GaN

Critical Electric Field

(norm to GaN)

Bandgap Energy

(norm to GaN)

Electron Mobility

(norm to GaN)

Thermal Conductivity

(norm to SiC)

Melting Point

(norm to SiC)

Hole Mobility

(norm to Si)



Wide Bandgap power semiconductors: GaN vs. SiC vs. Si

I WBG devices are demonstrating great performance improvements at low frequencies.I Commercial WBG implementations switch at frequencies not much faster than in silicon.I In HF resonant techniques, switch loss reduction comes from circuit design, not WBG

characteristics.



Designing magnetics at high frequencies

Losses in magneticcomponents→ importantat high frequenciesI Skin depth ∝ 1√

fs

I Winding losses→∝√

fsI Proximity lossesI Parasitics

I Availability of suitable highfrequency cores is limited

I Core losses ∝ fαsI α = 2− 4

I At high enough frequencies⇒ Aircore!



Designing aircore converters at MHz and 10’s of MHz

PowerDensity

Frequency

~500W/in3

~50W/in3Conventional

Air-Core

~200KHz ~1MHz ~10MHz ~500MHz

Reduced energy storage→ Smaller passives &Faster transients

J. S. Glaser, et al, ”A 900W, 300V to 50V dc-dc power converterwith a 30 MHz switching frequency,” In Proc. Twenty-Fourth AnnualIEEE Applied Power Electronics Conf. and Exposition APEC 2009,pp. 1121-1128, 2009.

I New ways to make power converters thatuse PCB traces as aircore magneticcomponents (and even capacitors)

I Top/bottom layers can take the role ofEMI shields and heat-sinks



Switching at 10s of MHz needs addressing the issue of switching loss

+

−

GateDrive

VIN

L

RLoad

vds(t)id(t)

C

t

vds(t) id(t)

t

ploss(t)

Switching loss (hard switching)I V-I overlap at each switching transitions⇒ Psw,loss ∝ fs

I Includes device charge removal at turn off(device recovery)

I Includes device capacitance discharge atturn on

Amano, H., et al. ”The 2018 GaN power electronics roadmap.” Jour-nal of Physics D: Applied Physics 51.16 (2018): 163001.



Switching at 10s of MHz needs addressing the issue of switching loss

+

−

GateDrive

VIN

L

RLoad

vds(t)id(t)

C

t

vds(t) id(t)

t

ploss(t)

Switching loss (hard switching)I V-I overlap at each switching transitions⇒ Psw,loss ∝ fs

I Includes device charge removal at turn off(device recovery)

I Includes device capacitance discharge atturn on

+

−

GateDrive

VIN

Lchoke LRCR

RLoadC1vds(t)

DOFFT DONT

3.6VIN

Solution: Resonant Zero-VoltageSwitching (ZVS)I V-I overlap loss greatly reducedI ZVS during turn-on avoids capacitive

energy dumpI Only efficient over a narrow load rangeI Device stresses are high for many

topologies



Aircore inductor design is also challenging at MHz frequencies

I Aircore Ind. get better withfrequency, don’t saturate and canwork at high temp.

I But need consider potential EMIissues

I Skin depth @ 10 MHz= 20.6 µmI PCB cross-section not optimal

I 27.12 MHz, 320 W Dc-dc converterI 170 V to 28 V



COSS losses in WBG devices



Class D and Φ2 Rectifiers Prototypes (40 V-500 V)

+−

vgs(t)+

-

LMR

CMR

LF LS CS

VIN

Q1 CP +− VOUT

LRMR

CRMR

LR CDex

D

+vds(t)-

CM

LM

vr(t)

+

-

Φ2 Inverter

Low PassMatchingNetwork

Φ2 Rectifier

COUT

+−

vgs(t)+

-

LMR

CMR

LF LS CS

VIN

Q1 CP +− VOUT

LRCDex

D2

+vds(t)-

CM

LM

-

Φ2 Inverter


Class D Rectifier

COUT

CB

D1

va2(t)

+

-

VIN VOUT Rectifier Designed Sim. Exp.[V] [V] Class POUT %η %η

40 500 Φ2 40 89 3530 300 Φ2 36 84 6430 300 Φ2 42 86 7028 280 D 46 92 80

-100

0

100

200

300

400

500

600

0 20 40 60 80 100 120 140

Voltage [V]

Time [nS]

Anode Voltage C3D04060E

Measured

Simulated

0

10

20

30

40

50

500V(sim) 500V(exp) 1kV(sim) 1kV(exp)

Power Loss [W]

Simulated and experimental losses, IOUT=75mA (C4D02120E)

D1D2LrLm

Total Loss (Measured)

I Device losses were principal suspect for poorefficiency

I ddt v(t) can exceed 100 V/ns

I Notice discrepancy between simulated lossbreakdown and total measured loss



SiC diode loss comparison

0

0.5

1

1.5

2

2.5

3

3.5

170 V 350 V 500 V

Power [W]

Estimated Diode loss at various output voltages, IOUT=50mA (600V SiC Diodes)

STPS406CSD04060EC3D04060EIDD03SG60C

IOUT = 50 mA

0

0.5

1

1.5

2

2.5

3

3.5

170 V 350 V 500 V

Power [W]

Estimated Diode loss at various output voltages, IOUT=100mA (600V SiC Diodes)

STPS406CSD04060EC3D04060EIDD03SG60C

IOUT = 100 mA

0

2.5

5

7.5

10

12.5

15

17.5

20

500 V 1000 V

Power [W]

Estimated Diode loss at various output voltages, IOUT=50mA (1.2kV SiC Diodes)

STP6H12C4D02120EGB02SLT12

0

2.5

5

7.5

10

12.5

15

17.5

20

500 V 1000 V

Power [W]

Estimated Diode loss at various output voltages, IOUT=100mA (1.2kV SiC Diodes)

STP6H12C4D02120EGB02SLT12

I Notice that the diode loss is similar at both current levels but increases significantly withoutput voltage.



But...

I Recent implementation using 1.2kV devices show higher losses than previousmeasurements

I Three devices out of an order had different package labels, which correlated withperformance



Device comparison

Dist. Order Comments

Mouser 7/29/14 3 lines markingDigikey 9/28/15 2 lines markingMouser 11/5/15 MixedMouser 11/5/15 backordered- 3 linesMouser 10/31/16 3 lines markingDigikey 10/31/16 not rec’d yet

I Compare devices from ordersplaced since 2014

I Package marking (andperformance) varies



Device comparison

+

− VOUTLr

CD2

D2

vd(t)D1CD1Cex

+

-

Cb

Cm

Lm

MatchingNetwork Resonant Class D Rectifier

vRF(t)

+

-

iRF(t)

Zrec

vr(t)

+

-

ir(t)

IOUT

Zi



GaN’s zero reverse recovery raised hopes for improvementI Tying the gate to the source makes GaN FET behave like a diode.

GD

S

GaN FET

≡

Eric Person (Infineon) “Practical Application of 600 V GaN HEMTs in Power Electronics”, Professional EducationSeminar, APEC 2015



The experimental efficiency did not match the simulationI 100 W 500 V 27.12 MHz class-D resonant rectifier with GS66502B working as a diode.

Simulation ExperimentEfficiency 94% 90%

Power loss in total 6W 11 WPower loss per device 0.8W 3.0W



Power loss comparison of devices with similar V-I ratings

I Blue bars are GaN FETs and red bars are SiC diodes.I GaN FET power loss is much larger than predicted by simulation.

Power loss per device, whenPout = 25 W, Vout = 500 V, f =27.12 MHz, Idc = 50 mA

0W 1W 2W 3W 4W 5W 6W

STMicro

Cree 3Amp

Cree 7Amp

Cree 8Amp

Navitas

GaNSys

Transphorm 10.2W2.8W

1.4W

simulation

Power loss per device, whenPout = 25 W, Vout = 500 V, f =40.68 MHz, Idc = 50 mA

0W 2W 4W 6W 8W

STMicro

Cree 3Amp

Cree 7Amp

Cree 8Amp

Navitas

GaNSys

Transphorm 19.4W

6.6W

2.6W

simulation



Si prototype: 27.12 MHzI 100 W Inverter @ 27.12 MHz with FDMS8622

I 100 V Fairchild N-Channel Power Trench Silicon MOSFETI Max Rds,ON = 56 mΩ at VGS = 10 V, ID = 4.8 AI Simulated with manufacturer provided modelI Simulated efficiency: 90%I Measured efficiency: 89%



GaN prototype: 27.12 MHz

Test efficiencies greatly differ from the simulationI #1 Class Φ2 inverter with GS61008P

I 27.12 MHz, 40 Vdc input, 100 W outputI Simulation predicts 94.5% efficiency

I ≈ 1.4W loss in the FETI Measured efficiency ≈ 89%

I Experiment suggests that there are extra lossesbeyond the Ron lossI Loss not captured by simulation modelsI It’s not switching loss

I High frequency (MHz) phenomenaI Not important at 100s of kHz



Device losses in ZVS resonant converters

I Simplified MOSFET model I Zero Voltage Switched Waveform



Sawyer-Tower circuit

I Fedison, 2014/2016: Large hystereticlosses in charging/discharging Coss incertain Si superjunction MOSFETs.

I Energy dissipated per cycle is independentof frequency.

I Certain Si superjunction MOSFETsexhibited these hysteretic losses, whileothers were nearly lossless.



Sawyer-Tower circuit

I Measurements on Panasonic PGA26E19BA



Characterization of Coss losses in GaN devices

I As drian-source voltage increases so dothe losses in Coss

I Steinmetz parameter fits experiments wellI Losses increase with higher dv/dtI Dominant loss mechanism at high

frequencies



References on COSS losses in WBG devicesReferences on our work on COSS Characterization:

I L. C. Raymond, W. Liang and J. M. Rivas, Performance evaluation of diodes in 27.12 MHz Class-D resonant rectifiers under high voltage and high slew rateconditions, 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics (COMPEL), Santander, 2014, pp. 1-9. doi: 10.1109/COMPEL.2014.6877144

I G. Zulauf, W. Liang, K. Surakitbovorn and J. Rivas-Davila, “Output capacitance losses in 600 V GaN power semiconductors with large voltage swings at high- andvery-high-frequencies,” 2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), Albuquerque, NM, 2017, pp. 352-359.

I J. Zhuang, G. Zulauf and J. Rivas-Davila, “Substrate Bias Effect on E-Mode GaN-on-Si HEMT Coss Losses, 2018 IEEE 6th Workshop on Wide Bandgap PowerDevices and Applications (WiPDA), Atlanta, GA, 2018, pp. 130-133.

I G. Zulauf, S. Park, W. Liang, K. N. Surakitbovorn and J. Rivas-Davila, “COSS Losses in 600 V GaN Power Semiconductors in Soft-Switched, High- andVery-High-Frequency Power Converters, in IEEE Transactions on Power Electronics, vol. 33, no. 12, pp. 10748-10763, Dec. 2018.

I J. Zhuang, G. Zulauf, J. Roig, J. D. Plummer and J. Rivas-Davila, “An Investigation into the Causes of COSS Losses in GaN-on-Si HEMTs, 2019 20th Workshop onControl and Modeling for Power Electronics (COMPEL), Toronto, ON, Canada, 2019, pp. 1-7.

I G. Zulauf, Z. Tong and J. Rivas-Davila, “Considerations for Active Power Device Selection in High- and Very-High-Frequency Power Converters, 2018 IEEE 19thWorkshop on Control and Modeling for Power Electronics (COMPEL), Padua, 2018, pp. 1-8.

I Z. Tong, G. Zulauf and J. Rivas-Davila, “A Study on Off-State Losses in Silicon-Carbide Schottky Diodes, 2018 IEEE 19th Workshop on Control and Modeling forPower Electronics (COMPEL), Padua, 2018, pp. 1-8.

I G. Zulauf, Z. Tong, J. D. Plummer and J. M. Rivas-Davila, “Active Power Device Selection in High- and Very-High-Frequency Power Converters,” in IEEETransactions on Power Electronics, vol. 34, no. 7, pp. 6818-6833, July 2019.

I Z. Tong, G. Zulauf, J. Xu, J. D. Plummer and J. Rivas-Davila, “Output Capacitance Loss Characterization of Silicon Carbide Schottky Diodes, in IEEE Journal ofEmerging and Selected Topics in Power Electronics, vol. 7, no. 2, pp. 865-878, June 2019.

Other research groups are working on understanding COSS losses in WBG devicesI M. Guacci et al., “On the Origin of the Coss -Losses in Soft-Switching GaN-on-Si Power HEMTs, in IEEE Journal of Emerging and Selected Topics in Power

Electronics, vol. 7, no. 2, pp. 679-694, June 2019.I D. Bura, T. Plum, J. Baringhaus and R. W. De Doncker, “Hysteresis Losses in the Output Capacitance of Wide Bandgap and Superjunction Transistors,” 2018 20th

European Conference on Power Electronics and Applications (EPE’18 ECCE Europe), Riga, 2018, pp. P.1-P.9.I M. S. Nikoo, A. Jafari, N. Perera and E. Matioli, “Measurement of Large-Signal COSS and COSS Losses of Transistors Based on Nonlinear Resonance, in IEEE

Transactions on Power Electronics.



Today: Compare COSS Losses in SiC MOSFETs and GaN HEMTs

I Note the difference in y-axis scale: 2 to 12 in SiC MOSFET, 0 to 30 in GaN HEMTs.

SiC MOSFETsGaN-on-Si HEMTs



Today: Compare COSS Losses in SiC MOSFETs and GaN HEMTsSiC MOSFETs: loss per cycle independent of frequency

SiC MOSFETs

I No increase from 1 to 35 MHz

GaN-on-Si HEMTs

I ≈ 5× increase from 5 to 35 MHz

I At high frequencies, SiC MOSFETs may have better performance than GaN HEMTs.



Today: Compare PCOSS in WBG devices

I When accounting for conduction, gating,and Coss losses, we can find a range in witch aClass E SiC design will outperform GaN at high frequencies

I But driving a SiC Mosfet at MHz frequencies can be very challengingG. Zulauf, Z. Tong, J. D. Plummer and J. M. Rivas-Davila, “Active Power Device Selection in High- and Very-High-Frequency Power Converters,” in IEEETransactions on Power Electronics, vol. 34, no. 7, pp. 6818-6833, July 2019



Driving SiC Mosfets >10 MHz frequencies



Gate drive requirements in conventional converters

In most converters, we turn switches on/off at a given switching frequency, and as fast aspossibleI Minimize V-I overlapI Maintain conduction loss as low as possibleI on/off transitions of < 1% of switching period are common (at low frequencies)



Gate drive requirements in conventional converters

+

−

CGD

VDSCDS

CGS

+

-

vGS(t)IG

ID

+

-

vDS(t)

D1

DUT

iD(t)

QGS QGD

VTH

VGP

vGS(t)

QG

vDS(t)

VDS

iD(t)

ID

1 2 3

t

t

t

Vdd

Rg

CGS

+v

gs

-

Gate Driver Power MOSFET

CDG

CGS

t

vgs(t)Vdd

Vth

I Gate power loss is: Pg,loss = QgateVifs = CgateV2ddfs

I Important (and even dominant) loss at MHz frequenciesI Switch parasitcs affect the effective vGS(t) waveform



Examples of Hard-switched gating loss at MHzDevice Manufacturer Material Vds,max Rds,on Vg,on Ciss Rgate RgateCiss

GE1700903A1 General Electric SiC 1700 V 360 mΩ 18 V 400 pF 3.65 Ω 1.46 nsC3M0280090J Cree/Wolfspeed SiC 900 V 280 mΩ 15 V 150 pF 26 Ω 3.9 ns

GS66502B GaN Systems GaN 650 V 220 mΩ 7 V 65 pF 2.3 Ω 0.15 nsR6015KNJTL Rohm Semiconductor Si 600 V 290 mΩ 10 V 1050 pF 2.3 Ω 2.41 ns

I The calculated hard-switched gating loss of 4different high-voltage power devices at three ISMbands can be quite high

I Notice that the SiC devices have higher gatinglossesI harder to drive at high-frequency

I Rgate can also limit how fast a device can operate.Rgate varies considerable among devices andmanufacturers

I In practice, the current (and loss) in a10’s-of-MHz-capable high current gate driver IC(IXIS IXRFD630) can increase the gate driverequirements several times fold

Z. Tong, L. Gu, Z. Ye, K. Surakitbovorn and J. M. Rivas Davila, ”On the Techniques to Utilize SiC Power Devices in High- and Very High-Frequency PowerConverters,” in IEEE Transactions on Power Electronics. doi: 10.1109/TPEL.2019.2904591



Examples of Hard-switched gating loss at MHz

I Consider the design of a 30 MHz hard-switchedgate drive for GE1700903A1 1700 V SiC MOSFET

I Vg,ON = 18 V and Ciss = 400 pFI Custom packaged in a low inductance SMD

packageI Consider using IXYS IXRFD630 high current RF

gate driveI One of the few high current RF gate drive IC we

are aware ofI 10 A current sinking capabilitiesI Max supply voltage of 30 V, 18 V recommendedI 4 ns rise/fall times⇒ about 10% of the switching

periodI The IC supply current can be quite high at 30 MHzI About 1.6 A when driving the 400 pF of the SIC

MOSFETI about 29 W when IC supply voltage is 18 V!

I Picture does not show the heatsink

CL = 400 pF@ Vdd = 15 V



Sinusoidal Resonant Gate DriveIf no need to control duty cycleI A sinewave can drive the Mosfet gate

Pgate = 2π2RgateC2gsV

2gsf

2s

I For the SIC GE1700903A1 at 30 MHzI VGS,max = −15/+ 23 V, Rg = 3.65ΩI A sinusoidal resonant gate drive (VGS = 15V) leads to

Pgate = 2.33 W

I significantly better than the hard-switch gate drive, butissues with rise times and Rds,ON at VGS = 15 V

Rgate

Cgate

Mosfet Gate

vgs(t)

+

-

Igsin(ωt)

I Lower loss for transitions >> RgateCgs

I Fixed duty ratioI Narrow operating frequency

frequency

Ga

te L

oss

Resonantgating

Hard gating



Quasi-squarewave resonant gate driveI A quasi-squarewave resonant gate drive can also lead to savings in gate powerI Specifically we want to synthesize a quasi-squarewave with only the dc, 1st, 2nd, 3rd

harmonics of the squarewave Fourier components

+

−

Ciss

VGS,0

vGS,3(3ωst)

vGS,1(ωst) vGS,1(ωst)

Rgate

+

-

-2 -1 0 1 2Time

-0.5

0

0.5

1

1.5

xT

(t)

Ideal square wave1 st harmonic3 rd harmonicSum(Average+1st +3rd )

I The gate power at the quasi-squarewave drive is:

PQSW =12

Rgate ×

V2g A2

1(1

ωsCiss

)2+ R2

gate

+V2

g A23(

13ωsCiss

)2+ R2

gate

=

V2g

2Rgate×

(A2

1q2

s + 1+

A23

19 q2

s + 1

),

I where qs is the equivalent quality factor of the series branchRgate − Ciss at fs

I A1 and A3 are the normalized Fourier series component of asquare wave of the fundamental and 3rd harmonic component.

A1 =2π, A3 =

2π× 1

3CPSSC’19: RF power converters Prof. Juan Rivas 36 / 65 Stanford University


Quasi-squarewave resonant gate drive

0 5 10 15 20 25 30

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

I Plotting the ratio PQSWPhard

vs. Qs wenotice that performanceimproves with Qs

I Notice that qs = 1ωsCissRgate

I For the SIC GE1700903A1 at30 MHz we can save about 45%of the gate power byimplementing a quasi-squarewave resonant driveI We expect PQSW = 2.1 W ( vs.

3.9 W in a hard-switched gatedrive)

I With this reduction in power,we no longer need the IXYSIXRFD630 to drive the SICMOSFET at 30 MHz

L. Gu, Z. Tong, W. Liang and J. Rivas-Davila, ”A Multi-Resonant Gate Driver for High-Frequency Resonant Converters,” in IEEE Transactions on IndustrialElectronics. doi: 10.1109/TIE.2019.2899557




Vdd

Lmr Cmr

Lf

Rgate

Ciss

X1: Gate Driver Q1: Power MOSFET

Vsw

Vg

I A possible implementation uses a simpletotem-pole driver IC followed by aresonant networkI The resonant network presents an

inductive impedance to the totem-poledrive for efficient switching

I It also provides waveshaping of theeffective gate voltage

I Specifically the network has gain at thefundamental and 3rd harmonic that aretailored to accomplish the reduction ingate power

Z. Tong, L. Gu, Z. Ye, K. Surakitbovorn and J. M. Rivas Davila, ”On the Techniques to Utilize SiC Power Devices in High- and Very High-Frequency PowerConverters,” in IEEE Transactions on Power Electronics. doi: 10.1109/TPEL.2019.2904591F. Hattori, H. Umegami, and M. Yamamoto, “Multi-resonant gate drive circuit of isolating-gate GaN HEMTs for tens of MHz,” IET Circuits, DevicesSystems, vol. 11, no. 3, pp. 261–266, 2017




Vdd

Lmr Cmr

Lf

Rgate

Ciss

X1: Gate Driver Q1: Power MOSFET

Vsw

Vg

Parameter Value

fsw 30 MHzQ1 GE1700903A1

Rg of Q1 3.65 ΩCiss of Q1 400 pF at 30 MHz (measured)

X1 LM5114Lmr 38 nHCmr 82 pFLf 73 nH

Simulation Measurements




Parameter Hard-Switching Resonant

Vdd 18 V 11 VDriver IC IXRFD630 LM5114

Pgate 32.8 W 5.6 WPgate (calc.) 3.9 W 2.1 W I Note the resonant gate driver has a slew

rate of 2.5 V/ns, where the hard-switchedhas 1.8 V/ns




Part Description

Vin 60 VIin 0.86 APin 51.6 WVout 23.5 VrmsIout 1.88 ArmsPout 44.2 WPgate 5.6 Wη w/o gating loss 85.7%η w/ gating loss 74.8%



Quasi-squarewave resonant gate drive for a SiC JFET

Part Description

fs 13.56 MHzVin 50 VIin 1.6 APin 80 WPout 75.2 WPgate 4.8 Wη w/o gating loss 93.8%η w/ gating loss 88%

I SIC JFET UJC1208K, UnitedSiC, 1700 V SiCJFET in a to-247 package

I Hard-switch gate drive circuit delivers 20.3 W (vs.4.8 W)

Vdd

X1

Level ShifterMulti-Resonant

Q1

Rgate

Ciss

C1

D1

CmrLmr

Lf

gnd

-Vddgnd

Vdd

-AVdd

gndFilter



Cascoded SIC/GaN devices

SiC JFET

eGAN

FET

G

S

DI Another interesting arrangement for driving SiC devices at 10s of MHz is

cascodingI Some SiC device manufacturers (United Silicon Carbide) offer a normally

on SIC JFET cascoded with a Si MosfetI We propose a SiC/GaN cascode arrangement that can lead to low gating

loss at MHz frequencies

+−

Vin

LF LS CS

RloadCP

eGaN FET

SiC JFET

Consider a class E that uses the proposed cascode deviceI The power requirements of the gate drive circuitry are

minimal, even > 10 MHzI We still need to provide power to turn on/off the SiC

JFET⇒ It can be significantI But this power comes from the main power bus, not the

gate drive supplyI It is also possible to reduce the power used by the JFET

with right device configuration



Cascoded SIC/GaN devices

Device Part Number Package Rds,on Coss QG VDS[mΩ] [pF] [nC] [V]

SiC JFET UJN1208K TO247 77 42 62 (VDS=600 V, VGS=15.5 V) 1200eGaN FET EPC2045 die 5.6 260 5.2 (VDS=50 V, VGS=5 V) 100

100mm

85m

m SiC JFET

GaN FET

Gate Driver

Time [ns]0 50 100 150 200

Vds

(t)

[V]

-200

0

200

400

600

800

1000Drain Voltage

Vgs

(t)

[V]

-100

-80

-60

-40

-20

0

20Gate Voltage I DC-RF 13.56 MHz

implementationI Pout = 619 W,

Pgate = 0.56 WI η = 93.4%



But what about GaN?



GSWP300W-EVBPA 6.78 MHz, 300 W, RF-PA

I Push-Pull Class EF2 PAI 2 × GS66508B 650 V e-HEMTs (2 × $17)I Power Stage: 186 mm × 50 mmI VIN = 100 VI η = 94.4% at Po = 305 W, before EMI filterI η = 88% at Po = 308 W with EMI filter



Stacked Φ2 with T-matching network

L1a

L1b

L2a

L2b

Ls

Cs

S1

S2C1b

C1a

C2a

70 mm

69 mmCin1

Cin2 C2b

CB

+

−

VDC

C2a

L2a

L2b

C2b

C1a

CsL1a

Ls

C1b

L1b

CB

Cin1

Cin2

S1

S2

2RL

VDC

2

VDC

2

+

-

+

-

+

-

vo(t)

io(t)

+

-

vDS1(t)

+

-

vDS2(t)

I Stacked Φ2 with T-matching network PAI Power Stage: 70 mm × 69 mmI VIN = 100 VI η = 96% at Po = 320 WI 2 × 150 V Infineon BSC160N15NS5Si Mosfets (2 × $2.25)

Lei Gu “Design considerations of radio frequency power converters”, Stanford University, Doctoral Disserta-tion, May 31, 2019



Stacked Φ2 with T-matching network

+

−

VDC

C2a

L2a

L2b

C2b

C1a

CsL1a

Ls

C1b

L1b

CB

Cin1

Cin2

S1

S2

2RL

VDC

2

VDC

2

+

-

+

-

+

-

vo(t)

io(t)

+

-

vDS1(t)

+

-

vDS2(t)

L1a

L1b

L2a

L2b

Ls

Cs

S1

S2C1b

C1a

C2a

70 mm

69 mmCin1

Cin2 C2b

CB

I By characterizing & understanding COSS losses we canselect (and properly de-rate) devices to maximize theirperformance

I The stacked Φ2 PA with T-matching networkI Reduce peak voltage across semiconductors to level

similar to the class D PA (≈1 ×VINI but much easier to drive at high frequencies (even into

VHF)I Efficient operation over a wide rangeI Closed form equations for component selection

Lei Gu “Design considerations of radio frequency power converters”, Stanford University, Doctoral Dissertation, May 31, 2019



100V DC 6.78MHz 300W push-pull PAs Thermal comparison

L1a

L1b

L2a

L2b

Ls

Cs

S1

S2C1b

C1a

C2a

70 mm

69 mmCin1

Cin2 C2b

CB



Comparison



Designing a high-efficiency RF power amplifier for plasma generation

I We are investigating design techniques to combine RF PA’s efficientlyI Currently testing a 1.8 kW, 40.68 MHz PA (GaN Based)

I PA achieves an efficiency between 86% and 89%



Conclusion

I WBG devices, both SiC and GaN are an exciting technology⇒ Enormous potentialI There are important dynamic effects that need to be understood

I COSS losses exist in Si, SiC and GaN, but have different dependencies with frequency,temperature, dv/dt, etc.

I COSS can be a dominant loss mechanism at MHz frequenciesI Understanding COSS losses in power devices is important in selecting what device and

technology to use in MHz switching convertersI Dynamic Rds,ON still affects performance in GaN devices

I Perhaps many of these issues can be resolved at the device levelI Wireless Power Transfer at ISM bands, Plasma generations and Magnetic resonance Imaging

are few of the applications that can benefit from improving switching performance at MHzfrequencies⇒ Are these potential markets large enough to matter?

I Performance improvements depend in much more than replacing Si devices with GaN orSiCI There is plenty of room for innovation to come up with clever circuit and gate driving

techniques to maximize performance of high frequency convertersI There are still many interesting challenges ahead



Acknowledgments

SponsorsI Stanford SystemX Alliance: Bosch, Daihen, Keysight, LAM Research, ONSemi, Texas

InstrumentsI The Precourt Institute for Energy & the TomKat Center for Sustainable EnergyI National Science Foundation: Award Number: EECS-1439935I NASA, QorTek

Students and CollaboratorsI Superlab

I Students: Weston Brown, Sanghyeon Park, Kawin Surakitbovorn, Zikang Tong, Jia Le Xu,Zhechi Ye, Jia Zhuang, Grayson Zulauf.

I Postdoc: Dr. Lei Gu.I Former students: Prof. Jungwon Choi (UMN), Dr. Wei Liang, Dr. Luke Raymond.



High Voltage converters



Power Density in power electronics varies with voltage and application

VicorI Po =1750 WI η ≈98%

I Power dens≈2750 W/in3

Low Voltage Power ConversionI Focus on moderate gain ratio step downI Efficient, power dense converters

commercially availableI η in the upper 90%sI Power densities approaching 3 kW/in3

Ultra Volt Power-CI Po =60-125 WI η ≈60%

I Power dens.≈9 W/in3

High Voltage Power ConversionI HVPS remain expensive and relatively

inefficientI In HV pulsed applications an HV switch

is generally used in conjuction with a HVcapacitor

I η ≈ 60%s common, Typ. Power densities<10 W/in3



Resonant converter structure

Inverter TransformationStage

Rectifier

Control

Vin RL+

−

+−

vgs(t)+

-

LMR

CMR

LF LS CS

VIN

Q1 CP +− VOUT

LRCDex

D2

+vds(t)-

CM

LM

-

Φ2 Inverter


Class D Rectifier

COUT

CB

D1

va2(t)

+

-

I 40 V to 500 V 27.12 MHz stepup design was tested

I Output voltage limited byrectifier diode ratings

I Matching network quality factor(Q) increases with increasinggain ratio

[2] J.M. Rivas, O. Leitermann, Y. Han, et al, “A very high frequencydc-dc converter based on a class Φ2 resonant inverter,” in Proc.Power Electronics Specialists Conference, 2008. pp. 1657-1666[4] W. Liang, J. Glaser, and J. Rivas, “13.56 MHz high density dc-dcconverter with PCB inductors,” in Proc. 2013 Twenty-Eighth AnnualIEEE Applied Power Electronics Conference and Exposition(APEC), 2013, pp. 633–640.



Class-D rectifier modification

Ct

Lr VoDb

Dt

+

−

Zrec

Zrec

Lr

Ct

Db

+

−Vo

Dt

Cb

I vdiode,max = VOUT

I Relatively low equivalent input resistancecompared to related resonant rectifiertopologies

I DC blocking capacitor can be split toachieve isolation

Resonant

rectifier

Resonant

rectifier

Resonant

rectifier

VHV

+

-

+

−Dc/RFVdc

I Capacitive isolation feasible at 10’s ofMHz

I Cascading multiple converters for highvoltage gain

I Also effective for impedance matchingI Fast pulse capability



Advanced High-Frequency High-Voltage Power Converter (Founded byNASA

I Study how MHz switching frequenciescan improve the power density in HVconverters

I Converters find applications in medicaland space systems

I 40 V input, 2 kV and 15 W outputI 1 in3 volumeI 20 g in weight→ 15 g readily achievableI 13.56 MHz switching frequency



Dcdc comparison with state of the art

I Ultravolt hvdc supplies are “highefficiency...power density” and demandpremium price

I 10MHz prototype supply is 25-30 × morepower dense and significantly more efficient(volume/mass)

I Transient response is about 1000times faster demonstrating thebenefits for pulse applications

I Ultravolt has 20 ms rise on same load(considered to have a very fast rise...)



High voltage isolation using air-core transformers at high frequencies

I Leverage capacitve andtransformer isolation toachieve high voltageconversion

I Currenty working on a45 V to 100 kV dc-dcconverter



HV supplies in X-Ray systems

Applications that will benefit from a small and lightweight high-voltage power supply:

X-Ray App V-Range I-Range[kV] [mA]

Dental 65-90 -10General Medical 50-125 -1000Portable Medical 50-125 -100Mammography 20-50 -300

Industrial 450

Image source: Wikimedia Commons, https://commons.wikimedia.org/wiki File:Roentgen-Roehre.svgS. Goldwasser, ”X-Ray System Technology,”, Jan. 2017.GE Inspection Technologies, “Industrial Radiography: Image forming techniques,” 2016.



HV supplies in X-Ray systems

1. X-Ray Tube· · ·5. High VoltageGenerator (0-75kV)· · ·12. High VolageGenerator(75-150 kV)· · ·13. Power Unit(AC-DC)· · ·

Image source: WikiRadiography, http://www.wikiradiography.net/page/Gantry



High-voltage power converter with superior power density

I 2× Φ2 inverters using GaN Systems 650 V MOSFETsI 94% inverter efficiencyI 4x500 W rectifiers with 500 V outputs in seriesI 250 W/in3 including gate drive and cold plateI 90% rectifier efficiency vs. 97% predicted by simulation model

L. Raymond, W. Liang, L. Gu, and J. Rivas, “13.56 MHz High VoltageMulti-Level Resonant DC-DC Converter,” in Control and Modeling for PowerElectronics (COMPEL), Jul. 2015.



SUPER SHRIMPPerformance Metric DARPA Phase I DARPA Phase II This work, before folding This work, box shape This work, box shape (2)

volume < 0.333 cm3 < 0.188 cm3 0.2 cm3 0.2 cm3 0.2 cm3

longest edge < 10 mm < 7 mm 117 mm 7 mm 7 mmweight < 1 g < 0.5 g 0.25 g 0.29 g 0.49 g

peak output power > 200 mW > 200 mW 248 mW 162 mW 189 mWoutput voltage > 3 kV > 3 kV 3.2 kV 2.7 kV 2.9 kV

VDD

OE

gnd

Cin

U1Q1

1:11

coupling capacitors

outoe

vdd

gnd

ntop2

nmid2

nbot2

ntop1

nmid1

nbot1 55-stage

Cockcroft-

Walton

voltage

multiplier

+out

out

Vout

+

class-E inverter

step-up transformer

55-stage Cockcroft-Walton voltage multiplier

ntop1 nmid1 nbot1

ntop2 nmid2 nbot2

+out

−out

ntop2 nmid2 nbot2

step-up transformer

ntop1nmid1 nbot1

class-E inverter

coupling capacitors

1

2

3

4

valley fold

mountain fold

5

solder here

solder here



Perch and stare droneElectroadhesionpatch

Dron w/ camera

Perch and Stare Drone



Design considerations of radio frequency power converte

Documents