Design and Fast Implementation of G726 ADPCM Codec for Audio and Speech Applications

UNDER THE GUIDANCE OF

T.DURGA PRASAD M.TechAsst.prof.,Dep Of E.C.E

By

N.RAMESHReg No:1220408119

04/07/23

Design and fast implementaion of G.726 ADPCM codec for audio and

speech applications 1

Only A-law or mu-law (G.711) exists. Compression was very less like 1:2 ratio. To be precise No Compression. Quality Speech @ 64 Kbps. Single Bit rate support which is 64 Kbps.

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Design and fast implementaion of G.726 ADPCM codec for audio and

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ADPCM stands for Adaptive Differential Pulse Code Modulation.

ADPCM is a Speech/Audio Compression/Decompression standard that is part of ITU – G.726 gives quality Speech at 32Kbps, 8 KHz, and CD-Quality audio at 128kbps,44.1kHz, with a compression ratio of around 1:3.2 To 1:8 ratio .

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Design and fast implementaion of G.726 ADPCM codec for audio and

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G.726encoder

input network G.726decoder

output

Sample file

Default file

G.726 ADPCM Speech CODEC

Conversion input PCM signal to A-law/mu-law signal. Conversion to A-law/mu-law signal to uniform PCM

signal. Obtaining Difference signal by subtracting an estimate

of the input signal from the input signal itself. An adaptive 31, 15, 7 or 4 level Quantizer is used to

assign 5, 4, 3, 2 binary digits respectively to the value of difference signal for the transmission to the decoder.

An Inverse Quantizer produces a Quantized difference signal from these same 5, 4, 3, 2 binary digits, respectively.

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The signal estimate is added to the quantized difference signal to produce the reconstructed version of the input signal.

Both the reconstructed signal and the Quantized difference signal are operated upon by an adaptive predictor which produces the estimate of the input signal, thereby completing the feedback loop.

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Design and fast implementaion of G.726 ADPCM codec for audio and

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speech applications 7

Decoder includes a structure identical to the feedback portion of the encoder, together with a uniform PCM to A-law or mu-law conversion and synchronous coding adjustment.

The synchronous coding adjustment prevents cumulative distortion and the adjustment is achieved by adjusting the PCM output codes in a manner which attempts to eliminate quantizing distortion.

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Design and fast implementaion of G.726 ADPCM codec for audio and

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BlockDiagram of ADPCM Codec-Decoder

b) Decoder

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Bitrates (Kbps) –> 16, 24, 32, 40 Sample Rates (KHz) –> 8 No Of Channels –> Mono CD Quality –> @ 32 Kbps, 8 KHz Compression –> 1:3.2 To 1:8. Input File Extension –> xxx.pcmx, Output File Extension-> .dat, .wav Input Bits/Sample -> 16

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Design and fast implementaion of G.726 ADPCM codec for audio and

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• Bitrates (Kbps) –> 16 To 128• Sample Rates (KHz)–>8, 11.025, 16, 22.05, 32,

44.1, 48• No Of Channels –> 2 (Mono, Stereo)• CD Quality –> @ 128 Kbps, 44.1 KHz• Compression –> 1:3.2 To 1:8.• Input File Extension –> xxx.pcm, • Output File Extension -> .dat, .wav• Input Bits/Sample -> 16

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• There are different ways we can perform OptimizationsAlgorithmic optimizationsDesign optimizationsArchitectural level optimizationsC-level optimizationAssembly level optimizations

Advanced RISC Machine ARM is a 32-bit Instruction set. It is simple but powerful instructions that execute within a

single cycle at a high clock speed. The RISC concentrates on reducing the complexity of

instructions performed by the hardware. it is easier to provide greater flexibility and intelligence

in software rather than hardware.

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Memory access The ARM7TDMI core has a Von Neumann architecture,

with a single 32-bit data bus carrying both instructions and data. Only load, store, and swap instructions can access data from memory.

Data can be: 8-bit (bytes) 16-bit (half words) 32-bit (words). Words must be aligned to 4-byte boundaries. Half words

must be aligned to 2-byte boundaries. 

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Memory interface The ARM core has four basic types of memory cycle:

Idle cycle Non sequential cycle Sequential cycle Coprocessor registers transfer cycle

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The ARM7TDMI processor has a total of 37 registers:

31 general-purpose 32-bit registers 6 status registers. These registers are not all accessible at the same

time. The processor state and operating mode determine which registers are available to the programmer

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• SoftwareCARM assembly

• ToolsARM simulatorARM Compilers and linkersARM DebuggerARM ProfilerCool Edit Pro

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• In the current project we concentrate on compression of speech signal using ITU G.726 ADPCM Encoder standard.

• Uncompressed PCM signal will be considered as input with sampling rate of 8 KHz, single channel (mono) and 16-bits per sample.

• Output obtained will be G.726 compressed format with one of the bitrates of 16kbps,24kbps, 32 kbps and 40 kbps.

• An ITU G.726 decoder executable will be used to playback the compressed ADPCM file.

• The G.726 Encoding technique will be proved both on simulator and on ARM9 based board.

• Software Optimization.

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• FM Recording• video conferencing systems• Multimedia• Flight Recording• ISDN• Satellite communications.

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ThanQ