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w.e.f 2009-2010
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA 533 003
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
Specialization: VLSID/VLSISD
COURSE STRUCTURE
Code Name of the Subject L P C INT EXT TOTAL
Core
1. Digital System Design 4 - 8 40 60 100
2. VLSI Technology & Design 4 - 8 40 60 100
3. Analog & Digital IC Design 4 - 8 40 60 100
4. Embedded Systems Concepts 4 - 8 40 60 100
Elective I
1. VHDL Modeling of Digital
Systems
4 - 8 40 60 100
2. Digital Data Communications
Elective II
1.Electronic Design Automation
Tools
4 - 8 40 60 100
2.Embedded System Design
Laboratory
1.HDL Programming Laboratory - 4 4 40 60 100
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JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
DIGITAL SYSTEM DESIGN
UNIT – I
DESIGN OF DIGITAL SYSTEMS: ASM charts, Hardware description language and control
sequence method, Reduction of state tables, state assignments.
UNIT – II
SEQUENTIAL CIRCUIT DESIGN: design of Iterative circuits, design of sequential circuits
using ROMs and PLAs, sequential circuit design using CPLD, FPGAs.
UNIT – III
FAULT MODELING: Fault classes and models – Stuck at faults, bridging faults, transition and
intermittent faults. TEST GENERATION: Fault diagnosis of Combinational circuits by
conventional methods – Path
Sensitization technique, Boolean difference method, Kohavi algorithm.
UNIT – IV
TEST PATTERN GENERATION: D – algorithm, PODEM, Random testing, transition count
testing, Signature analysis and testing for bridging faults.
UNIT – V
FAULT DIAGNOSIS IN SEQUENTIAL CIRCUITS: State identification and fault detection
experiment. Machine identification, Design of fault detection experiment.
UNIT – VI
PROGRAMMING LOGIC ARRAYS: Design using PLA’s, PLA minimization and PLA
folding.
UNIT – VII
PLA TESTING: Fault models, Test generation and Testable PLA design.
UNIT – VIII
ASYNCHRONOUS SEQUENTIAL MACHINE: fundamental mode model, flow table, state
reduction, minimal closed covers, races, cycles and hazards.
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TEXT BOOKS:
1. Z. Kohavi – “Switching & finite Automata Theory” (TMH)
2. N. N. Biswas – “Logic Design Theory” (PHI)
3. Nolman Balabanian, Bradley Calson – “Digital Logic Design Principles” – Wily Student
Edition
2004.
REFRENCE BOOKS:
1. M. Abramovici, M. A. Breues, A. D. Friedman – “Digital System Testing and Testable
Design”,
Jaico Publications
2. Charles H. Roth Jr. – “Fundamentals of Logic Design”.
3. Frederick. J. Hill & Peterson – “Computer Aided Logic Des
ign” – Wiley 4th
Edition. 4
w.e.f 2009-2010
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
VLSI TECHNOLOGY & DESIGN
UNIT – I
REVIEW OF MICROELECTRONICS AND INTRODUCTION TO MOS TECHNOLOGIES:
(MOS, CMOS, Bi CMOS) Technology trends and projections.
UNIT – II
BASIC ELECTRICAL PROPERTIES OF MOS, CMOS & BICOMS CIRCUITS: Ids-Vds
relationships, Threshold voltage Vt, Gm, Gds and Wo, Pass Transistor, MOS,CMOS & Bi
CMOS Inverters, Zpu/Zpd, MOS Transistor circuit model,Latch-up in CMOS circuits.
UNIT – III
LAYOUT DESIGN AND TOOLS: Transistor structures, Wires and Vias , Scalable Design rules
,Layout Design tools.
UNIT – IV
LOGIC GATES & LAYOUTS: Static complementary gates, switch logic, Alternative gate
circuits, low power gates, Resistive and Inductive interconnect delays.
Page 4
UNIT – V
COMBINATIONAL LOGIC NETWORKS: Layouts, Simulation, Network delay, interconnect
design, power optimization, Switch logic networks, Gate and Network testing.
UNIT – VI
SEQUENTIAL SYSTEMS: Memory cells and Arrays, clocking disciplines, Design ,power
optimization, Design validation and testing.
UNIT – VII
FLOOR PLANNING & ARCHITECTURE DESIGN: Floor planning methods, off-chip
connections, High-level synthesis, Architecture for low power, SOCs and Embedded CPUs,
Architecture testing.
UNIT – VIII
INTRODUCTION TO CAD SYSTEMS (ALGORITHMS) AND CHIP DESIGN: Layout
Synthesis and Analysis, Scheduling and printing; Hardware/Software Co-design, chip design
methodologies- A simpleDesign example-
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian et . al( 3 authors) PHI of India
Ltd.,2005
2. Modern VLSI Design, 3rd Edition, Wayne Wolf ,Pearson Education, fifth Indian
Reprint, 2005.
REFERENCES:
1. Principals of CMOS Design – N.H.E Weste, K.Eshraghian, Adison Wesley, 2nd
Edition.
2. Introduction to VLSI Design – Fabricius, MGH International Edition, 1990.
3. CMOS Circuit Design, Layout and Simulation – Baker, Li Boyce, PHI, 2004. 3
w.e.f 2009-2010
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
ANALOG AND DIGITAL IC DESIGN
UNIT-I
OPERATIONAL AMPLIFIERS: General considerations one – state op-amps, two stage op-amps-gains
boosting stage- comparison I/P range limitations slew rate. CURRENT MIRRORS AND SINGLE
STAGE AMPLIFIERS: simple COMS, 3JT current mirror,, Cascode Wilson Wilder current mirrors.
Common Source amplifier source follower, common gate amplifier
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NOISE: Types of Noise – Thermal Noise-flicker noise- Noise in opamps- Noise in common source stage
noise band width.
UNIT-II
PHASED LOCKED LOOP DESIGN: PLL concepts- The phase locked loop in the locked condition
Integrated circuit PLLs – phase Detector- Voltage controlled oscillator case study: Analysis of the 560
B Monolithic PLL.
SWITHCHED CAPACITORS CIRCUITS: Basic Building blocks op-amps capacitors switches –
non-over lapping clocks-Basic operations and analysis-resistor equivalence of la switched
capacitor- parasitic sensitive integrator parasitic insensitive integrators signal flow graph
analysis-First order filters- switch sharing fully differential filters – charged injections-switched
capacitor gain circuits parallel resistor –capacitor circuit – preset table gain circuit – other
switched capacitor circuits – full wave rectifier – peak detector sinusoidal oscillator.
UNIT-III
LOGIC FAMILIES & CHARACTURISTICS : COMS, TTL, ECL, logic families COMS / TTL,
interfacing comparison of logic families.
COMBINATIONAL LOGIC DESIGN USING VHDL: VHDL modeling for decoders, encoders,
multiplexers, comparison, adders and subtractors .
SEQUENCIAL IC DESIGN USING VHD: VHDL modeling for larches, flip flaps, counters,
shift registers, FSMs.
UNIT-IV
DIGITAL INTEGRADED SYSTEM BUILDING BLOCKS: Multiplexers and decoders – barrel
shifters counters digital single bit adder
MEMORIES: ROM: Internal structure 2D decoding commercial type timing and applications
CPLD: XC 9500 series family CPLD architecture – CLB internal architecture, I/O block internal
structure .
FPGA: Conceptual of view of FPGA – classification based on CLB internal architecture I/O
block architecture.
UNIT-V
COMPORATORS: Using an op-amp for a comparator-charge injection errors- latched
comparator
NYQUIST RATE D/A CONVERTERS: Decoder based converter resistor storing converters
folded resister string converter – Binary scale converters – Binary weighted resistor converters –
Reduced resistance ratio ladders – R-2R based converters – Thermometer code current mode
D/A converters.
NYQUIST RATE A/D CONVERTERS: Integrating converters – successive approximation
converters. DAC based successive approximation – flash converters time interleaved A/D
converters.
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REFERENCES:
1. Analog Integrated circuit Design by David A Johns, Ken Martin, John Wiley & Sons.
2. Analysis and design of Analog Integrated Circuits, by Gray, Hurst Lewis, Meyer. John
Wiley & Sons.
3. Design of Analog CMOS Integrated Circuits, Behzad Razavi, TMH
4. Digital Integrated Circuit Design by Ken Martin, Oxford University 2000
5. Digital Design Principles & Practices” by John F Wakerly, Pearson Education & Xilinx
Design Series, 3rd Ed.(2002)
SUGGESTING READOMG
1. Ken Martin, Digital Integrated Circuit Design Oxford University,2000.
2. John F Wakerly, “Digital Design Principles & Practices”, Pearson Education &
Xilinx Design Series, 3rd Ed.(2002)
3. Samir Palnitkar, “Verylog HDL-A Guide to Digital Design and Synthesis”, Prentice
Hall India, (2002)
4. Douglas J Smith, “HDL Chip Design, a practical Guide for Designing, Synthesizing
and simulating ASICs and FPGAs using VHDL or Verilog, Doone Publications,
(1999).
w.e.f 2009-2010
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
EMBEDDED SYSTEMS CONCEPTS
UNIT I: AN INTRODUCTION TO EMBEDDED SYSTEMS
An Embedded system, processor in the system, other hardware units, software embedded into a
system,exemplary embedded systems, embedded system – on – chip (SOC) and in VLSI circuit.
Processor and memory organization – Structural Units in a Processor, Processor selection for an
embedded system, memory devices, memory selection for an embedded systems, allocation of
memory to program cache and memory management links, segments and blocks and memory
map of a system, DMA, interfacing processors, memories and Input Output Devices.
UNIT II: DEVICES AND BUSES FOR DEVICE NETWORKS
I/O devices, timer and counting devices, serial communication using the “I2 C” CAN, profibus
foundation
field bus. and advanced I/O buses between the network multiple devices, host systems or
computer parallel
communication between the networked I/O multiple devices using the ISA, PCI, PCI-X and
advanced buses.
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UNIT III: DEVICE DRIVERS AND INTERRUPTS SERVICING MECHANISM
Device drivers, parallel port and serial port device drivers in a system, device drivers for internal
programmable timing devices, interrupt servicing mechanism
UNIT IV: PROGRAMMING CONCEPTS AND EMBEDDED PROGRAMMING IN C, C++,
VC++ AND JAVA
Interprocess communication and synchronization of processes, task and threads, multiple
processes in an application, problem of sharing data by multiple tasks and routines, interprocess
communication.
UNIT V: HARDWARE – software co-design in an embedded system, embedded system project
management, embedded system design and co-design issues in system development process,
design cycle in the development phase for an embedded system, use of target systems, use of
software tools for development of an embedded system, use of scopes and logic analysis for
system, hardware tests. Issues in embedded system design.
TEXT BOOK:
1. Embedded systems: Architecture, programming and design by Rajkamal, TMH.
REFERENCE:
1. Embedded system design by Arnold S Burger, CMP
2. An embedded software primer by David Simon, PEA
3. Embedded systems design:Real world design be Steve Heath; Butterworth Heinenann,
Newton mass
USA 2002
4. Data communication by Hayt.
w.e.f 2009-2010
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
VHDL MODELLING OF DIGITAL SYSTEMS (ELECTIVE I)
UNIT I INTRODUCTION :
An Overview Of Design Procedures Used For System Design Using CAD Tools. Design Entry.
Synthesis, Simulation, Optimization, Place And Route. Design Verification Tools. Examples
Using Commercial PC Based On VHDL Elements Of VHDL Top Down Design With VHDL
Subprograms. Controller Description VHDL Operators.
UNIT II BASIC CONCEPT IN VHDL: Characterizing Hardware Languages, Objects And
Classes, Signal Assignments, Concurrent And Sequential Assignments. Structural Specification
Of Hardware: Parts Library Wiring Of Primitives, Wiring Interactive
Networks, Modeling A Test Bench Binding Alternative Top Down Wiring.
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UNIT III DESIGN ORGANIZATIN AND PARAMETERIZATION:
Definition And Usage If Subprograms, Packaging Parts And Utilities, Design Parametrization,
Design Configuration, Design Libraries, Utilities For High –Level Descriptions-Type
Declaration And Usage, VHDL Operators, Subprogram Parameter Types And Overloading,
Other Types And Type Related Issues, Predefined Attributes, User Defined Attributes, Packing
Basic Utilities.
UNIT IV DATA FLOW DESCRIPTION IN VHDL
Multiplexing And Data Selection, State Machine Description, Open Collector Gates, Three State
Bussing AGeneral Data Flow Circuit, Updating Basic Utilities. Behavioral Description Of
Hardware: Process Statement Assection Statements, Sequential Wait Statements Formatted
ASCII I/O Operators, MSI-Based Design.
UNIT V CPU MODELLING FOR DESCRIPTION IN VHDL:
Parwan CPU, Behavioural Description Of Parawan, Bussing Structure, Data Flow Description
Test Bench For The Parwan CPU. A More Realistic Parwan. Interface Design And Modeling.
VHDL As A Modelling Language.
TEXT BOOKS:
1. Z.NAWABI : VHDL Analysis And Modelling Of Digital Systems. (2/E), Mcgraw Hill,
(1998)
REFERENCE:
1. PERRY : VHDL, (3/E) Mcgraw Hill 10
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JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
DIGITAL DATA COMMUNICATIONS ( Elective –I )
UNIT I DIGITAL MODULATION TECHNIQUES
FSK , MSK , BPSK , QPSK , 8-PSK , 16-PSK , 8- QAM , 16- QAM , Band width efficiency
carrier recovery DPSK , clock recovery , Probability of error and bit error rate.
UNIT II
Data Communications ; Serial , Parallel configuration , Topology , Transmission modes , codes ,
Error Control Synchronization, LCU.
UNIT III
Serial and Parallel Interfaces , Telephone Networks and Circuits , Data modems.
Page 9
UNIT IV
Data Communication Protocols , Character and block Mode ,Asynchronous and Synchronous
Protocols, public Data Networks , ISDN.
UNIT V
LOCAL AREA NETWORKS: token ring, Ethernet, Traditional, Fast and GIGA bit Ethernet,
FDDI
UNIT VI
DIGITAL MULTIPLEXING : TDM , T1 carrier , CCITT , CODECS, COMBO CHIPS , North
American Hierarchy , Line Encoding , T-carrier , Frame Synchronization Inter Leaving
Statistical TDM FDM , Hierarchy ,Wave Division Multiplexing .
UNIT VII
WIRELESS LANS
IEEE 802.11 Architecture Layers, Addressing, Blue Tooth Architecture Layers, l2 Cap, Other
Upper Layers .
UNIT VIII
MULTI MEDIA
Digitalizing Video and Audio Compression Streaming Stored and Live Video and Audio , Real
Time Interactive Video and Audio , VOIP
TEXT BOOKS
1. Electronic communication systems, fundamentals through advanced - W. TOMASI, Pearson
4th Edition.
2. Data communication and networking - B.A. Forouzen
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JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
ELECTRONIC DESIGN AUTOMATION TOOLS
(Elective –II )
UNIT I
IMPORTANT CONCEPTS IN VERILOG:
Basics Of Verilg Language, Operators, Hierarchy,Procedures And Asignments,Timing Controls
And Delay.
Tasks And Functions Control Statements, Logic-Gate Modeling, Modeling Delay, Altering
Parameters,
Other Verilog Features.
Page 10
UNIT II
SYNTHESIS AND SIMULATION USING HDLS:
Verilog And Logic Synthesis. VHDL And Logic Synthesis, Memory Synthesis,FSM
Synthesis,Memory
Synthesis, Performance-Driven Synthesis. Simulation-Types Of Simulation, Logic Systems
Working Of
Logic Simulation,Cell Models, Delay Models State Timing Analysis,Formal Verification,
Switch-Level
Simulation Transistor-Level Simulation. CAD Tools For Synthesis And Simulation Modelism
And Leonardo
Spectrum(Exemplar).
UNIT III
TOOLS FOR CIRCUIT DESIGN AND SIMULATION USING PSPICE:
Pspice Models For Transistors, A/D & D/A Sample And Hold Circuits Etc, And Digital System
Building
Blocks, Design And Analysis Of Analog And Digital Circuits Using PSPICE.
UNIT IV
AN OVER VIEW OF MIXED SIGNAL VLSI DESIGN:
Fundamentals Of Analog And Digitla Simulation,Mixed Signal Simulator Configurations,
Understanding
Modeling, Integration To CAE Environmets, Analyses Of Analog Circuits Eg.A/D, D/A
Converters, Up And
Down Converters, Companders Etc.
UNIT V
TOOLS FOR PCB DESIGN AND LAYOUT:
An Overview Of High Speed PCB Design, Design Entry, Simulation And Layout Tools For
PCB.
Introduction To Orcad PCB Design Tools.
TEXTBOOKS
1. J.Bhaskar, A Verilog Primer, BSP, 2003.
2. J.Bhaskar, A Verilog HDL Synthesis BSP, 2003
3. M.H.RASHID:SPICE FOR Circuits And Electronics Using PSPICE (2/E)(1992) Prentice
Hall.
REFERENCES
1. ORCAD: Technical Reference Manual ,Orcad, USA.
2. SABER: Technical Reference Manual, Analogy Nic, USA.
3. M.J.S.SMITH :Aplication-Specific Integrated Circuits(1997). Addison Wesley
4. J.Bhaskar, A VHDL Synthesis Primer, BSP, 2003.
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JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
HDL PROGRAMMING LABORATORY
1. Digital Circuits Description using Verilog and VHDL
2. Verification of the Functionality of Designed circuits using function Simulator.
3. Timing simulation for critical path time calculation.
4. Synthesis of Digital circuits
5. Place and Route techniques for major FPGA vendors such as Xilinx, Altera and Actel etc.
6. Implementation of Designed Digital Circuits using FPGA and CPLD devices.
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ACADEMIC REGULATIONSCOURSE STRUCTURE
ANDDETAILED SYLLABUS
JAWAHARLAL NEHRU TECHNOLOGY UNIVERSITY KAKINADAKAKINADA - 533 003, Andhra Pradesh, India
For
ECE BRANCH
COMMON FOR1. VLSI2. VLSI Design3. VLSI System Design4. VLSI & MICRO ELECTRONICS
Page 14
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 1
Applicable for the students of M. Tech (Regular) Course from the
Academic Year 2013-14 onwards
The M. Tech Degree of Jawaharlal Nehru Technological University
Kakinada shall be conferred on candidates who are admitted to the program
and who fulfil all the requirements for the award of the Degree.
1.0 ELIGIBILITY FOR ADMISSIONSAdmission to the above program shall be made subject to eligibility,
qualification and specialization as prescribed by the University from time to
time.
Admissions shall be made on the basis of merit/rank obtained by the
candidates at the qualifying Entrance Test conducted by the University or
on the basis of any other order of merit as approved by the University,
subject to reservations as laid down by the Govt. from time to time.
2.0 AWARD OF M. Tech DEGREE2.1 A student shall be declared eligible for the award of the M. Tech
Degree, if he pursues a course of study in not less than two and not
more than four academic years.
2.2 The student shall register for all 80 credits and secure all the 80 credits.
2.3 The minimum instruction days in each semester are 90.
3.0 A. COURSES OF STUDYThe following specializations are offered at present for the M. Tech
course of study.
1. M.Tech- Structural Engineering
2. M.Tech- Transportation Engineering
3. M.Tech- Infrastructure Engineering & Management
4. ME- Soil Mechanics and Foundation Engineering
5. M.Tech- Environmental Engineering
6. M.Tech-Geo-Informatics
7. M.Tech-Spatial Information Technology
ACADEMIC REGULATIONS R13 FOR M. Tech (REGULAR)DEGREE COURSE
Page 15
2 2013-148. M.Tech- Civil Engineering
9. M.Tech -Geo-Technical Engineering
10. M.Tech- Remote Sensing
11. M.Tech- Power Electronics
12. M.Tech- Power & Industrial Drives
13. M.Tech- Power Electronics & Electrical Drives
14. M.Tech- Power System Control & Automation
15. M.Tech- Power Electronics & Drives
16. M.Tech- Power Systems
17. M.Tech- Power Systems Engineering
18. M.Tech- High Voltage Engineering
19. M.Tech- Power Electronics and Power Systems
20. M.Tech- Power System and Control
21. M.Tech- Power Electronics & Systems
22. M.Tech- Electrical Machines and Drives
23. M.Tech- Advanced Power Systems
24. M.Tech- Power Systems with Emphasis on High Voltage Engineering
25. M.Tech- Control Engineering
26. M.Tech- Control Systems
27. M.Tech- Electrical Power Engineering
28. M.Tech- Power Engineering & Energy System
29. M.Tech- Thermal Engineering
30. M.Tech- CAD/CAM
31. M.Tech- Machine Design
32. M.Tech- Computer Aided Design and Manufacture
33. M.Tech- Advanced Manufacturing Systems
34. M.Tech-Computer Aided Analysis & Design
35. M.Tech- Mechanical Engineering Design
36. M.Tech- Systems and Signal Processing
37. M.Tech- Digital Electronics and Communication Systems
38. M.Tech- Electronics & Communications Engineering
39. M.Tech- Communication Systems
40. M.Tech- Communication Engineering & Signal Processing
41. M.Tech- Microwave and Communication Engineering
42. M.Tech- Telematics
Page 16
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 343. M.Tech- Digital Systems & Computer Electronics
44. M.Tech- Embedded System
45. M.Tech- VLSI
46. M.Tech- VLSI Design
47. M.Tech- VLSI System Design
48. M.Tech- Embedded System & VLSI Design
49. M.Tech- VLSI & Embedded System
50. M.Tech- VLSI Design & Embedded Systems
51. M.Tech- Image Processing
52. M.Tech- Digital Image Processing
53. M.Tech- Computers & Communication
54. M.Tech- Computers & Communication Engineering
55. M.Tech- Instrumentation & Control Systems
56. M.Tech – VLSI & Micro Electronics
57. M.Tech – Digital Electronics & Communication Engineering
58. M.Tech- Embedded System & VLSI
59. M.Tech- Computer Science & Engineering
60. M.Tech- Computer Science
61. M.Tech- Computer Science & Technology
62. M.Tech- Computer Networks
63. M.Tech- Computer Networks & Information Security
64. M.Tech- Information Technology
65. M.Tech- Software Engineering
66. M.Tech- Neural Networks
67. M.Tech- Chemical Engineering
68. M.Tech- Biotechnology
69. M.Tech- Nano Technology
70. M.Tech- Food Processing
71. M.Tech- Avionics
and any other course as approved by AICTE/ University from time to time.
Page 17
4 2013-14
Civil Engg. 1. M.Tech- Structural Engineering2. M.Tech- Transportation Engineering3. M.Tech- Infrastructure Engineering & Management4. ME- Soil Mechanics and Foundation Engineering5. M.Tech- Environmental Engineering6. M.Tech-Geo-Informatics7. M.Tech-Spatial Information Technology8. M.Tech- Civil Engineering9. M.Tech -Geo-Technical Engineering10. M.Tech- Remote Sensing
E E E 1. M.Tech- Power Electronics2. M.Tech- Power & Industrial Drives3. M.Tech- Power Electronics & Electrical Drives4. M.Tech- Power System Control & Automation5. M.Tech- Power Electronics & Drives6. M.Tech- Power Systems7. M.Tech- Power Systems Engineering8. M.Tech- High Voltage Engineering9. M.Tech- Power Electronics and Power Systems10. M.Tech- Power System and Control11. M.Tech- Power Electronics & Systems12. M.Tech- Electrical Machines and Drives13. M.Tech- Advanced Power Systems14. M.Tech- Power Systems with Emphasis on High
Voltage Engineering15. M.Tech- Control Engineering16. M.Tech- Control Systems17. M.Tech- Electrical Power Engineering18. M.Tech- Power Engineering & Energy System
M E 1. M.Tech- Thermal Engineering2. M.Tech- CAD/CAM3. M.Tech- Machine Design4. M.Tech- Computer Aided Design and Manufacture5. M.Tech- Advanced Manufacturing Systems6. M.Tech-Computer Aided Analysis & Design7. M.Tech- Mechanical Engineering Design
3.0 B. Departments offering M. Tech Programmes with specializationsare noted below:
Page 18
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 5E C E 1. M.Tech- Systems and Signal Processing
2. M.Tech- Digital Electronics and CommunicationSystems
3. M.Tech- Electronics & Communications Engineering4. M.Tech- Communication Systems5. M.Tech- Communication Engineering & Signal
Processing6. M.Tech- Microwave and Communication Engineering7. M.Tech- Telematics8. M.Tech- Digital Systems & Computer Electronics9. M.Tech- Embedded System10. M.Tech- VLSI11. M.Tech- VLSI Design12. M.Tech- VLSI System Design13. M.Tech- Embedded System & VLSI Design14. M.Tech- VLSI & Embedded System15. M.Tech- VLSI Design & Embedded Systems16. M.Tech- Image Processing17. M.Tech- Digital Image Processing18. M.Tech- Computers & Communication19. M.Tech- Computers & Communication Engineering20. M.Tech- Instrumentation & Control Systems21. M.Tech – VLSI & Micro Electronics22. M.Tech – Digital Electronics & Communication
Engineering23. M.Tech- Embedded System & VLSI
CSE 1. M.Tech- Computer Science & Engineering2. M.Tech- Computer Science3. M.Tech- Computer Science & Technology4. M.Tech- Computer Networks5. M.Tech- Computer Networks & Information Security6. M.Tech- Information Technology7. M.Tech- Software Engineering8. M.Tech- Neural Networks
Others 1. M.Tech- Chemical Engineering2. M.Tech- Biotechnology3. M.Tech- Nano Technology4. M.Tech- Food Processing5. M.Tech- Avionics
Page 19
6 2013-144.0 ATTENDANCE
4.1 A student shall be eligible to write University examinations if he
acquires a minimum of 75% of attendance in aggregate of all the
subjects.
4.2 Condonation of shortage of attendance in aggregate up to 10%
(65% and above and below 75%) in each semester shall be
granted by the College Academic Committee.
4.3 Shortage of Attendance below 65% in aggregate shall not be
condoned.
4.4 Students whose shortage of attendance is not condoned in
any semester are not eligible to write their end semester
examination of that class.
4.5 A prescribed fee shall be payable towards condonation of
shortage of attendance.
4.6 A student shall not be promoted to the next semester unless he
satisfies the attendance requirement of the present semester, as
applicable. They may seek readmission into that semester when
offered next. If any candidate fulfills the attendance requirement
in the present semester, he shall not be eligible for readmission
into the same class.
5.0 EVALUATIONThe performance of the candidate in each semester shall be evaluated
subject-wise, with a maximum of 100 marks for theory and 100 marks for
practicals, on the basis of Internal Evaluation and End Semester Examination.
5.1 For the theory subjects 60 marks shall be awarded based on the
performance in the End Semester Examination and 40 marks
shall be awarded based on the Internal Evaluation. The internal
evaluation shall be made based on the average of the marks
secured in the two Mid Term-Examinations conducted-one in
the middle of the Semester and the other immediately after the
completion of instruction. Each mid term examination shall be
conducted for a total duration of 120 minutes with 4 questions
(without choice) each question for 10 marks. End semester
examination is conducted for 60 marks for 5 questions to be
answered out of 8 questions.
Page 20
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 75.2 For practical subjects, 60 marks shall be awarded based on the
performance in the End Semester Examinations and 40 marksshall be awarded based on the day-to-day performance asInternal Marks.
5.3 There shall be two seminar presentations during III semesterand IV semester. For seminar, a student under the supervisionof a faculty member, shall collect the literature on a topic andcritically review the literature and submit it to the department ina report form and shall make an oral presentation before theProject Review Committee consisting of Head of the Department,Supervisor and two other senior faculty members of thedepartment. For each Seminar there will be only internalevaluation of 50 marks. A candidate has to secure a minimum of50% of marks to be declared successful.
5.4 A candidate shall be deemed to have secured the minimumacademic requirement in a subject if he secures a minimum of40% of marks in the End semester Examination and a minimumaggregate of 50% of the total marks in the End SemesterExamination and Internal Evaluation taken together.
5.5 In case the candidate does not secure the minimum academicrequirement in any subject (as specified in 5.4) he has to reappearfor the End semester Examination in that subject. A candidateshall be given one chance to re-register for each subject providedthe internal marks secured by a candidate are less than 50% andhas failed in the end examination. In such a case, the candidatemust re-register for the subject(s) and secure the requiredminimum attendance. The candidate’s attendance in the re-registered subject(s) shall be calculated separately to decideupon his eligibility for writing the end examination in thosesubject(s). In the event of the student taking another chance,his internal marks and end examination marks obtained in theprevious attempt stand cancelled. For re-registration thecandidates have to apply to the University through the collegeby paying the requisite fees and get approval from theUniversity before the start of the semester in which re-registration is required.
Page 21
8 2013-145.6 In case the candidate secures less than the required attendance
in any re registered subject (s), he shall not be permitted to
write the End Examination in that subject. He shall again re-
register the subject when next offered.
5.7 Laboratory examination for M. Tech. courses must be conducted
with two Examiners, one of them being the Laboratory Class
Teacher or teacher of the respective college and the second
examiner shall be appointed by the university from the panel of
examiners submitted by the respective college.
6.0 EVALUATION OF PROJECT/DISSERTATION WORKEvery candidate shall be required to submit a thesis or dissertation
on a topic approved by the Project Review Committee.
6.1 A Project Review Committee (PRC) shall be constituted with
Head of the Department and two other senior faculty members.
6.2 Registration of Project Work: A candidate is permitted to register
for the project work after satisfying the attendance requirement
of all the subjects, both theory and practical.
6.3 After satisfying 6.2, a candidate has to submit, in consultation
with his project supervisor, the title, objective and plan of action
of his project work for approval. The student can initiate the
Project work, only after obtaining the approval from the Project
Review Committee (PRC).
6.4 If a candidate wishes to change his supervisor or topic of the
project, he can do so with the approval of the Project Review
Committee (PRC). However, the Project Review Committee (PRC)
shall examine whether or not the change of topic/supervisor
leads to a major change of his initial plans of project proposal.
If yes, his date of registration for the project work starts from
the date of change of Supervisor or topic as the case may be.
6.5 A candidate shall submit his status report in two stages at least
with a gap of 3 months between them.
6.6 The work on the project shall be initiated at the beginning of
the II year and the duration of the project is two semesters. A
candidate is permitted to submit Project Thesis only after
Page 22
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 9successful completion of theory and practical course with the
approval of PRC not earlier than 40 weeks from the date of
registration of the project work. The candidate has to pass all
the theory and practical subjects before submission of the
Thesis.
6.7 Three copies of the Project Thesis certified by the supervisor
shall be submitted to the College/School/Institute.
6.8 The thesis shall be adjudicated by one examiner selected by the
University. For this, the Principal of the College shall submit a
panel of 5 examiners, eminent in that field, with the help of the
guide concerned and head of the department.
6.9 If the report of the examiner is not favourable, the candidate
shall revise and resubmit the Thesis, in the time frame as decided
by the PRC. If the report of the examiner is unfavorable again,
the thesis shall be summarily rejected. The candidate has to re-
register for the project and complete the project within the
stipulated time after taking the approval from the University.
6.10 If the report of the examiner is favourable, Viva-Voce examination
shall be conducted by a board consisting of the Supervisor,
Head of the Department and the examiner who adjudicated the
Thesis. The Board shall jointly report the candidate’s work as
one of the following:
A. Excellent
B. Good
C. Satisfactory
D. Unsatisfactory
The Head of the Department shall coordinate and make arrangements
for the conduct of Viva-Voce examination.
6.11 If the report of the Viva-Voce is unsatisfactory, the candidate
shall retake the Viva-Voce examination only after three months.
If he fails to get a satisfactory report at the second Viva-Voce
examination, the candidate has to re-register for the project and
complete the project within the stipulated time after taking the
approval from the University.
Page 23
10 2013-147.0 AWARD OF DEGREE AND CLASS
After a student has satisfied the requirements prescribed for the
completion of the program and is eligible for the award of M. Tech. Degree
he shall be placed in one of the following four classes:
Class Awarded % of marks to be securedFirst Class with Distinction 70% and above (Without any
Supplementary Appearance )
First Class Below 70% but not less than 60%
70% and above (With any
Supplementary Appearance )
Second Class Below 60% but not less than 50%
The marks in internal evaluation and end examination shall be shownseparately in the memorandum of marks.
8.0 WITHHOLDING OF RESULTSIf the student has not paid the dues, if any, to the university or if any
case of indiscipline is pending against him, the result of the student will bewithheld. His degree will be withheld in such cases.
4.0 TRANSITORY REGULATIONS ( for R09 )
9.1 Discontinued or detained candidates are eligible for re-admission into same or equivalent subjects at a time as andwhen offered.
9.2 The candidate who fails in any subject will be given twochances to pass the same subject; otherwise, he has to identifyan equivalent subject as per R13 academic regulations.
10. GENERAL
10.1 Wherever the words “he”, “him”, “his”, occur in theregulations, they include “she”, “her”, “hers”.
10.2 The academic regulation should be read as a whole for thepurpose of any interpretation.
10.3 In the case of any doubt or ambiguity in the interpretation ofthe above rules, the decision of the Vice-Chancellor is final.
10.4 The University may change or amend the academic regulationsor syllabi at any time and the changes or amendments madeshall be applicable to all the students with effect from thedates notified by the University.
Page 24
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 11
MALPRACTICES RULESDISCIPLINARY ACTION FOR / IMPROPER CONDUCT IN
EXAMINATIONS
If the candidate:
Nature of Malpractices/Improper conduct
Punishment
1. (a) Possesses or keeps accessible
in examination hall, any paper,
note book, programmable
calculators, Cell phones, pager,
palm computers or any other
form of material concerned
with or related to the subject
of the examination (theory or
practical) in which he is
appearing but has not made
use of (material shall include
any marks on the body of the
candidate which can be used
as an aid in the subject of the
examination)
(b) Gives assistance or guidance
or receives it from any other
candidate orally or by any
other body language methods
or communicates through cell
phones with any candidate or
persons in or outside the exam
hall in respect of any matter.
2. Has copied in the examination
hall from any paper, book,
programmable calculators,
palm computers or any other
form of material relevant to the
subject of the examination
Expulsion from the examination hall
and cancellation of the
performance in that subject only.
Expulsion from the examination hall
and cancellation of the
performance in that subject only of
all the candidates involved. In case
of an outsider, he will be handed
over to the police and a case is
registered against him.
Expulsion from the examination hall
and cancellation of the
performance in that subject and all
other subjects the candidate has
already appeared including
practical examinations and project
Page 25
12 2013-14
work and shall not be permitted to
appear for the remaining
examinations of the subjects of that
Semester/year. The Hall Ticket of
the candidate is to be cancelled
and sent to the University.
The candidate who has
impersonated shall be expelled from
examination hall. The candidate is
also debarred and forfeits the seat.
The performance of the original
candidate who has been
impersonated, shall be cancelled in
all the subjects of the examination
(including practicals and project
work) already appeared and shall
not be allowed to appear for
examinations of the remaining
subjects of that semester/year. The
candidate is also debarred for two
consecutive semesters from class
work and all University
examinations. The continuation of
the course by the candidate is
subject to the academic regulations
in connection with forfeiture of
seat. If the imposter is an outsider,
he will be handed over to the police
and a case is registered against him.
Expulsion from the examination hall
and cancellation of performance in
that subject and all the other
subjects the candidate has already
appeared including practical
examinations and project work and
(theory or practical) in which
the candidate is appearing.
3. Impersonates any other
candidate in connection with
the examination.
4. Smuggles in the Answer book
or additional sheet or takes out
or arranges to send out the
question paper during the
examination or answer book or
additional sheet, during or after
Page 26
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 13
shall not be permitted for the
remaining examinations of the
subjects of that semester/year. The
candidate is also debarred for two
consecutive semesters from class
work and all University
examinations. The continuation of
the course by the candidate is
subject to the academic regulations
in connection with forfeiture of seat.
Cancellation of the performance in
that subject.
In case of students of the college,
they shall be expelled from
examination halls and cancellation of
their performance in that subject and
all other subjects the candidate(s)
has (have) already appeared and
shall not be permitted to appear for
the remaining examinations of the
subjects of that semester/year. The
candidates also are debarred and
forfeit their seats. In case of
outsiders, they will be handed over
to the police and a police case is
registered against them.
the examination.
5. Uses objectionable, abusive or
offensive language in the
answer paper or in letters to the
examiners or writes to the
examiner requesting him to
award pass marks.
6. Refuses to obey the orders of
the Chief Superintendent/
Assistant – Superintendent /
any officer on duty or
misbehaves or creates
disturbance of any kind in and
around the examination hall or
organizes a walk out or
instigates others to walk out,
or threatens the officer-in
charge or any person on duty
in or outside the examination
hall of any injury to his person
or to any of his relations
whether by words, either
spoken or written or by signs
or by visible representation,
assaults the officer-in-charge,
or any person on duty in or
Page 27
14 2013-14
Expulsion from the examination halland cancellation of performance inthat subject and all the othersubjects the candidate has alreadyappeared including practicalexaminations and project work andshall not be permitted for theremaining examinations of thesubjects of that semester/year. Thecandidate is also debarred for twoconsecutive semesters from classwork and all Universityexaminations. The continuation ofthe course by the candidate issubject to the academic regulationsin connection with forfeiture of seat.Expulsion from the examination halland cancellation of the performancein that subject and all other subjectsthe candidate has already appearedincluding practical examinationsand project work and shall not bepermitted for the remaining
outside the examination hall orany of his relations, orindulges in any other act ofmisconduct or mischief whichresult in damage to ordestruction of property in theexamination hall or any part ofthe College campus orengages in any other act whichin the opinion of the officer onduty amounts to use of unfairmeans or misconduct or hasthe tendency to disrupt theorderly conduct of theexamination.
7. Leaves the exam hall takingaway answer script orintentionally tears of the scriptor any part thereof inside oroutside the examination hall.
8. Possess any lethal weapon orfirearm in the examination hall.
Page 28
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 15
9. If student of the college, whois not a candidate for theparticular examination or anyperson not connected with thecollege indulges in anymalpractice or improperconduct mentioned in clause 6to 8.
10. Comes in a drunken conditionto the examination hall.
11. Copying detected on the basisof internal evidence, such as,during valuation or duringspecial scrutiny.
12. If any malpractice is detectedwhich is not covered in theabove clauses 1 to 11 shall bereported to the University for further actionto award suitable punishment.
examinations of the subjects of thatsemester/year. The candidate isalso debarred and forfeits the seat.Student of the colleges expulsionfrom the examination hall andcancellation of the performance inthat subject and all other subjectsthe candidate has already appearedincluding practical examinationsand project work and shall not bepermitted for the remainingexaminations of the subjects of thatsemester/year. The candidate is alsodebarred and forfeits the seat.Person(s) who do not belong to theCollege will be handed over to policeand, a police case will be registeredagainst them.Expulsion from the examination halland cancellation of theperformance in that subject and allother subjects the candidate hasalready appeared includingpractical examinations and projectwork and shall not be permitted forthe remaining examinations of thesubjects of that semester/year.Cancellation of the performance inthat subject and all other subjectsthe candidate has appearedincluding practical examinationsand project work of that semester/year examinations.
Page 29
16 2013-14Malpractices identified by squad or special invigilators1. Punishments to the candidates as per the above guidelines.
2. Punishment for institutions : (if the squad reports that the college is
also involved in encouraging malpractices)
(i) A show cause notice shall be issued to the college.
(ii) Impose a suitable fine on the college.
(iii) Shifting the examination centre from the college to another
college for a specific period of not less than one year.
Page 30
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 17
KAKINADA-533003, Andhra Pradesh (India)For Constituent Colleges and Affiliated Colleges of JNTUK
Prohibition of ragging in educational institutions Act 26 of 1997
RaggingSalient Features
� Ragging within or outside any educational institution is prohibited.� Ragging means doing an act which causes or is likely to cause Insult
or Annoyance of Fear or Apprehension or Threat or Intimidation oroutrage of modesty or Injury to a student
JAWAHARLAL NEHRU TECHNOLOGICALUNIVERSITY: KAKINADA
Imprisonment upto Fine Upto
Teasing,Embarrassing and
Humiliation
Assaulting orUsing Criminal
force or Criminalintimidation
Wrongfullyrestraining orconfining orcausing hurt
Causing grievoushurt, kidnapping
or Abducts or rapeor committing
unnatural offence
Causing death orabetting suicide
6 Months
1 Year
2 Years
5 Years
10 Months
+ Rs. 1,000/-
+ Rs. 2,000/-
+ Rs. 5,000/-
+ Rs.10,000/-
+ Rs. 50,000/-
In Case of Emergency CALL TOLL FREE NO. : 1800 - 425 - 1288
LET US MAKE JNTUK A RAGGING FREE UNIVERSITY
Page 31
18 2013-14
KAKINADA-533003, Andhra Pradesh (India)For Constituent Colleges and Affiliated Colleges of JNTUK
Ragging
JAWAHARLAL NEHRU TECHNOLOGICALUNIVERSITY: KAKINADA
ABSOLUTELYNO TO RAGGING
1. Ragging is prohibited as per Act 26 of A.P. Legislative Assembly,
1997.
2. Ragging entails heavy fines and/or imprisonment.
3. Ragging invokes suspension and dismissal from the College.
4. Outsiders are prohibited from entering the College and Hostel without
permission.
5. Girl students must be in their hostel rooms by 7.00 p.m.
6. All the students must carry their Identity Card and show them when
demanded
7. The Principal and the Wardens may visit the Hostels and inspect the
rooms any time.
Jawaharlal Nehru Technological University KakinadaFor Constituent Colleges and Affiliated Colleges of JNTUK
In Case of Emergency CALL TOLL FREE NO. : 1800 - 425 - 1288
LET US MAKE JNTUK A RAGGING FREE UNIVERSITY
Page 32
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 19
I SEMESTERI SEMESTERI SEMESTERI SEMESTERI SEMESTER
S.NoS.NoS.NoS.NoS.No Name of the SubjectName of the SubjectName of the SubjectName of the SubjectName of the Subject LLLLL PPPPP CCCCC
1 VLSI Technology and Design 4 - 3
2 CMOS Analog IC Design 4 - 3
3 CPLD and FPGA Architectures and Applications 4 - 3
4 CMOS Digital IC Design 4 - 3
5 Elective IElective IElective IElective IElective I
Digital System Design 4 - 3
Advanced Operating Systems
Soft Computing Techniques
6 Elective IIElective IIElective IIElective IIElective II
Digital Design using HDL 4 - 3
Advanced Computer Architecture
Hardware Software Co-Design
7 LaboratoryLaboratoryLaboratoryLaboratoryLaboratory
VLSI Laboratory-I - 3 2
TTTTTOTOTOTOTOTALALALALAL 2020202020
II SEMESTERII SEMESTERII SEMESTERII SEMESTERII SEMESTER
1 Low Power VLSI Design 4 - 3
2 CMOS Mixed Signal Circuit Design 4 - 3
3 CAD for VLSI 4 - 3
4 Design For Testability 4 - 3
5 Elective IIIElective IIIElective IIIElective IIIElective III
Scripting Languages 4 - 3
Digital Signal Processors & Architectures
VLSI Signal Processing
6 Elective IVElective IVElective IVElective IVElective IV
System on Chip Design 4 - 3
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERINGSpecialization: VLSI/ VLSI Design/ VLSI System Design/ VLSI &
Micro Electronics
COURSE STRUCTURE
Page 33
20 2013-14
Optimization Techniques in VLSI Design
Semiconductor Memory Design and Testing
7 LaboratoryLaboratoryLaboratoryLaboratoryLaboratory
VLSI Laboratory-II - 3 2
TTTTTOTOTOTOTOTALALALALAL 2020202020
IV – SEMESTERIV – SEMESTERIV – SEMESTERIV – SEMESTERIV – SEMESTER
1 Seminar — — 2
2 Project (Continued) — — 18
TTTTTotalotalotalotalotal 2020202020
III – SEMESTERIII – SEMESTERIII – SEMESTERIII – SEMESTERIII – SEMESTER
1 Seminar — — 2
2 Project — — 18
TTTTTotalotalotalotalotal 2020202020
The project will be evaluated at the end of the IV SemesterThe project will be evaluated at the end of the IV SemesterThe project will be evaluated at the end of the IV SemesterThe project will be evaluated at the end of the IV SemesterThe project will be evaluated at the end of the IV Semester
Page 34
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 21
SYLLABUS
I – II – II – II – II – I LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
VLSI TECHNOLOGY AND DESIGNUNIT-I
VLSI Technology: Fundamentals and applications, IC production
process, semiconductor processes, design rules and process
parameters, layout techniques and process parameters.
VLSI Design: Electronic design automation concept, ASIC and FPGA
design flows, SOC designs, design technologies: combinational design
techniques, sequential design techniques, state machine logic design
techniques and design issues.
UNIT-II
CMOS VLSI Design: MOS Technology and fabrication process of
pMOS, nMOS, CMOS and BiCMOS technologies, comparison of
different processes.
Building Blocks of a VLSI circuit: Computer architecture, memory
architectures, communication interfaces, mixed signal interfaces.
VLSI Design Issues: Design process, design for testability, technology
options, power calculations, package selection, clock mechanisms,
mixed signal design.
UNIT-III
Basic electrical properties of MOS and BiCMOS circuits, MOS and
BiCMOS circuit design processes, Basic circuit concepts, scaling of
MOS circuits-qualitatitive and quantitative analysis with proper
illustrations and necessary derivations of expressions.
UNIT-IV
Subsystem Design and Layout: Some architectural issues, switch logic,
gate logic, examples of structured design (combinational logic), some
clocked sequential circuits, other system considerations.
Subsystem Design Processes: Some general considerations and an
illustration of design processes, design of an ALU subsystem.
Page 35
22 2013-14UNIT-V
Floor Planning: Introduction, Floor planning methods, off-chip
connections.
Architecture Design: Introduction, Register-Transfer design, high-
level synthesis, architectures for low power, architecture testing.
Chip Design: Introduction and design methodologies.
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A.
Pucknell, Sholeh Eshraghian, 2005, PHI Publications.
2. Modern VLSI Design-Wayne Wolf, 3rd Ed., 1997, Pearson Education.
3. VLSI Design-Dr.K.V.K.K.Prasad, Kattula Shyamala, Kogent Learning
Solutions Inc., 2012.
REFERENCE BOOKS:
1. VLSI Design Technologies for Analog and Digital Circuits, Randall
L.Geiger, Phillip E.Allen, Noel R.Strader, TMH Publications, 2010.
2. Introduction to VLSI Systems: A Logic, Circuit and System Perspective-
Ming-BO Lin, CRC Press, 2011.
3. Principals of CMOS VLSI Design-N.H.E Weste, K. Eshraghian, 2nd
Edition, Addison Wesley.
Page 36
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 23
I – II – II – II – II – I LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
CMOS ANALOG IC DESIGN
UNIT –I
MOS Devices and Modeling The MOS Transistor, Passive Components-
Capacitor & Resistor, Integrated circuit Layout, CMOS Device
Modeling - Simple MOS Large-Signal Model, Other Model Parameters,
Small-Signal Model for the MOS Transistor, Computer Simulation
Models, Sub-threshold MOS Model.
UNIT –II
Analog CMOS Sub-Circuits MOS Switch, MOS Diode, MOS Active
Resistor, Current Sinks and Sources, Current Mirrors-Current mirror
with Beta Helper, Degeneration, Cascode current Mirror and Wilson
Current Mirror, Current and Voltage References, Band gap Reference.
UNIT –III
CMOS Amplifiers Inverters, Differential Amplifiers, Cascode
Amplifiers, Current Amplifiers, Output Amplifiers, High Gain Amplifiers
Architectures.
UNIT –IV
CMOS Operational Amplifiers Design of CMOS Op Amps,
Compensation of Op Amps, Design of Two-Stage Op Amps, Power-
Supply Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps,
Measurement Techniques of OP Amp.
UNIT –V
Comparators Characterization of Comparator, Two-Stage, Open-Loop
Comparators, Other Open-Loop Comparators, Improving the
Performance of Open-Loop Comparators, Discrete-Time Comparators.
TEXT BOOKS:
1. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg,
Oxford University Press, International Second Edition/Indian Edition,
2010.
Page 37
24 2013-142. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul
J. Hurst, S. Lewis and R. G. Meyer, Wiley India, Fifth Edition, 2010.
REFERENCE BOOKS:
1. Analog Integrated Circuit Design- David A.Johns, Ken Martin, Wiley
Student Edn, 2013.
2. Design of Analog CMOS Integrated Circuits- Behzad Razavi, TMH
Edition.
3. CMOS: Circuit Design, Layout and Simulation- Baker, Li and Boyce,
PHI.
Page 38
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 25
I – II – II – II – II – I LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
CPLD AND FPGA ARCHITECURES ANDAPPLICATIONS
UNIT-I
Introduction to Programmable Logic Devices Introduction, Simple
Programmable Logic Devices – Read Only Memories, Programmable
Logic Arrays, Programmable Array Logic, Programmable Logic Devices/
Generic Array Logic; Complex Programmable Logic Devices –
Architecture of Xilinx Cool Runner XCR3064XL CPLD, CPLD
Implementation of a Parallel Adder with Accumulation.
UNIT-II
Field Programmable Gate Arrays Organization of FPGAs, FPGA
Programming Technologies, Programmable Logic Block Architectures,
Programmable Interconnects, Programmable I/O blocks in FPGAs,
Dedicated Specialized Components of FPGAs, Applications of FPGAs.
UNIT –III
SRAM Programmable FPGAs Introduction, Programming Technology,
Device Architecture, The Xilinx XC2000, XC3000 and XC4000
Architectures.
UNIT –IV
Anti-Fuse Programmed FPGAs Introduction, Programming
Technology, Device Architecture, The Actel ACT1, ACT2 and ACT3
Architectures.
UNIT –V
Design Applications General Design Issues, Counter Examples, A Fast
Video Controller, A Position Tracker for a Robot Manipulator, A Fast
DMA Controller, Designing Counters with ACT devices, Designing
Adders and Accumulators with the ACT Architecture.
Page 39
26 2013-14TEXT BOOKS:
1. Field Programmable Gate Array Technology - Stephen M. Trimberger,
Springer International Edition.
2. Digital Systems Design - Charles H. Roth Jr, Lizy Kurian John, Cengage
Learning.
REFERENCE BOOKS:
1. Field Programmable Gate Arrays - John V. Oldfield, Richard C. Dorf,
Wiley India.
2. Digital Design Using Field Programmable Gate Arrays - Pak K. Chan/
Samiha Mourad, Pearson Low Price Edition.
3. Digital Systems Design with FPGAs and CPLDs - Ian Grout, Elsevier,
Newnes.
4. FPGA based System Design - Wayne Wolf, Prentice Hall Modern
Semiconductor Design Series.
Page 40
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 27
I – II – II – II – II – I LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
CMOS DIGITAL IC DESIGN
UNIT-I
MOS Design Pseudo NMOS Logic – Inverter, Inverter threshold
voltage, Output high voltage, Output Low voltage, Gain at gate
threshold voltage, Transient response, Rise time, Fall time, Pseudo
NMOS logic gates, Transistor equivalency, CMOS Inverter logic.
UNIT-II
Combinational MOS Logic Circuits: MOS logic circuits with NMOS
loads, Primitive CMOS logic gates – NOR & NAND gate, Complex
Logic circuits design – Realizing Boolean expressions using NMOS
gates and CMOS gates , AOI and OIA gates, CMOS full adder, CMOS
transmission gates, Designing with Transmission gates.
UNIT-III
Sequential MOS Logic Circuits Behaviour of bistable elements, SR
Latch, Clocked latch and flip flop circuits, CMOS D latch and edge
triggered flip-flop.
UNIT-IV
Dynamic Logic Circuits Basic principle, Voltage Bootstrapping,
Synchronous dynamic pass transistor circuits, Dynamic CMOS
transmission gate logic, High performance Dynamic CMOS circuits.
UNIT-V
Semiconductor Memories Types, RAM array organization, DRAM –
Types, Operation, Leakage currents in DRAM cell and refresh operation,
SRAM operation Leakage currents in SRAM cells, Flash Memory-
NOR flash and NAND flash.
Page 41
28 2013-14TEXT BOOKS:
1. Digital Integrated Circuit Design – Ken Martin, Oxford University Press,
2011.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo
Kang, Yusuf Leblebici, TMH, 3rd Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective
– Ming-BO Lin, CRC Press, 2011
2. Digital Integrated Circuits – A Design Perspective, Jan M. Rabaey,
Anantha Chandrakasan, Borivoje Nikolic, 2nd Ed., PHI.
Page 42
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 29
I – II – II – II – II – I LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
(ELECTIVE-I)DIGITAL SYSTEM DESIGN
UNIT-I
Minimization Procedures and CAMP Algorithm Review on
minimization of switching functions using tabular methods, k-map, QM
algorithm, CAMP-I algorithm, Phase-I: Determination of Adjacencies,
DA, CSC, SSMs and EPCs,, CAMP-I algorithm, Phase-II: Passport
checking, Determination of SPC, CAMP-II algorithm: Determination of
solution cube, Cube based operations, determination of selected cubes
are wholly within the given switching function or not, Introduction to
cube based algorithms.
UNIT-II
PLA Design, PLA Minimization and Folding Algorithms Introduction
to PLDs, basic configurations and advantages of PLDs, PLA-
Introduction, Block diagram of PLA, size of PLA, PLA design aspects,
PLA minimization algorithm(IISc algorithm), PLA folding
algorithm(COMPACT algorithm)-Illustration of algorithms with suitable
examples.
UNIT –III
Design of Large Scale Digital Systems Algorithmic state machine
charts-Introduction, Derivation of SM Charts, Realization of SM Chart,
control implementation, control unit design, data processor design,
ROM design, PAL design aspects, digital system design approaches
using CPLDs, FPGAs and ASICs.
UNIT-IV
Fault Diagnosis in Combinational Circuits Faults classes and models,
fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test
methods- Path sensitization method, Boolean difference method,
properties of Boolean differences, Kohavi algorithm, faults in PLAs,
DFT schemes, built in self-test.
Page 43
30 2013-14UNIT-V
Fault Diagnosis in Sequential Circuits Fault detection and location in
sequential circuits, circuit test approach, initial state identification,
Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd Edition, 2001,
TMH
3. Digital system Design using PLDd-Lala
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th Ed., Cengage
Learning.
2. Digital Systems Testing and Testable Design – Miron Abramovici,
Melvin A. Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
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(ELECTIVE-I)ADVANCED OPERATING SYSTEMS
UNIT-I
Introduction to Operating Systems Overview of computer system
hardware, Instruction execution, I/O function, Interrupts, Memory
hierarchy, I/O Communication techniques, Operating system objectives
and functions, Evaluation of operating System
UNIT-II
Introduction to UNIX and LINUX Basic Commands & Command
Arguments, Standard Input, Output, Input / Output Redirection, Filters
and Editors, Shells and Operations
UNIT –III
System Calls: System calls and related file structures, Input / Output,
Process creation & termination.
Inter Process Communication: Introduction, File and record locking,
Client – Server example, Pipes, FIFOs, Streams & Messages, Name
Spaces, Systems V IPC, Message queues, Semaphores, Shared Memory,
Sockets & TLI.
UNIT –IV
Introduction to Distributed Systems: Goals of distributed system,
Hardware and software concepts, Design issues.
Communication in Distributed Systems: Layered protocols, ATM
networks, Client - Server model, Remote procedure call and Group
communication.
UNIT –V
Synchronization in Distributed Systems: Clock synchronization,
Mutual exclusion, E-tech algorithms, Bully algorithm, Ring algorithm,
Atomic transactions
Deadlocks: Dead lock in distributed systems, Distributed dead lock
prevention and distributed dead lock detection.
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32 2013-14TEXT BOOKS:
1. The Design of the UNIX Operating Systems – Maurice J. Bach, 1986,
PHI.
2. Distributed Operating System - Andrew. S. Tanenbaum, 1994, PHI.
3. The Complete Reference LINUX – Richard Peterson, 4th Ed., McGraw –
Hill.
REFERENCE BOOKS:
1. Operating Systems: Internal and Design Principles - Stallings, 6th Ed.,
PE.
2. Modern Operating Systems - Andrew S Tanenbaum, 3rd Ed., PE.
3. Operating System Principles - Abraham Silberchatz, Peter B. Galvin,
Greg Gagne, 7th Ed., John Wiley
4. UNIX User Guide – Ritchie & Yates.
5. UNIX Network Programming - W.Richard Stevens, 1998, PHI.
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(ELECTIVE-I)SOFT COMPUTING TECHNIQUES
UNIT –I
Introduction: Approaches to intelligent control, Architecture for
intelligent control, Symbolic reasoning system, Rule-based systems,
the AI approach, Knowledge representation - Expert systems.
UNIT –II
Artificial Neural Networks: Concept of Artificial Neural Networks
and its basic mathematical model, McCulloch-Pitts neuron model,
simple perceptron, Adaline and Madaline, Feed-forward Multilayer
Perceptron, Learning and Training the neural network, Data Processing:
Scaling, Fourier transformation, principal-component analysis and
wavelet transformations, Hopfield network, Self-organizing network
and Recurrent network, Neural Network based controller.
UNIT –III
Fuzzy Logic System: Introduction to crisp sets and fuzzy sets, basic
fuzzy set operation and approximate reasoning, Introduction to fuzzy
logic modeling and control, Fuzzification, inferencing and
defuzzification, Fuzzy knowledge and rule bases, Fuzzy modeling and
control schemes for nonlinear systems, Self-organizing fuzzy logic
control, Fuzzy logic control for nonlinear time delay system.
UNIT –IV
Genetic Algorithm: Basic concept of Genetic algorithm and detail
algorithmic steps, Adjustment of free parameters, Solution of typical
control problems using genetic algorithm, Concept on some other
search techniques like Tabu search and anD-colony search techniques
for solving optimization problems.
UNIT –V
Applications: GA application to power system optimisation problem,
Case studies: Identification and control of linear and nonlinear dynamic
systems using MATLAB-Neural Network toolbox, Stability analysis
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34 2013-14of Neural-Network interconnection systems, Implementation of fuzzy
logic controller using MATLAB fuzzy-logic toolbox, Stability analysis
of fuzzy control systems.
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico
Publishing House, 1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India
Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. & Folger T.A.,
Prentice-Hall of India Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer
Academic Publishers, 1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa
Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New
Delhi.
5. Elements of Artificial Neural Networks - Kishan Mehrotra, Chelkuri K.
Mohan, Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam,
S. Sumati, S. N. Deepa,1/e, TMH, New Delhi.
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(ELECTIVE-II)DIGITAL DESIGN USING HDL
UNIT-I
Digital Logic Design using VHDL Introduction, designing with VHDL,
design entry methods, logic synthesis , entities , architecture , packages
and configurations, types of models: dataflow , behavioral , structural,
signals vs. variables, generics, data types, concurrent vs. sequential
statements , loops and program controls.
Digital Logic Design using Verilog HDL Introduction, Verilog Data
types and Operators, Binary data manipulation, Combinational and
Sequential logic design, Structural Models of Combinational Logic,
Logic Simulation, Design Verification and Test Methodology,
Propagation Delay, Truth Table models using Verilog.
UNIT-II
Combinational Logic Circuit Design using VHDL Combinational
circuits building blocks: Multiplexers, Decoders , Encoders , Code
converters, Arithmetic comparison circuits , VHDL for combinational
circuits , Adders-Half Adder, Full Adder, Ripple-Carry Adder, Carry
Look-Ahead Adder, Subtraction, Multiplication.
Sequential Logic Circuit Design using VHDL Flip-flops, registers &
counters, synchronous sequential circuits: Basic design steps, Mealy
State model, Design of FSM using CAD tools, Serial Adder Example,
State Minimization, Design of Counter using sequential Circuit
approach.
UNIT-III
Digital Logic Circuit Design Examples using Verilog HDL Behavioral
modeling , Data types, Boolean-Equation-Based behavioral models of
combinational logics , Propagation delay and continuous assignments,
latches and level-sensitive circuits in Verilog, Cyclic behavioral models
of flip-flops and latches and Edge detection, comparison of styles for
behavioral model; Behavioral model, Multiplexers, Encoders and
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36 2013-14Decoders, Counters, Shift Registers, Register files, Dataflow models of
a linear feedback shift register, Machines with multi cycle operations,
ASM and ASMD charts for behavioral modeling, Design examples,
Keypad scanner and encoder.
UNIT-IV
Synthesis of Digital Logic Circuit Design Introduction to Synthesis,
Synthesis of combinational logic, Synthesis of sequential logic with
latches and flip-flops, Synthesis of Explicit and Implicit State Machines,
Registers and counters.
UNIT-V
Testing of Digital Logic Circuits and CAD Tools Testing of logic
circuits, fault model, complexity of a test set, path-sensitization, circuits
with tree structure, random tests, testing of sequential circuits, built in
self test, printed circuit boards, computer aided design tools, synthesis,
physical design.
TEXT BOOKS:
1. Stephen Brown & Zvonko Vranesic, “Fundamentals of Digital logic
design with VHDL”, Tata McGraw Hill,2nd edition.
2. Michael D. Ciletti, “Advanced digital design with the Verilog HDL”,
Eastern economy edition, PHI.
REFERENCE BOOKS:
1. Stephen Brown & Zvonko Vranesic, “Fundamentals of Digital logic
with Verilog design”, Tata McGraw Hill,2nd edition.
2. Bhaskar, “VHDL Primer”,3rd Edition, PHI Publications.
3. Ian Grout, “Digital systems design with FPGAs and CPLDs”, Elsevier
Publications.
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(ELECTIVE-II)ADVANCED COMPUTER ARCHITECTURE
UNIT-I
Fundamentals of Computer Design Fundamentals of Computer design,
Changing faces of computing and task of computer designer,
Technology trends, Cost price and their trends, measuring and reporting
performance, Quantitative principles of computer design, Amdahl’s
law.
Instruction set principles and examples- Introduction, classifying
instruction set- memory addressing- type and size of operands,
Operations in the instruction set.
UNIT-II
Pipelines Introduction, basic RISC instruction set, Simple
implementation of RISC instruction set, Classic five stage pipe lined
RISC processor, Basic performance issues in pipelining, Pipeline
hazards, Reducing pipeline branch penalties.
Memory Hierarchy Design Introduction, review of ABC of cache,
Cache performance, Reducing cache miss penalty, Virtual memory.
UNIT-III
Instruction Level Parallelism (ILP)-The Hardware Approach
Instruction-Level parallelism, Dynamic scheduling, Dynamic scheduling
using Tomasulo’s approach, Branch prediction, High performance
instruction delivery- Hardware based speculation.
ILP Software Approach Basic compiler level techniques, Static branch
prediction, VLIW approach, Exploiting ILP, Parallelism at compile time,
Cross cutting issues - Hardware verses Software.
UNIT-IV
Multi Processors and Thread Level Parallelism Multi Processors and
Thread level Parallelism- Introduction, Characteristics of application
Page 51
38 2013-14domain, Systematic shared memory architecture, Distributed shared –
Memory architecture, Synchronization.
UNIT-V
Inter Connection and Networks Introduction, Interconnection network
media, Practical issues in interconnecting networks, Examples of inter
connection, Cluster, Designing of clusters.
Intel Architecture Intel IA-64 ILP in embedded and mobile markets
Fallacies and pit falls.
TEXT BOOKS:
1. John L. Hennessy, David A. Patterson - Computer Architecture: A
Quantitative Approach, 3rd Edition, an Imprint of Elsevier.
REFERENCE BOOKS:
1. John P. Shen and Miikko H. Lipasti -, Modern Processor Design :
Fundamentals of Super Scalar Processors
2. Computer Architecture and Parallel Processing - Kai Hwang, Faye
A.Brigs., MC Graw Hill.
3. Advanced Computer Architecture - A Design Space Approach, Dezso
Sima, Terence Fountain, Peter Kacsuk, Pearson Ed.
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(ELECTIVE-II)HARDWARE SOFTWARE CO-DESIGN
UNIT-I
Co- Design Issues Co- Design Models, Architectures, Languages, AGeneric Co-design Methodology.
Co- Synthesis Algorithms Hardware software synthesis algorithms:hardware – software partitioning distributed system co-synthesis.
UNIT-II
Prototyping and Emulation Prototyping and emulation techniques,prototyping and emulation environments, future developments inemulation and prototyping architecture specialization techniques,system communication infrastructure
Target Architectures Architecture Specialization techniques, SystemCommunication infrastructure, Target Architecture and ApplicationSystem classes, Architecture for control dominated systems (8051-Architectures for High performance control), Architecture for Datadominated systems (ADSP21060, TMS320C60), Mixed Systems.
UNIT-III
Compilation Techniques and Tools for Embedded ProcessorArchitectures Modern embedded architectures, embedded softwaredevelopment needs, compilation technologies, practical considerationin a compiler development environment.
UNIT-IV:
Design Specification and Verification Design, co-design, the co-designcomputational model, concurrency coordinating concurrentcomputations, interfacing components, design verification,implementation verification, verification tools, interface verification.
UNIT-V:
Languages for System-Level Specification and Design-I
System-level specification, design representation for system levelsynthesis, system level specification languages.
Page 53
40 2013-14Languages for System-Level Specification and Design-IIHeterogeneous specifications and multi language co-simulation, thecosyma system and lycos system.
TEXT BOOKS:
1. Hardware / Software Co- Design Principles and Practice – JorgenStaunstrup, Wayne Wolf – 2009, Springer.
2. Hardware / Software Co- Design - Giovanni De Micheli, MariagiovannaSami, 2002, Kluwer Academic Publishers.
REFERENCE BOOKS:
1. A Practical Introduction to Hardware/Software Co-design -Patrick R.Schaumont - 2010 – Springer Publications.
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VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 41
I – III – III – III – III – II LLLLL P P P P P CreditsCreditsCreditsCreditsCredits----- 33333 22222
VLSI LABORATORY-I• The students are required to design the logic circuit to perform the
following experiments using necessary simulator (Xilinx ISE Simulator/Mentor Graphics Questa Simulator) to verify the logical /functionaloperation and to perform the analysis with appropriate synthesizer(Xilinx ISE Synthesizer/Mentor Graphics Precision RTL) and then verifythe implemented logic with different hardware modules/kits (CPLD/FPGA kits).
• The students are required to acquire the knowledge in both thePlatforms (Xilinx and Mentor graphics) by perform at least FIVEexperiments on each Platform.
List of Experiments:
1. Realization of Logic gates.
2. Parity Encoder.
3. Random Counter
4. Single Port Synchronous RAM.
5. Synchronous FIFO.
6. ALU.
7. UART Model.
8. Dual Port Asynchronous RAM.
9. Fire Detection and Control System using Combinational Logic circuits.
10. Traffic Light Controller using Sequential Logic circuits
11. Pattern Detection using Moore Machine.
12. Finite State Machine(FSM) based logic circuit.
Lab Requirements:
Software:
Xilinx ISE Suite 13.2 Version, Mentor Graphics-Questa Simulator, MentorGraphics-Precision RTL
Hardware:
Personal Computer with necessary peripherals, configuration andoperating System and relevant VLSI (CPLD/FPGA) hardware Kits.
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LOW POWER VLSI DESIGNUNIT-I
Fundamentals of Low Power VLSI Design Need for Low Power CircuitDesign, Sources of Power Dissipation – Switching Power Dissipation,Short Circuit Power Dissipation, Leakage Power Dissipation, GlitchingPower Dissipation, Short Channel Effects –Drain Induced BarrierLowering and Punch Through, Surface Scattering, Velocity Saturation,Impact Ionization, Hot Electron Effect.
UNIT-II
Low-Power Design Approaches Low-Power Design through VoltageScaling – VTCMOS circuits, MTCMOS circuits, Architectural LevelApproach –Pipelining and Parallel Processing Approaches.
Switched Capacitance Minimization Approaches
System Level Measures, Circuit Level Measures, Mask level Measures.
UNIT-III
Low-Voltage Low-Power Adders Introduction, Standard Adder Cells,CMOS Adder’s Architectures – Ripple Carry Adders, Carry Look-AheadAdders, Carry Select Adders, Carry Save Adders, Low-Voltage Low-Power Design Techniques –Trends of Technology and Power SupplyVoltage, Low-Voltage Low-Power Logic Styles.
UNIT-IV
Low-Voltage Low-Power Multipliers Introduction, Overview ofMultiplication, Types of Multiplier Architectures, Braun Multiplier,Baugh-Wooley Multiplier, Booth Multiplier, Introduction to WallaceTree Multiplier.
UNIT-V
Low-Voltage Low-Power Memories Basics of ROM, Low-Power ROMTechnology, Future Trend and Development of ROMs, Basics ofSRAM, Memory Cell, Precharge and Equalization Circuit, Low-PowerSRAM Technologies, Basics of DRAM, Self-Refresh Circuit, FutureTrend and Development of DRAM.
Page 56
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 43TEXT BOOKS:
1. CMOS Digital Integrated Circuits – Analysis and Design – Sung-MoKang, Yusuf Leblebici, TMH, 2011.
2. Low-Voltage, Low-Power VLSI Subsystems – Kiat-Seng Yeo, KaushikRoy, TMH Professional Engineering.
REFERENCE BOOKS:
1. Low Power CMOS Design – AnanthaChandrakasan, IEEE Press/WileyInternational, 1998.
2. Low Power CMOS VLSI Circuit Design – Kaushik Roy, Sharat C. Prasad,John Wiley & Sons, 2000.
3. Practical Low Power Digital VLSI Design – Gary K. Yeap, KluwerAcademic Press, 2002.
4. Low Power CMOS VLSI Circuit Design – A. Bellamour, M. I. Elamasri,Kluwer Academic Press, 1995.
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CMOS MIXED SIGNAL CIRCUIT DESIGNUNIT-I
Switched Capacitor Circuits Introduction to Switched Capacitor
circuits- basic building blocks, Operation and Analysis, Non-ideal
effects in switched capacitor circuits, Switched capacitor integrators
first order filters, Switch sharing, biquad filters.
UNIT-II
Phased Lock Loop (PLL) Basic PLL topology, Dynamics of simple
PLL, Charge pump PLLs-Lock acquisition, Phase/Frequency detector
and charge pump, Basic charge pump PLL, Non-ideal effects in PLLs-
PFD/CP non-idealities, Jitter in PLLs, Delay locked loops, applications.
UNIT-III
Data Converter Fundamentals DC and dynamic specifications,
Quantization noise, Nyquist rate D/A converters- Decoder based
converters, Binary-Scaled converters, Thermometer-code converters,
Hybrid converters
UNIT-IV
Nyquist Rate A/D Converters Successive approximation converters,
Flash converter, Two-step A/D converters, Interpolating A/D
converters, Folding A/D converters, Pipelined A/D converters, Time-
interleaved converters.
UNIT-V
Oversampling Converters Noise shaping modulators, Decimating
filters and interpolating filters, Higher order modulators, Delta sigma
modulators with multibit quantizers, Delta sigma D/A
TEXT BOOKS:
1. Design of Analog CMOS Integrated Circuits- Behzad Razavi, TMH
Edition, 2002
2. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg,
Page 58
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 45Oxford University Press, International Second Edition/Indian Edition,
2010.
3. Analog Integrated Circuit Design- David A. Johns,Ken Martin, Wiley
Student Edition, 2013
REFERENCE BOOKS:
1. CMOS Integrated Analog-to- Digital and Digital-to-Analog converters-
Rudy Van De Plassche, Kluwer Academic Publishers, 2003
2. Understanding Delta-Sigma Data converters-Richard Schreier, Wiley
Interscience, 2005.
3. CMOS Mixed-Signal Circuit Design - R. Jacob Baker, Wiley Interscience,
2009.
Page 59
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CAD FOR VLSIUNIT-I
VLSI Physical Design Automation VLSI Design Cycle, New Trends in
VLSI Design Cycle, Physical Design Cycle, New Trends in Physical
Design Cycle, Design Styles, System Packaging Styles;
UNIT-II
Partitioning, Floor Planning, Pin Assignment and PlacementPartitioning – Problem formulation, Classification of Partitioning
algorithms, Kernighan-Lin Algorithm, Simulated Annealing, Floor
Planning – Problem formulation, Classification of floor planning
algorithms, constraint based floor planning, Rectangular Dualization,
Pin Assignment – Problem formulation, Classification of pin assignment
algorithms, General and channel Pin assignments, Placement – Problem
formulation, Classification of placement algorithms, Partitioning based
placement algorithms;
UNIT-III
Global Routing and Detailed Routing Global Routing – Problem
formulation, Classification of global routing algorithms, Maze routing
algorithms, Detailed Routing – Problem formulation, Classification of
routing algorithms, Single layer routing algorithms;
UNIT-IV
Physical Design Automation of FPGAs and MCMs FPGA Technologies,
Physical Design cycle for FPGAs, Partitioning, Routing – Routing
Algorithm for the Non-Segmented model, Routing Algorithms for the
Segmented Model; Introduction to MCM Technologies, MCM Physical
Design Cycle.
UNIT-V
Chip Input and Output Circuits ESD Protection, Input Circuits, Output
Circuits and noise, On-chip clock Generation and Distribution,
Latch-up and its prevention.L
di
dt( (
Page 60
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 47TEXT BOOKS:
1. Algorithms for VLSI Physical Design Automation by Naveed Shervani,
3rd Edition, 2005, Springer International Edition.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo
Kang, Yusuf Leblebici, TMH, 3rd Ed., 2011.
REFERENCE BOOKS:
1. VLSI Physical Design Automation-Theory and Practice by Sadiq M
Sait, Habib Youssef, World Scientific.
2. Algorithms for VLSI Design Automation, S. H. Gerez, 1999, Wiley student
Edition, John Wiley and Sons (Asia) Pvt. Ltd.
3. VLSI Physical Design Automation by Sung Kyu Lim, Springer
International Edition.
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DESIGN FOR TESTABILITYUNIT-I
Introduction to Testing Testing Philosophy, Role of Testing, Digitaland Analog VLSI Testing, VLSI Technology Trends affecting Testing,Types of Testing, Fault Modeling: Defects, Errors and Faults, FunctionalVersus Structural Testing, Levels of Fault Models, Single Stuck-at Fault.
UNIT-II
Logic and Fault Simulation Simulation for Design Verification andTest Evaluation, Modeling Circuits for Simulation, Algorithms for True-value Simulation, Algorithms for Fault Simulation.
UNIT –IIITestability Measures SCOAP Controllability and Observability, HighLevel Testability Measures, Digital DFT and Scan Design: Ad-HocDFT Methods, Scan Design, Partial-Scan Design, Variations of Scan.
UNIT-IV
Built-In Self-Test The Economic Case for BIST, Random Logic BIST:Definitions, BIST Process, Pattern Generation, Response Compaction,Built-In Logic Block Observers, Test-Per-Clock, Test-Per-Scan BISTSystems, Circular Self Test Path System, Memory BIST, Delay FaultBIST.
UNIT-VBoundary Scan Standard Motivation, System Configuration withBoundary Scan: TAP Controller and Port, Boundary Scan TestInstructions, Pin Constraints of the Standard, Boundary ScanDescription Language: BDSL Description Components, PinDescriptions.
TEXT BOOKS:
1. Essentials of Electronic Testing for Digital, Memory and Mixed SignalVLSI Circuits - M.L. Bushnell, V. D. Agrawal, Kluwer Academic Pulishers.
REFERENCE BOOKS:1. Digital Systems and Testable Design - M. Abramovici, M.A.Breuer
and A.D Friedman, Jaico Publishing House.
2. Digital Circuits Testing and Testability - P.K. Lala, Academic Press.
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VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 49
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(ELECTIVE-III)SCRIPTING LANGUAGES
UNIT-I
Introduction to Scripts and Scripting Characteristics and uses of
scripting languages, Introduction to PERL, Names and values, Variables
and assignment, Scalar expressions, Control structures, Built-in
functions, Collections of Data, Working with arrays, Lists and hashes,
Simple input and output, Strings, Patterns and regular expressions,
Subroutines, Scripts with arguments.
UNIT-II
Advanced PERL Finer points of Looping, Subroutines, Using Pack and
Unpack, Working with files, Navigating the file system, Type globs,
Eval, References, Data structures, Packages, Libraries and modules,
Objects, Objects and modules in action, Tied variables, Interfacing to
the operating systems, Security issues.
UNIT-III
TCL The TCL phenomena, Philosophy, Structure, Syntax, Parser,
Variables and data in TCL, Control flow, Data structures, Simple input/
output, Procedures, Working with Strings, Patterns, Files and Pipes,
Example code.
UNIT-IV
Advanced TCL The eval, source, exec and up-level commands, Libraries
and packages, Namespaces, Trapping errors, Event-driven programs,
Making applications ‘Internet-aware’, ‘Nuts-and-bolts’ internet
programming, Security issues, running untrusted code, The C interface.
UNIT-V
TK, JavaScript and OOP Concepts Visual tool kits, Fundamental
concepts of TK, TK by example, Events and bindings, Geometry
managers, PERL-TK.
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50 2013-14JavaScript – Object models, Design Philosophy, Versions of JavaScript,
The Java Script core language
Object Oriented Programming Concepts (Qualitative Concepts Only):
Objects, Classes, Encapsulation, Data Hierarchy.
TEXT BOOKS:
1. The World of Scripting Languages- David Barron, Wiley Student
Edition, 2010.
2. Practical Programming in Tcl and Tk - Brent Welch, Ken Jones and Jeff
Hobbs., Fourth edition.
3. Java the Complete Reference - Herbert Schildt, 7th Edition, TMH.
REFERENCE BOOKS:
1. Tcl/Tk: A Developer’s Guide- Clif Flynt, 2003, Morgan Kaufmann SerieS.
2. Tcl and the Tk Toolkit- John Ousterhout, 2nd Edition, 2009, Kindel
Edition.
3. Tcl 8.5 Network Programming book- Wojciech Kocjan and Piotr
Beltowski, Packt Publishing.
4. Tcl/Tk 8.5 Programming Cookbook- Bert Wheeler
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(ELECTIVE-III)DIGITAL SIGNAL PROCESSORS & ARCHITECTURS
UNIT-I
Introduction to Digital Signal Processing Introduction, a Digital signal-
processing system, the sampling process, discrete time sequences.
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT),
Linear time-invariant systems, Digital filters, Decimation and
interpolation.
Computational Accuracy in DSP Implementations Number formats for
signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP
Computational errors, D/A Conversion Errors, Compensating filter.
UNIT-II
Architectures for Programmable DSP Devices Basic Architectural
features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT,
Programmability and Program Execution, Speed Issues, Features for
External interfacing.
UNIT-III
Programmable Digital Signal Processors Commercial Digital signal-
processing Devices, Data Addressing modes of TMS320C54XX DSPs,
Data Addressing modes of TMS320C54XX Processors, Memory space
of TMS320C54XX Processors, Program Control, TMS320C54XX
Instructions and Programming, On-Chip Peripherals, Interrupts of
TMS320C54XX Processors, Pipeline Operation of TMS320C54XX
Processors.
UNIT-IV
Analog Devices Family of DSP Devices Analog Devices Family of
DSP Devices – ALU and MAC block diagram, Shifter Instruction, Base
Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Black fin Processor - The Black fin Processor,
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52 2013-14Introduction to Micro Signal Architecture, Overview of Hardware
Processing Units and Register files, Address Arithmetic Unit, Control
Unit, Bus Architecture and Memory, Basic Peripherals.
UNIT-V
Interfacing Memory and I/O Peripherals to Programmable DSPDevices Memory space organization, External bus interfacing signals,
Memory interface, Parallel I/O interface, Programmed I/O, Interrupts
and I/O, Direct memory access (DMA).
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson
Publications, 2004.
2. A Practical Approach To Digital Signal Processing - K Padmanabhan,
R. Vijayarajeswaran, Ananthi. S, New Age International, 2006/2009
3. Embedded Signal Processing with the Micro Signal Architecture:
Woon-Seng Gan, Sen M. Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications-
B. Venkataramani and M. Bhaskar, 2002, TMH.
2. DSP Processor Fundamentals, Architectures & Features – Lapsley et
al. 2000, S. Chand & Co.
3. Digital Signal Processing Applications Using the ADSP-2100 Family
by The Applications Engineering Staff of Analog Devices, DSP Division,
Edited by Amy Mar, PHI
4. The Scientist and Engineer’s Guide to Digital Signal Processing by
Steven W. Smith, Ph.D., California Technical Publishing, ISBN 0-
9660176-3-3, 1997
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(ELECTIVE-III)VLSI SIGNAL PROCESSING
UNIT-I
Introduction to DSP Typical DSP algorithms, DSP algorithms benefits,
Representation of DSP algorithms
Pipelining and Parallel Processing Introduction, Pipelining of FIR
Digital filters, Parallel Processing, Pipelining and Parallel Processing
for Low Power Retiming Introduction – Definitions and Properties –
Solving System of Inequalities – Retiming Techniques
UNIT-II
Folding: Introduction -Folding Transform - Register minimization
Techniques – Register minimization in folded architectures – folding of
multirate systems
Unfolding: Introduction – An Algorithm for Unfolding – Properties of
Unfolding – critical Path, Unfolding and Retiming – Applications of
Unfolding
UNIT-III
Systolic Architecture Design Introduction – Systolic Array Design
Methodology – FIR Systolic Arrays – Selection of Scheduling Vector
– Matrix Multiplication and 2D Systolic Array Design – Systolic Design
for Space Representations contain Delays
UNIT-IV
Fast Convolution Introduction – Cook-Toom Algorithm – Winogard
algorithm – Iterated Convolution – Cyclic Convolution – Design of
Fast Convolution algorithm by Inspection
UNIT-V
Low Power Design Scaling Vs Power Consumption –Power Analysis,
Power Reduction techniques – Power Estimation Approaches
Programmable DSP: Evaluation of Programmable Digital Signal
Page 67
54 2013-14Processors, DSP Processors for Mobile and Wireless Communications,
Processors for Multimedia Signal Processing.
TEXT BOOKS:
1. VLSI Digital Signal Processing- System Design and Implementation –
Keshab K. Parhi, 1998, Wiley Inter Science.
2. VLSI and Modern Signal Processing – Kung S. Y, H. J. While House, T.
Kailath, 1985, Prentice Hall.
REFERENCE BOOKS:
1. Design of Analog – Digital VLSI Circuits for Telecommunications and
Signal Processing – Jose E. France, Yannis Tsividis, 1994, Prentice
Hall.
2. VLSI Digital Signal Processing – Medisetti V. K, 1995, IEEE Press (NY),
USA.
Page 68
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 55
I – III – III – III – III – II LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
(ELECTIVE-IV)SYSTEM ON CHIP DESIGN
UNIT-I
Introduction to the System Approach System Architecture, Components
of the system, Hardware & Software, Processor Architectures, Memory
and Addressing. System level interconnection, An approach for SOC
Design, System Architecture and Complexity.
UNIT-II
Processors Introduction , Processor Selection for SOC, Basic concepts
in Processor Architecture, Basic concepts in Processor Micro
Architecture, Basic elements in Instruction handling. Buffers:
minimizing Pipeline Delays, Branches, More Robust Processors, Vector
Processors and Vector Instructions extensions, VLIW Processors,
Superscalar Processors.
UNIT-III
Memory Design for SOC Overview of SOC external memory, Internal
Memory, Size, Scratchpads and Cache memory, Cache Organization,
Cache data, Write Policies, Strategies for line replacement at miss time,
Types of Cache, Split – I, and D – Caches, Multilevel Caches, Virtual to
real translation , SOC Memory System, Models of Simple Processor –
memory interaction.
UNIT-IV
Interconnect Customization and Configuration Inter Connect
Architectures, Bus: Basic Architectures, SOC Standard Buses , Analytic
Bus Models, Using the Bus model, Effects of Bus transactions and
contention time. SOC Customization: An overview, Customizing
Instruction Processor, Reconfiguration Technologies, Mapping design
onto Reconfigurable devices, Instance- Specific design, Customizable
Soft Processor, Reconfiguration - overhead analysis and trade-off
analysis on reconfigurable Parallelism.
Page 69
56 2013-14UNIT-V
Application Studies / Case Studies SOC Design approach, AES
algorithms, Design and evaluation, Image compression – JPEG
compression.
TEXT BOOKS:
1. Computer System Design System-on-Chip - Michael J. Flynn and
Wayne Luk, Wiely India Pvt. Ltd.
2. ARM System on Chip Architecture – Steve Furber –2nd Ed., 2000,
Addison Wesley Professional.
REFERENCE BOOKS:
1. Design of System on a Chip: Devices and Components – Ricardo Reis,
1st Ed., 2004, Springer
2. Co-Verification of Hardware and Software for ARM System on Chip
Design (Embedded Technology) – Jason Andrews – Newnes, BK and
CDROM.
3. System on Chip Verification – Methodologies and Techniques –
Prakash Rashinkar, Peter Paterson and Leena Singh L, 2001, Kluwer
Academic Publishers.
Page 70
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 57
I – III – III – III – III – II LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
(ELECTIVE-IV)OPTIMIZATION TECHNIQUES IN VLSI DESIGN
UNIT-I
Statistical Modeling Modeling sources of variations, Monte Carlo
techniques, Process variation modeling- Pelgrom’s model, Principle
component based modeling, Quad tree based modeling, Performance
modeling- Response surface methodology, delay modeling,
interconnect delay models.
UNIT-II
Statistical Performance, Power and Yield Analysis Statistical timing
analysis, parameter space techniques, Bayesian networks Leakage
models, Highlevel statistical analysis, Gate level statistical analysis,
dynamic power, leakage power, temperature and power supply
variations, High level yield estimation and gate level yield estimation.
UNIT-III
Convex Optimization Convex sets, convex functions, geometric
programming, trade-off and sensitivity analysis, Generalized geometric
programming, geometric programming applied to digital circuit gate
sizing, Floor planning, wire sizing, Approximation and fitting- Monomial
fitting, Maxmonomial fitting, Polynomial fitting.
UNIT-IV
Genetic Algorithm Introduction, GA Technology-Steady State
Algorithm-Fitness Scaling-Inversion GA for VLSI Design, Layout and
Test automation- partitioning-automatic placement, routing technology,
Mapping for FPGA- Automatic test generation- Partitioning algorithm
Taxonomy-Multi-way Partitioning Hybrid genetic-encoding-local
improvement-WDFR Comparison of CAS-Standard cell placement-
GASP algorithm-unified algorithm.
UNIT-V
GA Routing Procedures and Power Estimation Global routing-FPGA
technology mapping-circuit generation-test generation in a GA frame
Page 71
58 2013-14work-test generation procedures, Power estimation-application of GA-
Standard cell placement-GA for ATG-problem encoding- fitness
function-GA Vs Conventional algorithm.
TEXT BOOKS / REFERENCE BOOKS:
1. Statistical Analysis and Optimization for VLSI: Timing and Power -
Ashish Srivastava, Dennis Sylvester, David Blaauw, Springer, 2005.
2. Genetic Algorithm for VLSI Design, Layout and Test Automation -
Pinaki Mazumder, E.Mrudnick, Prentice Hall,1998.
3. Convex Optimization - Stephen Boyd, Lieven Vandenberghe, Cambridge
University Press,2004.
Page 72
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 59
I – III – III – III – III – II LLLLL P P P P P CreditsCreditsCreditsCreditsCredits44444 ----- 33333
(ELECTIVE-IV)SEMICONDUCTOR MEMORY DESIGN AND
TESTING
UNIT-I
Random Access Memory Technologies SRAM – SRAM Cell structures,
MOS SRAM Architecture, MOS SRAM cell and peripheral circuit
operation, Bipolar SRAM technologies, SOI technology, Advanced
SRAM architectures and technologies, Application specific SRAMs,
DRAM – DRAM technology development, CMOS DRAM, DRAM
cell theory and advanced cell structures, BICMOS DRAM, soft error
failure in DRAM, Advanced DRAM design and architecture,
Application specific DRAM.
UNIT-II
Non-volatile Memories Masked ROMs, High density ROM, PROM,
Bipolar ROM, CMOS PROMS, EPROM, Floating gate EPROM cell,
One time programmable EPROM, EEPROM, EEPROM technology and
architecture, Non-volatile SRAM, Flash Memories (EPROM or
EEPROM), advanced Flash memory architecture
UNIT-III
Memory Fault Modeling Testing and Memory Design for Testabilityand Fault Tolerance RAM fault modeling, Electrical testing, Pseudo
Random testing, Megabit DRAM Testing, non-volatile memory
modeling and testing, IDDQ fault modeling and testing, Application
specific memory testing, RAM fault modeling, BIST techniques for
memory
UNIT-IV
Semiconductor Memory Reliability and Radiation Effects General
reliability issues RAM failure modes and mechanism, Non-volatile
memory reliability, reliability modeling and failure rate prediction, Design
for Reliability, Reliability Test Structures, Reliability Screening and
qualification, Radiation effects, Single Event Phenomenon (SEP),
Page 73
60 2013-14Radiation Hardening techniques, Radiation Hardening Process and
Design Issues, Radiation Hardened Memory characteristics, Radiation
Hardness Assurance and Testing, Radiation Dosimetry, Water Level
Radiation Testing and Test structures
UNIT-V
Advanced Memory Technologies and High-density Memory PackingTechnologies Ferroelectric RAMs (FRAMs), GaAs FRAMs, Analog
memories, magneto resistive RAMs (MRAMs), Experimental memory
devices, Memory Hybrids and MCMs (2D), Memory Stacks and MCMs
(3D), Memory MCM testing and reliability issues, Memory cards, High
Density Memory Packaging Future Directions.
TEXT BOOKS:
1. Semiconductor Memories Technology – Ashok K. Sharma, 2002, Wiley.
2. Advanced Semiconductor Memories – Architecture, Design and
Applications - Ashok K. Sharma- 2002, Wiley.
3. Modern Semiconductor Devices for Integrated Circuits – Chenming C
Hu, 1st Ed., Prentice Hall.
Page 74
VLSI, VLSI Design, VLSI System Design, VLSI & MICRO ELECTRONICS 61
I – III – III – III – III – II LLLLL P P P P P CreditsCreditsCreditsCreditsCredits----- 33333 22222
VLSI LABORATORY-II
PART-A: VLSI Lab (Back-end Environment)
• The students are required to design and implement the Layout of the
following experiments of any SIX using CMOS 130nm Technology
with Mentor Graphics Tool.
List of Experiments:
1. Inverter Characteristics.
2. Full Adder.
3. RS-Latch, D-Latch and Clock Divider.
4. Synchronous Counter and Asynchronous Counter.
5. Static RAM Cell.
6. Dynamic RAM Cell.
7. ROM
8. Digital-to-Analog-Converter.
9. Analog-to-Digital Converter.
PART-B: Mixed Signal Simulation
• The students are required to perform the following experimental
concepts with suitable complexity mixed-signal application based
circuits of any FOUR (circuits consisting of both analog and digital
parts) using necessary software tools.
List of experimental Concepts:
• Analog circuit simulation.
• Digital circuit simulation.
• Mixed signal simulation.
• Layout Extraction.
• Parasitic values estimation from layout.
Page 75
62 2013-14
• Layout Vs Schematic.
• Net List Extraction.
• Design Rule Checks.
Lab Requirements:
Software:
Xilinx ISE Suite 13.2 Version, Mentor Graphics-Questa Simulator, Mentor
Graphics-Precision RTL, Mentor Graphics Back End/Tanner Software
tool, Mixed Signal simulator
Hardware:
Personal Computer with necessary peripherals, configuration and
operating System and relevant VLSI (CPLD/FPGA) hardware Kits.
Page 76
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
C&C, C&CE
(Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 77
I Semester
II Semester
S. No. Subject L P C
1 Digital System Design 4 - 3
2 Advanced Computer Architecture 4 - 3
3 Wireless Communications and Networks 4 - 3
4 Digital Data Communications 4 - 3
5
Elective I
I. Data Base Management Systems
II. Information Theory and Coding Techniques
III. Big Data Analytics
4 - 3
6
Elective II
I. Internet Protocols
II. Image & Video Processing
III. Objective Oriented Programming
4 - 3
7 System Design & Data Communications Lab 3 2
Total Credits 20
S. No. Subject L P C
1 Advanced Operating Systems 4 - 3
2 Advanced Computer Networks 4 - 3
3 Advanced Digital Signal Processing 4 - 3
4 Optical Communications and Networks 4 - 3
5
Elective III
I. EMI / EMC
II. Internet of Things
III. Soft Computing Techniques
IV. Cyber Security
4 - 3
6
Elective IV
I. Embedded System Design
II. Radar Signal Processing
III. Network Security & Cryptography
4 - 3
7 Advanced Communications Lab - 3 2
Total Credits 20
Page 78
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 79
I Year I Semester
L P C
4 0 3
DIGITAL SYSTEM DESIGN
UNIT-I: Minimization Procedures and CAMP Algorithm:
Review on minimization of switching functions using tabular methods, k-map, QM algorithm,
CAMP-I algorithm, Phase-I: Determination of Adjacencies, DA, CSC, SSMs and EPCs,, CAMP-
I algorithm, Phase-II: Passport checking,Determination of SPC, CAMP-II algorithm:
Determination of solution cube, Cube based operations, determination of selected cubes are
wholly within the given switching function or not, Introduction to cube based algorithms.
UNIT-II: PLA Design, Minimization and Folding Algorithms:
Introduction to PLDs, basic configurations and advantages of PLDs, PLA-Introduction, Block
diagram of PLA, size of PLA, PLA design aspects, PLA minimization algorithm(IISc algorithm),
PLA folding algorithm(COMPACT algorithm)-Illustration of algorithms with suitable examples.
UNIT -III: Design of Large Scale Digital Systems:
Algorithmic state machinecharts-Introduction, Derivation of SM Charts, Realization of SM
Chart, control implementation, control unit design, data processor design, ROM design, PAL
design aspects, digital system design approaches using CPLDs, FPGAs and ASICs.
UNIT-IV: Fault Diagnosis in Combinational Circuits:
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.
UNIT-V: Fault Diagnosis in Sequential Circuits:
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd
Edition, 2001, TMH
3. Digital system Design using PLDd-Lala
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th
Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
Page 80
I Year I Semester
L P C
4 0 3
ADVANCED COMPUTER ARCHITECTURE
UNIT -I:
Fundamentals of Computer Design:
Fundamentals of Computer design, Changing faces of computing and task of computer designer,
Technology trends, Cost price and their trends, measuring and reporting performance,
quantitative principles of computer design, Amdahl’s law.
Instruction set principles and examples- Introduction, classifying instruction set- memory
addressing- type and size of operands, operations in the instruction set.
UNIT –II:
Pipelines:
Introduction ,basic RISC instruction set ,Simple implementation of RISC instruction set, Classic
five stage pipe line for RISC processor, Basic performance issues in pipelining , Pipeline
hazards, Reducing pipeline branch penalties.
Memory Hierarchy Design:
Introduction, review of ABC of cache, Cache performance , Reducing cache miss penalty,
Virtual memory.
UNIT -III:
Instruction Level Parallelism - The Hardware Approach:
Instruction-Level parallelism, Dynamic scheduling, Dynamic scheduling using Tomasulo’s
approach, Branch prediction, high performance instruction delivery- hardware based speculation.
ILP Software Approach:
Basic compiler level techniques, static branch prediction, VLIW approach, Exploiting ILP,
Parallelism at compile time, Cross cutting issues -Hardware verses Software.
UNIT –IV:
Multi Processors and Thread Level Parallelism:
Multi Processors and Thread level Parallelism- Introduction, Characteristics of application
domain, Systematic shared memory architecture, Distributed shared – memory architecture,
Synchronization.
Page 81
UNIT – V:
Inter Connection and Networks:
Introduction, Interconnection network media, Practical issues in interconnecting networks,
Examples of inter connection, Cluster, Designing of clusters.
Intel Architecture:
Intel IA- 64 ILP in embedded and mobile markets Fallacies and pit falls
TEXT BOOKS:
1. John L. Hennessy, David A. Patterson, Computer Architecture: A Quantitative Approach,
3rd Edition, An Imprint of Elsevier.
REFERENCE BOOKS:
1. John P. Shen and Miikko H. Lipasti, Modern Processor Design : Fundamentals of Super
Scalar Processors
2. Computer Architecture and Parallel Processing ,Kai Hwang, Faye A.Brigs., MC Graw Hill.,
3. Advanced Computer Architecture - A Design Space Approach, DezsoSima, Terence
Fountain, Peter Kacsuk ,Pearson ed.
Page 82
I Year I Semester
L P C
4 0 3
WIRELESS COMMUNICATIONS AND NETWORKS
UNIT -I:
The Cellular Concept-System Design Fundamentals:
Introduction, Frequency Reuse, Interference and system capacity – Co channel Interference and
system capacity, Channel planning for Wireless Systems, Adjacent Channel interference , Power
Control for Reducing interference, Improving Coverage & Capacity in Cellular Systems- Cell
Splitting, Sectoring, Channel Assignment Strategies, Handoff Strategies- Prioritizing Handoffs,
Practical Handoff Considerations, Trunking and Grade of Service
UNIT –II:
Mobile Radio Propagation: Large-Scale Path Loss:
Introduction to Radio Wave Propagation, Free Space Propagation Model, Relating Power to
Electric Field, Basic Propagation Mechanisms, Reflection: Reflection from Dielectrics,
Brewster Angle, Reflection from prefect conductors, Ground Reflection (Two-Ray) Model,
Diffraction: Fresnel Zone Geometry, Knife-edge Diffraction Model, Multiple knife-edge
Diffraction, Scattering, Outdoor Propagation Models- Longley-Ryce Model, Okumura Model,
Hata Model, PCS Extension to Hata Model, Walfisch and Bertoni Model, Wideband PCS
Microcell Model, Indoor Propagation Models-Partition losses (Same Floor), Partition losses
between Floors, Log-distance path loss model, Ericsson Multiple Breakpoint Model, Attenuation
Factor Model, Signal penetration into buildings, Ray Tracing and Site Specific Modeling.
UNIT –III:
Mobile Radio Propagation: Small –Scale Fading and Multipath
Small Scale Multipath propagation-Factors influencing small scale fading, Doppler shift,
Impulse Response Model of a multipath channel- Relationship between Bandwidth and Received
power, Small-Scale Multipath Measurements-Direct RF Pulse System, Spread Spectrum Sliding
Correlator Channel Sounding, Frequency Domain Channels Sounding, Parameters of Mobile
Multipath Channels-Time Dispersion Parameters, Coherence Bandwidth, Doppler Spread and
Coherence Time, Types of Small-Scale Fading-Fading effects Due to Multipath Time Delay
Spread, Flat fading, Frequency selective fading, Fading effects Due to Doppler Spread-Fast
fading, slow fading, Statistical Models for multipath Fading Channels-Clarke’s model for flat
fading, spectral shape due to Doppler spread in Clarke’s model, Simulation of Clarke and Gans
Fading Model, Level crossing and fading statistics, Two-ray Rayleigh Fading Model.
Page 83
UNIT -IV:
Equalization and Diversity
Introduction, Fundamentals of Equalization, Training a Generic Adaptive Equalizer, Equalizers
in a communication Receiver, Linear Equalizers, Non-linear Equalization-Decision Feedback
Equalization (DFE), Maximum Likelihood Sequence Estimation (MLSE) Equalizer, Algorithms
for adaptive equalization-Zero Forcing Algorithm, Least Mean Square Algorithm, Recursive
least squares algorithm. Diversity -Derivation of selection Diversity improvement, Derivation of
Maximal Ratio Combining improvement, Practical Space Diversity Consideration-Selection
Diversity, Feedback or Scanning Diversity, Maximal Ratio Combining, Equal Gain Combining,
Polarization Diversity, Frequency Diversity, Time Diversity, RAKE Receiver.
UNIT -V:
Wireless Networks
Introduction to wireless Networks, Advantages and disadvantages of Wireless Local Area
Networks, WLAN Topologies, WLAN Standard IEEE 802.11, IEEE 802.11 Medium Access
Control, Comparison of IEEE 802.11 a,b,g and n standards, IEEE 802.16 and its enhancements,
Wireless PANs, HiperLan, WLL.
TEXT BOOKS:
1. Wireless Communications, Principles, Practice – Theodore, S. Rappaport, 2nd
Ed., 2002,
PHI.
2. Wireless Communications-Andrea Goldsmith, 2005 Cambridge University Press.
3. Mobile Cellular Communication – GottapuSasibhushanaRao, Pearson Education, 2012.
REFERENCE BOOKS:
1. Principles of Wireless Networks – KavehPahLaven and P. Krishna Murthy, 2002, PE
2. Wireless Digital Communications – KamiloFeher, 1999, PHI.
3. Wireless Communication and Networking – William Stallings, 2003, PHI.
4. Wireless Communication – UpenDalal, Oxford Univ. Press
5. Wireless Communications and Networking – Vijay K. Gary, Elsevier.
Page 84
I Year I Semester
L P C
4 0 3
DIGITAL DATA COMMUNICATIONS
UNIT -I:
Digital Modulation Schemes:
BPSK, QPSK, 8PSK, 16PSK, 8QAM, 16QAM, DPSK – Methods, Band Width Efficiency,
Carrier Recovery, Clock Recovery.
UNIT -II:
Basic Concepts of Data Communications, Interfaces and Modems:
Data Communication Networks, Protocols and Standards, UART, USB, Line Configuration,
Topology, Transmission Modes, Digital Data Transmission, DTE-DCE interface, Categories of
Networks – TCP/IP Protocol suite and Comparison with OSI model.
UNIT -III:
Error Correction: Types of Errors, Vertical Redundancy Check (VRC), LRC, CRC, Checksum,
Error Correction using Hamming code
Data Link Control: Line Discipline, Flow Control, Error Control
Data Link Protocols: Asynchronous Protocols, Synchronous Protocols, Character Oriented
Protocols, Bit-Oriented Protocol, Link Access Procedures.
UNIT -IV:
Multiplexing: Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM),
Multiplexing Application, DSL.
Local Area Networks: Ethernet, Other Ether Networks, Token Bus, Token Ring, FDDI.
Metropolitan Area Networks: IEEE 802.6, SMDS
Switching: Circuit Switching, Packet Switching, Message Switching.
Networking and Interfacing Devices: Repeaters, Bridges, Routers, Gateway, Other Devices.
UNIT -V:
Multiple Access Techniques:
Frequency- Division Multiple Access (FDMA), Time - Division Multiple Access (TDMA), Code
- Division Multiple Access (CDMA), OFDM and OFDMA. Random Access, Aloha- Carrier
Sense Multiple Access (CSMA)- Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA), Controlled Access- Reservation- Polling- Token Passing, Channelization.
Page 85
TEXT BOOKS:
1. Data Communication and Computer Networking - B. A.Forouzan, 2nd
Ed., 2003, TMH.
2. Advanced Electronic Communication Systems - W. Tomasi, 5th E
d., 2008, PEI.
REFERENCE BOOKS:
1. Data Communications and Computer Networks - Prakash C. Gupta, 2006, PHI.
2. Data and Computer Communications - William Stallings, 8th
Ed., 2007, PHI.
3. Data Communication and Tele Processing Systems -T. Housely, 2nd
Ed, 2008, BSP.
4. Data Communications and Computer Networks- Brijendra Singh, 2nd
Ed., 2005, PHI.
Page 86
I Year I Semester
L P C
4 0 3
DATABASE MANAGEMENT SYSTEMS
(ELECTIVE- I)
UNIT -I:
Introduction-Database System Applications:
Purpose of Database Systems, View of Data – Data Abstraction, Instances and Schemas, Data
Models, Database Languages – DDL, DML, Database Access from Application Programs,
Transaction Management, Data Storage and Querying, Database Architecture, Database Users
and Administrators, History of Data base Systems.
Introduction to Data base design, ER diagrams, Beyond ER Design, Entities, Attributes and
Entity sets, Relationships and Relationship sets, Additional features of ER Model, Conceptual
Design with the ER Model, Conceptual Design for Large enterprises. Relational Model:
Introduction to the Relational Model – Integrity Constraints over Relations, Enforcing Integrity
constraints, Querying relational data, Logical data base Design, Introduction to Views –
Destroying /altering Tables and Views.
UNIT –II:
Relational Algebra and Calculus:
Relational Algebra – Selection and Projection, Set operations, Renaming, Joins, Division,
Examples of Algebra Queries, Relational calculus – Tuple relational Calculus – Domain
relational calculus – Expressive Power of Algebra and calculus.
Form of Basic SQL Query – Examples of Basic SQL Queries, Introduction to Nested Queries,
Correlated Nested Queries, Set – Comparison Operators, Aggregate Operators, NULL values –
Comparison using Null values – Logical connectives – AND, OR and NOT – Impact on SQL
Constructs, Outer Joins, Disallowing NULL values, Complex Integrity Constraints in SQL
Triggers and Active Data bases.
UNIT -III:
Introduction to Schema Refinement:
Problems Caused by redundancy, Decompositions – Problem related to decomposition,
Functional Dependencies - Reasoning about FDS, Normal Forms – FIRST, SECOND, THIRD
Normal forms – BCNF –Properties of Decompositions- Loss less- join Decomposition,
Dependency preserving Decomposition, Schema Refinement in Data base Design – Multi valued
Dependencies – FOURTH Normal Form, Join Dependencies, FIFTH Normal form, Inclusion
Dependencies.
Page 87
UNIT –IV:
Transaction Management-Transaction Concept:
Transaction State- Implementation of Atomicity and Durability – Concurrent – Executions –
Serializability- Recoverability – Implementation of Isolation – Testing for serializability.
Concurrency Control- Lock –Based Protocols – Timestamp Based Protocols- Validation- Based
Protocols – Multiple Granularity.
Recovery System-Failure Classification-Storage Structure-Recovery and Atomicity – Log –
Based Recovery – Recovery with Concurrent Transactions – Buffer Management – Failure with
loss of nonvolatile storage-Advance Recovery systems- Remote Backup systems.
UNIT -V:
Overview of Storage and Indexing:
Data on External Storage, File Organization and Indexing – Clustered Indexes, Primary and
Secondary Indexes, Index data Structures – Hash Based Indexing, Tree based Indexing,
Comparison of File Organizations.
Tree Structured Indexing: Intuitions for tree Indexes, Indexed Sequential Access Methods
(ISAM) B+ Trees: A Dynamic Index Structure, Search, Insert, and Delete.
Hash Based Indexing: Static Hashing, Extendable hashing, Linear Hashing, Extendible vs.
Linear Hashing.
TEXT BOOKS:
1. Data base Management Systems- Raghu Ramakrishnan, Johannes Gehrke, TMH, 3rd
Edition, 2003.
2. Data base System Concepts- A.Silberschatz, H.F. Korth, S.Sudarshan, McGraw hill, VI
edition, 2006.
REFERENCE BOOKS:
1. Database Systems - RamezElmasri, ShamkantB.Navathe, 6th
Edition, Pearson Education,
2016.
2. Database - Principles, Programming, and Performance - P.O’Neil, E.O’Neil, 2nd
Ed.,
Elsevier.
3. Database Systems - A Practical Approach to Design Implementation and Management -
Thomas Connolly, Carolyn Begg, Fourth edition, Pearson education.
4. Database System Concepts, Peter Rob & Carlos Coronel, Cengage Learning, 2008.
5. Fundamentals of Relational Database Management Systems - S.Sumathi, S.Esakkirajan,
Springer.
6. Database Management System Oracle SQL and PL/SQL - P.K.Das Gupta, PHI.
7. Introduction to Database Management - M.L.Gillenson and others, Wiley Student
Edition.
8. Database Development and Management - Lee Chao, Auerbach publications, Taylor &
Francis Group.
9. Introduction to Database Systems - C.J.Date, Pearson Education.
10. Database Management Systems - G.K.Gupta, TMH.
Page 88
I Year I Semester
L P C
4 0 3
INFORMATION THEORY AND CODING TECHNIQUES
(ELECTIVE- I)
UNIT I
INFORMATION THEORY AND SOURCE CODING
Uncertainty, information, entropy andits properties, entropy of binary memoryless source and its
extension to discretememoryless source, source coding theorem, data compression, prefix
coding,Huffman coding, Lempel-Ziv coding, Source with memory and its entropy.
UNIT II
DISCRETE CHANNELS
Binary Symmetric Channel, mutual information & itsproperties, Channel capacity, channel
coding theorem and its application to BSC,Shannon’s theorem on channel capacity, capacity of a
channel of infinitebandwidth, bandwidth - S/N trade off, practical communication systems in
light ofShannon’s theorem, Fading channel, channels with memory.
UNIT III
GROUPS, FIELDS AND LINEAR BLOCK CODES
Galois field and its construction in GF(2m
) and its basic properties, vector spaces and matrices in
GF(2), Linear blockcodes, systematic codes and its encoding circuit, syndrome and error
detection,minimum distance, error detecting and correcting capabilities of block code,decoding
circuit, probability of undetected error for linear block code in BSC,Hamming code and their
applications.
UNIT IV
CYCLIC CODES AND BCH CODES
Basic properties of Cycliccodes, Generator and parity check matrix of cyclic codes, encoding
and decodingcircuits, syndrome computation and error detection, cyclic Hamming
codes,encoding and decoding of BCH codes, error location and correction.
UNIT V
CONVOLUTIONAL CODES
Introduction to convolution code, its construction andViterbi algorithm for maximum likelihood
decoding.Automatic repeat requeststrategies and their throughput efficiency considerations.
Reference Books
1. Lathi B. P., Modern Analog and Digital Communication Systems, Oxford Univ.
Press
2. Shu Lin and Costello, Error Control Coding :Fundamentals and Applications, 2nd
Edition,
Pearson.
3. Sklar, Digital Communication, Pearson Education Asia.
4. Haykin Simon, Digital Communication, Wiley Publ.
5. Proakis, Digital Communication, McGraw Hill.
6. Schaum’s Outline Series, Analog and Digital Communication, TMH.
Page 89
I Year I Semester
L P C
4 0 3
BIG DATA ANALYTICS
Page 90
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INTERNET PROTOCOLS
(ELECTIVE II)
UNIT -I:
Internetworking Concepts:
Principles of Internetworking, Connectionless Internetworking, Application level
Interconnections, Network level Interconnection, Properties of thee Internet, Internet
Architecture, Wired LANS, Wireless LANs, Point-to-Point WANs, Switched WANs,
Connecting Devices, TCP/IP Protocol Suite.
IP Address:
Classful Addressing: Introduction, Classful Addressing, Other Issues, Sub-netting and Super-
netting
Classless Addressing: Variable length Blocks, Sub-netting, Address Allocation. Delivery,
Forwarding, and Routing of IP Packets: Delivery, Forwarding, Routing, Structure of Router.
ARP and RARP: ARP, ARP Package, RARP.
UNIT -II:
Internet Protocol (IP): Datagram, Fragmentation, Options, Checksum, IP V.6.
Transmission Control Protocol (TCP): TCP Services, TCP Features, Segment, A TCP
Connection, State Transition Diagram, Flow Control, Error Control, Congestion Control, TCP
Times.
Stream Control Transmission Protocol (SCTP): SCTP Services, SCTP Features, Packet
Format, Flow Control, Error Control, Congestion Control.
Mobile IP: Addressing, Agents, Three Phases, Inefficiency in Mobile IP.
Classical TCP Improvements: Indirect TCP, Snooping TCP, Mobile TCP, Fast Retransmit/
Fast Recovery, Transmission/ Time Out Freezing, Selective Retransmission, Transaction
Oriented TCP.
UNIT -III:
Unicast Routing Protocols (RIP, OSPF, and BGP): Intra and Inter-domain Routing, Distance
Vector Routing, RIP, Link State Routing, OSPF, Path Vector Routing, BGP.
Multicasting and Multicast Routing Protocols: Unicast - Multicast- Broadcast, Multicast
Applications, Multicast Routing, Multicast Link State Routing: MOSPF, Multicast Distance
Vector: DVMRP.
UNIT -IV:
Domain Name System (DNS): Name Space, Domain Name Space, Distribution of Name
Space, and DNS in the internet.
Remote Login TELNET: Concept, Network Virtual Terminal (NVT).
File Transfer FTP and TFTP: File Transfer Protocol (FTP).
Electronic Mail: SMTP and POP.
Network Management-SNMP: Concept, Management Components, World Wide Web- HTTP
Architecture.
Page 91
UNIT -V:
Multimedia:
Digitizing Audio and Video, Network security, security in the internet firewalls. Audio and
Video Compression, Streaming Stored Audio/Video, Streaming Live Audio/Video, Real-Time
Interactive Audio/Video, RTP, RTCP, Voice Over IP. Network Security, Security in the
Internet, Firewalls.
TEXT BOOKS:
1. TCP/IP Protocol Suite- Behrouz A. Forouzan, Third Edition, TMH
2. Internetworking with TCP/IP Comer 3 rd edition PHI
REFERENCE BOOKS:
1. High performance TCP/IP Networking- Mahbub Hassan, Raj Jain, PHI, 2005
2. Data Communications & Networking – B.A. Forouzan– 2nd
Edition – TMH
3. High Speed Networks and Internets- William Stallings, Pearson Education, 2002.
4. Data and Computer Communications, William Stallings, 7th
Edition., PEI.
5. The Internet and Its Protocols – AdrinFarrel, Elsevier, 2005.
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4 0 3
IMAGE and VIDEO PROCESSING
(ELECTIVE II)
UNIT –I:
Fundamentals of Image Processing and Image Transforms:
Introduction, Image sampling, Quantization, Resolution, Image file formats, Elements of image
processing system, Applications of Digital image processing
Introduction, Need for transform, image transforms, Fourier transform, 2 D Discrete Fourier
transform and its transforms, Importance of phase, Walsh transform, Hadamard transform, Haar
transform, slant transform Discrete cosine transform, KL transform, singular value
decomposition, Radon transform, comparison of different image transforms.
UNIT –II:
Image Enhancement:
Spatial domain methods: Histogram processing, Fundamentals of Spatial filtering, Smoothing
spatial filters, Sharpening spatial filters.
Frequency domain methods: Basics of filtering in frequency domain, image smoothing, image
sharpening, Selective filtering.
Image Restoration:
Introduction to Image restoration, Image degradation, Types of image blur, Classification of
image restoration techniques, Image restoration model, Linear and Nonlinear image restoration
techniques, Blind deconvolution
UNIT –III:
Image Segmentation:
Introduction to image segmentation, Point, Line and Edge Detection, Region based
segmentation., Classification of segmentation techniques, Region approach to image
segmentation, clustering techniques, Image segmentation based on thresholding, Edge based
segmentation, Edge detection and linking, Hough transform, Active contour
Image Compression:
Introduction, Need for image compression, Redundancy in images, Classification of redundancy
in images, image compression scheme, Classification of image compression schemes,
Fundamentals of information theory, Run length coding, Shannon – Fano coding, Huffman
coding, Arithmetic coding, Predictive coding, Transformed based compression, Image
compression standard, Wavelet-based image compression, JPEG Standards.
UNIT -IV:
Basic Steps of Video Processing:
Analog Video, Digital Video. Time-Varying Image Formation models: Three-Dimensional
Motion Models, Geometric Image Formation, Photometric Image Formation, Sampling of Video
signals, Filtering operations.
Page 93
UNIT –V:
2-D Motion Estimation:
Optical flow, General Methodologies, Pixel Based Motion Estimation, Block- Matching
Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based Motion
Estimation, Multi resolution motion estimation, Waveform based coding, Block based transform
coding, Predictive coding, Application of motion estimation in Video coding.
TEXT BOOKS:
1. Digital Image Processing – Gonzaleze and Woods, 3rd
Ed., Pearson.
2. Video Processing and Communication – Yao Wang, JoemOstermann and Ya–quin
Zhang. 1st Ed., PH Int.
3. S.Jayaraman, S.Esakkirajan and T.VeeraKumar, “Digital Image processing, Tata
McGraw Hill publishers, 2009
REFRENCE BOOKS:
1. Digital Image Processing and Analysis-Human and Computer Vision Application with
CVIP Tools – ScotteUmbaugh, 2nd
Ed, CRC Press, 2011.
2. Digital Video Processing – M. Tekalp, Prentice Hall International.
3. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar –
TMH, 2009.
4. Multidimentional Signal, Image and Video Processing and Coding – John Woods, 2nd
Ed,
Elsevier.
5. Digital Image Processing with MATLAB and Labview – Vipula Singh, Elsevier.
6. Video Demystified – A Hand Book for the Digital Engineer – Keith Jack, 5th
Ed.,
Elsevier.
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OBJECT ORIENTED PROGRAMMING
(ELECTIVE II)
Objective: Implementing programs for user interface and application development using core
java principles
UNIT I:
Objective: Focus on object oriented concepts and java program structure and its installation
Introduction to OOP
Introduction, Need of Object Oriented Programming, Principles of Object Oriented Languages,
Procedural languages Vs OOP, Applications of OOP, History of JAVA, Java Virtual Machine,
Java Features, Installation of JDK1.6
UNIT II:
Objective: Comprehension of java programming constructs, control structures in Java
Programming Constructs
Variables , Primitive Datatypes, Identifiers- Naming Coventions, Keywords, Literals, Operators-
Binary,Unary and ternary, Expressions, Precedence rules and Associativity, Primitive Type
Conversion and Casting, Flow of control-Branching,Conditional, loops.,
Classes and Objects- classes, Objects, Creating Objects, Methods, constructors-Constructor
overloading, Garbage collector, Class variable and Methods-Static keyword, this keyword,
Arrays, Command line arguments
UNIT III:
Objective: Implementing Object oriented constructs such as various class hierarchies,
interfaces and exception handling
Inheritance: Types of Inheritance, Deriving classes using extends keyword, Method
overloading, super keyword, final keyword, Abstract class
Interfaces, Packages and Enumeration: Interface-Extending interface, Interface Vs Abstract
classes, Packages-Creating packages , using Packages, Access protection, java.lang package
Exceptions & Assertions - Introduction, Exception handling techniques-try...catch, throw,
throws, finally block, user defined exception, Assertions
UNIT IV:
Objective: Understanding of Thread concepts and I/O in Java
MultiThreading :java.lang.Thread, The main Thread, Creation of new threads, Thread priority,
Multithreading, Syncronization, suspending and Resuming threads, Communication between
Threads
Input/Output: reading and writing data, java.io package
Page 95
UNIT V:
Objective: Being able to build dynamic user interfaces using applets and Event handling in
java
Applets- Applet class, Applet structure, An Example Applet Program, Applet Life Cycle,
paint(),update() and repaint()
Event Handling -Introduction, Event Delegation Model, java.awt.event Description, Event
Listeners, Adapter classes, Inner classes
UNIT VI:
Objective: Understanding of various components of Java AWT and Swing and writing code
snippets using them
Abstract Window Toolkit
Why AWT?, java.awt package, Components and Containers, Button, Label, Checkbox, Radio
buttons, List boxes, Choice boxes, Text field and Text area, container classes, Layouts, Menu,
Scroll bar
Swing:
Introduction , JFrame, JApplet, JPanel, Components in swings, Layout Managers, JList and
JScroll Pane, Split Pane, JTabbedPane, Dialog Box
Text Books:
1. The Complete Refernce Java, 8ed, Herbert Schildt, TMH
2. Programming in JAVA, Sachin Malhotra, Saurabhchoudhary, Oxford.
3. JAVA for Beginners, 4e, Joyce Farrell, Ankit R. Bhavsar, Cengage Learning.
4. Object oriented programming with JAVA, Essentials and Applications, Raj Kumar
Bhuyya, Selvi, Chu TMH
5. Introduction to Java rogramming, 7th
ed, Y Daniel Liang, Pearson
Reference Books:
1. JAVA Programming, K.Rajkumar.Pearson
2. Core JAVA, Black Book, NageswaraRao, Wiley, Dream Tech
3. Core JAVA for Beginners, RashmiKanta Das, Vikas.
4. Object Oriented Programming through JAVA , P Radha Krishna , University Press.
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I Year I Semester
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0 3 2
SYSTEMS DESIGN AND DATA COMMUNICATION LAB
A student has to do at least 6 Experiments from each Part.
Part A:
Systems Design experiments
• The students are required to design the logic to perform the following experiments
using necessary Industry standard simulator to verify the logical /functional
operation, perform the analysis with appropriate synthesizer and to verify the
implemented logic with different hardware modules/kits (CPLD/FPGA kits).
• Consider the suitable switching function and data to implement the required logic if
required.
List of Experiments:
1. Determination of EPCs using CAMP-I Algorithm.
2. Determination of SPCs using CAMP-I Algorithm.
3. Determination of SCs using CAMP-II Algorithm.
4. PLA minimization algorithm (IISc algorithm)
5. PLA folding algorithm(COMPACT algorithm)
6. ROM design.
7. Control unit and data processor logic design
8. Digital system design using FPGA.
9. Kohavi algorithm.
10. Hamming experiments.
Lab Requirements:
Software: Industry standard software with perpetual licence consisting of required simulator,
synthesizer, analyzer etc. in an appropriate integrated environment.
Hardware: Personal Computer with necessary peripherals, configuration and operating System
and relevant VLSI (CPLD/FPGA) hardware Kits.
Page 97
Part-B:
Data Communications Experiments
1. Study of serial interface RS – 232
2. Study of pc to pc communication using parallel port
3. To establish pc-pc communication using LAN
4. Study of LAN using star topology, bus topology and tree topology
5. Study and configure modem of a computer
6. To configure a hub/switch
7. To study the interconnections of cables for data communication
8. Study of a wireless communication system
Software and Equipment required
• Data Communication Trainer kits
• Computers
• LAN Trainer kit
• ST 5001 Software/ NS2 Software
• Serial and parallel port cables
• Patch cords (2 mm), FOE/LOE Cables, Main power cords
• Ethernet Cables (CAT5, CAT5E, CAT6, CAT7)
• Hubs, Switches, MODEMs
• RS 232 DB25/DB9 Connectors
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ADVANCED OPERATING SYSTEMS
UNIT-I: Introduction to Operating Systems:
Overview of computer system hardware, Instruction execution, I/O function, Interrupts, Memory
hierarchy, I/O Communication techniques, Operating system objectives and functions,
Evaluation of operating System
UNIT-II: Introduction to UNIX and LINUX:
Basic Commands & Command Arguments, Standard Input, Output, Input / Output Redirection,
Filters and Editors, Shells and Operations
UNIT-III:
System Calls:
System calls and related file structures, Input / Output, Process creation & termination.
Inter Process Communication:
Introduction, File and record locking, Client – Server example, Pipes, FIFOs, Streams &
Messages, Name Spaces, Systems V IPC, Message queues, Semaphores, Shared Memory,
Sockets & TLI.
UNIT-IV:
Introduction to Distributed Systems:
Goals of distributed system, Hardware and software concepts, Design issues.
Communication in Distributed Systems:
Layered protocols, ATM networks, Client - Server model, Remote procedure call and Group
communication.
UNIT-V:
Synchronization in Distributed Systems:
Clock synchronization, Mutual exclusion, E-tech algorithms, Bully algorithm, Ring algorithm,
Atomic transactions
Deadlocks:
Dead lock in distributed systems, Distributed dead lock prevention and distributed dead
lock detection.
Page 99
TEXT BOOKS:
1. The Design of the UNIX Operating Systems – Maurice J. Bach, 1986, PHI.
2. Distributed Operating System - Andrew. S. Tanenbaum, 1994, PHI.
3. The Complete Reference LINUX – Richard Peterson, 4th
Ed., McGraw – Hill.
REFERENCE BOOKS:
1. Operating Systems: Internal and Design Principles - Stallings, 6th
Ed., PE.
2. Modern Operating Systems - Andrew S Tanenbaum, 3rd
Ed., PE.
3. Operating System Principles - Abraham Silberchatz, Peter B. Galvin, Greg Gagne, 7th
Ed., John Wiley
4. UNIX User Guide – Ritchie & Yates.
5. UNIX Network Programming - W.Richard Stevens, 1998, PHI.
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ADVANCED COMPUTER NETWORKS
UNIT -I:
Congestion and Quality of Service (QoS):
Data traffic, Congestion, Congestion Control, Two examples, Quality of Service, Techniques to
improve QOS, Integrated Services and Differential services.Queue Management:Passive-Drop
trial, Drop front, Random drop, Active- early Random drop, Random Early detection.
UNIT -II:
X.25 Standards: X.25 Layers, X.21 Protocol ,Frame Relay: Introduction, Frame relay
operation, Frame relay layers, Congestion control, Leaky Bucket algorithms, ATM: Design
goals, ATM architecture, Switching, Switch Fabric, ATM layers, Service classes, ATM
applications
UNIT -III:
Interconnection Networks:Introduction, Banyan Networks, Properties, Crossbar switch, Three
stage Class networks, Rearrangeble Networks, Folding algorithm, Benes Networks, Lopping
algorithm, Bit allocation algorithm.SONET/SDH: Synchronous Transport signals, Physical
configuration, SONET layers, SONET Frame.
UNIT -IV:
Spread Spectrum: Introduction, Basic concept, Protection against Jamming, Spreading codes
(PN sequence), Generation, Properties, Types of Spread Spectrum Modulation, Application of
Spread Spectrum.Private Networks: Virtual Private Networks, Network Address Translation
Next Generation: IPV6 Transition from IPV4 to IPV6 ,Mobile IP: Addressing, Agents, Three
phases, Inefficiency in Mobile IP
UNIT -V:
Wireless Networks:Wireless LAN: IEEE802.11, Architecture, MAC Sub Layer, Addressing
Mechanism, Physical Layer.Bluetooth: Architecture, Bluetooth layers, Radio layer, Base band
layer, L2CAP, Wireless WAN: The Cellular Concept, Cell, Frequency reuse, Principle, Channel
Assignment Strategies, Interference and system capacity, Types of interference, Improving
capacity in cellular system, Handoff, AMPS, D-AMPS, GSM, CDMA, GPRS, 3G & 4G
technologies.
Page 101
TEXT BOOKS:
1. Data Communication and Networking - B. A.Forouzan, 4th
Ed,TMH
2. TCP/IP Protocol Suit – B. A. Forouzen, 4th
Ed, TMH
REFERENCE BOOKS:
1. Wireless Communication System- AbhishekYadav, University Sciences Press
2. Wireless Digital Communications – KamiloFeher, 1999, PHI
3. High Performance TCP-IP Networking- Mahaboob Hassan, Jain Raj, PHI
4. ATM Fundamentals- N. N. Biswas, Adventure Book Publishers, 1998
5. Wireless Communication – T. L. Singhal, McGraw Hill, 2010
6. Wireless Communication and Networking- Vijay K. Garg, Elsevier, 2009
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ADVANCED DIGITAL SIGNAL PROCESSING
UNIT –I:
Review of DFT, FFT, IIR Filters and FIR Filters:
Multi Rate Signal Processing: Introduction, Decimation by a factor D, Interpolation by a
factor I, Sampling rate conversion by a rational factor I/D, Multistage Implementation of
Sampling Rate Conversion, Filter design & Implementation for sampling rate conversion.
UNIT –II:
Applications of Multi Rate Signal Processing:
Design of Phase Shifters, Interfacing of Digital Systems with Different Sampling Rates,
Implementation of Narrow Band Low Pass Filters, Implementation of Digital Filter Banks,
Sub-band Coding of Speech Signals, Quadrature Mirror Filters, Trans-multiplexers, Over
Sampling A/D and D/A Conversion.
UNIT -III:
Non-Parametric Methods of Power Spectral Estimation: Estimation of spectra from finite
duration observation of signals, Non-parametric Methods: Bartlett, Welch & Blackman-
Tukey methods, Comparison of all Non-Parametric methods
UNIT –IV:
Implementation of Digital Filters:
Introduction to filter structures (IIR & FIR), Frequency sampling structures of FIR, Lattice
structures, Forward prediction error, Backward prediction error, Reflection coefficients for
lattice realization, Implementation of lattice structures for IIR filters, Advantages of lattice
structures.
UNIT –V:
Parametric Methods of Power Spectrum Estimation: Autocorrelation & Its
Properties,Relation between auto correlation & model parameters, AR Models - Yule-Walker
& Burg Methods, MA & ARMA models for power spectrum estimation, Finite word length
effect in IIR digital Filters – Finite word-length effects in FFT algorithms.
Page 103
TEXT BOOKS:
1. Digital Signal Processing: Principles, Algorithms & Applications - J.G.Proakis& D. G.
Manolakis, 4th
Ed., PHI.
2. Discrete Time Signal Processing - Alan V Oppenheim & R. W Schaffer, PHI.
3. DSP – A Practical Approach – Emmanuel C. Ifeacher, Barrie. W. Jervis, 2 Ed., Pearson
Education.
REFERENCE BOOKS:
1. Modern Spectral Estimation: Theory & Application – S. M .Kay, 1988, PHI.
2. Multi Rate Systems and Filter Banks – P.P.Vaidyanathan – Pearson Education.
3. Digital Signal Processing – S.Salivahanan, A.Vallavaraj, C.Gnanapriya, 2000,TMH
4. Digital Spectral Analysis – Jr. Marple
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OPTICAL COMMUNICATION AND NETWORKS
Unit –I
Overview of optical fiber communications: Elements of an optical fiber transmission link.
Optical Fibers: structures, wave guiding, Nature of light, Basic optical laws and definitions,
optical fiber modes and configurations (Fiber types, Rays and modes, step index and graded
index fibers) mode theory of circular waveguides. (Qualitative Treatment) Fabrication, cabling
and installation: Fabrication, fiber optic cables, Installation- placing the cable.
Unit – II
Optical sources: LEDs, structures, quantum efficiency, modulation capability, Laser diodes:
Laser diodes and threshold conditions, external quantum efficiency resonant frequencies,
Optical Detectors: Physical principles of photodiodes (pin Photodiode, avalanche, photo diode)
comparison of photo detectors, noise in detectors.
Unit – III
Optical Communication Systems: Block diagrams of optical communication systems, direct
intensity modulation, digital communication systems, Laser semiconductor transmitter,
Generations of optical fiber link, description of 8 Mb/s optical fiber communication link,
description of 2.5 Gb/s optical fiber communication link.
Unit – IV
Components of fiber optic Networks: Overview of fiber optic networks, Transreceiver,
semiconductors optical amplifiers, couplers/splicers, wavelength division multiplexers and
demultiplexers, filters, isolators and optical switches.
Fiber Optic Networks: Basic networks, SONET/SDIT, Broad cast and select WDM Networks,
wavelength routed networks, optical CDMA Non linear effects on network performance.
Unit – V
Coherent Systems :Coherent receiver, Homodyne and heterodyne detection, noise in coherent
receiver, polarization control, Homodyne receiver , Reusability and laser line-width, heterodyne
receiver , synchronous, Asynchronous and self synchronous demodulation, phase diversity
receivers.
Page 105
Text Books:
1. Optical fiber communications – Gerd Keiser, 3 rd Ed. MGH.
2. Fiber Optic Communication Technology – Djafar K. Mynbaev and Lowell L. Scheiner,
(Pearson Education Asia)
3. Optoelectronic devices and systems – S.C. Gupta, PHI, 2005.
4. John Gowar, “Optical Communication Systems”, PHI,2001.
References:
1. Fiber Optics Communications – Harold Kolimbiris (Pearson Education Asia)
2. Optical Fiber Communications and its applications – S.C. Gupta (PHI) 2004.
3. WDM Optical Networks – C. Siva Ram Murthy and Mohan Guru Swamy, PHI.
4. Fiber Optic communications – D.C. Agarwal, S.Chand Publications, 2004.
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I Year II Semester
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4 0 3
ELECTROMAGNETIC INTERFERENCE AND ELECTROMAGNETIC
COMPATIBILITY (EMI / EMC)
(ELECTIVE-III)
UNIT -I:
Introduction, Natural and Nuclear Sources of EMI / EMC:
Electromagnetic environment, History, Concepts, Practical experiences and concerns, frequency
spectrum conservations, An overview of EMI / EMC, Natural and Nuclear sources of EMI.
UNIT -II:
EMI from Apparatus, Circuits and Open Area Test Sites:
Electromagnetic emissions, Noise from relays and switches, Non-linearities in circuits, passive
intermodulation, Cross talk in transmission lines, Transients in power supply lines,
Electromagnetic interference (EMI), Open area test sites and measurements.
UNIT -III:
Radiated and Conducted Interference Measurements and ESD:
Anechoic chamber, TEM cell, GH TEM Cell, Characterization of conduction currents / voltages,
Conducted EM noise on power lines, Conducted EMI from equipment, Immunity to conducted
EMI detectors and measurements, ESD, Electrical fast transients / bursts, Electrical surges.
UNIT -IV:
Grounding, Shielding, Bonding and EMI filters:
Principles and types of grounding, Shielding and bonding, Characterization of filters, Power
lines filter design.
UNIT -V:
Cables, Connectors, Components and EMC Standards:
EMI suppression cables, EMC connectors, EMC gaskets, Isolation transformers, optoisolators,
National / International EMC standards.
Page 107
TEXT BOOKS:
1. Engineering Electromagnetic Compatibility - Dr. V.P. Kodali, IEEEPublication, Printed
in India by S. Chand & Co. Ltd., New Delhi, 2000.
2. Electromagnetic Interference and Compatibility IMPACTseries,IIT – Delhi, Modules 1 –
9.
REFERENCE BOOKS:
1. Introduction to Electromagnetic Compatibility - Ny, John Wiley, 1992, by C.R. Pal.
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I Year II Semester
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INTERNET OF THINGS
Page 109
I Year II Semester
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4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -III)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach,Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control,Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear timedelay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
Page 110
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
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I Year II Semester
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4 0 3
CYBER SECURITY
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EMBEDDED SYSTEM DESIGN
(ELECTIVE-IV)
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
Page 113
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
******
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I Year II Semester
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4 0 3
RADAR SIGNAL PROCESSING
(ELECTIVE -IV)
UNIT -I:
Introduction:
Radar Block Diagram, Bistatic Radar, Monostatic Radar, Radar Equation, Information
Available from Radar Echo. Review of Radar Range Performance– General Radar Range
Equation, Radar Detection with Noise Jamming, Beacon and Repeater Equations, MTI and
Pulse Doppler Radar.
Matched Filter Receiver – Impulse Response, Frequency Response Characteristic and its
Derivation, Matched Filter and Correlation Function, Correlation Detection and Cross-
Correlation Receiver, Efficiency of Non-Matched Filters, Matched Filter for Non-White
Noise.
UNIT -II:
Detection of Radar Signals in Noise:
Detection Criteria – Neyman-Pearson Observer, Likelihood-Ratio Receiver, Inverse
Probability Receiver, Sequential Observer, Detectors–Envelope Detector, Logarithmic
Detector, I/Q Detector. Automatic Detection-CFAR Receiver, Cell Averaging CFAR
Receiver, CFAR Loss, CFAR Uses in Radar. Radar Signal Management–Schematics,
Component Parts, Resources and Constraints.
UNIT -III:
Waveform Selection [3, 2]:
Radar Ambiguity Function and Ambiguity Diagram – Principles and Properties; Specific
Cases – Ideal Case, Single Pulse of Sine Wave, Periodic Pulse Train, Single Linear FM
Pulse, Noise Like Waveforms, Waveform Design Requirements, Optimum Waveforms for
Detection in Clutter, Family of Radar Waveforms.
UNIT -IV:
Pulse Compression in Radar Signals:
Introduction, Significance, Types, Linear FM Pulse Compression – Block Diagram,
Characteristics, Reduction of Time Side lobes, Stretch Techniques, Generation and
Decoding of FM Waveforms – Block Schematic and Characteristics of Passive System,
Digital Compression, SAW Pulse Compression.
UNIT V:
Phase Coding Techniques:
Principles, Binary Phase Coding, Barker Codes, Maximal Length Sequences
(MLS/LRS/PN), Block Diagram of a Phase Coded CW Radar.
Poly Phase Codes : Frank Codes, Costas Codes, Non-Linear FM Pulse Compression,
Doppler Tolerant PC Waveforms – Short Pulse, Linear Period Modulation (LPM/HFM),
Sidelobe Reduction for Phase Coded PC Signals.
Page 115
TEXT BOOKS:
1. Radar Handbook - M.I. Skolnik, 2nd
Ed., 1991, McGraw Hill.
2. Radar Design Principles : Signal Processing and The Environment - Fred E. Nathanson, 2nd
Ed.,
1999, PHI.
3. Introduction to Radar Systems - M.I. Skolnik, 3rd
Ed., 2001, TMH.
REFERENCE BOOKS:
1. Radar Principles - Peyton Z. Peebles, Jr., 2004, John Wiley.
2. Radar Signal Processing and Adaptive Systems - R. Nitzberg, 1999, Artech House.
Page 116
I Year II Semester
L P C
4 0 3
NETWORK SECURITY AND CRYPTOGRAPHY
UNIT -I:
Introduction:
Attacks, Services and Mechanisms, Security attacks, Security services, A Model for
Internetwork security.Classical Techniques:Conventional Encryption model, Steganography,
Classical Encryption Techniques.
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
UNIT -II:
Encryption Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.Conventional Encryption :Placement of
Encryption function, Traffic confidentiality, Key distribution, Random Number Generation.
UNIT -III:
Public Key Cryptography:Principles, RSA Algorithm, Key Management, Diffie-Hellman Key
exchange, Elliptic Curve Cryptograpy.Number Theory:Prime and Relatively prime numbers,
Modular arithmetic, Fermat’s and Euler’s theorems, Testing for primality, Euclid’s Algorithm,
the Chinese remainder theorem, Discrete logarithms.
UNIT -IV:
Message Authentication and Hash Functions:Authentication requirements and functions,
Message Authentication, Hash functions, Security of Hash functions and MACs.Hash and Mac
Algorithms
MD File, Message digest Algorithm, Secure Hash Algorithm, RIPEMD-160, HMAC.Digital
signatures and Authentication protocols: Digital signatures, Authentication Protocols, Digital
signature standards.
Authentication Applications :Kerberos, X.509 directory Authentication service.Electronic Mail
Security: Pretty Good Privacy, S/MIME.
UNIT –V:
IP Security:
Overview, Architecture, Authentication, Encapsulating Security Payload, Combining security
Associations, Key Management. Web Security: Web Security requirements, Secure sockets layer
and Transport layer security, Secure Electronic Transaction.
Intruders, Viruses and Worms
Intruders, Viruses and Related threats.
Fire Walls: Fire wall Design Principles, Trusted systems.
Page 117
TEXT BOOKS:
1. Cryptography and Network Security: Principles and Practice - William Stallings, Pearson
Education.
2. Network Security Essentials (Applications and Standards) by William Stallings Pearson
Education.
REFERENCE BOOKS:
1. Fundamentals of Network Security by Eric Maiwald (Dreamtech press)
2. Network Security - Private Communication in a Public World by Charlie Kaufman,
Radia Perlman and Mike Speciner, Pearson/PHI.
3. Principles of Information Security, Whitman, Thomson.
4. Network Security: The complete reference, Robert Bragg, Mark Rhodes, TMH
5. Introduction to Cryptography, Buchmann, Springer.
Page 118
I Year II Semester
L P C
0 3 2
ADVANCED COMMUNICATIONS LAB
Note:
A. Minimum of 10 Experiments have to be conducted
B. All Experiments may be Simulated using MATLAB and to be verified using related
training kits.
1. Measurement of Bit Error Rate using Binary Data
2. Verification of minimum distance in Hamming code
3. Determination of output of Convolutional Encoder for a given sequence
4. Determination of output of Convolutional Decoder for a given sequence
5. Efficiency of DS Spread- Spectrum Technique
6. Simulation of Frequency Hopping (FH) system
7. Effect of Sampling and Quantization of Digital Image
8. Verification of Various Transforms (FT / DCT/ Walsh / Hadamard) on a given
Image ( Finding Transform and Inverse Transform)
9. Point, Line and Edge detection techniques using derivative operators.
10. Implementation of FIR filter using DSP Trainer Kit (C-Code/ Assembly code)
11. Implementation of IIR filter using DSP Trainer Kit (C-Code/ Assembly code)
12. Determination of Losses in Optical Fiber
13. Observing the Waveforms at various test points of a mobile phone using
Mobile Phone Trainer
14. Study of Direct Sequence Spread Spectrum Modulation & Demodulation
using CDMA-DSS-BER Trainer
15. Study of ISDN Training System with Protocol Analyzer
16. Characteristics of LASER Diode.
Page 119
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
COMMUNICATION SYSTEMS
(Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 120
I Semester
II Semester
S. No. Name of the Subject L P C
1 Detection & Estimation Theory 4 - 3
2 Digital Data Communications 4 - 3
3 Optical Communication Technology 4 - 3
4 Advanced Digital Signal Processing 4 - 3
5
Elective I
I. Radar Signal Processing
II.RF Circuit Design
III. Advanced Computer Networks
4 - 3
6
Elective II
I. Wireless LANs and PANs
II. Mobile Computing Technologies
III. Network Security & Cryptography
4 - 3
7 Optical & Data Communications Laboratory - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Coding Theory and Applications 4 - 3
2 Wireless Communications and Networks 4 - 3
3 Image and Video Processing 4 - 3
4 Software Defined Radio 4 - 3
5
Elective III
I. Soft Computing Techniques
II. Internet Protocols
III. Cyber Security
4 - 3
6
Elective IV
I. Optical Networks
II. DSP Processors and Architectures
III. Radio and Navigational Aids
4 - 3
7 Advanced Communications Laboratory - 3 2
Total Credits 20
Page 121
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 122
I Year I Semester
L P C
4 0 3
DETECTION AND ESTIMATION THEORY
UNIT –I:
Random Processes:
Discrete Linear Models, Markov Sequences and Processes, Point Processes, and Gaussian
Processes.
UNIT –II:
Detection Theory:
Basic Detection Problem, Maximum A posteriori Decision Rule, Minimum Probability of Error
Classifier, Bayes Decision Rule, Multiple-Class Problem (Bayes)- minimum probability error with
and without equal a priori probabilities, Neyman-Pearson Classifier, General Calculation of
Probability of Error, General Gaussian Problem, Composite Hypotheses.
UNIT –III:
Linear Minimum Mean-Square Error Filtering:
Linear Minimum Mean Squared Error Estimators, Nonlinear Minimum Mean Squared Error
Estimators. Innovations, Digital Wiener Filters with Stored Data, Real-time Digital Wiener
Filters, Kalman Filters.
UNIT –IV:
Statistics:
Measurements, Nonparametric Estimators of Probability Distribution and Density Functions, Point
Estimators of Parameters, Measures of the Quality of Estimators, Introduction to Interval
Estimates, Distribution of Estimators, Tests of Hypotheses, Simple Linear Regression, Multiple
Linear Regression.
UNIT –V:
Estimating the Parameters of Random Processes from Data:
Tests for Stationarity and Ergodicity, Model-free Estimation, Model-based Estimation of
Autocorrelation Functions, Power Special Density Functions.
TEXT BOOKS:
1. Random Signals: Detection, Estimation and Data Analysis - K. Sam Shanmugan& A.M.
Breipohl, Wiley India Pvt. Ltd, 2011.
2. Random Processes: Filtering, Estimation and Detection - Lonnie C. Ludeman, Wiley India
Pvt. Ltd., 2010.
Page 123
REFERENCE BOOKS:
1. Fundamentals of Statistical Signal Processing: Volume I Estimation Theory–
Steven.M.Kay, Prentice Hall, USA, 1998.
2. Fundamentals of Statistical Signal Processing: Volume I Detection Theory– Steven.M.Kay,
Prentice Hall, USA, 1998.
3. Introduction to Statistical Signal Processing with Applications - Srinath, Rajasekaran,
Viswanathan, 2003, PHI.
4. Statistical Signal Processing: Detection, Estimation and Time Series Analysis – Louis
L.Scharf, 1991, Addison Wesley.
5. Detection, Estimation and Modulation Theory: Part – I – Harry L. Van Trees, 2001, John
Wiley & Sons, USA.
6. Signal Processing: Discrete Spectral Analysis – Detection & Estimation – Mischa
Schwartz, Leonard Shaw, 1975, McGraw Hill.
Page 124
I Year I Semester
L P C
4 0 3
DIGITAL DATA COMMUNICATIONS
UNIT -I:
Digital Modulation Schemes:
BPSK, QPSK, 8PSK, 16PSK, 8QAM, 16QAM, DPSK – Methods, Band Width Efficiency,
Carrier Recovery, Clock Recovery.
UNIT -II:
Basic Concepts of Data Communications, Interfaces and Modems:
Data Communication Networks, Protocols and Standards, UART, USB, Line Configuration,
Topology, Transmission Modes, Digital Data Transmission, DTE-DCE interface, Categories of
Networks – TCP/IP Protocol suite and Comparison with OSI model.
UNIT -III:
Error Correction: Types of Errors, Vertical Redundancy Check (VRC), LRC, CRC, Checksum,
Error Correction using Hamming code
Data Link Control: Line Discipline, Flow Control, Error Control
Data Link Protocols: Asynchronous Protocols, Synchronous Protocols, Character Oriented
Protocols, Bit-Oriented Protocol, Link Access Procedures.
UNIT -IV:
Multiplexing: Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM),
Multiplexing Application, DSL.
Local Area Networks: Ethernet, Other Ether Networks, Token Bus, Token Ring, FDDI.
Metropolitan Area Networks: IEEE 802.6, SMDS
Switching: Circuit Switching, Packet Switching, Message Switching.
Networking and Interfacing Devices: Repeaters, Bridges, Routers, Gateway, Other Devices.
UNIT -V:
Multiple Access Techniques:
Frequency- Division Multiple Access (FDMA), Time - Division Multiple Access (TDMA), Code
- Division Multiple Access (CDMA), OFDM and OFDMA. Random Access, Aloha- Carrier
Sense Multiple Access (CSMA)- Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA), Controlled Access- Reservation- Polling- Token Passing, Channelization.
TEXT BOOKS:
1. Data Communication and Computer Networking - B. A.Forouzan, 2nd
Ed., 2003, TMH.
2. Advanced Electronic Communication Systems - W. Tomasi, 5th E
d., 2008, PEI.
Page 125
REFERENCE BOOKS:
1. Data Communications and Computer Networks - Prakash C. Gupta, 2006, PHI.
2. Data and Computer Communications - William Stallings, 8th
Ed., 2007, PHI.
3. Data Communication and Tele Processing Systems -T. Housely, 2nd
Ed, 2008, BSP.
4. Data Communications and Computer Networks- Brijendra Singh, 2nd
Ed., 2005, PHI.
Page 126
I Year I Semester
L P C
4 0 3
OPTICAL COMMUNICATION TECHNOLOGY
UNIT –I:
Signal propagation in Optical Fibers:
Geometrical Optics approach and Wave Theory approach, Loss and Bandwidth, Chromatic
Dispersion, Non Linear effects- Stimulated Brillouin and Stimulated Raman Scattering,
Propagation in a Non-Linear Medium, Self-Phase Modulation and Cross Phase Modulation,
Four Wave Mixing, Principle of Solitons.
UNIT –II:
Fiber Optic Components for Communication & Networking:
Couplers, Isolators and Circulators, Multiplexers, Bragg Gratings, Fabry-Perot Filters, Mach
Zender Interferometers, Arrayed Waveguide Grating, Tunable Filters, High Channel Count
Multiplexer Architectures, Optical Amplifiers, Direct and External Modulation Transmitters,
Pump Sources for Amplifiers, Optical Switches and Wavelength Converters.
UNIT –III:
Modulation and Demodulation:
Signal formats for Modulation, Subcarrier Modulation and Multiplexing, Optical Modulations –
Duobinary, Single Side Band and Multilevel Schemes, Ideal and Practical receivers for
Demodulation, Bit Error Rates, Timing Recovery and Equalization, Reed-Solomon Codes for
Error Detection and Correction.
UNIT -IV:
Transmission System Engineering:
System Model, Power Penalty in Transmitter and Receiver, Optical Amplifiers, Crosstalk and
Reduction of Crosstalk, Cascaded Filters, Dispersion Limitations and Compensation
Techniques.
UNIT –V:
Fiber Non-linearities and System Design Considerations:
Limitation in High Speed and WDM Systems due to Non-linearities in Fibers, Wavelength
Stabilization against Temperature Variations, Overall System Design considerations – Fiber
Dispersion, Modulation, Non-Linear Effects, Wavelengths, All Optical Networks.
TEXT BOOKS:
1. Optical Networks: A Practical Perspective - Rajiv Ramaswami and Kumar N.
Sivarajan, 2nd
Ed., 2004, Elsevier Morgan Kaufmann Publishers (An Imprint of Elsevier).
2. Optical Fiber Communications – Gerd Keiser, 3rd
Ed., 2000, McGraw Hill.
Page 127
REFERENCE BOOKS:
1. Optical Fiber Communications: Principles and Practice – John.M.Senior, 2nd
Ed., 2000, PE.
2. Fiber Optics Communication – Harold Kolimbris, 2nd
Ed., 2004, PEI
3. Optical Networks: Third Generation Transport Systems – Uyless Black, 2nd
Ed., 2009, PEI
4. Optical Fiber Communications – GovindAgarwal, 2nd
Ed., 2004, TMH.
5. Optical Fiber Communications and Its Applications – S.C.Gupta, 2004, PHI.
Page 128
I Year I Semester
L P C
4 0 3
ADVANCED DIGITAL SIGNAL PROCESSING
UNIT –I:
Review of DFT, FFT, IIR Filters and FIR Filters:
Multi Rate Signal Processing: Introduction, Decimation by a factor D, Interpolation by a
factor I, Sampling rate conversion by a rational factor I/D, Multistage Implementation of
Sampling Rate Conversion, Filter design & Implementation for sampling rate conversion.
UNIT –II:
Applications of Multi Rate Signal Processing:
Design of Phase Shifters, Interfacing of Digital Systems with Different Sampling Rates,
Implementation of Narrow Band Low Pass Filters, Implementation of Digital Filter Banks,
Sub-band Coding of Speech Signals, Quadrature Mirror Filters, Trans-multiplexers, Over
Sampling A/D and D/A Conversion.
UNIT -III:
Non-Parametric Methods of Power Spectral Estimation: Estimation of spectra from finite
duration observation of signals, Non-parametric Methods: Bartlett, Welch & Blackman-
Tukey methods, Comparison of all Non-Parametric methods
UNIT –IV:
Implementation of Digital Filters:
Introduction to filter structures (IIR & FIR), Frequency sampling structures of FIR, Lattice
structures, Forward prediction error, Backward prediction error, Reflection coefficients for
lattice realization, Implementation of lattice structures for IIR filters, Advantages of lattice
structures.
UNIT –V:
Parametric Methods of Power Spectrum Estimation: Autocorrelation & Its
Properties,Relation between auto correlation & model parameters, AR Models - Yule-Walker
& Burg Methods, MA & ARMA models for power spectrum estimation, Finite word length
effect in IIR digital Filters – Finite word-length effects in FFT algorithms.
TEXT BOOKS:
4. Digital Signal Processing: Principles, Algorithms & Applications - J.G.Proakis& D. G.
Manolakis, 4th
Ed., PHI.
5. Discrete Time Signal Processing - Alan V Oppenheim & R. W Schaffer, PHI.
6. DSP – A Practical Approach – Emmanuel C. Ifeacher, Barrie. W. Jervis, 2 Ed., Pearson
Education.
Page 129
REFERENCE BOOKS:
5. Modern Spectral Estimation: Theory & Application – S. M .Kay, 1988, PHI.
6. Multi Rate Systems and Filter Banks – P.P.Vaidyanathan – Pearson Education.
7. Digital Signal Processing – S.Salivahanan, A.Vallavaraj, C.Gnanapriya, 2000,TMH
8. Digital Spectral Analysis – Jr. Marple
Page 130
I Year I Semester
L P C
4 0 3
RADAR SIGNAL PROCESSING
(ELECTIVE -I)
UNIT -I:
Introduction:
Radar Block Diagram, Bistatic Radar, Monostatic Radar, Radar Equation, Information
Available from Radar Echo. Review of Radar Range Performance– General Radar Range
Equation, Radar Detection with Noise Jamming, Beacon and Repeater Equations, MTI and
Pulse Doppler Radar.
Matched Filter Receiver – Impulse Response, Frequency Response Characteristic and its
Derivation, Matched Filter and Correlation Function, Correlation Detection and Cross-
Correlation Receiver, Efficiency of Non-Matched Filters, Matched Filter for Non-White
Noise.
UNIT -II:
Detection of Radar Signals in Noise:
Detection Criteria – Neyman-Pearson Observer, Likelihood-Ratio Receiver, Inverse
Probability Receiver, Sequential Observer, Detectors–Envelope Detector, Logarithmic
Detector, I/Q Detector. Automatic Detection-CFAR Receiver, Cell Averaging CFAR
Receiver, CFAR Loss, CFAR Uses in Radar. Radar Signal Management–Schematics,
Component Parts, Resources and Constraints.
UNIT -III:
Waveform Selection [3, 2]:
Radar Ambiguity Function and Ambiguity Diagram – Principles and Properties; Specific
Cases – Ideal Case, Single Pulse of Sine Wave, Periodic Pulse Train, Single Linear FM
Pulse, Noise Like Waveforms, Waveform Design Requirements, Optimum Waveforms for
Detection in Clutter, Family of Radar Waveforms.
UNIT -IV:
Pulse Compression in Radar Signals:
Introduction, Significance, Types, Linear FM Pulse Compression – Block Diagram,
Characteristics, Reduction of Time Side lobes, Stretch Techniques, Generation and
Decoding of FM Waveforms – Block Schematic and Characteristics of Passive System,
Digital Compression, SAW Pulse Compression.
Page 131
UNIT V:
Phase Coding Techniques:
Principles, Binary Phase Coding, Barker Codes, Maximal Length Sequences
(MLS/LRS/PN), Block Diagram of a Phase Coded CW Radar.
Poly Phase Codes : Frank Codes, Costas Codes, Non-Linear FM Pulse Compression,
Doppler Tolerant PC Waveforms – Short Pulse, Linear Period Modulation (LPM/HFM),
Sidelobe Reduction for Phase Coded PC Signals.
TEXT BOOKS:
4. Radar Handbook - M.I. Skolnik, 2nd
Ed., 1991, McGraw Hill.
5. Radar Design Principles : Signal Processing and The Environment - Fred E. Nathanson, 2nd
Ed.,
1999, PHI.
6. Introduction to Radar Systems - M.I. Skolnik, 3rd
Ed., 2001, TMH.
REFERENCE BOOKS:
3. Radar Principles - Peyton Z. Peebles, Jr., 2004, John Wiley.
4. Radar Signal Processing and Adaptive Systems - R. Nitzberg, 1999, Artech House.
Page 132
I Year I Semester
L P C
4 0 3
RF CIRCUIT DESIGN
(ELECTIVE - I)
UNIT -I:
Introduction to RF Electronics:
The Electromagnetic Spectrum, units and Physical Constants, Microwave bands – RF behavior
of Passive components: Tuned resonant circuits, Vectors, Inductors and Capacitors - Voltage and
Current in capacitor circuits – Tuned RF / IF Transformers.
UNIT -II:
Transmission Line Analysis:Examples of transmission lines- Transmission line equations and
Biasing- Micro Strip Transmission Lines- Special Termination Conditions- sourced and Loaded
Transmission Lines. Single And Multiport Networks:The Smith Chart, Interconnectivity
networks, Network properties and Applications, Scattering Parameters.
UNIT -III:
Matching and Biasing Networks:
Impedance matching using discrete components – Micro strip line matching networks, Amplifier
classes of Operation and Biasing networks.RF Passive & Active Components: Filter Basics –
Lumped filter design – Distributed Filter Design – Diplexer Filters- Crystal and Saw filters-
Active Filters - Tunable filters – Power Combiners / Dividers – Directional Couplers – Hybrid
Couplers – Isolators. RF Diodes – BJTs- FETs- HEMTs and Models.
UNIT -IV:
RF Transistor Amplifier Design:Characteristics of Amplifiers - Amplifier Circuit
Configurations, Amplifier Matching Basics, Distortion and noise products, Stability
Considerations, Small Signal amplifier design, Power amplifier design, MMIC amplifiers,
Broadband High Power multistage amplifiers, Low noise amplifiers, VGA Amplifiers.
UNIT -V:
Oscillators:Oscillator basics, Low phase noise oscillator design, High frequency Oscillator
configuration, LC Oscillators, VCOs, Crystal Oscillators, PLL Synthesizer, and Direct Digital
Synthesizer. RF Mixers:Basic characteristics of a mixer - Active mixers- Image Reject and
Harmonic mixers, Frequency domain considerations.
Page 133
TEXT BOOKS:
1. RF Circuit design: Theory and applications by Reinhold Ludwing, PavelBretchko.
Pearson Education Asia Publication, New Delhi 2001.
2. Radio Frequency and Microwave Communication Circuits – Analysis and Design –
Devendra K. Misra, Wiley Student Edition, John Wiley & Sons
REFERENCE BOOKS:
1. Radio frequency and Microwave Electronics - Mathew M.Radmangh, 2001, PE Asia Publ.
2. RF Circuit Design – Christopher Bowick, Cheryl Aljuni and John Biyler, Elsevier Science,
2008.
3. Secrets of RF Design - Joseph Carr., 3rd
Edition, Tab Electronics.
4. Complete Wireless Design - Cotter W. Sawyer, 2nd
Edition, Mc-Graw Hill.
5. Practical RF Circuit Design for Modem Wireless Systems Vol.2 -Less Besser and Rowan
Gilmore.
Page 134
I Year I Semester
L P C
4 0 3
ADVANCED COMPUTER NETWORKS
(ELECTIVE - I)
UNIT -I:
Congestion and Quality of Service (QoS):
Data traffic, Congestion, Congestion Control, Two examples, Quality of Service, Techniques to
improve QOS, Integrated Services and Differential services.Queue Management:Passive-Drop
trial, Drop front, Random drop, Active- early Random drop, Random Early detection.
UNIT -II:
X.25 Standards: X.25 Layers, X.21 Protocol ,Frame Relay: Introduction, Frame relay
operation, Frame relay layers, Congestion control, Leaky Bucket algorithms, ATM: Design
goals, ATM architecture, Switching, Switch Fabric, ATM layers, Service classes, ATM
applications
UNIT -III:
Interconnection Networks:Introduction, Banyan Networks, Properties, Crossbar switch, Three
stage Class networks, Rearrangeble Networks, Folding algorithm, Benes Networks, Lopping
algorithm, Bit allocation algorithm.SONET/SDH: Synchronous Transport signals, Physical
configuration, SONET layers, SONET Frame.
UNIT -IV:
Spread Spectrum: Introduction, Basic concept, Protection against Jamming, Spreading codes
(PN sequence), Generation, Properties, Types of Spread Spectrum Modulation, Application of
Spread Spectrum.Private Networks: Virtual Private Networks, Network Address Translation
Next Generation: IPV6 Transition from IPV4 to IPV6 ,Mobile IP: Addressing, Agents, Three
phases, Inefficiency in Mobile IP
UNIT -V:
Wireless Networks:Wireless LAN: IEEE802.11, Architecture, MAC Sub Layer, Addressing
Mechanism, Physical Layer.Bluetooth: Architecture, Bluetooth layers, Radio layer, Base band
layer, L2CAP, Wireless WAN: The Cellular Concept, Cell, Frequency reuse, Principle, Channel
Assignment Strategies, Interference and system capacity, Types of interference, Improving
capacity in cellular system, Handoff, AMPS, D-AMPS, GSM, CDMA, GPRS, 3G & 4G
technologies.
Page 135
TEXT BOOKS:
3. Data Communication and Networking - B. A.Forouzan, 4th
Ed,TMH
4. TCP/IP Protocol Suit – B. A. Forouzen, 4th
Ed, TMH
REFERENCE BOOKS:
7. Wireless Communication System- AbhishekYadav, University Sciences Press
8. Wireless Digital Communications – KamiloFeher, 1999, PHI
9. High Performance TCP-IP Networking- Mahaboob Hassan, Jain Raj, PHI
10. ATM Fundamentals- N. N. Biswas, Adventure Book Publishers, 1998
11. Wireless Communication – T. L. Singhal, McGraw Hill, 2010
12. Wireless Communication and Networking- Vijay K. Garg, Elsevier, 2009
Page 136
I Year I Semester
L P C
4 0 3
WIRELESS LANS AND PANS
(ELECTIVE – II)
UNIT –I:
Wireless System & Random Access Protocols:
Introduction, First and Second Generation Cellular Systems, Cellular Communications from 1G
to 3G, Wireless 4G systems, The Wireless Spectrum; Random Access Methods: Pure ALOHA,
Slotted ALOHA, Carrier Sense Multiple Access (CSMA), Carrier Sense Multiple Access with
Collision Detection (CSMA/CD), Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA).
UNIT –II:
Wireless LANs:
Introduction, importance of Wireless LANs, WLAN Topologies, Transmission Techniques:
Wired Networks, Wireless Networks, comparison of wired and Wireless LANs; WLAN
Technologies: Infrared technology, UHF narrowband technology, Spread Spectrum technology
UNIT –III:
The IEEE 802.11 Standard for Wireless LANs:
Network Architecture, Physical layer, The Medium Access Control Layer; MAC Layer issues:
Hidden Terminal Problem, Reliability, Collision avoidance, Congestion avoidance, Congestion
control, Security, The IEEE 802.11e MAC protocol
UNIT –IV:
Wireless PANs:
Introduction, importance of Wireless PANs, The Bluetooth technology: history and applications,
technical overview, the Bluetooth specifications, piconet synchronization and Bluetooth clocks,
Master-Slave Switch; Bluetooth security; Enhancements to Bluetooth: Bluetooth interference
issues, Intra and Inter Piconet scheduling, Bridge selection, Traffic Engineering, QoS and
Dynamics Slot Assignment, Scatternet formation.
UNIT –V:
The IEEE 802.15 working Group for WPANs:
The IEEE 802.15.3, The IEEE 802.15.4, ZigBee Technology, ZigBee components and network
topologies, The IEEE 802.15.4 LR-WPAN Device architecture: Physical Layer, Data Link
Layer, The Network Layer, Applications; IEEE 802.15.3a Ultra wideband.
Page 137
TEXT BOOKS:
1. Ad Hoc and Sensor Networks - Carlos de MoraisCordeiro and Dharma PrakashAgrawal,
World Scientific, 2011.
2. Wireless Communications and Networking - Vijay K.Garg, Morgan Kaufmann
Publishers, 2009.
REFERENCE BOOKS
1. Wireless Networks - KavehPahlaram, Prashant Krishnamurthy, PHI, 2002.
2. Wireless Communication- Marks Ciampor, JeorgeOlenewa, Cengage Learning, 2007.
Page 138
I Year I Semester
L P C
4 0 3
MOBILE COMPUTING TECHNOLOGIES
(ELECTIVE – II)
UNIT –I:
Introduction to Mobile Computing Architecture:
Mobile Computing – Dialog Control – Networks – Middleware and Gateways – Application and
Services – Developing Mobile Computing Applications – Security in Mobile Computing –
Architecture for Mobile Computing – Three Tier Architecture – Design considerations for
Mobile Computing – Mobile Computing through Internet – Making existing Applications
Mobile Enabled.
UNIT –II:
Cellular Technologies: GSM, GPS, GPRS, CDMA and 3G:
Bluetooth – Radio Frequency Identification – Wireless Broadband – Mobile IP – Internet
Protocol Version 6 (IPv6) – Java Card – GSM Architecture – GSM Entities – Call Routing in
GSM – PLMN Interfaces – GSM addresses and Identifiers – Network aspects in GSM –
Authentication and Security – Mobile computing over SMS – GPRS and Packet Data Network –
GPRS Network Architecture – GPRS Network Operations – Data Services in GPRS –
Applications for GPRS – Limitations of GPRS – Spread Spectrum technology – Is-95 – CDMA
Versus GSM – Wireless Data – Third Generation Networks – Applications on 3G
UNIT –III:
Wireless Application Protocol (WAP) and Wireless LAN:
WAP – MMS – Wireless LAN Advantages – IEEE 802.11 Standards – Wireless LAN
Architecture – Mobility in wireless LAN
Intelligent Networks and Interworking:
Introduction – Fundamentals of Call processing – Intelligence in the Networks – SS#7 Signaling
– IN Conceptual Model (INCM) – soft switch – Programmable Networks – Technologies and
Interfaces for IN
UNIT –IV:
Client Programming, Palm OS, Symbian OS, Win CE Architecture:
Introduction – Moving beyond the Desktop – A Peek under the Hood: Hardware Overview –
Mobile phones – PDA – Design Constraints in Applications for Handheld Devices – Palm OS
architecture – Application Development – Multimedia – Symbian OS Architecture –
Applications for Symbian, Different flavors of Windows CE -Windows CE Architecture
J2ME:
JAVA in the Handset – The Three-prong approach to JAVA Everywhere – JAVA 2 Micro
Edition (J2ME) technology – Programming for CLDC – GUI in MIDP – UI Design Issues –
Multimedia – Record Management System – Communication in MIDP – Security considerations
in MIDP – Optional Packages
Page 139
UNIT –V:
Voice Over Internet Protocol and Convergence:
Voice over IP- H.323 Framework for Voice over IP – Session Initiation Protocol – Comparision
between H.323 and SIP – Real Time protocols – Convergence Technologies – Call Routing –
Voice over IP Applications – IP multimedia subsystem (IMS) – Mobile VoIP
Security Issues in Mobile Computing:
Introduction – Information Security – Security Techniques and Algorithms – Security Protocols
– Public Key Infrastructure – Trust – Security Models – Security frameworks for Mobile
Environment
TEXT BOOKS:
1. Mobile Computing – Technology, Applications and Service Creation – Asoke K
Talukder, Roopa R Yavagal, 2009, TATA McGraw Hill
2. Mobile Communications – Jochen Schiller – 2nd
Edition – Pearson Education
REFERENCE BOOKS:
1. The CDMA 2000 System for Mobile Communications – VieriVaughi, Alexander Damn
Jaonvic – Pearson
2. Adalestein - Fundamentals of Mobile &Parvasive Computing, 2008, TMH
Page 140
I Year I Semester
L P C
4 0 3
NETWORK SECURITY AND CRYPTOGRAPHY
(ELECTIVE -II)
UNIT -I:
Introduction:
Attacks, Services and Mechanisms, Security attacks, Security services, A Model for
Internetwork security.Classical Techniques:Conventional Encryption model, Steganography,
Classical Encryption Techniques.
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
UNIT -II:
Encryption Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.Conventional Encryption :Placement of
Encryption function, Traffic confidentiality, Key distribution, Random Number Generation.
UNIT -III:
Public Key Cryptography:Principles, RSA Algorithm, Key Management, Diffie-Hellman Key
exchange, Elliptic Curve Cryptograpy.Number Theory:Prime and Relatively prime numbers,
Modular arithmetic, Fermat’s and Euler’s theorems, Testing for primality, Euclid’s Algorithm,
the Chinese remainder theorem, Discrete logarithms.
UNIT -IV:
Message Authentication and Hash Functions:Authentication requirements and functions,
Message Authentication, Hash functions, Security of Hash functions and MACs.Hash and Mac
Algorithms
MD File, Message digest Algorithm, Secure Hash Algorithm, RIPEMD-160, HMAC.Digital
signatures and Authentication protocols: Digital signatures, Authentication Protocols, Digital
signature standards.
Authentication Applications :Kerberos, X.509 directory Authentication service.Electronic Mail
Security: Pretty Good Privacy, S/MIME.
Page 141
UNIT –V:
IP Security:
Overview, Architecture, Authentication, Encapsulating Security Payload, Combining security
Associations, Key Management. Web Security: Web Security requirements, Secure sockets layer
and Transport layer security, Secure Electronic Transaction.
Intruders, Viruses and Worms
Intruders, Viruses and Related threats.
Fire Walls: Fire wall Design Principles, Trusted systems.
TEXT BOOKS:
3. Cryptography and Network Security: Principles and Practice - William Stallings, Pearson
Education.
4. Network Security Essentials (Applications and Standards) by William Stallings Pearson
Education.
REFERENCE BOOKS:
6. Fundamentals of Network Security by Eric Maiwald (Dreamtech press)
7. Network Security - Private Communication in a Public World by Charlie Kaufman,
Radia Perlman and Mike Speciner, Pearson/PHI.
8. Principles of Information Security, Whitman, Thomson.
9. Network Security: The complete reference, Robert Bragg, Mark Rhodes, TMH
10. Introduction to Cryptography, Buchmann, Springer.
Page 142
I Year I Semester
L P C
0 3 2
OPTICAL AND DATA COMMUNICATIONS LAB
Optical communications Experiments
1. D.C Characteristics of light sources /detectors (LED, Laser diode and PIN photo diode.)
2. Measurement of Numerical aperture, Propagation and Bending Loss in fiber.
4. Analog link set up using a fiber
5. Digital link set up using a fiber
6. Set up of time division multiplexing using fiber optics
7. Digital Fiber Optical Transmitter and Receiver
Data Communications Experiments
9. Study of serial interface RS – 232
10. Study of pc to pc communication using parallel port
11. To establish pc-pc communication using LAN
12. Study of LAN using star topology, bus topology and tree topology
13. Study and configure modem of a computer
14. To configure a hub/switch
15. To study the interconnections of cables for data communication
16. Study of a wireless communication system
Page 143
I Year II Semester
L P C
4 0 3
CODING THEORY AND APPLICATIONS
UNIT –I:
Coding for Reliable Digital Transmission and Storage:
Mathematical model of Information, A Logarithmic Measure of Information, Average and
Mutual Information and Entropy, Types of Errors, Error Control Strategies.
Linear Block Codes:
Introduction to Linear Block Codes, Syndrome and Error Detection, Minimum Distance of a
Block code, Error-Detecting and Error-correcting Capabilities of a Block code, Standard array
and Syndrome Decoding, Probability of an undetected error for Linear Codes over a BSC,
Hamming Codes. Applications of Block codes for Error control in data storage system
UNIT –II:
Cyclic Codes:
Description, Generator and Parity-check Matrices, Encoding, Syndrome Computation and Error
Detection, Decoding ,Cyclic Hamming Codes, Shortened cyclic codes, Error-trapping decoding
for cyclic codes, Majority logic decoding for cyclic codes.
UNIT –III:
Convolutional Codes:
Encoding of Convolutional Codes, Structural and Distance Properties, maximum likelihood
decoding, Sequential decoding, Majority- logic decoding of Convolution codes. Application of
Viterbi Decoding and Sequential Decoding, Applications of Convolutional codes in ARQ
system.
UNIT –IV:
Burst –Error-Correcting Codes:
Decoding of Single-Burst error Correcting Cyclic codes, Single-Burst-Error-Correcting Cyclic
codes, Burst-Error-Correcting Convolutional Codes, Bounds on Burst Error-Correcting
Capability, Interleaved Cyclic and Convolutional Codes, Phased-Burst –Error-Correcting Cyclic
and Convolutional codes.
UNIT -V:
BCH – Codes:
BCH code- Definition, Minimum distance and BCH Bounds, Decoding Procedure for BCH
Codes- Syndrome Computation and Iterative Algorithms, Error Location Polynomials and
Numbers for single and double error correction
Page 144
TEXT BOOKS:
1. Error Control Coding- Fundamentals and Applications –Shu Lin, Daniel J.Costello,Jr,
Prentice Hall, Inc.
2. Error Correcting Coding Theory-Man Young Rhee- 1989, McGraw-Hill Publishing.
REFERENCE BOOKS:
1. Digital Communications-Fundamental and Application - Bernard Sklar, PE.
2. Digital Communications- John G. Proakis, 5th
Ed., 2008, TMH.
3. Introduction to Error Control Codes-Salvatore Gravano-oxford
4. Error Correction Coding – Mathematical Methods and Algorithms – Todd K.Moon,
2006, Wiley India.
5. Information Theory, Coding and Cryptography – Ranjan Bose, 2nd
Ed, 2009, TMH.
Page 145
I Year II Semester
L P C
4 0 3
WIRELESS COMMUNICATIONS AND NETWORKS
UNIT -I:
The Cellular Concept-System Design Fundamentals:
Introduction, Frequency Reuse, Interference and system capacity – Co channel Interference and
system capacity, Channel planning for Wireless Systems, Adjacent Channel interference , Power
Control for Reducing interference, Improving Coverage & Capacity in Cellular Systems- Cell
Splitting, Sectoring, Channel Assignment Strategies, Handoff Strategies- Prioritizing Handoffs,
Practical Handoff Considerations, Trunking and Grade of Service
UNIT –II:
Mobile Radio Propagation: Large-Scale Path Loss:
Introduction to Radio Wave Propagation, Free Space Propagation Model, Relating Power to
Electric Field, Basic Propagation Mechanisms, Reflection: Reflection from Dielectrics,
Brewster Angle, Reflection from prefect conductors, Ground Reflection (Two-Ray) Model,
Diffraction: Fresnel Zone Geometry, Knife-edge Diffraction Model, Multiple knife-edge
Diffraction, Scattering, Outdoor Propagation Models- Longley-Ryce Model, Okumura Model,
Hata Model, PCS Extension to Hata Model, Walfisch and Bertoni Model, Wideband PCS
Microcell Model, Indoor Propagation Models-Partition losses (Same Floor), Partition losses
between Floors, Log-distance path loss model, Ericsson Multiple Breakpoint Model, Attenuation
Factor Model, Signal penetration into buildings, Ray Tracing and Site Specific Modeling.
UNIT –III:
Mobile Radio Propagation: Small –Scale Fading and Multipath
Small Scale Multipath propagation-Factors influencing small scale fading, Doppler shift,
Impulse Response Model of a multipath channel- Relationship between Bandwidth and Received
power, Small-Scale Multipath Measurements-Direct RF Pulse System, Spread Spectrum Sliding
Correlator Channel Sounding, Frequency Domain Channels Sounding, Parameters of Mobile
Multipath Channels-Time Dispersion Parameters, Coherence Bandwidth, Doppler Spread and
Coherence Time, Types of Small-Scale Fading-Fading effects Due to Multipath Time Delay
Spread, Flat fading, Frequency selective fading, Fading effects Due to Doppler Spread-Fast
fading, slow fading, Statistical Models for multipath Fading Channels-Clarke’s model for flat
fading, spectral shape due to Doppler spread in Clarke’s model, Simulation of Clarke and Gans
Fading Model, Level crossing and fading statistics, Two-ray Rayleigh Fading Model.
Page 146
UNIT -IV:
Equalization and Diversity
Introduction, Fundamentals of Equalization, Training a Generic Adaptive Equalizer, Equalizers
in a communication Receiver, Linear Equalizers, Non-linear Equalization-Decision Feedback
Equalization (DFE), Maximum Likelihood Sequence Estimation (MLSE) Equalizer, Algorithms
for adaptive equalization-Zero Forcing Algorithm, Least Mean Square Algorithm, Recursive
least squares algorithm. Diversity -Derivation of selection Diversity improvement, Derivation of
Maximal Ratio Combining improvement, Practical Space Diversity Consideration-Selection
Diversity, Feedback or Scanning Diversity, Maximal Ratio Combining, Equal Gain Combining,
Polarization Diversity, Frequency Diversity, Time Diversity, RAKE Receiver.
UNIT -V:
Wireless Networks
Introduction to wireless Networks, Advantages and disadvantages of Wireless Local Area
Networks, WLAN Topologies, WLAN Standard IEEE 802.11, IEEE 802.11 Medium Access
Control, Comparison of IEEE 802.11 a,b,g and n standards, IEEE 802.16 and its enhancements,
Wireless PANs, HiperLan, WLL.
TEXT BOOKS:
4. Wireless Communications, Principles, Practice – Theodore, S. Rappaport, 2nd
Ed., 2002,
PHI.
5. Wireless Communications-Andrea Goldsmith, 2005 Cambridge University Press.
6. Mobile Cellular Communication – GottapuSasibhushanaRao, Pearson Education, 2012.
REFERENCE BOOKS:
6. Principles of Wireless Networks – KavehPahLaven and P. Krishna Murthy, 2002, PE
7. Wireless Digital Communications – KamiloFeher, 1999, PHI.
8. Wireless Communication and Networking – William Stallings, 2003, PHI.
9. Wireless Communication – UpenDalal, Oxford Univ. Press
10. Wireless Communications and Networking – Vijay K. Gary, Elsevier.
Page 147
I Year II Semester
L P C
4 0 3
IMAGE AND VIDEO PROCESSING
UNIT –I:
Fundamentals of Image Processing and Image Transforms:
Introduction, Image sampling, Quantization, Resolution, Image file formats, Elements of image
processing system, Applications of Digital image processing
Introduction, Need for transform, image transforms, Fourier transform, 2 D Discrete Fourier
transform and its transforms, Importance of phase, Walsh transform, Hadamard transform, Haar
transform, slant transform Discrete cosine transform, KL transform, singular value
decomposition, Radon transform, comparison of different image transforms.
UNIT –II:
Image Enhancement:
Spatial domain methods: Histogram processing, Fundamentals of Spatial filtering, Smoothing
spatial filters, Sharpening spatial filters.
Frequency domain methods: Basics of filtering in frequency domain, image smoothing, image
sharpening, Selective filtering.
Image Restoration:
Introduction to Image restoration, Image degradation, Types of image blur, Classification of
image restoration techniques, Image restoration model, Linear and Nonlinear image restoration
techniques, Blind deconvolution
UNIT –III:
Image Segmentation:
Introduction to image segmentation, Point, Line and Edge Detection, Region based
segmentation., Classification of segmentation techniques, Region approach to image
segmentation, clustering techniques, Image segmentation based on thresholding, Edge based
segmentation, Edge detection and linking, Hough transform, Active contour
Image Compression:
Introduction, Need for image compression, Redundancy in images, Classification of redundancy
in images, image compression scheme, Classification of image compression schemes,
Fundamentals of information theory, Run length coding, Shannon – Fano coding, Huffman
coding, Arithmetic coding, Predictive coding, Transformed based compression, Image
compression standard, Wavelet-based image compression, JPEG Standards.
UNIT -IV:
Basic Steps of Video Processing:
Analog Video, Digital Video. Time-Varying Image Formation models: Three-Dimensional
Motion Models, Geometric Image Formation, Photometric Image Formation, Sampling of Video
signals, Filtering operations.
Page 148
UNIT –V:
2-D Motion Estimation:
Optical flow, General Methodologies, Pixel Based Motion Estimation, Block- Matching
Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based Motion
Estimation, Multi resolution motion estimation, Waveform based coding, Block based transform
coding, Predictive coding, Application of motion estimation in Video coding.
TEXT BOOKS:
4. Digital Image Processing – Gonzaleze and Woods, 3rd
Ed., Pearson.
5. Video Processing and Communication – Yao Wang, JoemOstermann and Ya–quin
Zhang. 1st Ed., PH Int.
6. S.Jayaraman, S.Esakkirajan and T.VeeraKumar, “Digital Image processing, Tata
McGraw Hill publishers, 2009
REFRENCE BOOKS:
7. Digital Image Processing and Analysis-Human and Computer Vision Application with
CVIP Tools – ScotteUmbaugh, 2nd
Ed, CRC Press, 2011.
8. Digital Video Processing – M. Tekalp, Prentice Hall International.
9. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar –
TMH, 2009.
10. Multidimentional Signal, Image and Video Processing and Coding – John Woods, 2nd
Ed,
Elsevier.
11. Digital Image Processing with MATLAB and Labview – Vipula Singh, Elsevier.
12. Video Demystified – A Hand Book for the Digital Engineer – Keith Jack, 5th
Ed.,
Elsevier.
Page 149
I Year II Semester
L P C
4 0 3
SOFTWARE DEFINED RADIO
UNIT -I:
Introduction:
The Need for Software Radios, What is Software Radio, Characteristics and benefits of
software radio- Design Principles of Software Radio, RF Implementation issues- The Purpose
of RF Front – End, Dynamic Range- The Principal Challenge of Receiver Design – RF Receiver
Front- End Topologies- Enhanced Flexibility of the RF Chain with Software Radios-
Importance of the Components to Overall Performance- Transmitter Architectures and Their
Issues- Noise and Distortion in the RF Chain, ADC and DAC Distortion.
UNIT -II:
Multi Rate Signal Processing:
Introduction- Sample Rate Conversion Principles- Polyphase Filters- Digital Filter Banks-
Timing Recovery in Digital Receivers Using Multirate Digital Filters.
Digital Generation of Signals:
Introduction- Comparison of Direct Digital Synthesis with Analog Signal Synthesis-
Approaches to Direct Digital Synthesis- Analysis of Spurious Signals- Spurious Components
due to Periodic jitter- Band Pass Signal Generation- Performance of Direct Digital Synthesis
Systems- Hybrid DDS-PLL Systems- Applications of direct Digital Synthesis- Generation of
Random Sequences- ROM Compression Techniques.
UNIT -III:
Analog to Digital and Digital to Analog Conversion:
Parameters of ideal data converters- Parameters of Practical data converters- Analog to Digital
and Digital to Analog Conversion- Techniques to improve data converter performance-
Common ADC and DAC architectures.
UNIT -IV:
Digital Hardware Choices:
Introduction- Key Hardware Elements- DSP Processors- Field Programmable Gate Arrays-
Trade-Offs in Using DSPs, FPGAs, and ASICs- Power Management Issues- Using a
Combination of DSPs, FPGAs, and ASICs.
UNIT -V:
Object – Oriented Representation of Radios and Network Resources:
Networks- Object Oriented Programming- Object Brokers- Mobile Application Environments-
Joint Tactical Radio System.
Case Studies in Software Radio Design: Introduction and Historical Perspective, SPEAK
easy- JTRS, Wireless Information Transfer System, SDR-3000 Digital Transceiver Subsystem,
Spectrum Ware, CHARIOT.
TEXT BOOKS:
Page 150
1. Software Radio: A Modern Approach to Radio Engineering - Jeffrey H. Reed, 2002, PEA
Publication.
2. Software Defined Radio: Enabling Technologies- Walter Tuttle Bee, 2002, Wiley
Publications.
REFERENCE BOOKS:
1. Software Defined Radio for 3G - Paul Burns, 2002, Artech House.
2. Software Defined Radio: Architectures, Systems and Functions - Markus Dillinger,
KambizMadani, Nancy Alonistioti, 2003, Wiley.
3. Software Radio Architecture: Object Oriented Approaches to wireless System Enginering –
Joseph Mitola, III, 2000, John Wiley & Sons.
4. R.F Microelectronics – B. Razavi, 1998, PHI.
5. DSP – A Computer Based Approach – S. K. Mithra, 1998, McGraw-Hill.
I Year II Semester L P C
Page 151
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -III)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach,Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control,Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear timedelay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
Page 152
TEXT BOOKS:
3. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
4. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
8. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
9. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
10. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
11. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
12. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
13. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
14. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 153
I Year II Semester
L P C
4 0 3
INTERNET PROTOCOLS
( ELECTIVE III)
UNIT -I:
Internetworking Concepts:
Principles of Internetworking, Connectionless Internetworking, Application level
Interconnections, Network level Interconnection, Properties of thee Internet, Internet
Architecture, Wired LANS, Wireless LANs, Point-to-Point WANs, Switched WANs,
Connecting Devices, TCP/IP Protocol Suite.
IP Address:
Classful Addressing: Introduction, Classful Addressing, Other Issues, Sub-netting and Super-
netting
Classless Addressing: Variable length Blocks, Sub-netting, Address Allocation. Delivery,
Forwarding, and Routing of IP Packets: Delivery, Forwarding, Routing, Structure of Router.
ARP and RARP: ARP, ARP Package, RARP.
UNIT -II:
Internet Protocol (IP): Datagram, Fragmentation, Options, Checksum, IP V.6.
Transmission Control Protocol (TCP): TCP Services, TCP Features, Segment, A TCP
Connection, State Transition Diagram, Flow Control, Error Control, Congestion Control, TCP
Times.
Stream Control Transmission Protocol (SCTP): SCTP Services, SCTP Features, Packet
Format, Flow Control, Error Control, Congestion Control.
Mobile IP: Addressing, Agents, Three Phases, Inefficiency in Mobile IP.
Classical TCP Improvements: Indirect TCP, Snooping TCP, Mobile TCP, Fast Retransmit/
Fast Recovery, Transmission/ Time Out Freezing, Selective Retransmission, Transaction
Oriented TCP.
UNIT -III:
Unicast Routing Protocols (RIP, OSPF, and BGP): Intra and Inter-domain Routing, Distance
Vector Routing, RIP, Link State Routing, OSPF, Path Vector Routing, BGP.
Multicasting and Multicast Routing Protocols: Unicast - Multicast- Broadcast, Multicast
Applications, Multicast Routing, Multicast Link State Routing: MOSPF, Multicast Distance
Vector: DVMRP.
Page 154
UNIT -IV:
Domain Name System (DNS): Name Space, Domain Name Space, Distribution of Name
Space, and DNS in the internet.
Remote Login TELNET: Concept, Network Virtual Terminal (NVT).
File Transfer FTP and TFTP: File Transfer Protocol (FTP).
Electronic Mail: SMTP and POP.
Network Management-SNMP: Concept, Management Components, World Wide Web- HTTP
Architecture.
UNIT -V:
Multimedia:
Digitizing Audio and Video, Network security, security in the internet firewalls. Audio and
Video Compression, Streaming Stored Audio/Video, Streaming Live Audio/Video, Real-Time
Interactive Audio/Video, RTP, RTCP, Voice Over IP. Network Security, Security in the
Internet, Firewalls.
TEXT BOOKS:
3. TCP/IP Protocol Suite- Behrouz A. Forouzan, Third Edition, TMH
4. Internetworking with TCP/IP Comer 3 rd edition PHI
REFERENCE BOOKS:
6. High performance TCP/IP Networking- Mahbub Hassan, Raj Jain, PHI, 2005
7. Data Communications & Networking – B.A. Forouzan– 2nd
Edition – TMH
8. High Speed Networks and Internets- William Stallings, Pearson Education, 2002.
9. Data and Computer Communications, William Stallings, 7th
Edition., PEI.
10. The Internet and Its Protocols – AdrinFarrel, Elsevier, 2005.
Page 155
I Year II Semester
L P C
4 0 3
CYBER SECURITY
Page 156
I Year II Semester
L P C
4 0 3
OPTICAL NETWORKS
(ELECTIVE – IV)
UNIT –I:
Client Layers of Optical Networks:
SONET / SDH – Multiplexing, Frame Structure, Physical Layer, Infrastructure, ATM –
Functions, Adaptation layers, QoS, Flow Control Signaling and Routing, IP – Routing, QoS,
MPLS, Storage Area Networks – ESCON, Fiber Channel, HIPPI, Gigabit Ethernet.
UNIT -II:
WDM network Elements and Design:
Optical Line Terminals and Amplifiers, Add/Drop Multiplexers, Optical Cross Connects, Cost
trade-offs in Network Design, LTD and RWA Problems, Dimensioning – Wavelength Routing
Networks, Statistical and Maximum Load Dimensioning Models.
UNIT –III:
Network Control and Management:
Network Management Functions, Optical Layer Services and Interfacing, Layers within Optical
Layer, Multivendor Interoperability, Performance and Fault Management, Configuration
Management, Optical Safety.
Unit –IV:
Network Survivability:
Basic Concepts of Survivability, Protection in SONET/SDH Links and Rings, Protection in IP
Networks, Optical Layer Protection – Service Classes, Protection Schemes, Interworking
between Layers.
UNIT –V:
Access Networks and Photonic Packet Switching:
Network Architecture, Enhanced HFC, FTTC, Photonic Packet Switching – OTDM,
Synchronization, Header Processing, Buffering, Burst Switching, Test Beds.
TEXT BOOKS:
1. Optical Networks: A Practical Perspective - Rajiv Ramaswami and Kumar N. Sivarajan, 2nd
Ed., 2004, Elsevier Morgan Kaufmann Publishers (An Imprint of Elsevier).
2. WDM Optical Networks: Concepts, Design and Algorithms – C. Siva Rama Murthy and
Mohan Guruswamy 2nd
Ed., 2003, PEI.
3. Optical Networks: Third Generation Transport Systems – Uyless Black, 2nd
Ed., 2009, PEI.
Page 157
REFERENCE BOOKS:
1. Optical Fiber Communications: Principles and Practice – John.M.Senior, 2nd
Ed., 2000, PE.
2. Fiber Optics Communication – Harold Kolimbris, 2nd
Ed., 2004, PEI.
3. Networks – Timothy S. Ramteke, 2 ed., 2004, PEI.
4. Optical Fiber Communications – GovindAgarwal, 2nd
Ed., 2004, TMH.
5. Optical Fiber Communications and Its Applications – S.C.Gupta, 2004, PHI.
6. Telecommunication System Engineering –Roger L.Freeman, 4th
Ed., John Wiley, 2004.
Page 158
I Year II Semester
L P C
4 0 3
DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
(ELECTIVE -IV)
UNIT –I:
Introduction to Digital Signal Processing:
Introduction, A Digital signal-processing system, The sampling process, Discrete time
sequences. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-
invariant systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations:
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT –II:
Architectures for Programmable DSP Devices:
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT -III:
Programmable Digital Signal Processors:
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX processors, Pipeline operation of
TMS320C54XX Processors.
UNIT –IV:
Analog Devices Family of DSP Devices:
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Blackfin Processor - The Blackfin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
UNIT –V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices:
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
Page 159
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach to Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. EmbeddedSignalProcessingwiththeMicroSignalArchitecturePublisher: Woon-SengGan, Sen
M. Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications – B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. Digital Signal Processing –Jonatham Stein, 2005, John Wiley.
3. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
4. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
5. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
6. Embedded Media Processing by David J. Katz and Rick Gentile of Analog Devices,
Newnes , ISBN 0750679123, 2005
Page 160
I Year II Semester
L P C
4 0 3
RADIO NAVIGATIONAL AIDS
(ELECTIVE-IV)
UNIT –I:
Navigational Systems:
Review of Navigational Systems: Aircraft navigational system, Geometry of the earth.
Navigation equation, Navigation errors, Radio navigation system types and Performance
parameters, ILS System, Hyperbolic navigation systems, Loran, Omega, Decca Radio direction
finding, DME, TACAN and VORTAC.
UNIT -II:
Inertial Navigation:
Inertial navigation system,Sensing instruments: Accelerometer. Gyro- copes, Analytic and
Gimbaled platforms, Mechanization, Error analysis, Alignment.
UNIT –III:
Global Positioning System (GPS) for Navigation:
Overview of GPS, Reference systems.Satellite orbits, Signal structure, Geometric dilution of
precision (GDOP), or Precision dilution of recision (PDOP), Satellite ephemeris, Satellite clock,
Ionospheric group delay.Tropospheric group delay, Multipath errors and Receiver measurement
errors.
UNIT -IV:
Differential GPS and WAAS:
Standard and precise positioning service local area DGPS and Wide area DGPS errors, Wide
Area Augmentation System (WAAS) architecture, Link budget and Data Capacity, Ranging
function, Precision approach and error estimates.
UNIT –V:
GPS Navigational Applications:
General applications of GPS, DGPS, Marine, Air and Land Navigation, Surveying, Mapping and
Geographical information systems, Military and Space.
TEXT BOOKS:
1. Myron Kavton and Walter Friend, R. - “Avionics Navigation Systems”, Wiley,1997
2. Parkinson. BW. Spilker - “Global Positioning System Theory and Applications”,Progress
in Astronautics, Vol. I and II, 1996.
Page 161
REFERENCE BOOKS:
1. Hoffman. B., Wellenhof. H... Lichtenegger and J. Collins - “GPS Theory andPractice”,
Springer Verlang Wien New York, 1992.
2. Elliot D. Kaplan - “Understanding GPS Principles and Applications”, Artech House. Inc.,
1996.
3. Lieck Alfred. - “GPS Satellite Surveying”, John Wiley, 1990.
Page 162
I Year II Semester
L P C
0 3 2
ADVANCED COMMUNICATIONS LAB
Note:
C. Minimum of 10 Experiments have to be conducted
D. All Experiments may be Simulated using MATLAB and to be verified using related
training kits.
1. Measurement of Bit Error Rate using Binary Data
2. Verification of minimum distance in Hamming code
3. Determination of output of Convolutional Encoder for a given sequence
4. Determination of output of Convolutional Decoder for a given sequence
5. Efficiency of DS Spread- Spectrum Technique
6. Simulation of Frequency Hopping (FH) system
7. Effect of Sampling and Quantization of Digital Image
8. Verification of Various Transforms (FT / DCT/ Walsh / Hadamard) on a given
Image ( Finding Transform and Inverse Transform)
9. Point, Line and Edge detection techniques using derivative operators.
10. Implementation of FIR filter using DSP Trainer Kit (C-Code/ Assembly code)
11. Implementation of IIR filter using DSP Trainer Kit (C-Code/ Assembly code)
12. Determination of Losses in Optical Fiber
13. Observing the Waveforms at various test points of a mobile phone using
Mobile Phone Trainer
14. Study of Direct Sequence Spread Spectrum Modulation & Demodulation
using CDMA-DSS-BER Trainer
15. Study of ISDN Training System with Protocol Analyzer
16. Characteristics of LASER Diode.
Page 163
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
DECS, ECE, DECE
(Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 164
I Semester
II Semester
S. No. Name of the Subject L P C
1 Digital System Design 4 - 3
2 Detection & Estimation Theory 4 - 3
3 Digital Data Communications 4 - 3
4 Advanced Digital Signal Processing 4 - 3
5
Elective I
I. Transform Techniques
II. VLSI Technology & Design
III. Radar Signal Processing
4 - 3
6
Elective II
I. Statistical Signal Processing
II. Optical Communication Technology
III. Network Security & Cryptography
4 - 3
7 1. System Design & Data Communications Lab - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Coding Theory & Applications 4 - 3
2 Embedded System Design 4 - 3
3 Image and Video Processing 4 - 3
4 Wireless Communications & Networks 4 - 3
5
Elective III
I. CMOS Analog & Digital IC Design
II. Advanced Computer Architecture
III. Soft Computing Techniques
IV. Cyber Security
4 - 3
6
Elective IV
I. DSP Processors and Architectures
II. EMI / EMC
III. Object Oriented Programming
4 - 3
7 Advanced Communications Laboratory - 3 2
Total Credits 20
Page 165
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 166
I Year I Semester
L P C
4 0 3
DIGITAL SYSTEM DESIGN
UNIT-I: Minimization Procedures and CAMP Algorithm:
Review on minimization of switching functions using tabular methods, k-map, QM algorithm,
CAMP-I algorithm, Phase-I: Determination of Adjacencies, DA, CSC, SSMs and EPCs,, CAMP-
I algorithm, Phase-II: Passport checking,Determination of SPC, CAMP-II algorithm:
Determination of solution cube, Cube based operations, determination of selected cubes are
wholly within the given switching function or not, Introduction to cube based algorithms.
UNIT-II: PLA Design, Minimization and Folding Algorithms:
Introduction to PLDs, basic configurations and advantages of PLDs, PLA-Introduction, Block
diagram of PLA, size of PLA, PLA design aspects, PLA minimization algorithm(IISc algorithm),
PLA folding algorithm(COMPACT algorithm)-Illustration of algorithms with suitable examples.
UNIT -III: Design of Large Scale Digital Systems:
Algorithmic state machinecharts-Introduction, Derivation of SM Charts, Realization of SM
Chart, control implementation, control unit design, data processor design, ROM design, PAL
design aspects, digital system design approaches using CPLDs, FPGAs and ASICs.
UNIT-IV: Fault Diagnosis in Combinational Circuits:
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.
UNIT-V: Fault Diagnosis in Sequential Circuits:
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd
Edition, 2001, TMH
3. Digital system Design using PLDd-Lala
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th
Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
Page 167
I Year I Semester
L P C
4 0 3
DETECTION AND ESTIMATION THEORY
UNIT –I:
Random Processes:
Discrete Linear Models, Markov Sequences and Processes, Point Processes, and Gaussian
Processes.
UNIT –II:
Detection Theory:
Basic Detection Problem, Maximum A posteriori Decision Rule, Minimum Probability of Error
Classifier, Bayes Decision Rule, Multiple-Class Problem (Bayes)- minimum probability error with
and without equal a priori probabilities, Neyman-Pearson Classifier, General Calculation of
Probability of Error, General Gaussian Problem, Composite Hypotheses.
UNIT –III:
Linear Minimum Mean-Square Error Filtering:
Linear Minimum Mean Squared Error Estimators, Nonlinear Minimum Mean Squared Error
Estimators. Innovations, Digital Wiener Filters with Stored Data, Real-time Digital Wiener
Filters, Kalman Filters.
UNIT –IV:
Statistics:
Measurements, Nonparametric Estimators of Probability Distribution and Density Functions, Point
Estimators of Parameters, Measures of the Quality of Estimators, Introduction to Interval
Estimates, Distribution of Estimators, Tests of Hypotheses, Simple Linear Regression, Multiple
Linear Regression.
UNIT –V:
Estimating the Parameters of Random Processes from Data:
Tests for Stationarity and Ergodicity, Model-free Estimation, Model-based Estimation of
Autocorrelation Functions, Power Special Density Functions.
TEXT BOOKS:
1. Random Signals: Detection, Estimation and Data Analysis - K. Sam Shanmugan& A.M.
Breipohl, Wiley India Pvt. Ltd, 2011.
2. Random Processes: Filtering, Estimation and Detection - Lonnie C. Ludeman, Wiley India
Pvt. Ltd., 2010.
Page 168
REFERENCE BOOKS:
1. Fundamentals of Statistical Signal Processing: Volume I Estimation Theory–
Steven.M.Kay, Prentice Hall, USA, 1998.
2. Fundamentals of Statistical Signal Processing: Volume I Detection Theory– Steven.M.Kay,
Prentice Hall, USA, 1998.
3. Introduction to Statistical Signal Processing with Applications - Srinath, Rajasekaran,
Viswanathan, 2003, PHI.
4. Statistical Signal Processing: Detection, Estimation and Time Series Analysis – Louis
L.Scharf, 1991, Addison Wesley.
5. Detection, Estimation and Modulation Theory: Part – I – Harry L. Van Trees, 2001, John
Wiley & Sons, USA.
6. Signal Processing: Discrete Spectral Analysis – Detection & Estimation – Mischa
Schwartz, Leonard Shaw, 1975, McGraw Hill.
Page 169
I Year I Semester
L P C
4 0 3
DIGITAL DATA COMMUNICATIONS
UNIT -I:
Digital Modulation Schemes:
BPSK, QPSK, 8PSK, 16PSK, 8QAM, 16QAM, DPSK – Methods, Band Width Efficiency,
Carrier Recovery, Clock Recovery.
UNIT -II:
Basic Concepts of Data Communications, Interfaces and Modems:
Data Communication Networks, Protocols and Standards, UART, USB, Line Configuration,
Topology, Transmission Modes, Digital Data Transmission, DTE-DCE interface, Categories of
Networks – TCP/IP Protocol suite and Comparison with OSI model.
UNIT -III:
Error Correction: Types of Errors, Vertical Redundancy Check (VRC), LRC, CRC, Checksum,
Error Correction using Hamming code
Data Link Control: Line Discipline, Flow Control, Error Control
Data Link Protocols: Asynchronous Protocols, Synchronous Protocols, Character Oriented
Protocols, Bit-Oriented Protocol, Link Access Procedures.
UNIT -IV:
Multiplexing: Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM),
Multiplexing Application, DSL.
Local Area Networks: Ethernet, Other Ether Networks, Token Bus, Token Ring, FDDI.
Metropolitan Area Networks: IEEE 802.6, SMDS
Switching: Circuit Switching, Packet Switching, Message Switching.
Networking and Interfacing Devices: Repeaters, Bridges, Routers, Gateway, Other Devices.
UNIT -V:
Multiple Access Techniques:
Frequency- Division Multiple Access (FDMA), Time - Division Multiple Access (TDMA), Code
- Division Multiple Access (CDMA), OFDM and OFDMA. Random Access, Aloha- Carrier
Sense Multiple Access (CSMA)- Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA), Controlled Access- Reservation- Polling- Token Passing, Channelization.
TEXT BOOKS:
1. Data Communication and Computer Networking - B. A.Forouzan, 2nd
Ed., 2003, TMH.
2. Advanced Electronic Communication Systems - W. Tomasi, 5th E
d., 2008, PEI.
Page 170
REFERENCE BOOKS:
1. Data Communications and Computer Networks - Prakash C. Gupta, 2006, PHI.
2. Data and Computer Communications - William Stallings, 8th
Ed., 2007, PHI.
3. Data Communication and Tele Processing Systems -T. Housely, 2nd
Ed, 2008, BSP.
4. Data Communications and Computer Networks- Brijendra Singh, 2nd
Ed., 2005, PHI.
Page 171
I Year I Semester
L P C
4 0 3
ADVANCED DIGITAL SIGNAL PROCESSING
UNIT –I:
Review of DFT, FFT, IIR Filters and FIR Filters:
Multi Rate Signal Processing: Introduction, Decimation by a factor D, Interpolation by a
factor I, Sampling rate conversion by a rational factor I/D, Multistage Implementation of
Sampling Rate Conversion, Filter design & Implementation for sampling rate conversion.
UNIT –II:
Applications of Multi Rate Signal Processing:
Design of Phase Shifters, Interfacing of Digital Systems with Different Sampling Rates,
Implementation of Narrow Band Low Pass Filters, Implementation of Digital Filter Banks,
Sub-band Coding of Speech Signals, Quadrature Mirror Filters, Trans-multiplexers, Over
Sampling A/D and D/A Conversion.
UNIT -III:
Non-Parametric Methods of Power Spectral Estimation: Estimation of spectra from finite
duration observation of signals, Non-parametric Methods: Bartlett, Welch & Blackman-
Tukey methods, Comparison of all Non-Parametric methods
UNIT –IV:
Implementation of Digital Filters:
Introduction to filter structures (IIR & FIR), Frequency sampling structures of FIR, Lattice
structures, Forward prediction error, Backward prediction error, Reflection coefficients for
lattice realization, Implementation of lattice structures for IIR filters, Advantages of lattice
structures.
UNIT –V:
Parametric Methods of Power Spectrum Estimation: Autocorrelation & Its
Properties,Relation between auto correlation & model parameters, AR Models - Yule-Walker
& Burg Methods, MA & ARMA models for power spectrum estimation, Finite word length
effect in IIR digital Filters – Finite word-length effects in FFT algorithms.
TEXT BOOKS:
1. Digital Signal Processing: Principles, Algorithms & Applications - J.G.Proakis& D. G.
Manolakis, 4th
Ed., PHI.
2. Discrete Time Signal Processing - Alan V Oppenheim & R. W Schaffer, PHI.
3. DSP – A Practical Approach – Emmanuel C. Ifeacher, Barrie. W. Jervis, 2 Ed., Pearson
Education.
Page 172
REFERENCE BOOKS:
1. Modern Spectral Estimation: Theory & Application – S. M .Kay, 1988, PHI.
2. Multi Rate Systems and Filter Banks – P.P.Vaidyanathan – Pearson Education.
3. Digital Signal Processing – S.Salivahanan, A.Vallavaraj, C.Gnanapriya, 2000,TMH
4. Digital Spectral Analysis – Jr. Marple
Page 173
I Year I Semester
L P C
4 0 3
TRANSFORM TECHNIQUES
(ELECTIVE – I)
UNIT -I:
Fourier Analysis:
Fourier series, Examples, Fourier Transform, Properties of Fourier Transform, Examples of
Fourier transform, sampling theorem, Partial sum and Gibbs phenomenon, Fourier analysis of
Discrete time Signals, Discrete Fourier Transform.
Time – Frequency Analysis: Window function, Short Time Fourier Transform, Discrete Short
Time Fourier Transform, Continuous wavelet transform, Discrete wavelet transform, wavelet
series, Interpretations of the Time-Frequency plot.
UNIT -II:
Transforms:
Walsh, Hadamard, Haar and Slant Transforms, DCT, DST, KLT, Singular value Decomposition
– definition, properties and applications
UNIT -III:
Continuous Wavelet Transform (CWT):
Short comings of STFT, Need for wavelets, Wavelet Basis- Concept of Scale and its relation
with frequency, Continuous time wavelet Transform Equation- Series Expansion using
Wavelets- CWT- Tiling of time scale plane for CWT. Important Wavelets: Haar, Mexican Hat,
Meyer, Shannon, Daubechies.
UNIT -IV:
Multi Rate Analysis and DWT:
Need for Scaling function – Multi Resolution Analysis, Two-Channel Filter Banks, Perfect
Reconstruction Condition, Relationship between Filter Banks and Wavelet Basis, DWT,
Structure of DWT Filter Banks, Daubechies Wavelet Function, Applications of DWT.
UNIT -V:
Wavelet Packets and Lifting: Wavelet Packet Transform, Wavelet packet algorithms,
Thresholding-Hard thresholding, Soft thresholding, Multidimensional Wavelets, Bi-orthogonal
basis- B-Splines, Lifting Scheme of Wavelet Generation, Multi Wavelets
TEXT BOOKS:
1. A Wavelet Tour of Signal Processing theory and applications -RaghuveerM.Rao and Ajit
S. Bopardikar, Pearson Edu, Asia, New Delhi, 2003.
2. K.P.Soman and K.I Ramachandran, “ Insight into Wavelets – from theory to practice”
PHI, Second edition,2008
Page 174
REFERENCE BOOKS:
1. Fundamentals of Wavelets- Theory, Algorithms and Applications -Jaideva C Goswami,
Andrew K Chan, John Wiley & Sons, Inc, Singapore, 1999.
2. JaidevaC.Goswami and Andrew K.Chan, “ Fundamentals of Wavelets” Wiley publishers,
2006
3. A Wavelet Tour of Signal Processing-Stephen G. Mallat, Academic Press, 2 Ed
4. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar – TMH,2009
Page 175
I Year I Semester
L P C
4 0 3
VLSI TECHNOLOGY AND DESIGN
(ELECTIVE – I)
UNIT-I:
VLSI Technology: Fundamentals and applications, IC production process, semiconductor
processes, design rules and process parameters, layout techniques and process parameters.
VLSI Design: Electronic design automation concept, ASIC and FPGA design flows, SOC
designs, design technologies: combinational design techniques, sequential design techniques,
state machine logic design techniques and design issues.
UNIT-II:
CMOS VLSI Design: MOSTechnology and fabrication process of pMOS, nMOS, CMOS and
BiCMOS technologies, comparison of different processes.
Building Blocks of a VLSI circuit: Computer architecture, memory architectures,
communication interfaces, mixed signal interfaces.
VLSI Design Issues: Design process, design for testability, technology options, power
calculations, package selection, clock mechanisms, mixed signal design.
UNIT-III:
Basic electrical properties of MOS and BiCMOS circuits, MOS and BiCMOS circuit design
processes, Basic circuit concepts, scaling of MOS circuits-qualitatitive and quantitative analysis
with proper illustrations and necessary derivations of expressions.
UNIT-IV:
Subsystem Design and Layout: Some architectural issues, switch logic, gate logic, examples of
structured design (combinational logic), some clocked sequential circuits, other system
considerations.
Subsystem Design Processes: Some general considerations and an illustration of design
processes, design of an ALU subsystem.
UNIT-V:
Floor Planning: Introduction, Floor planning methods, off-chip connections.
Architecture Design: Introduction, Register-Transfer design, high-level synthesis, architectures
for low power, architecture testing.
Chip Design: Introduction and design methodologies.
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A. Pucknell,
SholehEshraghian, 2005, PHI Publications.
2. Modern VLSI Design-Wayne Wolf, 3rd
Ed., 1997, Pearson Education.
3. VLSI Design-Dr.K.V.K.K.Prasad, KattulaShyamala, Kogent Learning Solutions Inc.,
2012.
Page 176
REFERENCE BOOKS:
1. VLSI Design Technologies for Analog and Digital Circuits, Randall L.Geiger, Phillip
E.Allen, Noel R.Strader, TMH Publications, 2010.
2. Introduction to VLSI Systems: A Logic, Circuit and System Perspective- Ming-BO Lin,
CRC Press, 2011.
3. Principals of CMOS VLSI Design-N.H.E Weste, K. Eshraghian, 2nd
Edition, Addison
Wesley.
Page 177
I Year I Semester
L P C
4 0 3
RADAR SIGNAL PROCESSING
(ELECTIVE -I)
UNIT -I:
Introduction:
Radar Block Diagram, Bistatic Radar, Monostatic Radar, Radar Equation, Information
Available from Radar Echo. Review of Radar Range Performance– General Radar Range
Equation, Radar Detection with Noise Jamming, Beacon and Repeater Equations, MTI and
Pulse Doppler Radar.
Matched Filter Receiver – Impulse Response, Frequency Response Characteristic and its
Derivation, Matched Filter and Correlation Function, Correlation Detection and Cross-
Correlation Receiver, Efficiency of Non-Matched Filters, Matched Filter for Non-White
Noise.
UNIT -II:
Detection of Radar Signals in Noise:
Detection Criteria – Neyman-Pearson Observer, Likelihood-Ratio Receiver, Inverse
Probability Receiver, Sequential Observer, Detectors–Envelope Detector, Logarithmic
Detector, I/Q Detector. Automatic Detection-CFAR Receiver, Cell Averaging CFAR
Receiver, CFAR Loss, CFAR Uses in Radar. Radar Signal Management–Schematics,
Component Parts, Resources and Constraints.
UNIT -III:
Waveform Selection [3, 2]:
Radar Ambiguity Function and Ambiguity Diagram – Principles and Properties; Specific
Cases – Ideal Case, Single Pulse of Sine Wave, Periodic Pulse Train, Single Linear FM
Pulse, Noise Like Waveforms, Waveform Design Requirements, Optimum Waveforms for
Detection in Clutter, Family of Radar Waveforms.
UNIT -IV:
Pulse Compression in Radar Signals:
Introduction, Significance, Types, Linear FM Pulse Compression – Block Diagram,
Characteristics, Reduction of Time Side lobes, Stretch Techniques, Generation and
Decoding of FM Waveforms – Block Schematic and Characteristics of Passive System,
Digital Compression, SAW Pulse Compression.
UNIT V:
Phase Coding Techniques:
Principles, Binary Phase Coding, Barker Codes, Maximal Length Sequences
(MLS/LRS/PN), Block Diagram of a Phase Coded CW Radar.
Poly Phase Codes : Frank Codes, Costas Codes, Non-Linear FM Pulse Compression,
Doppler Tolerant PC Waveforms – Short Pulse, Linear Period Modulation (LPM/HFM),
Sidelobe Reduction for Phase Coded PC Signals.
Page 178
TEXT BOOKS:
1. Radar Handbook - M.I. Skolnik, 2nd
Ed., 1991, McGraw Hill.
2. Radar Design Principles : Signal Processing and The Environment - Fred E. Nathanson, 2nd
Ed.,
1999, PHI.
3. Introduction to Radar Systems - M.I. Skolnik, 3rd
Ed., 2001, TMH.
REFERENCE BOOKS:
1. Radar Principles - Peyton Z. Peebles, Jr., 2004, John Wiley.
2. Radar Signal Processing and Adaptive Systems - R. Nitzberg, 1999, Artech House.
Page 179
I Year I Semester
L P C
4 0 3
STATISTICAL SIGNAL PROCESSING
(ELECTIVE - II)
UNIT I
Signal models and characterization: Types and properties of statistical models for signals and how they relate to signal processing,Common second-order methods of characterizing signals including autocorrelation,partial correlation, cross-correlation, power spectral density and cross-power spectral density.
UNIT II
Spectral estimation: Nonparametric methods for estimation of power spectral density, autocorreleation, cross-correlation,transfer functions, and coherence form finite signal samples.
UNIT III
Review of signal processing: A review on random processes, Areview on filtering random processes, Examples.
Statistical parameter estimation: Maximum likehood estimation, maximum a posterior stimation, Cramer-Rao bound.
UNIT IV
Eigen structure based requency estimation: Pisarenko, MUSIC, ESPRIT their application sensor array direction finding.
Spectrum estimation: Moving average (MA), Auto Regressive (AR), Auto Regressive Moving Average (ARMA), Various non-parametirc approaches.
UNIT V
Wiener filtering: The finite impulse case, causal and non-causal infinite impulse responses cases, Least mean squares adaptation, recursive least squares adaptation, Kalman filtering.
TEXT BOOKS:
1. Steven M.Kay, fundamentals of statistical signal processing: estimation Theory,Pretice-Hall,1993.
2. Monsoon H. Hayes, Stastical digital signal processing and modeling, USA, Wiley,1996.
REFERENCE BOOKS:
1. DimitrisG.Manolakis, Vinay K. Ingle, and Stephen M. Kogon, Statistical and adaptive signal processing, Artech House, Inc,2005, ISBN 1580536107
Page 180
I Year I Semester
L P C
4 0 3
OPTICAL COMMUNICATIONS TECHNOLOGY
(ELECTIVE – II)
UNIT –I:
Signal propagation in Optical Fibers:
Geometrical Optics approach and Wave Theory approach, Loss and Bandwidth, Chromatic
Dispersion, Non Linear effects- Stimulated Brillouin and Stimulated Raman Scattering,
Propagation in a Non-Linear Medium, Self-Phase Modulation and Cross Phase Modulation,
Four Wave Mixing, Principle of Solitons.
UNIT –II:
Fiber Optic Components for Communication & Networking:
Couplers, Isolators and Circulators, Multiplexers, Bragg Gratings, Fabry-Perot Filters, Mach
Zender Interferometers, Arrayed Waveguide Grating, Tunable Filters, High Channel Count
Multiplexer Architectures, Optical Amplifiers, Direct and External Modulation Transmitters,
Pump Sources for Amplifiers, Optical Switches and Wavelength Converters.
UNIT –III:
Modulation and Demodulation:
Signal formats for Modulation, Subcarrier Modulation and Multiplexing, Optical Modulations –
Duobinary, Single Side Band and Multilevel Schemes, Ideal and Practical receivers for
Demodulation, Bit Error Rates, Timing Recovery and Equalization, Reed-Solomon Codes for
Error Detection and Correction.
UNIT -IV:
Transmission System Engineering:
System Model, Power Penalty in Transmitter and Receiver, Optical Amplifiers, Crosstalk and
Reduction of Crosstalk, Cascaded Filters, Dispersion Limitations and Compensation
Techniques.
UNIT –V:
Fiber Non-linearities and System Design Considerations:
Limitation in High Speed and WDM Systems due to Non-linearities in Fibers, Wavelength
Stabilization against Temperature Variations, Overall System Design considerations – Fiber
Dispersion, Modulation, Non-Linear Effects, Wavelengths, All Optical Networks.
Page 181
TEXT BOOKS:
1. Optical Networks: A Practical Perspective - Rajiv Ramaswami and Kumar N.
Sivarajan, 2nd
Ed., 2004, Elsevier Morgan Kaufmann Publishers (An Imprint of Elsevier).
2. Optical Fiber Communications – Gerd Keiser, 3rd
Ed., 2000, McGraw Hill.
REFERENCE BOOKS:
1. Optical Fiber Communications: Principles and Practice – John.M.Senior, 2nd
Ed., 2000, PE.
2. Fiber Optics Communication – Harold Kolimbris, 2nd
Ed., 2004, PEI
3. Optical Networks: Third Generation Transport Systems – Uyless Black, 2nd
Ed., 2009, PEI
4. Optical Fiber Communications – GovindAgarwal, 2nd
Ed., 2004, TMH.
5. Optical Fiber Communications and Its Applications – S.C.Gupta, 2004, PHI.
Page 182
I Year I Semester
L P C
4 0 3
NETWORK SECURITY AND CRYPTOGRAPHY
(ELECTIVE -II)
UNIT -I:
Introduction:
Attacks, Services and Mechanisms, Security attacks, Security services, A Model for
Internetwork security.Classical Techniques:Conventional Encryption model, Steganography,
Classical Encryption Techniques.
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
UNIT -II:
Encryption Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.Conventional Encryption :Placement of
Encryption function, Traffic confidentiality, Key distribution, Random Number Generation.
UNIT -III:
Public Key Cryptography:Principles, RSA Algorithm, Key Management, Diffie-Hellman Key
exchange, Elliptic Curve Cryptograpy.Number Theory:Prime and Relatively prime numbers,
Modular arithmetic, Fermat’s and Euler’s theorems, Testing for primality, Euclid’s Algorithm,
the Chinese remainder theorem, Discrete logarithms.
UNIT -IV:
Message Authentication and Hash Functions:Authentication requirements and functions,
Message Authentication, Hash functions, Security of Hash functions and MACs.Hash and Mac
Algorithms
MD File, Message digest Algorithm, Secure Hash Algorithm, RIPEMD-160, HMAC.Digital
signatures and Authentication protocols: Digital signatures, Authentication Protocols, Digital
signature standards.
Authentication Applications :Kerberos, X.509 directory Authentication service.Electronic Mail
Security: Pretty Good Privacy, S/MIME.
UNIT –V:
IP Security:
Overview, Architecture, Authentication, Encapsulating Security Payload, Combining security
Associations, Key Management. Web Security: Web Security requirements, Secure sockets layer
and Transport layer security, Secure Electronic Transaction.
Intruders, Viruses and Worms
Intruders, Viruses and Related threats.
Fire Walls: Fire wall Design Principles, Trusted systems.
Page 183
TEXT BOOKS:
1. Cryptography and Network Security: Principles and Practice - William Stallings, Pearson
Education.
2. Network Security Essentials (Applications and Standards) by William Stallings Pearson
Education.
REFERENCE BOOKS:
1. Fundamentals of Network Security by Eric Maiwald (Dreamtech press)
2. Network Security - Private Communication in a Public World by Charlie Kaufman,
Radia Perlman and Mike Speciner, Pearson/PHI.
3. Principles of Information Security, Whitman, Thomson.
4. Network Security: The complete reference, Robert Bragg, Mark Rhodes, TMH
5. Introduction to Cryptography, Buchmann, Springer.
Page 184
I Year I Semester
L P C
0 3 2
SYSTEMS DESIGN AND DATA COMMUNICATION LAB
A student has to do at least 6 Experiments from each Part.
Part A:
Systems Design experiments
• The students are required to design the logic to perform the following experiments
using necessary Industry standard simulator to verify the logical /functional
operation, perform the analysis with appropriate synthesizer and to verify the
implemented logic with different hardware modules/kits (CPLD/FPGA kits).
• Consider the suitable switching function and data to implement the required logic if
required.
List of Experiments:
11. Determination of EPCs using CAMP-I Algorithm.
12. Determination of SPCs using CAMP-I Algorithm.
13. Determination of SCs using CAMP-II Algorithm.
14. PLA minimization algorithm (IISc algorithm)
15. PLA folding algorithm(COMPACT algorithm)
16. ROM design.
17. Control unit and data processor logic design
18. Digital system design using FPGA.
19. Kohavi algorithm.
20. Hamming experiments.
Lab Requirements:
Software: Industry standard software with perpetual licence consisting of required simulator,
synthesizer, analyzer etc. in an appropriate integrated environment.
Hardware:Personal Computer with necessary peripherals, configuration and operating System
and relevant VLSI (CPLD/FPGA) hardware Kits.
Page 185
Part-B:
Data Communications Experiments
1. Study of serial interface RS – 232
2. Study of pc to pc communication using parallel port
3. To establish pc-pc communication using LAN
4. Study of LAN using star topology, bus topology and tree topology
5. Study and configure modem of a computer
6. To configure a hub/switch
7. To study the interconnections of cables for data communication
8. Study of a wireless communication system
Software and Equipment required
• Data Communication Trainer kits
• Computers
• LAN Trainer kit
• ST 5001 Software/ NS2 Software
• Serial and parallel port cables
• Patch cords (2 mm), FOE/LOE Cables, Main power cords
• Ethernet Cables (CAT5, CAT5E, CAT6, CAT7)
• Hubs, Switches, MODEMs
• RS 232 DB25/DB9 Connectors
Page 186
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CODING THEORY AND APPLICATIONS
UNIT –I:
Coding for Reliable Digital Transmission and Storage:
Mathematical model of Information, A Logarithmic Measure of Information, Average and
Mutual Information and Entropy, Types of Errors, Error Control Strategies.
Linear Block Codes:
Introduction to Linear Block Codes, Syndrome and Error Detection, Minimum Distance of a
Block code, Error-Detecting and Error-correcting Capabilities of a Block code, Standard array
and Syndrome Decoding, Probability of an undetected error for Linear Codes over a BSC,
Hamming Codes. Applications of Block codes for Error control in data storage system
UNIT –II:
Cyclic Codes:
Description, Generator and Parity-check Matrices, Encoding, Syndrome Computation and Error
Detection, Decoding ,Cyclic Hamming Codes, Shortened cyclic codes, Error-trapping decoding
for cyclic codes, Majority logic decoding for cyclic codes.
UNIT –III:
Convolutional Codes:
Encoding of Convolutional Codes, Structural and Distance Properties, maximum likelihood
decoding, Sequential decoding, Majority- logic decoding of Convolution codes. Application of
Viterbi Decoding and Sequential Decoding, Applications of Convolutional codes in ARQ
system.
UNIT –IV:
Burst –Error-Correcting Codes:
Decoding of Single-Burst error Correcting Cyclic codes, Single-Burst-Error-Correcting Cyclic
codes, Burst-Error-Correcting Convolutional Codes, Bounds on Burst Error-Correcting
Capability, Interleaved Cyclic and Convolutional Codes, Phased-Burst –Error-Correcting Cyclic
and Convolutional codes.
UNIT -V:
BCH – Codes:
BCH code- Definition, Minimum distance and BCH Bounds, Decoding Procedure for BCH
Codes- Syndrome Computation and Iterative Algorithms, Error Location Polynomials and
Numbers for single and double error correction
Page 187
TEXT BOOKS:
1. Error Control Coding- Fundamentals and Applications –Shu Lin, Daniel J.Costello,Jr,
Prentice Hall, Inc.
2. Error Correcting Coding Theory-Man Young Rhee- 1989, McGraw-Hill Publishing.
REFERENCE BOOKS:
1. Digital Communications-Fundamental and Application - Bernard Sklar, PE.
2. Digital Communications- John G. Proakis, 5th
Ed., 2008, TMH.
3. Introduction to Error Control Codes-Salvatore Gravano-oxford
4. Error Correction Coding – Mathematical Methods and Algorithms – Todd K.Moon,
2006, Wiley India.
5. Information Theory, Coding and Cryptography – Ranjan Bose, 2nd
Ed, 2009, TMH.
Page 188
I Year II Semester
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4 0 3
EMBEDDED SYSTEM DESIGN
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
Page 189
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
Page 190
I Year II Semester
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4 0 3
IMAGE AND VIDEO PROCESSING
UNIT –I:
Fundamentals of Image Processing and Image Transforms:
Introduction, Image sampling, Quantization, Resolution, Image file formats, Elements of image
processing system, Applications of Digital image processing
Introduction, Need for transform, image transforms, Fourier transform, 2 D Discrete Fourier
transform and its transforms, Importance of phase, Walsh transform, Hadamard transform, Haar
transform, slant transform Discrete cosine transform, KL transform, singular value
decomposition, Radon transform, comparison of different image transforms.
UNIT –II:
Image Enhancement:
Spatial domain methods: Histogram processing, Fundamentals of Spatial filtering, Smoothing
spatial filters, Sharpening spatial filters.
Frequency domain methods: Basics of filtering in frequency domain, image smoothing, image
sharpening, Selective filtering.
Image Restoration:
Introduction to Image restoration, Image degradation, Types of image blur, Classification of
image restoration techniques, Image restoration model, Linear and Nonlinear image restoration
techniques, Blind deconvolution
UNIT –III:
Image Segmentation:
Introduction to image segmentation, Point, Line and Edge Detection, Region based
segmentation., Classification of segmentation techniques, Region approach to image
segmentation, clustering techniques, Image segmentation based on thresholding, Edge based
segmentation, Edge detection and linking, Hough transform, Active contour
Image Compression:
Introduction, Need for image compression, Redundancy in images, Classification of redundancy
in images, image compression scheme, Classification of image compression schemes,
Fundamentals of information theory, Run length coding, Shannon – Fano coding, Huffman
coding, Arithmetic coding, Predictive coding, Transformed based compression, Image
compression standard, Wavelet-based image compression, JPEG Standards.
UNIT -IV:
Basic Steps of Video Processing:
Analog Video, Digital Video. Time-Varying Image Formation models: Three-Dimensional
Motion Models, Geometric Image Formation, Photometric Image Formation, Sampling of Video
signals, Filtering operations.
Page 191
UNIT –V:
2-D Motion Estimation:
Optical flow, General Methodologies, Pixel Based Motion Estimation, Block- Matching
Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based Motion
Estimation, Multi resolution motion estimation, Waveform based coding, Block based transform
coding, Predictive coding, Application of motion estimation in Video coding.
TEXT BOOKS:
1. Digital Image Processing – Gonzaleze and Woods, 3rd
Ed., Pearson.
2. Video Processing and Communication – Yao Wang, JoemOstermann and Ya–quinZhang.
1st Ed., PH Int.
3. S.Jayaraman, S.Esakkirajan and T.VeeraKumar, “Digital Image processing, Tata
McGraw Hill publishers, 2009
REFRENCE BOOKS:
1. Digital Image Processing and Analysis-Human and Computer Vision Application with
CVIP Tools – ScotteUmbaugh, 2nd
Ed, CRC Press, 2011.
2. Digital Video Processing – M. Tekalp, Prentice Hall International.
3. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar –
TMH, 2009.
4. Multidimentional Signal, Image and Video Processing and Coding – John Woods, 2nd
Ed,
Elsevier.
5. Digital Image Processing with MATLAB and Labview – Vipula Singh, Elsevier.
6. Video Demystified – A Hand Book for the Digital Engineer – Keith Jack, 5th
Ed.,
Elsevier.
Page 192
I Year II Semester
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4 0 3
WIRELESS COMMUNICATIONS AND NETWORKS
UNIT -I:
The Cellular Concept-System Design Fundamentals:
Introduction, Frequency Reuse, Interference and system capacity – Co channel Interference and
system capacity, Channel planning for Wireless Systems, Adjacent Channel interference , Power
Control for Reducing interference, Improving Coverage & Capacity in Cellular Systems- Cell
Splitting, Sectoring, Channel Assignment Strategies, Handoff Strategies- Prioritizing Handoffs,
Practical Handoff Considerations, Trunking and Grade of Service
UNIT –II:
Mobile Radio Propagation: Large-Scale Path Loss:
Introduction to Radio Wave Propagation, Free Space Propagation Model, Relating Power to
Electric Field, Basic Propagation Mechanisms, Reflection: Reflection from Dielectrics,
Brewster Angle, Reflection from prefect conductors, Ground Reflection (Two-Ray) Model,
Diffraction: Fresnel Zone Geometry, Knife-edge Diffraction Model, Multiple knife-edge
Diffraction, Scattering, Outdoor Propagation Models- Longley-Ryce Model, Okumura Model,
Hata Model, PCS Extension to Hata Model, Walfisch and Bertoni Model, Wideband PCS
Microcell Model, Indoor Propagation Models-Partition losses (Same Floor), Partition losses
between Floors, Log-distance path loss model, Ericsson Multiple Breakpoint Model, Attenuation
Factor Model, Signal penetration into buildings, Ray Tracing and Site Specific Modeling.
UNIT –III:
Mobile Radio Propagation: Small –Scale Fading and Multipath
Small Scale Multipath propagation-Factors influencing small scale fading, Doppler shift,
Impulse Response Model of a multipath channel- Relationship between Bandwidth and Received
power, Small-Scale Multipath Measurements-Direct RF Pulse System, Spread Spectrum Sliding
Correlator Channel Sounding, Frequency Domain Channels Sounding, Parameters of Mobile
Multipath Channels-Time Dispersion Parameters, Coherence Bandwidth, Doppler Spread and
Coherence Time, Types of Small-Scale Fading-Fading effects Due to Multipath Time Delay
Spread, Flat fading, Frequency selective fading, Fading effects Due to Doppler Spread-Fast
fading, slow fading, Statistical Models for multipath Fading Channels-Clarke’s model for flat
fading, spectral shape due to Doppler spread in Clarke’s model, Simulation of Clarke and Gans
Fading Model, Level crossing and fading statistics, Two-ray Rayleigh Fading Model.
UNIT -IV:
Equalization and Diversity
Introduction, Fundamentals of Equalization, Training a Generic Adaptive Equalizer, Equalizers
in a communication Receiver, Linear Equalizers, Non-linear Equalization-Decision Feedback
Equalization (DFE), Maximum Likelihood Sequence Estimation (MLSE) Equalizer, Algorithms
for adaptive equalization-Zero Forcing Algorithm, Least Mean Square Algorithm, Recursive
least squares algorithm. Diversity -Derivation of selection Diversity improvement, Derivation of
Maximal Ratio Combining improvement, Practical Space Diversity Consideration-Selection
Page 193
Diversity, Feedback or Scanning Diversity, Maximal Ratio Combining, Equal Gain Combining,
Polarization Diversity, Frequency Diversity, Time Diversity, RAKE Receiver.
UNIT -V:
Wireless Networks
Introduction to wireless Networks, Advantages and disadvantages of Wireless Local Area
Networks, WLAN Topologies, WLAN Standard IEEE 802.11, IEEE 802.11 Medium Access
Control, Comparison of IEEE 802.11 a,b,g and n standards, IEEE 802.16 and its enhancements,
Wireless PANs, HiperLan, WLL.
TEXT BOOKS:
1. Wireless Communications, Principles, Practice – Theodore, S. Rappaport, 2nd
Ed., 2002,
PHI.
2. Wireless Communications-Andrea Goldsmith, 2005 Cambridge University Press.
3. Mobile Cellular Communication – GottapuSasibhushanaRao, Pearson Education, 2012.
REFERENCE BOOKS:
1. Principles of Wireless Networks – KavehPahLaven and P. Krishna Murthy, 2002, PE
2. Wireless Digital Communications – KamiloFeher, 1999, PHI.
3. Wireless Communication and Networking – William Stallings, 2003, PHI.
4. Wireless Communication – UpenDalal, Oxford Univ. Press
5. Wireless Communications and Networking – Vijay K. Gary, Elsevier.
Page 194
I Year II Semester
L P C
4 0 3
CMOS ANALOG AND DIGITAL IC DESIGN
(Elective-III)
UNIT-I:
MOS Devices and Modeling
The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout,
CMOS Device Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small-
Signal Model for the MOS Transistor, Computer Simulation Models, Sub-threshold MOS
Model.
MOS Design
Pseudo NMOS Logic – Inverter, Inverter threshold voltage, Output high voltage, Output Low
voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS
logic gates, Transistor equivalency, CMOS Inverter logic.
UNIT-II:
Combinational MOS Logic Circuits:
MOS logic circuits with NMOS loads, Primitive CMOS logic gates – NOR & NAND gate,
Complex Logic circuits design – Realizing Boolean expressions using NMOS gates and CMOS
gates , AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with
Transmission gates.
Sequential MOS Logic Circuits
Behaviour of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch
and edge triggered flip-flop.
UNIT -III:
Dynamic Logic Circuits
Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic
CMOS transmission gate logic, High performance Dynamic CMOS circuits.
Semiconductor Memories
Types, RAM array organization, DRAM – Types, Operation, Leakage currents in DRAM cell
and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR
flash and NAND flash.
Page 195
UNIT -IV:
Analog CMOS Sub-Circuits
MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors-
Current mirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current
Mirror, Current and Voltage References, Band gap Reference.
UNIT-V:
CMOS Amplifiers
Inverters, Differential Amplifiers, Cascode Amplifiers, Current Amplifiers, Output Amplifiers,
High Gain Amplifiers Architectures.
CMOS Operational Amplifiers
Design of CMOS Op Amps, Compensation of Op Amps, Design of Two-Stage Op Amps,
Power- Supply Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps, Measurement
Techniques of OP Amp.
TEXT BOOKS:
1. Digital Integrated Circuit Design – Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo Kang, Yusuf
Leblebici, TMH, 3rd
Ed., 2011.
3. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford
University Press, International Second Edition/Indian Edition, 2010.
4. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul J. Hurst, S. Lewis
and R. G. Meyer, Wiley India, Fifth Edition, 2010.
REFERENCE BOOKS:
1. Analog Integrated Circuit Design- David A. Johns, Ken Martin, Wiley Student Edn,
2016.
2. Design of Analog CMOS Integrated Circuits- BehzadRazavi, TMH Edition.
3. CMOS: Circuit Design, Layout and Simulation- Baker, Li and Boyce, PHI.
4. Digital Integrated Circuits – A Design Perspective, Jan M. Rabaey, AnanthaChandrakasan,
BorivojeNikolic, 2nd
Ed., PHI.
*******
Page 196
I Year II Semester
L P C
4 0 3
ADVANCED COMPUTER ARCHITECTURE
(ELECTIVE-I)
UNIT-I: Fundamentals of Computer Design:
Fundamentals of Computer design, Changing faces of computing and task of computer designer,
Technology trends, Cost price and their trends, measuring and reporting performance,
Quantitative principles of computer design, Amdahl’s law.
Instruction set principles and examples- Introduction, classifying instruction set- memory
addressing- type and size of operands, Operations in the instruction set.
UNIT-II:
Pipelines:
Introduction, basic RISC instruction set, Simple implementation of RISC instruction set, Classic
five stage pipe lined RISC processor, Basic performance issues in pipelining, Pipeline hazards,
Reducing pipeline branch penalties.
Memory Hierarchy Design:
Introduction, review of ABC of cache, Cache performance, Reducing cache miss penalty, Virtual
memory.
UNIT-III:
Instruction Level Parallelism (ILP)-The Hardware Approach:
Instruction-Level parallelism, Dynamic scheduling, Dynamic scheduling using Tomasulo’s
approach, Branch prediction, High performance instruction delivery- Hardware based
speculation.
ILP Software Approach:
Basic compiler level techniques, Static branch prediction, VLIW approach, Exploiting ILP,
Parallelism at compile time, Cross cutting issues - Hardware verses Software.
Page 197
UNIT-IV: Multi Processors and Thread Level Parallelism:
Multi Processors and Thread level Parallelism- Introduction, Characteristics of application
domain, Systematic shared memory architecture, Distributed shared – Memory architecture,
Synchronization.
UNIT-V:
Inter Connection and Networks:
Introduction, Interconnection network media, Practical issues in interconnecting networks,
Examples of inter connection, Cluster, Designing of clusters.
Intel Architecture: Intel IA-64 ILP in embedded and mobile markets Fallacies and pit falls.
TEXT BOOKS:
1. John L. Hennessy, David A. Patterson - Computer Architecture: A Quantitative Approach, 3rd
Edition, an Imprint of Elsevier.
REFERENCE BOOKS:
1. John P. Shen and Miikko H. Lipasti -, Modern Processor Design : Fundamentals of Super
Scalar Processors
2. Computer Architecture and Parallel Processing - Kai Hwang, Faye A.Brigs., MC Graw
Hill.
3. Advanced Computer Architecture - A Design Space Approach, DezsoSima, Terence
Fountain, Peter Kacsuk, Pearson Ed.
*******
Page 198
I Year II Semester
L P C
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -III)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach,Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control,Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear timedelay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
Page 199
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 200
I Year II Semester
L P C
4 0 3
Cyber Security
(ELECTIVE - II)
Page 201
I Year II Semester
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4 0 3
DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
(ELECTIVE -IV)
UNIT –I:
Introduction to Digital Signal Processing:
Introduction, A Digital signal-processing system, The sampling process, Discrete time
sequences. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-
invariant systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations:
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT –II:
Architectures for Programmable DSP Devices:
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT -III:
Programmable Digital Signal Processors:
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX processors, Pipeline operation of
TMS320C54XX Processors.
UNIT –IV:
Analog Devices Family of DSP Devices:
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Blackfin Processor - The Blackfin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
UNIT –V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices:
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
Page 202
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach to Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. EmbeddedSignalProcessingwiththeMicroSignalArchitecturePublisher: Woon-SengGan,
Sen M. Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications – B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. Digital Signal Processing –Jonatham Stein, 2005, John Wiley.
3. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
4. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
5. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
6. Embedded Media Processing by David J. Katz and Rick Gentile of Analog Devices,
Newnes , ISBN 0750679123, 2005
Page 203
I Year II Semester
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4 0 3
ELECTROMAGNETIC INTERFERENCE AND ELECTROMAGNETIC
COMPATIBILITY (EMI / EMC)
(ELECTIVE-IV)
UNIT -I:
Introduction, Natural and Nuclear Sources of EMI / EMC:
Electromagnetic environment, History, Concepts, Practical experiences and concerns, frequency
spectrum conservations, An overview of EMI / EMC, Natural and Nuclear sources of EMI.
UNIT -II:
EMI from Apparatus, Circuits and Open Area Test Sites:
Electromagnetic emissions, Noise from relays and switches, Non-linearities in circuits, passive
intermodulation, Cross talk in transmission lines, Transients in power supply lines,
Electromagnetic interference (EMI), Open area test sites and measurements.
UNIT -III:
Radiated and Conducted Interference Measurements and ESD:
Anechoic chamber, TEM cell, GH TEM Cell, Characterization of conduction currents / voltages,
Conducted EM noise on power lines, Conducted EMI from equipment, Immunity to conducted
EMI detectors and measurements, ESD, Electrical fast transients / bursts, Electrical surges.
UNIT -IV:
Grounding, Shielding, Bonding and EMI filters:
Principles and types of grounding, Shielding and bonding, Characterization of filters, Power
lines filter design.
UNIT -V:
Cables, Connectors, Components and EMC Standards:
EMI suppression cables, EMC connectors, EMC gaskets, Isolation transformers, optoisolators,
National / International EMC standards.
Page 204
TEXT BOOKS:
1. Engineering Electromagnetic Compatibility - Dr. V.P. Kodali, IEEEPublication, Printed
in India by S. Chand & Co. Ltd., New Delhi, 2000.
2. Electromagnetic Interference and Compatibility IMPACT series, IIT – Delhi, Modules 1
– 9.
REFERENCE BOOKS:
1. Introduction to Electromagnetic Compatibility - Ny, John Wiley, 1992, by C.R. Pal.
Page 205
I Year II Semester
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4 0 3
OBJECT ORIENTED PROGRAMMING
(ELECTIVE IV )
Objective: Implementing programs for user interface and application development using core
java principles
UNIT I:
Objective: Focus on object oriented concepts and java program structure and its installation
Introduction to OOP
Introduction, Need of Object Oriented Programming, Principles of Object Oriented Languages,
Procedural languages Vs OOP, Applications of OOP, History of JAVA, Java Virtual Machine,
Java Features, Installation of JDK1.6
UNIT II:
Objective: Comprehension of java programming constructs, control structures in Java
Programming Constructs
Variables , Primitive Datatypes, Identifiers- Naming Coventions, Keywords, Literals, Operators-
Binary,Unary and ternary, Expressions, Precedence rules and Associativity, Primitive Type
Conversion and Casting, Flow of control-Branching,Conditional, loops.,
Classes and Objects- classes, Objects, Creating Objects, Methods, constructors-Constructor
overloading, Garbage collector, Class variable and Methods-Static keyword, this keyword,
Arrays, Command line arguments
UNIT III:
Objective: Implementing Object oriented constructs such as various class hierarchies,
interfaces and exception handling
Inheritance: Types of Inheritance, Deriving classes using extends keyword, Method
overloading, super keyword, final keyword, Abstract class
Interfaces, Packages and Enumeration: Interface-Extending interface, Interface Vs Abstract
classes, Packages-Creating packages , using Packages, Access protection, java.lang package
Exceptions & Assertions - Introduction, Exception handling techniques-try...catch, throw,
throws, finally block, user defined exception, Assertions
UNIT IV:
Objective: Understanding of Thread concepts and I/O in Java
MultiThreading :java.lang.Thread, The main Thread, Creation of new threads, Thread priority,
Multithreading, Syncronization, suspending and Resuming threads, Communication between
Threads
Input/Output: reading and writing data, java.io package
Page 206
UNIT V:
Objective: Being able to build dynamic user interfaces using applets and Event handling in
java
Applets- Applet class, Applet structure, An Example Applet Program, Applet Life Cycle,
paint(),update() and repaint()
Event Handling -Introduction, Event Delegation Model, java.awt.event Description, Event
Listeners, Adapter classes, Inner classes
UNIT VI:
Objective: Understanding of various components of Java AWT and Swing and writing code
snippets using them
Abstract Window Toolkit
Why AWT?, java.awt package, Components and Containers, Button, Label, Checkbox, Radio
buttons, List boxes, Choice boxes, Text field and Text area, container classes, Layouts, Menu,
Scroll bar
Swing:
Introduction , JFrame, JApplet, JPanel, Components in swings, Layout Managers, JList and
JScroll Pane, Split Pane, JTabbedPane, Dialog Box
Text Books:
1. The Complete Refernce Java, 8ed, Herbert Schildt, TMH
2. Programming in JAVA, Sachin Malhotra, Saurabhchoudhary, Oxford.
3. JAVA for Beginners, 4e, Joyce Farrell, Ankit R. Bhavsar, Cengage Learning.
4. Object oriented programming with JAVA, Essentials and Applications, Raj Kumar
Bhuyya, Selvi, Chu TMH
5. Introduction to Java rogramming, 7th
ed, Y Daniel Liang, Pearson
Reference Books:
1. JAVA Programming, K.Rajkumar.Pearson
2. Core JAVA, Black Book, NageswaraRao, Wiley, Dream Tech
3. Core JAVA for Beginners, RashmiKanta Das, Vikas.
4. Object Oriented Programming through JAVA , P Radha Krishna , University Press.
Page 207
I Year II Semester
L P C
0 3 2
ADVANCED COMMUNICATIONS LAB
Note:
E. Minimum of 10 Experiments have to be conducted
F. All Experiments may be Simulated using MATLAB and to be verified using related
training kits.
1. Measurement of Bit Error Rate using Binary Data
2. Verification of minimum distance in Hamming code
3. Determination of output of Convolutional Encoder for a given sequence
4. Determination of output of Convolutional Decoder for a given sequence
5. Efficiency of DS Spread- Spectrum Technique
6. Simulation of Frequency Hopping (FH) system
7. Effect of Sampling and Quantization of Digital Image
8. Verification of Various Transforms (FT / DCT/ Walsh / Hadamard) on a given
Image ( Finding Transform and Inverse Transform)
9. Point, Line and Edge detection techniques using derivative operators.
10. Implementation of FIR filter using DSP Trainer Kit (C-Code/ Assembly code)
11. Implementation of IIR filter using DSP Trainer Kit (C-Code/ Assembly code)
12. Determination of Losses in Optical Fiber
13. Observing the Waveforms at various test points of a mobile phone using
Mobile Phone Trainer
14. Study of Direct Sequence Spread Spectrum Modulation & Demodulation
using CDMA-DSS-BER Trainer
15. Study of ISDN Training System with Protocol Analyzer
16. Characteristics of LASER Diode.
Page 208
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
DSCE
(Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 209
I Semester
II Semester
S. No. Name of the Subject L P C
1 Digital System Design 4 - 3
2 VLSI Technology and Design 4 - 3
3 Digital Data Communications 4 - 3
4 Advanced Computer Architecture 4 - 3
5
Elective I
I. Wireless Communications and Networks
II. Digital Design Using HDL
III. Internet Protocols
4 - 3
6
Elective II I. Software Defined Radio
II. Network Security and Cryptography
III. Image & Video Processing
4 - 3
7 System Design & Data Communications Lab - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Embedded System Design 4 - 3
2 CMOS Analog and Digital IC Design 4 - 3
3 DSP Processors & Architecture 4 - 3
4 Design for Testability 4 - 3
5
Elective III
I. System On Chip Design
II. Soft Computing Techniques
III. Cyber Security
4 - 3
6
Elective IV
I. Embedded Real Time Operating Systems
II. High Speed Networks
III. EMI/EMC
4 - 3
7 Embedded System Design Lab - 3 2
Total Credits 20
Page 210
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 211
I Year I Semester
L P C
4 0 3
DIGITAL SYSTEM DESIGN
UNIT -I:
Minimization and Transformation of Sequential Machines:
The Finite State Model – Capabilities and limitations of FSM, State equivalence and Machine
minimization, Simplification of incompletely specified machines.
Fundamental mode model – Flow table – State reduction – Minimal closed covers – Races,
Cycles and Hazards.
UNIT -II:
Digital Design:
Digital Design Using ROMs, PALs and PLAs , BCD Adder, 32 – bit adder, State graphs for
control circuits, Scoreboard and Controller, A shift and add multiplier, Array multiplier, Keypad
Scanner, Binary divider.
UNIT -III:
SM Charts:
State machine charts, Derivation of SM Charts, Realization of SM Chart, Implementation of
Binary Multiplier, dice game controller.
UNIT -IV:
Fault Modeling & Test Pattern Generation:
Logic Fault model – Fault detection & Redundancy- Fault equivalence and fault location –Fault
dominance – Single stuck at fault model – Multiple stuck at fault models –Bridging fault model.
Fault diagnosis of combinational circuits by conventional methods – Path sensitization
techniques, Boolean Difference method – Kohavi algorithm – Test algorithms – D algorithm,
PODEM, Random testing, Transition count testing, Signature analysis and test bridging faults.
UNIT -V:
Fault Diagnosis in Sequential Circuits:
Circuit Test Approach, Transition Check Approach – State identification and fault detection
experiment, Machine identification, Design of fault detection experiment
Page 212
TEXT BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th
Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
3. Logic Design Theory – N. N. Biswas, PHI
REFERENCE BOOKS:
1. Switching and Finite Automata Theory – Z. Kohavi , 2nd
Ed., 2001, TMH
2. Digital Design – Morris Mano, M.D.Ciletti, 4th
Edition, PHI.
3. Digital Circuits and Logic Design – Samuel C. Lee , PHI
Page 213
I Year I Semester
L P C
4 0 3
VLSI TECHNOLOGY AND DESIGN
UNIT-I:
VLSI Technology: Fundamentals and applications, IC production process, semiconductor
processes, design rules and process parameters, layout techniques and process parameters.
VLSI Design: Electronic design automation concept, ASIC and FPGA design flows, SOC
designs, design technologies: combinational design techniques, sequential design techniques,
state machine logic design techniques and design issues.
UNIT-II:
CMOS VLSI Design: MOSTechnology and fabrication process of pMOS, nMOS, CMOS and
BiCMOS technologies, comparison of different processes.
Building Blocks of a VLSI circuit: Computer architecture, memory architectures,
communication interfaces, mixed signal interfaces.
VLSI Design Issues: Design process, design for testability, technology options, power
calculations, package selection, clock mechanisms, mixed signal design.
UNIT-III:
Basic electrical properties of MOS and BiCMOS circuits, MOS and BiCMOS circuit design
processes, Basic circuit concepts, scaling of MOS circuits-qualitatitive and quantitative analysis
with proper illustrations and necessary derivations of expressions.
UNIT-IV:
Subsystem Design and Layout: Some architectural issues, switch logic, gate logic, examples of
structured design (combinational logic), some clocked sequential circuits, other system
considerations.
Subsystem Design Processes: Some general considerations and an illustration of design
processes, design of an ALU subsystem.
UNIT-V:
Floor Planning: Introduction, Floor planning methods, off-chip connections.
Architecture Design: Introduction, Register-Transfer design, high-level synthesis, architectures
for low power, architecture testing.
Chip Design: Introduction and design methodologies.
Page 214
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A. Pucknell,
SholehEshraghian, 2005, PHI Publications.
2. Modern VLSI Design-Wayne Wolf, 3rd
Ed., 1997, Pearson Education.
3. VLSI Design-Dr.K.V.K.K.Prasad, KattulaShyamala, Kogent Learning Solutions Inc.,
2012.
REFERENCE BOOKS:
1. VLSI Design Technologies for Analog and Digital Circuits, Randall L.Geiger, Phillip
E.Allen, Noel R.Strader, TMH Publications, 2010.
2. Introduction to VLSI Systems: A Logic, Circuit and System Perspective- Ming-BO Lin,
CRC Press, 2011.
3. Principals of CMOS VLSI Design-N.H.E Weste, K. Eshraghian, 2nd
Edition, Addison
Wesley.
Page 215
I Year I Semester
L P C
4 0 3
DIGITAL DATA COMMUNICATIONS
UNIT -I:
Digital Modulation Schemes:
BPSK, QPSK, 8PSK, 16PSK, 8QAM, 16QAM, DPSK – Methods, Band Width Efficiency,
Carrier Recovery, Clock Recovery.
UNIT -II:
Basic Concepts of Data Communications, Interfaces and Modems:
Data Communication Networks, Protocols and Standards, UART, USB, Line Configuration,
Topology, Transmission Modes, Digital Data Transmission, DTE-DCE interface, Categories of
Networks – TCP/IP Protocol suite and Comparison with OSI model.
UNIT -III:
Error Correction: Types of Errors, Vertical Redundancy Check (VRC), LRC, CRC, Checksum,
Error Correction using Hamming code
Data Link Control: Line Discipline, Flow Control, Error Control
Data Link Protocols: Asynchronous Protocols, Synchronous Protocols, Character Oriented
Protocols, Bit-Oriented Protocol, Link Access Procedures.
UNIT -IV:
Multiplexing: Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM),
Multiplexing Application, DSL.
Local Area Networks: Ethernet, Other Ether Networks, Token Bus, Token Ring, FDDI.
Metropolitan Area Networks: IEEE 802.6, SMDS
Switching: Circuit Switching, Packet Switching, Message Switching.
Networking and Interfacing Devices: Repeaters, Bridges, Routers, Gateway, Other Devices.
UNIT -V:
Multiple Access Techniques:
Frequency- Division Multiple Access (FDMA), Time - Division Multiple Access (TDMA), Code
- Division Multiple Access (CDMA), OFDM and OFDMA. Random Access, Aloha- Carrier
Sense Multiple Access (CSMA)- Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA), Controlled Access- Reservation- Polling- Token Passing, Channelization.
Page 216
TEXT BOOKS:
1. Data Communication and Computer Networking - B. A.Forouzan, 2nd
Ed., 2003, TMH.
2. Advanced Electronic Communication Systems - W. Tomasi, 5th E
d., 2008, PEI.
REFERENCE BOOKS:
1. Data Communications and Computer Networks - Prakash C. Gupta, 2006, PHI.
2. Data and Computer Communications - William Stallings, 8th
Ed., 2007, PHI.
3. Data Communication and Tele Processing Systems -T. Housely, 2nd
Ed, 2008, BSP.
4. Data Communications and Computer Networks- Brijendra Singh, 2nd
Ed., 2005, PHI.
Page 217
I Year I Semester
L P C
4 0 3
ADVANCED COMPUTER ARCHITECTURE
UNIT-I:
Fundamentals of Computer Design:
Fundamentals of Computer design, Changing faces of computing and task of computer designer,
Technology trends, Cost price and their trends, Measuring and reporting performance,
Quantitative principles of computer design, Amdahl’s law.
Instruction set principles and examples- Introduction, Classifying instruction set- MEmory
addressing- type and size of operands, Operations in the instruction set.
UNIT –II:
Pipelines:
Introduction, Basic RISC instruction set,Simple implementation of RISC instruction set, Classic
five stage pipe lined RISC processor, Basic performance issues in pipelining, Pipeline hazards,
Reducing pipeline branch penalties.
Memory Hierarchy Design:
Introduction, Review of ABC of cache, Cache performance, Reducing cache miss penalty,
Virtual memory.
UNIT -III:
Instruction Level Parallelism the Hardware Approach:
Instruction-Level parallelism, Dynamic scheduling, Dynamic scheduling using Tomasulo’s
approach, Branch prediction, high performance instruction delivery- hardware based speculation.
ILP Software Approach
Basic compiler level techniques, Static branch prediction, VLIW approach, Exploiting ILP,
Parallelism at compile time, Cross cutting issues -Hardware verses Software.
UNIT –IV:
Multi Processors and Thread Level Parallelism:
Multi Processors and Thread level Parallelism- Introduction, Characteristics of application
domain, Systematic shared memory architecture, Distributed shared – memory architecture,
Synchronization.
UNIT –V:
Inter Connection and Networks:
Introduction, Interconnection network media, Practical issues in interconnecting networks,
Examples of inter connection, Cluster, Designing of clusters.
Intel Architecture: Intel IA-64 ILP in embedded and mobile markets Fallacies and pit falls.
Page 218
TEXT BOOKS:
1. John L. Hennessy, David A. Patterson - Computer Architecture: A Quantitative Approach,
3rd Edition, An Imprint of Elsevier.
REFERENCE BOOKS:
1. John P. Shen and Miikko H. Lipasti - Modern Processor Design : Fundamentals of Super
Scalar Processors
2. Computer Architecture and Parallel Processing - Kai Hwang, Faye A.Brigs., MC Graw
Hill.
3. Advanced Computer Architecture - A Design Space Approach -DezsoSima, Terence
Fountain, Peter Kacsuk , Pearson Ed.
Page 219
I Year I Semester
L P C
4 0 3
WIRELESS COMMUNICATIONS AND NETWORKS
ELECTIVE – I
UNIT -I:
The Cellular Concept-System Design Fundamentals:
Introduction, Frequency Reuse, Interference and system capacity – Co channel Interference and
system capacity, Channel planning for Wireless Systems, Adjacent Channel interference , Power
Control for Reducing interference, Improving Coverage & Capacity in Cellular Systems- Cell
Splitting, Sectoring, Channel Assignment Strategies, Handoff Strategies- Prioritizing Handoffs,
Practical Handoff Considerations, Trunking and Grade of Service
UNIT –II:
Mobile Radio Propagation: Large-Scale Path Loss:
Introduction to Radio Wave Propagation, Free Space Propagation Model, Relating Power to
Electric Field, Basic Propagation Mechanisms, Reflection: Reflection from Dielectrics,
Brewster Angle, Reflection from prefect conductors, Ground Reflection (Two-Ray) Model,
Diffraction: Fresnel Zone Geometry, Knife-edge Diffraction Model, Multiple knife-edge
Diffraction, Scattering, Outdoor Propagation Models- Longley-Ryce Model, Okumura Model,
Hata Model, PCS Extension to Hata Model, Walfisch and Bertoni Model, Wideband PCS
Microcell Model, Indoor Propagation Models-Partition losses (Same Floor), Partition losses
between Floors, Log-distance path loss model, Ericsson Multiple Breakpoint Model, Attenuation
Factor Model, Signal penetration into buildings, Ray Tracing and Site Specific Modeling.
UNIT –III:
Mobile Radio Propagation: Small –Scale Fading and Multipath
Small Scale Multipath propagation-Factors influencing small scale fading, Doppler shift,
Impulse Response Model of a multipath channel- Relationship between Bandwidth and Received
power, Small-Scale Multipath Measurements-Direct RF Pulse System, Spread Spectrum Sliding
Correlator Channel Sounding, Frequency Domain Channels Sounding, Parameters of Mobile
Multipath Channels-Time Dispersion Parameters, Coherence Bandwidth, Doppler Spread and
Coherence Time, Types of Small-Scale Fading-Fading effects Due to Multipath Time Delay
Spread, Flat fading, Frequency selective fading, Fading effects Due to Doppler Spread-Fast
fading, slow fading, Statistical Models for multipath Fading Channels-Clarke’s model for flat
fading, spectral shape due to Doppler spread in Clarke’s model, Simulation of Clarke and Gans
Fading Model, Level crossing and fading statistics, Two-ray Rayleigh Fading Model.
UNIT -IV:
Equalization and Diversity
Introduction, Fundamentals of Equalization, Training a Generic Adaptive Equalizer, Equalizers
in a communication Receiver, Linear Equalizers, Non-linear Equalization-Decision Feedback
Equalization (DFE), Maximum Likelihood Sequence Estimation (MLSE) Equalizer, Algorithms
for adaptive equalization-Zero Forcing Algorithm, Least Mean Square Algorithm, Recursive
least squares algorithm. Diversity -Derivation of selection Diversity improvement, Derivation of
Maximal Ratio Combining improvement, Practical Space Diversity Consideration-Selection
Page 220
Diversity, Feedback or Scanning Diversity, Maximal Ratio Combining, Equal Gain Combining,
Polarization Diversity, Frequency Diversity, Time Diversity, RAKE Receiver.
UNIT -V:
Wireless Networks
Introduction to wireless Networks, Advantages and disadvantages of Wireless Local Area
Networks, WLAN Topologies, WLAN Standard IEEE 802.11, IEEE 802.11 Medium Access
Control, Comparison of IEEE 802.11 a,b,g and n standards, IEEE 802.16 and its enhancements,
Wireless PANs, HiperLan, WLL.
TEXT BOOKS:
1. Wireless Communications, Principles, Practice – Theodore, S. Rappaport, 2nd
Ed., 2002,
PHI.
2. Wireless Communications-Andrea Goldsmith, 2005 Cambridge University Press.
3. Mobile Cellular Communication – GottapuSasibhushanaRao, Pearson Education, 2012.
REFERENCE BOOKS:
1. Principles of Wireless Networks – KavehPahLaven and P. Krishna Murthy, 2002, PE
2. Wireless Digital Communications – KamiloFeher, 1999, PHI.
3. Wireless Communication and Networking – William Stallings, 2003, PHI.
4. Wireless Communication – UpenDalal, Oxford Univ. Press
5. Wireless Communications and Networking – Vijay K. Gary, Elsevier.
Page 221
I Year I Semester
L P C
4 0 3
DIGITAL DESIGN USING HDL
(ELECTIVE-I)
UNIT-I:
Digital Logic Design using VHDL
Introduction, designing with VHDL, design entry methods, logic synthesis, entities,
architecture,packages and configurations, types of models: dataflow, behavioral, structural,
signals vs. variables, generics, data types, concurrent vs. sequential statements, loops and
program controls.
Digital Logic Design using Verilog HDL
Introduction, Verilog Data types and Operators, Binary data manipulation, Combinational and
Sequential logic design, Structural Models of Combinational Logic, Logic Simulation, Design
Verification and Test Methodology, Propagation Delay, Truth Table models using Verilog.
UNIT-II:
Combinational Logic Circuit Design using VHDL
Combinational circuits building blocks: Multiplexers, Decoders , Encoders , Code converters,
Arithmetic comparison circuits , VHDL for combinational circuits , Adders-Half Adder, Full
Adder, Ripple-Carry Adder, Carry Look-Ahead Adder, Subtraction, Multiplication.
Sequential Logic Circuit Design using VHDL
Flip-flops, registers & counters,synchronous sequential circuits: Basic design steps, Mealy State
model,Design of FSM using CAD tools, Serial Adder Example,State Minimization, Design of
Counter using sequential Circuit approach.
UNIT-III: Digital Logic Circuit Design Examples using Verilog HDL
Behavioral modeling , Data types, Boolean-Equation-Based behavioral models of combinational
logics , Propagation delay and continuous assignments , latches and level-sensitive circuits in
Verilog, Cyclic behavioral models of flip-flops and latches and Edge detection, comparison of
styles for behavioral model; Behavioral model, Multiplexers,Encoders and Decoders, Counters,
Shift Registers,Register files, Dataflow models of a linear feedback shift register, Machines with
multi cycle operations, ASM and ASMD charts for behavioral modeling, Design examples,
Keypad scanner and encoder.
UNIT-IV: Synthesis of Digital Logic Circuit Design
Introduction to Synthesis, Synthesis of combinational logic, Synthesis of sequential logic with
latches and flip-flops, Synthesis of Explicit and Implicit State Machines, Registers and
counters.
Page 222
UNIT-V: Testing of Digital Logic Circuits and CAD Tools
Testing of logic circuits,fault model, complexity of a test set, path-sensitization, circuits with tree
structure, random tests, testing of sequential circuits, built in self test, printed circuit boards,
computer aided design tools, synthesis, physical design.
TEXT BOOKS:
1.Stephen Brown &ZvonkoVranesic, ”Fundamentals of Digital logic design with VHDL”, Tata
McGraw Hill,2nd
edition.
2. Michael D. Ciletti, “Advanced digital design with the Verilog HDL”, Eastern economy
edition,PHI.
REFERENCE BOOKS:
1. Stephen Brown &ZvonkoVranesic, ”Fundamentals of Digital logic with Verilog design”,
Tata McGraw Hill,2nd
edition.
2. Bhaskar, ”VHDL Primer”,3rd
Edition, PHI Publications.
3. Ian Grout, “Digital systems design with FPGAs and CPLDs”, Elsevier Publications.
Page 223
I Year I Semester
L P C
4 0 3
INTERNET PROTOCOLS
(ELECTIVE-I)
UNIT -I: Internetworking Concepts: Principles of Internetworking, Connectionless
Internetworking, Application level Interconnections, Network level Interconnection, Properties
of thee Internet, Internet Architecture, Wired LANS, Wireless LANs, Point-to-Point WANs,
Switched WANs, Connecting Devices, TCP/IP Protocol Suite.
IP Address: Classful Addressing: Introduction, Classful Addressing, Other Issues, Sub-netting
and Super-netting, Classless Addressing: Variable length Blocks, Sub-netting, Address
Allocation. Delivery, Forwarding, and Routing of IP Packets: Delivery, Forwarding, Routing,
Structure of Router.ARP and RARP: ARP, ARP Package, RARP.
UNIT -II:Internet Protocol (IP): Datagram, Fragmentation, Options, Checksum, IP V.6.
Transmission Control Protocol (TCP): TCP Services, TCP Features, Segment, A TCP
Connection, State Transition Diagram, Flow Control, Error Control, Congestion Control, TCP
Times.
Stream Control Transmission Protocol (SCTP): SCTP Services, SCTP Features, Packet
Format, Flow Control, Error Control, Congestion Control.Mobile IP: Addressing, Agents,
Three Phases, Inefficiency in Mobile IP.Classical TCP Improvements: Indirect TCP,
Snooping TCP, Mobile TCP, Fast Retransmit/ Fast Recovery, Transmission/ Time Out
Freezing, Selective Retransmission, Transaction Oriented TCP.
UNIT -III: Unicast Routing Protocols (RIP, OSPF, and BGP): Intra and Inter-domain
Routing, Distance Vector Routing, RIP, Link State Routing, OSPF, Path Vector Routing, BGP.
Multicasting and Multicast Routing Protocols: Unicast - Multicast- Broadcast, Multicast
Applications, Multicast Routing, Multicast Link State Routing: MOSPF, Multicast Distance
Vector: DVMRP.
UNIT -IV: Domain Name System (DNS): Name Space, Domain Name Space, Distribution of
Name Space, and DNS in the internet.Remote Login TELNET: Concept, Network Virtual
Terminal (NVT).File Transfer FTP and TFTP: File Transfer Protocol (FTP).Electronic
Mail: SMTP and POP.Network Management-SNMP: Concept, Management Components,
World Wide Web- HTTP Architecture.
UNIT -V:Multimedia:Digitizing Audio and Video, Network security, security in the internet
firewalls. Audio and Video Compression, Streaming Stored Audio/Video, Streaming Live
Audio/Video, Real-Time Interactive Audio/Video, RTP, RTCP, Voice Over IP. Network
Security, Security in the Internet, Firewalls.
Page 224
TEXT BOOKS:
1. TCP/IP Protocol Suite- Behrouz A. Forouzan, Third Edition, TMH
2. Internetworking with TCP/IP Comer 3 rd edition PHI
REFERENCE BOOKS:
1. High performance TCP/IP Networking- Mahbub Hassan, Raj Jain, PHI, 2005
2. Data Communications & Networking – B.A. Forouzan– 2nd
Edition – TMH
3. High Speed Networks and Internets- William Stallings, Pearson Education, 2002.
4. Data and Computer Communications, William Stallings, 7th
Edition., PEI.
5. The Internet and Its Protocols – AdrinFarrel, Elsevier, 2005.
Page 225
I Year I Semester
L P C
4 0 3
SOFTWARE DEFINED RADIO
(ELECTIVE – II)
UNIT -I:
Introduction:
The Need for Software Radios, What is Software Radio, Characteristics and benefits of
software radio- Design Principles of Software Radio, RF Implementation issues- The Purpose
of RF Front – End, Dynamic Range- The Principal Challenge of Receiver Design – RF Receiver
Front- End Topologies- Enhanced Flexibility of the RF Chain with Software Radios-
Importance of the Components to Overall Performance- Transmitter Architectures and Their
Issues- Noise and Distortion in the RF Chain, ADC and DAC Distortion.
UNIT -II:
Multi Rate Signal Processing:
Introduction- Sample Rate Conversion Principles- Polyphase Filters- Digital Filter Banks-
Timing Recovery in Digital Receivers Using Multirate Digital Filters.
Digital Generation of Signals:
Introduction- Comparison of Direct Digital Synthesis with Analog Signal Synthesis-
Approaches to Direct Digital Synthesis- Analysis of Spurious Signals- Spurious Components
due to Periodic jitter- Band Pass Signal Generation- Performance of Direct Digital Synthesis
Systems- Hybrid DDS-PLL Systems- Applications of direct Digital Synthesis- Generation of
Random Sequences- ROM Compression Techniques.
UNIT -III:
Analog to Digital and Digital to Analog Conversion:
Parameters of ideal data converters- Parameters of Practical data converters- Analog to Digital
and Digital to Analog Conversion- Techniques to improve data converter performance-
Common ADC and DAC architectures.
UNIT -IV:
Digital Hardware Choices:
Introduction- Key Hardware Elements- DSP Processors- Field Programmable Gate Arrays-
Trade-Offs in Using DSPs, FPGAs, and ASICs- Power Management Issues- Using a
Combination of DSPs, FPGAs, and ASICs.
UNIT -V:
Object – Oriented Representation of Radios and Network Resources:
Networks- Object Oriented Programming- Object Brokers- Mobile Application Environments-
Joint Tactical Radio System.
Case Studies in Software Radio Design: Introduction and Historical Perspective, SPEAK
easy- JTRS, Wireless Information Transfer System, SDR-3000 Digital Transceiver Subsystem,
Spectrum Ware, CHARIOT.
Page 226
TEXT BOOKS:
1. Software Radio: A Modern Approach to Radio Engineering - Jeffrey H. Reed, 2002, PEA
Publication.
2. Software Defined Radio: Enabling Technologies- Walter Tuttle Bee, 2002, Wiley
Publications.
REFERENCE BOOKS:
1. Software Defined Radio for 3G - Paul Burns, 2002, Artech House.
2. Software Defined Radio: Architectures, Systems and Functions - Markus Dillinger,
KambizMadani, Nancy Alonistioti, 2003, Wiley.
3. Software Radio Architecture: Object Oriented Approaches to wireless System Enginering –
Joseph Mitola, III, 2000, John Wiley & Sons.
4. R.F Microelectronics – B. Razavi, 1998, PHI.
5. DSP – A Computer Based Approach – S. K. Mithra, 1998, McGraw-Hill.
Page 227
I Year I Semester
L P C
4 0 3
NETWORK SECURITY AND CRYPTOGRAPHY
(ELECTIVE -II)
UNIT -I:
Introduction:
Attacks, Services and Mechanisms, Security attacks, Security services, A Model for
Internetwork security.Classical Techniques:Conventional Encryption model, Steganography,
Classical Encryption Techniques.
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
UNIT -II:
Encryption Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.Conventional Encryption :Placement of
Encryption function, Traffic confidentiality, Key distribution, Random Number Generation.
UNIT -III:
Public Key Cryptography:Principles, RSA Algorithm, Key Management, Diffie-Hellman Key
exchange, Elliptic Curve Cryptograpy.Number Theory:Prime and Relatively prime numbers,
Modular arithmetic, Fermat’s and Euler’s theorems, Testing for primality, Euclid’s Algorithm,
the Chinese remainder theorem, Discrete logarithms.
UNIT -IV:
Message Authentication and Hash Functions:Authentication requirements and functions,
Message Authentication, Hash functions, Security of Hash functions and MACs.Hash and Mac
Algorithms
MD File, Message digest Algorithm, Secure Hash Algorithm, RIPEMD-160, HMAC.Digital
signatures and Authentication protocols: Digital signatures, Authentication Protocols, Digital
signature standards.
Authentication Applications :Kerberos, X.509 directory Authentication service.Electronic Mail
Security: Pretty Good Privacy, S/MIME.
Page 228
UNIT –V:
IP Security:
Overview, Architecture, Authentication, Encapsulating Security Payload, Combining security
Associations, Key Management. Web Security: Web Security requirements, Secure sockets layer
and Transport layer security, Secure Electronic Transaction.
Intruders, Viruses and Worms
Intruders, Viruses and Related threats.
Fire Walls: Fire wall Design Principles, Trusted systems.
TEXT BOOKS:
1. Cryptography and Network Security: Principles and Practice - William Stallings, Pearson
Education.
2. Network Security Essentials (Applications and Standards) by William Stallings Pearson
Education.
REFERENCE BOOKS:
1. Fundamentals of Network Security by Eric Maiwald (Dreamtech press)
2. Network Security - Private Communication in a Public World by Charlie Kaufman,
Radia Perlman and Mike Speciner, Pearson/PHI.
3. Principles of Information Security, Whitman, Thomson.
4. Network Security: The complete reference, Robert Bragg, Mark Rhodes, TMH
5. Introduction to Cryptography, Buchmann, Springer.
Page 229
I Year I Semester
L P C
4 0 3
IMAGE AND VIDEO PROCESSING
(ELECTIVE II )
UNIT –I:
Fundamentals of Image Processing and Image Transforms:
Introduction, Image sampling, Quantization, Resolution, Image file formats, Elements of image
processing system, Applications of Digital image processing
Introduction, Need for transform, image transforms, Fourier transform, 2 D Discrete Fourier
transform and its transforms, Importance of phase, Walsh transform, Hadamard transform, Haar
transform, slant transform Discrete cosine transform, KL transform, singular value
decomposition, Radon transform, comparison of different image transforms.
UNIT –II:
Image Enhancement:
Spatial domain methods: Histogram processing, Fundamentals of Spatial filtering, Smoothing
spatial filters, Sharpening spatial filters.
Frequency domain methods: Basics of filtering in frequency domain, image smoothing, image
sharpening, Selective filtering.
Image Restoration:
Introduction to Image restoration, Image degradation, Types of image blur, Classification of
image restoration techniques, Image restoration model, Linear and Nonlinear image restoration
techniques, Blind deconvolution
UNIT –III:
Image Segmentation:
Introduction to image segmentation, Point, Line and Edge Detection, Region based
segmentation., Classification of segmentation techniques, Region approach to image
segmentation, clustering techniques, Image segmentation based on thresholding, Edge based
segmentation, Edge detection and linking, Hough transform, Active contour
Image Compression:
Introduction, Need for image compression, Redundancy in images, Classification of redundancy
in images, image compression scheme, Classification of image compression schemes,
Fundamentals of information theory, Run length coding, Shannon – Fano coding, Huffman
coding, Arithmetic coding, Predictive coding, Transformed based compression, Image
compression standard, Wavelet-based image compression, JPEG Standards.
UNIT -IV:
Basic Steps of Video Processing:
Analog Video, Digital Video. Time-Varying Image Formation models: Three-Dimensional
Motion Models, Geometric Image Formation, Photometric Image Formation, Sampling of Video
signals, Filtering operations.
Page 230
UNIT –V:
2-D Motion Estimation:
Optical flow, General Methodologies, Pixel Based Motion Estimation, Block- Matching
Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based Motion
Estimation, Multi resolution motion estimation, Waveform based coding, Block based transform
coding, Predictive coding, Application of motion estimation in Video coding.
TEXT BOOKS:
1. Digital Image Processing – Gonzaleze and Woods, 3rd
Ed., Pearson.
2. Video Processing and Communication – Yao Wang, JoemOstermann and Ya–quin
Zhang. 1st Ed., PH Int.
3. S.Jayaraman, S.Esakkirajan and T.VeeraKumar, “Digital Image processing, Tata
McGraw Hill publishers, 2009
REFRENCE BOOKS:
1. Digital Image Processing and Analysis-Human and Computer Vision Application with
CVIP Tools – ScotteUmbaugh, 2nd
Ed, CRC Press, 2011.
2. Digital Video Processing – M. Tekalp, Prentice Hall International.
3. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar –
TMH, 2009.
4. Multidimentional Signal, Image and Video Processing and Coding – John Woods, 2nd
Ed,
Elsevier.
5. Digital Image Processing with MATLAB and Labview – Vipula Singh, Elsevier.
6. Video Demystified – A Hand Book for the Digital Engineer – Keith Jack, 5th
Ed.,
Elsevier.
Page 231
I Year I Semester
L P C
0 3 2
SYSTEMS DESIGN AND DATA COMMUNICATION LAB
A student has to do at least 6 Experiments from each Part.
Part A:
Systems Design experiments
• The students are required to design the logic to perform the following experiments
using necessary Industry standard simulator to verify the logical /functional
operation, perform the analysis with appropriate synthesizer and to verify the
implemented logic with different hardware modules/kits (CPLD/FPGA kits).
• Consider the suitable switching function and data to implement the required logic if
required.
List of Experiments:
1. Determination of EPCs using CAMP-I Algorithm.
2. Determination of SPCs using CAMP-I Algorithm.
3. Determination of SCs using CAMP-II Algorithm.
4. PLA minimization algorithm (IISc algorithm)
5. PLA folding algorithm(COMPACT algorithm)
6. ROM design.
7. Control unit and data processor logic design
8. Digital system design using FPGA.
9. Kohavi algorithm.
10. Hamming experiments.
Lab Requirements:
Software: Industry standard software with perpetual licence consisting of required simulator,
synthesizer, analyzer etc. in an appropriate integrated environment.
Hardware:Personal Computer with necessary peripherals, configuration and operating System
and relevant VLSI (CPLD/FPGA) hardware Kits.
Page 232
Part-B:
Data Communications Experiments
1. Study of serial interface RS – 232
2. Study of pc to pc communication using parallel port
3. To establish pc-pc communication using LAN
4. Study of LAN using star topology, bus topology and tree topology
5. Study and configure modem of a computer
6. To configure a hub/switch
7. To study the interconnections of cables for data communication
8. Study of a wireless communication system
Software and Equipment required
• Data Communication Trainer kits
• Computers
• LAN Trainer kit
• ST 5001 Software/ NS2 Software
• Serial and parallel port cables
• Patch cords (2 mm), FOE/LOE Cables, Main power cords
• Ethernet Cables (CAT5, CAT5E, CAT6, CAT7)
• Hubs, Switches, MODEMs
• RS 232 DB25/DB9 Connectors
Page 233
I Year II Semester
L P C
4 0 3
EMBEDDED SYSTEM DESIGN
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
Page 234
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
Page 235
I Year II Semester
L P C
4 0 3
CMOS ANALOG AND DIGITAL IC DESIGN
UNIT-I:
MOS Devices and Modeling
The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout,
CMOS Device Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small-
Signal Model for the MOS Transistor, Computer Simulation Models, Sub-threshold MOS
Model.
MOS Design
Pseudo NMOS Logic – Inverter, Inverter threshold voltage, Output high voltage, Output Low
voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS
logic gates, Transistor equivalency, CMOS Inverter logic.
UNIT-II:
Combinational MOS Logic Circuits:
MOS logic circuits with NMOS loads, Primitive CMOS logic gates – NOR & NAND gate,
Complex Logic circuits design – Realizing Boolean expressions using NMOS gates and CMOS
gates , AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with
Transmission gates.
Sequential MOS Logic Circuits
Behaviour of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch
and edge triggered flip-flop.
UNIT -III:
Dynamic Logic Circuits
Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic
CMOS transmission gate logic, High performance Dynamic CMOS circuits.
Semiconductor Memories
Types, RAM array organization, DRAM – Types, Operation, Leakage currents in DRAM cell
and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR
flash and NAND flash.
Page 236
UNIT -IV:
Analog CMOS Sub-Circuits
MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors-
Current mirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current
Mirror, Current and Voltage References, Band gap Reference.
UNIT-V:
CMOS Amplifiers
Inverters, Differential Amplifiers, Cascode Amplifiers, Current Amplifiers, Output Amplifiers,
High Gain Amplifiers Architectures.
CMOS Operational Amplifiers
Design of CMOS Op Amps, Compensation of Op Amps, Design of Two-Stage Op Amps,
Power- Supply Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps, Measurement
Techniques of OP Amp.
TEXT BOOKS:
1. Digital Integrated Circuit Design – Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo Kang, Yusuf
Leblebici, TMH, 3rd
Ed., 2011.
3. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford
University Press, International Second Edition/Indian Edition, 2010.
4. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul J. Hurst, S. Lewis
and R. G. Meyer, Wiley India, Fifth Edition, 2010.
REFERENCE BOOKS:
1. Analog Integrated Circuit Design- David A. Johns, Ken Martin, Wiley Student Edn,
2016.
2. Design of Analog CMOS Integrated Circuits- BehzadRazavi, TMH Edition.
3. CMOS: Circuit Design, Layout and Simulation- Baker, Li and Boyce, PHI.
4. Digital Integrated Circuits – A Design Perspective, Jan M. Rabaey, AnanthaChandrakasan,
BorivojeNikolic, 2nd
Ed., PHI.
Page 237
I Year II Semester
L P C
4 0 3
DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
UNIT –I:
Introduction to Digital Signal Processing:
Introduction, A Digital signal-processing system, The sampling process, Discrete time
sequences. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-
invariant systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations:
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT –II:
Architectures for Programmable DSP Devices:
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT -III:
Programmable Digital Signal Processors:
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX processors, Pipeline operation of
TMS320C54XX Processors.
UNIT –IV:
Analog Devices Family of DSP Devices:
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Blackfin Processor - The Blackfin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
UNIT –V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices:
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
Page 238
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach to Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. Embedded Signal Processing with the Micro Signal Architecture
Publisher: Woon-SengGan, Sen M. Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications – B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. Digital Signal Processing –Jonatham Stein, 2005, John Wiley.
3. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
4. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
5. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
6. Embedded Media Processing by David J. Katz and Rick Gentile of Analog Devices, Newnes ,
ISBN 0750679123, 2005
Page 239
I Year II Semester
L P C
4 0 3
SYSTEM ON CHIP DESIGN
(ELECTIVE-III)
UNIT-I: Introduction to the System Approach
System Architecture, Components of the system, Hardware & Software, Processor Architectures,
Memory and Addressing. System level interconnection, An approach for SOC Design, System
Architecture and Complexity.
UNIT-II: Processors
Introduction , Processor Selection for SOC, Basic concepts in Processor Architecture, Basic
concepts in Processor Micro Architecture, Basic elements in Instruction handling. Buffers:
minimizing Pipeline Delays, Branches, More Robust Processors, Vector Processors and Vector
Instructions extensions, VLIW Processors, Superscalar Processors.
UNIT-III: Memory Design for SOC
Overview of SOC external memory, Internal Memory, Size, Scratchpads and Cache memory,
Cache Organization, Cache data, Write Policies, Strategies for line replacement at miss time,
Types of Cache, Split – I, and D – Caches, Multilevel Caches, Virtual to real translation , SOC
Memory System, Models of Simple Processor – memory interaction.
UNIT-IV: Interconnect Customization and Configuration
Inter Connect Architectures, Bus: Basic Architectures, SOC Standard Buses , Analytic Bus
Models, Using the Bus model, Effects of Bus transactions and contention time. SOC
Customization: An overview, Customizing Instruction Processor, Reconfiguration Technologies,
Mapping design onto Reconfigurable devices, Instance- Specific design, Customizable Soft
Processor, Reconfiguration - overhead analysis and trade-off analysis on reconfigurable
Parallelism.
UNIT-V: Application Studies / Case Studies
SOC Design approach, AES algorithms, Design and evaluation, Image compression – JPEG
compression.
TEXT BOOKS:
1. Computer System Design System-on-Chip - Michael J. Flynn and Wayne Luk, Wiely
India Pvt. Ltd.
2. ARM System on Chip Architecture – Steve Furber –2nd
Ed., 2000, Addison Wesley
Professional.
Page 240
REFERENCE BOOKS:
1. Design of System on a Chip: Devices and Components – Ricardo Reis, 1st Ed., 2004,
Springer
2. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded
Technology) – Jason Andrews – Newnes, BK and CDROM.
3. System on Chip Verification – Methodologies and Techniques –PrakashRashinkar, Peter
Paterson and Leena Singh L, 2001, Kluwer Academic Publishers.
Page 241
I Year II Semester
L P C
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -III)
UNIT –I:Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach,Knowledge representation - Expert systems.
UNIT –II:Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control,Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear timedelay system.
UNIT –IV:Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
Page 242
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 243
I Year II Semester
L P C
4 0 3
CYBER SECURITY
(ELECTIVE – III)
Page 244
I Year II Semester
L P C
4 0 3
EMBEDDED REAL TIME OPERATING SYSTEMS
(ELECTIVE – IV)
UNIT-I: Introduction
OS Services, Process Management, Timer Functions, Event Functions, Memory Management,
Device, File and IO Systems Management, Interrupt Routines in RTOS Environment and
Handling of Interrupt Source Calls, Real-Time Operating Systems, Basic Design Using an
RTOS, RTOS Task Scheduling Models, Interrupt Latency and Response of the Tasks as
Performance Metrics, OS Security Issues.
UNIT-II: RTOS Programming
Basic Functions and Types of RTOS for Embedded Systems, RTOS mCOS-II, RTOS Vx Works,
Programming concepts of above RTOS with relevant Examples, Programming concepts of
RTOS Windows CE, RTOS OSEK, RTOS Linux 2.6.x and RTOS RT Linux.
UNIT-III: Program Modeling – Case Studies
Case study of embedded system design and coding for an Automatic Chocolate Vending
Machine (ACVM) Using Mucos RTOS, case study of digital camera hardware and software
architecture, case study of coding for sending application layer byte streams on a TCP/IP
Network Using RTOS Vx Works, Case Study of Embedded System for an Adaptive Cruise
Control (ACC) System in Car, Case Study of Embedded System for a Smart Card, Case Study of
Embedded System of Mobile Phone Software for Key Inputs.
UNIT-IV: Target Image Creation & Programming in Linux
Off-The-Shelf Operating Systems, Operating System Software, Target Image Creation for
Window XP Embedded, Porting RTOS on a Micro Controller based Development Board.
Overview and programming concepts of Unix/Linux Programming, Shell Programming, System
Programming.
UNIT-V: Programming in RT Linux
Overview of RT Linux, Core RT Linux API, Program to display a message periodically,
semaphore management, Mutex, Management, Case Study of Appliance Control by RT Linux
System.
Page 245
TEXT BOOKS:
1. Dr. K.V.K.K. Prasad: “Embedded/Real-Time Systems” Dream Tech Publications, Black
pad book.
2. Rajkamal: “Embedded Systems-Architecture, Programming and Design”, Tata McGraw
Hill Publications, Second Edition, 2008.
REFERENCES:
1. Labrosse, “Embedding system building blocks “, CMP publishers.
2. Rob Williams,” Real time Systems Development”, Butterworth Heinemann Publications.
Page 246
I Year II Semester
L P C
4 0 3
HIGH SPEED NETWORKS
( ELECTIVE-IV )
UNIT I
Network Services and Layered Architecture: Traffic characterization andquality of service,
Network services, High performance networks, Network elements, Basic network mechanisms,
layered architecture.
ISDN & B-ISDN: Over view of ISDN, ISDN channels, User access, ISDN protocols, Brief
history of B-ISDN and ATM, ATM based services and applications, principles and building
block of B-ISDN, general architecture of B-ISDN, frame relay.
UNIT II
ATM NETWORKS: Network layering, switching of virtual channels and virtual paths,
applications of virtual channels and connections.QOS parameters, traffic descriptors, ATM
service categories, ATM cell header, ATM layer, ATM adaptation layer.
UNIT III
INTERCONNECTION NETWORKS: Introduction, Banyan Networks, Routing algorithm
& blocking phenomenon, Batcher-Banyan networks, crossbar switch, three stage class networks.
REARRANGEABLE NETWORKS: Rearrangeable class networks, folding algorithm, bens
network, looping algorithm.
UNIT IV
ATM SIGNALING, ROUTING AND TRAFFIC CONTROL: ATM addressing, UNI
signalling, PNNI signalling, PNNI routing, ABR Traffic management.
UNIT V
TCP/IP NETWORKS: History of TCP/IP, TCP application and Services, Motivation,
TCP, UDP, IP services and Header formats, Internetworking, TCP congestion control, Queue
management: Passive & active, QOS in IP networks: differentiated and integrated services.
TEXT BOOKS:
1. William Stallings, “ISDN & B-ISDN with Frame Relay”, PHI.
2. Leon Garcia widjaja, “Communication Networks”, TMH, 2000.
3. N. N. Biswas, “ATM Fundamentals”, Adventure books publishers, 1998
Page 247
I Year II Semester
L P C
4 0 3
ELECTROMAGNETIC INTERFERENCE AND ELECTROMAGNETIC
COMPATIBILITY (EMI / EMC)
(ELECTIVE-IV)
UNIT -I:
Introduction, Natural and Nuclear Sources of EMI / EMC:
Electromagnetic environment, History, Concepts, Practical experiences and concerns, frequency
spectrum conservations, An overview of EMI / EMC, Natural and Nuclear sources of EMI.
UNIT -II:
EMI from Apparatus, Circuits and Open Area Test Sites:
Electromagnetic emissions, Noise from relays and switches, Non-linearities in circuits, passive
intermodulation, Cross talk in transmission lines, Transients in power supply lines,
Electromagnetic interference (EMI), Open area test sites and measurements.
UNIT -III:
Radiated and Conducted Interference Measurements and ESD:
Anechoic chamber, TEM cell, GH TEM Cell, Characterization of conduction currents / voltages,
Conducted EM noise on power lines, Conducted EMI from equipment, Immunity to conducted
EMI detectors and measurements, ESD, Electrical fast transients / bursts, Electrical surges.
UNIT -IV:
Grounding, Shielding, Bonding and EMI filters:
Principles and types of grounding, Shielding and bonding, Characterization of filters, Power
lines filter design.
UNIT -V:
Cables, Connectors, Components and EMC Standards:
EMI suppression cables, EMC connectors, EMC gaskets, Isolation transformers, optoisolators,
National / International EMC standards.
Page 248
TEXT BOOKS:
1. Engineering Electromagnetic Compatibility - Dr. V.P. Kodali, IEEEPublication, Printed
in India by S. Chand & Co. Ltd., New Delhi, 2000.
2. Electromagnetic Interference and Compatibility IMPACTseries,IIT – Delhi, Modules 1 –
9.
REFERENCE BOOKS:
1. Introduction to Electromagnetic Compatibility - Ny, John Wiley, 1992, by C.R. Pal.
Page 249
I Year II Semester
L P C
0 3 2
EMBEDDED SYSTEMS DESIGN LABORATORY
• The Students are required to write the programs using C-Language according to the
Experiment requirements using RTOS Library Functions and macros ARM-926
developer kits and ARM-Cortex.
• The following experiments are required to develop the algorithms, flow diagrams,
source code and perform the compilation, execution and implement the same using
necessary hardware kits for verification. The programs developed for the
implementation should be at the level of an embedded system design.
• The students are required to perform at least SIX experiments from Part-I and
TWO experiments from Part-II.
List of Experiments:
Part-I: Experiments using ARM-926 with PERFECT RTOS
1. Register a new command in CLI.
2. Create a new Task.
3. Interrupt handling.
4. Allocate resource using semaphores.
5. Share resource using MUTEX.
6. Avoid deadlock using BANKER’S algorithm.
7. Synchronize two identical threads using MONITOR.
8.Reader’s Writer’s Problem for concurrent Tasks.
Part-II Experiments on ARM-CORTEX processor using any open source RTOS.
(Coo-Cox-Software-Platform)
1. Implement the interfacing of display with the ARM- CORTEX processor.
2. Interface ADC and DAC ports with the Input and Output sensitive devices.
3. Simulate the temperature DATA Logger with the SERIAL communication with PC.
4. Implement the developer board as a modem for data communication using serial port
communication between two PC’s.
Lab Requirements:
Software:
(i) Eclipse IDE for C and C++ (YAGARTO Eclipse IDE), Perfect RTOS Library,
COO-COX Software Platform, YAGARTO TOOLS, and TFTP SERVER.
(ii) LINUX Environment for the compilation using Eclipse IDE & Java with latest
version.
Page 250
Hardware:
(i) The development kits of ARM-926 Developer Kits and ARM-Cortex
Boards.
(ii) Serial Cables, Network Cables and recommended power supply for the
board.
Page 251
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
EMBEDDED SYSTEMS (Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 252
I Semester
II Semester
S. No. Name of the Subject L P C
1 Digital System Design 4 - 3
2 Embedded System Design 4 - 3
3 Embedded Real Time Operating Systems 4 - 3
4 Embedded - C 4 - 3
5
Elective I
1. Sensors and Actuators
2. Network Security & Cryptography
3. Advanced Computer Architecture
4 - 3
6
Elective II
1. Embedded Computing
2. Soft Computing Techniques
3. Advanced Operating Systems
4. Cyber Security
4 - 3
7 Embedded C-Laboratory - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Hardware Software Co-Design 4 - 3
2 Digital Signal Processors and Architecture 4 - 3
3 Embedded Networking 4 - 3
4 CPLD and FPGA Architectures and Applications 4 - 3
5
Elective III
1. CMOS Mixed Signal Circuit Design
2. Micro Electro Mechanical System Design
3. Internet Protocols
4 - 3
6
Elective IV
1. System on Chip Design
2. Wireless LANs and PANs
3. Multimedia and Signal Coding
4 - 3
7 Embedded System Design Laboratory - 3 2
Total Credits 20
Page 253
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 254
I Year I Semester
L P C
4 0 3
DIGITAL SYSTEM DESIGN
UNIT-I: Minimization Procedures and CAMP Algorithm:
Review on minimization of switching functions using tabular methods, k-map, QM algorithm,
CAMP-I algorithm, Phase-I: Determination of Adjacencies, DA, CSC, SSMs and EPCs,, CAMP-
I algorithm, Phase-II: Passport checking,Determination of SPC, CAMP-II algorithm:
Determination of solution cube, Cube based operations, determination of selected cubes are
wholly within the given switching function or not, Introduction to cube based algorithms.
UNIT-II: PLA Design, Minimization and Folding Algorithms:
Introduction to PLDs, basic configurations and advantages of PLDs, PLA-Introduction, Block
diagram of PLA, size of PLA, PLA design aspects, PLA minimization algorithm(IISc algorithm),
PLA folding algorithm(COMPACT algorithm)-Illustration of algorithms with suitable examples.
UNIT -III: Design of Large Scale Digital Systems:
Algorithmic state machinecharts-Introduction, Derivation of SM Charts, Realization of SM
Chart, control implementation, control unit design, data processor design, ROM design, PAL
design aspects, digital system design approaches using CPLDs, FPGAs and ASICs.
UNIT-IV: Fault Diagnosis in Combinational Circuits:
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.
UNIT-V: Fault Diagnosis in Sequential Circuits:
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd
Edition, 2001, TMH
3. Digital system Design using PLDd-Lala
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th
Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
Page 255
I Year I Semester
L P C
4 0 3
EMBEDDED SYSTEM DESIGN
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
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UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
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EMBEDDED REAL TIME OPERATING SYSTEMS
UNIT-I: Introduction
OS Services, Process Management, Timer Functions, Event Functions, Memory Management,
Device, File and IO Systems Management, Interrupt Routines in RTOS Environment and
Handling of Interrupt Source Calls, Real-Time Operating Systems, Basic Design Using an
RTOS, RTOS Task Scheduling Models, Interrupt Latency and Response of the Tasks as
Performance Metrics, OS Security Issues.
UNIT-II: RTOS Programming
Basic Functions and Types of RTOS for Embedded Systems, RTOS mCOS-II, RTOS Vx Works,
Programming concepts of above RTOS with relevant Examples, Programming concepts of
RTOS Windows CE, RTOS OSEK, RTOS Linux 2.6.x and RTOS RT Linux.
UNIT-III: Program Modeling – Case Studies
Case study of embedded system design and coding for an Automatic Chocolate Vending
Machine (ACVM) Using Mucos RTOS, case study of digital camera hardware and software
architecture, case study of coding for sending application layer byte streams on a TCP/IP
Network Using RTOS Vx Works, Case Study of Embedded System for an Adaptive Cruise
Control (ACC) System in Car, Case Study of Embedded System for a Smart Card, Case Study of
Embedded System of Mobile Phone Software for Key Inputs.
UNIT-IV: Target Image Creation & Programming in Linux
Off-The-Shelf Operating Systems, Operating System Software, Target Image Creation for
Window XP Embedded, Porting RTOS on a Micro Controller based Development Board.
Overview and programming concepts of Unix/Linux Programming, Shell Programming, System
Programming.
UNIT-V: Programming in RT Linux
Overview of RT Linux, Core RT Linux API, Program to display a message periodically,
semaphore management, Mutex, Management, Case Study of Appliance Control by RT Linux
System.
TEXT BOOKS:
1. Dr. K.V.K.K. Prasad: “Embedded/Real-Time Systems” Dream Tech Publications, Black
pad book.
2. Rajkamal: “Embedded Systems-Architecture, Programming and Design”, Tata McGraw
Hill Publications, Second Edition, 2008.
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REFERENCES:
1. Labrosse, “Embedding system building blocks “, CMP publishers.
2. Rob Williams,” Real time Systems Development”, Butterworth Heinemann Publications.
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EMBEDDED C
UNIT-I:
Programming Embedded Systems in C
Introduction ,What is an embedded system, Which processor should you use, Which
programming language should you use, Which operating system should you use, How do you
develop embedded software, Conclusions
Introducing the 8051 Microcontroller Family
Introduction, What’s in a name, The external interface of the Standard 8051, Reset requirements
,Clock frequency and performance, Memory issues, I/O pins, Timers, Interrupts, Serial interface,
Power consumption ,Conclusions
UNIT-II: Reading Switches
Introduction, Basic techniques for reading from port pins, Example: Reading and writing bytes,
Example: Reading and writing bits (simple version), Example: Reading and writing bits (generic
version), The need for pull-up resistors, Dealing with switch bounce, Example: Reading switch
inputs (basic code), Example: Counting goats, Conclusions
UNIT-III: Adding Structure to the Code
Introduction, Object-oriented programming with C, The Project Header (MAIN.H), The Port
Header (PORT.H), Example: Restructuring the ‘Hello Embedded World’ example, Example:
Restructuring the goat-counting example, Further examples, Conclusions
UNIT-IV: Meeting Real-Time Constraints
Introduction, Creating ‘hardware delays’ using Timer 0 and Timer 1, Example: Generating a
precise 50 ms delay, Example: Creating a portable hardware delay, Why not use Timer 2?, The
need for ‘timeout’ mechanisms, Creating loop timeouts, Example: Testing loop timeouts,
Example: A more reliable switch interface, Creating hardware timeouts, Example: Testing a
hardware timeout, Conclusions
UNIT-V: Case Study-Intruder Alarm System
Introduction, The software architecture, Key software components used in this example, running
the program, the software, Conclusions
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TEXT BOOKS:
1. Embedded C - Michael J. Pont, 2nd
Ed., Pearson Education, 2008.
REFERENCE BOOKS:
1. PICMCU C-An introduction to programming, The Microchip PIC in CCS C - Nigel
Gardner.
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SENSORS AND ACTUATORS
(ELECTIVE-I)
UNIT-I:
Sensors / Transducers: Principles – Classification – Parameters – Characteristics -
Environmental Parameters (EP) – Characterization.
Mechanical and Electromechanical Sensors: Introduction – Resistive Potentiometer – Strain
Gauge – Resistance Strain Gauge – Semiconductor Strain Gauges -Inductive Sensors: Sensitivity
and Linearity of the Sensor –Types-Capacitive Sensors:– Electrostatic Transducer– Force/Stress
Sensors Using Quartz Resonators – Ultrasonic Sensors.
UNIT-II:
Thermal Sensors: Introduction – Gas thermometric Sensors – Thermal Expansion Type
Thermometric Sensors – Acoustic Temperature Sensor – Dielectric Constant and Refractive
Index thermosensors – Helium Low Temperature Thermometer – Nuclear Thermometer –
Magnetic Thermometer – Resistance Change Type Thermometric Sensors –Thermoemf
Sensors– Junction Semiconductor Types– Thermal Radiation Sensors –Quartz Crystal
Thermoelectric Sensors – NQR Thermometry – Spectroscopic Thermometry – Noise
Thermometry – Heat Flux Sensors
Magnetic sensors: Introduction – Sensors and the Principles Behind – Magneto-resistive
Sensors – Anisotropic Magnetoresistive Sensing – Semiconductor Magnetoresistors– Hall Effect
and Sensors – Inductance and Eddy Current Sensors– Angular/Rotary Movement Transducers –
Synchros – Synchro-resolvers - Eddy Current Sensors – Electromagnetic Flowmeter –
Switching Magnetic Sensors SQUID Sensors
UNIT-III:
Radiation Sensors: Introduction – Basic Characteristics – Types of Photosensistors/Photo
detectors– X-ray and Nuclear Radiation Sensors– Fiber Optic Sensors.
Electro analytical Sensors: Introduction – The Electrochemical Cell – The Cell Potential -
Standard Hydrogen Electrode (SHE) – Liquid Junction and Other Potentials – Polarization –
Concentration Polarization-– Reference Electrodes - Sensor Electrodes – Electro ceramics in Gas
Media .
UNIT - IV:
Smart Sensors: Introduction – Primary Sensors – Excitation – Amplification – Filters –
Converters – Compensation– Information Coding/Processing - Data Communication – Standards
for Smart Sensor Interface – The Automation
Sensors-Applications: Introduction – On-board Automobile Sensors (Automotive Sensors)–
Home Appliance Sensors – Aerospace Sensors –– Sensors for Manufacturing –Sensors for
environmental Monitoring
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UNIT-V: Actuators
Pneumatic and Hydraulic Actuation Systems- Actuation systems – Pneumatic and hydraulic
systems - Directional Control valves – Presure control valves – Cylinders - Servo and
proportional control valves – Process control valves – Rotary actuators
Mechanical Actuation Systems- Types of motion – Kinematic chains – Cams – Gears – Ratchet
and pawl – Belt and chain drives – Bearings – Mechanical aspects of motor selection
Electrical Actuation Systems-Electrical systems -Mechanical switches – Solid-state switches
Solenoids – D.C. Motors – A.C. motors – Stepper motors
TEXT BOOKS:
1. D. Patranabis – “Sensors and Transducers” –PHI Learning Private Limited.
2. W. Bolton – “Mechatronics” –Pearson Education Limited.
REFERENCE BOOKS:
1. Sensors AndActruators – D. Patranabis – 2nd
Ed., PHI, 2013.
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NETWORK SECURITY & CRYPTOGRAPHY
(ELECTIVE-I)
UNIT-I: Introduction
Attacks, Services and Mechanisms, Security attacks, Security services, A Model for
Internetwork security.Classical Techniques: Conventional Encryption model, Steganography,
Classical Encryption Techniques.
UNIT-II:
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.
Conventional Encryption:
Placement of Encryption function, Traffic confidentiality, Key distribution, Random Number
Generation.
Public Key Cryptography:
Principles, RSA Algorithm, Key Management, Diffie-Hellman Key exchange, Elliptic Curve
Cryptography.
UNIT-III:
Number Theory:
Prime and Relatively prime numbers, Modular arithmetic, Fermat’s and Euler’s theorems,
Testing for primality, Euclid’s Algorithm, the Chinese remainder theorem, Discrete logarithms.
Message authentication and Hash Functions:
Authentication requirements and functions, Message Authentication, Hash functions, Security of
Hash functions and MACs.
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UNIT-IV:
Hash and Mac Algorithms: MD File, Message digest Algorithm, Secure Hash Algorithm,
RIPEMD-160, HMAC.
Digital signatures and Authentication Protocols: Digital signatures, Authentication Protocols,
Digital signature standards.
Authentication Applications: Kerberos, X.509 directory Authentication service.Electronic Mail
Security: Pretty Good Privacy, S/MIME.
UNIT-V:
IP Security: Overview, Architecture, Authentication, Encapsulating Security Payload,
Combining security Associations, Key Management.
Web Security: Web Security requirements, Secure sockets layer and Transport layer security,
Secure Electronic Transaction.
Intruders, Viruses and Worms: Intruders, Viruses and Related threats.
Fire Walls:Fire wall Design Principles, Trusted systems.
TEXT BOOKS:
1. Cryptography and Network Security: Principles and Practice - William Stallings, 2000, PE.
REFERENCE BOOKS:
1. Principles of Network and Systems Administration, Mark Burgess,JohnWiey.
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ADVANCED COMPUTER ARCHITECTURE
(ELECTIVE-I)
UNIT-I: Fundamentals of Computer Design:
Fundamentals of Computer design, Changing faces of computing and task of computer designer,
Technology trends, Cost price and their trends, measuring and reporting performance,
Quantitative principles of computer design, Amdahl’s law.
Instruction set principles and examples- Introduction, classifying instruction set- memory
addressing- type and size of operands, Operations in the instruction set.
UNIT-II:
Pipelines:
Introduction, basic RISC instruction set, Simple implementation of RISC instruction set, Classic
five stage pipe lined RISC processor, Basic performance issues in pipelining, Pipeline hazards,
Reducing pipeline branch penalties.
Memory Hierarchy Design:
Introduction, review of ABC of cache, Cache performance, Reducing cache miss penalty, Virtual
memory.
UNIT-III:
Instruction Level Parallelism (ILP)-The Hardware Approach:
Instruction-Level parallelism, Dynamic scheduling, Dynamic scheduling using Tomasulo’s
approach, Branch prediction, High performance instruction delivery- Hardware based
speculation.
ILP Software Approach:
Basic compiler level techniques, Static branch prediction, VLIW approach, Exploiting ILP,
Parallelism at compile time, Cross cutting issues - Hardware verses Software.
UNIT-IV: Multi Processors and Thread Level Parallelism:
Multi Processors and Thread level Parallelism- Introduction, Characteristics of application
domain, Systematic shared memory architecture, Distributed shared – Memory architecture,
Synchronization.
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UNIT-V:
Inter Connection and Networks:
Introduction, Interconnection network media, Practical issues in interconnecting networks,
Examples of inter connection, Cluster, Designing of clusters.
Intel Architecture: Intel IA-64 ILP in embedded and mobile markets Fallacies and pit falls.
TEXT BOOKS:
1. John L. Hennessy, David A. Patterson - Computer Architecture: A Quantitative Approach,
3rd
Edition, an Imprint of Elsevier.
REFERENCE BOOKS:
1. John P. Shen and Miikko H. Lipasti -, Modern Processor Design : Fundamentals of Super
Scalar Processors
2. Computer Architecture and Parallel Processing - Kai Hwang, Faye A.Brigs., MC Graw
Hill.
3. Advanced Computer Architecture - A Design Space Approach, DezsoSima, Terence
Fountain, Peter Kacsuk, Pearson Ed.
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EMBEDDED COMPUTING
(ELECTIVE-II)
UNIT-I:
Programming on Linux Platform:
System Calls, Scheduling, Memory Allocation, Timers, Embedded Linux, Root File System,
Busy Box.
Operating System Overview: Processes, Tasks, Threads, Multi-Threading, Semaphore,
Message Queue.
UNIT-II: Introduction to Software Development Tools
GNU GCC, make, gdb, static and dynamic linking, C libraries, compiler options, code
optimization switches, lint, code profiling tools.
UNIT-III: Interfacing Modules
Sensor and actuator interface, data transfer and control, GPS, GSM module interfacing with data
processing and display, OpenCV for machine vision, Audio signal processing.
UNIT-IV: Networking Basics
Sockets, ports, UDP, TCP/IP, client server model, socket programming, 802.11, Bluetooth,
ZigBee, SSH, firewalls, network security.
UNIT-V: Intel Architecture 32-bit (IA32) Instruction Set
Application binary interface, exception and interrupt handling, interrupt latency, assemblers,
assembler directives, macros, simulation and debugging tools.
TEXT BOOKS:
1. Modern Embedded Computing - Peter Barry and Patrick Crowley, 1st Ed.,
Elsevier/Morgan Kaufmann, 2012.
2. Linux Application Development - Michael K. Johnson, Erik W. Troan, Adission Wesley,
1998.
3. Assembly Language for x86 Processors by Kip R. Irvine
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REFERENCE BOOKS:
1. Operating System Concepts by Abraham Silberschatz, Peter B. Galvin and Greg Gagne.
2. Intel® 64 and IA-32 Architectures Software Developer Manuals
3. The Design of the UNIX Operating System by Maurice J. Bach Prentice-Hall
4. UNIX Network Programming by W. Richard Stevens.
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SOFT COMPUTING TECHNIQUES
(ELECTIVE -II)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach,Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control,Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear timedelay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
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TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
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ADVANCED OPERATING SYSTEMS
(ELECTIVE-II)
UNIT-I: Introduction to Operating Systems:
Overview of computer system hardware, Instruction execution, I/O function, Interrupts,
Memory hierarchy, I/O Communication techniques, Operating system objectives and
functions, Evaluation of operating System
UNIT-II: Introduction to UNIX and LINUX:
Basic Commands & Command Arguments, Standard Input, Output, Input / Output
Redirection, Filters and Editors, Shells and Operations
UNIT-III:
System Calls:
System calls and related file structures, Input / Output, Process creation & termination.
Inter Process Communication:
Introduction, File and record locking, Client – Server example, Pipes, FIFOs, Streams &
Messages, Name Spaces, Systems V IPC, Message queues, Semaphores, Shared Memory,
Sockets & TLI.
UNIT-IV:
Introduction to Distributed Systems:
Goals of distributed system, Hardware and software concepts, Design issues.
Communication in Distributed Systems:
Layered protocols, ATM networks, Client - Server model, Remote procedure call and Group
communication.
UNIT-V:
Synchronization in Distributed Systems:
Clock synchronization, Mutual exclusion, E-tech algorithms, Bully algorithm, Ring algorithm,
Atomic transactions
Deadlocks:
Dead lock in distributed systems, Distributed dead lock prevention and distributed dead
lock detection.
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TEXT BOOKS:
1. The Design of the UNIX Operating Systems – Maurice J. Bach, 1986, PHI.
2. Distributed Operating System - Andrew. S. Tanenbaum, 1994, PHI.
3. The Complete Reference LINUX – Richard Peterson, 4th
Ed., McGraw – Hill.
REFERENCE BOOKS:
1. Operating Systems: Internal and Design Principles - Stallings, 6th
Ed., PE.
2. Modern Operating Systems - Andrew S Tanenbaum, 3rd
Ed., PE.
3. Operating System Principles - Abraham Silberchatz, Peter B. Galvin, Greg Gagne, 7th
Ed., John Wiley
4. UNIX User Guide – Ritchie & Yates.
5. UNIX Network Programming - W.Richard Stevens, 1998, PHI.
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CYBER SECURITY
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EMBEDDED C LABORATORY
• The Students are required to write the programs using C-Language according to the
hardware requirements such as 8051/PIC Micro controllers or any ARM processor
developer kits.
• The following experiments are required to develop the algorithms, flow diagrams,
source code and perform the compilation, execution and implement the same using
necessary hardware kits for verification. The programs developed for the
implementation should be at the level of an embedded system design.
• The students are required to perform at least EIGHT experiments.
List of Experiments:
1. LED Blinking.
2. ASCII to Decimal vice versa conversion.
3. Basic Arithmetic operations.
4. PWM(Motor application).
5. Serial Communication(USART).
6. ADC and DAC implementation.
7. JTAG Debugger.
8. Seven segment display interfacing.
9. LCD display interfacing.
10. 3x4 keyboard interfacing.
11. Memory Device interfacing (Reading or Writing a file from external memory).
12. Temperature sensor/4 way Road control /Elevator.
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Lab Requirements:
Software:
(i) Keil Micro-vision IDE or Eclipse IDE for C and C++ (YAGARTO Eclipse IDE)
(ii) LINUX Environment for the compilation using Eclipse IDE & Java with latest
version.
Hardware:The development kits of 8051/PIC Micro controllers or any ARM processor.
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HARDWARE SOFTWARE CO-DESIGN
UNIT-I:
Co- Design Issues:
Co- Design Models, Architectures, Languages, A Generic Co-design Methodology.
Co- Synthesis Algorithms:
Hardware software synthesis algorithms: hardware – software partitioning distributed system co-
synthesis.
UNIT-II:
Prototyping and Emulation:
Prototyping and emulation techniques, prototyping and emulation environments, future
developments in emulation and prototyping architecture specialization techniques, system
communication infrastructure
Target Architectures:
Architecture Specialization techniques, System Communication infrastructure, Target
Architecture and Application System classes, Architecture for control dominated systems (8051-
Architectures for High performance control), Architecture for Data dominated systems
(ADSP21060, TMS320C60), Mixed Systems.
UNIT-III:
Compilation Techniques and Tools for Embedded Processor Architectures:
Modern embedded architectures, embedded software development needs, compilation
technologies, practical consideration in a compiler development environment.
UNIT-IV:
Design Specification and Verification:
Design, co-design, the co-design computational model, concurrency coordinating concurrent
computations, interfacing components, design verification, implementation verification,
verification tools, interface verification.
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UNIT-V:
Languages for System – Level Specification and Design-I:
System-level specification, design representation for system level synthesis, system level
specification languages.
Languages for System – Level Specification and Design-II:
Heterogeneous specifications and multi language co-simulation, the cosyma system and lycos
system.
TEXT BOOKS:
1. Hardware / Software Co- Design Principles and Practice – Jorgen Staunstrup, Wayne
Wolf – 2009, Springer.
2. Hardware / Software Co- Design - Giovanni De Micheli, Mariagiovanna Sami, 2002,
Kluwer Academic Publishers.
REFERENCE BOOKS:
1. A Practical Introduction to Hardware/Software Co-design -Patrick R. Schaumont -
2010 – Springer Publications.
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DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
UNIT-I:
Introduction to Digital Signal Processing
Introduction, a Digital signal-processing system, the sampling process, discrete time sequences.
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-invariant
systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT-II:
Architectures for Programmable DSP Devices
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT-III:
Programmable Digital Signal Processors
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX Instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX Processors, Pipeline Operation of
TMS320C54XX Processors.
UNIT-IV:
Analog Devices Family of DSP Devices
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Black fin Processor - The Black fin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
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UNIT-V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach To Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. Embedded Signal Processing with the Micro Signal Architecture: Woon-SengGan, Sen M.
Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications-B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
3. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
4. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
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EMBEDDED NETWORKING
UNIT-I: Embedded Communication Protocols:
Embedded Networking: Introduction – Serial/Parallel Communication – Serial communication
protocols -RS232 standard – RS485 – Synchronous Serial Protocols -Serial Peripheral Interface
(SPI) – Inter Integrated Circuits (I2C) – PC Parallel port programming - ISA/PCI Bus protocols
– Firewire.
UNIT-II: USB and CAN Bus:
USB bus-Introduction – Speed Identification on the bus – USB States – USB bus
communication: Packets –Data flow types –Enumeration –Descriptors –PIC 18 Microcontroller
USB Interface – C Programs –CAN Bus – Introduction - Frames –Bit stuffing –Types of errors –
Nominal Bit Timing – PIC microcontroller CAN Interface –A simple application with CAN.
UNIT-III: Ethernet Basics:
Elements of a network – Inside Ethernet – Building a Network: Hardware options – Cables,
Connections and network speed – Design choices: Selecting components –Ethernet Controllers –
Using the internet in local and internet communications – Inside the Internet protocol.
UNIT-IV: Embedded Ethernet:
Exchanging messages using UDP and TCP – Serving web pages with Dynamic Data – Serving
web pages that respond to user Input – Email for Embedded Systems – Using FTP – Keeping
Devices and Network secure.
UNIT-V: Wireless Embedded Networking:
Wireless sensor networks – Introduction – Applications – Network Topology – Localization –
Time Synchronization - Energy efficient MAC protocols –SMAC – Energy efficient and robust
routing – Data Centric routing.
TEXT BOOKS:
1. Embedded Systems Design: A Unified Hardware/Software Introduction - Frank Vahid, Tony
Givargis, John & Wiley Publications, 2002
2. Parallel Port Complete: Programming, interfacing and using the PCs parallel printer port -Jan
Axelson, Penram Publications, 1996.
REFERENCE BOOKS:
1. Advanced PIC microcontroller projects in C: from USB to RTOS with the PIC18F series -
Dogan Ibrahim, Elsevier 2008.
2. Embedded Ethernet and Internet Complete - Jan Axelson, Penram publications, 2003.
3. Networking Wireless Sensors - BhaskarKrishnamachari�, Cambridge press 2005.
******
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CPLD AND FPGA ARCHITECURES AND APPLICATIONS
UNIT-I: Introduction to Programmable Logic Devices
Introduction, Simple Programmable Logic Devices – Read Only Memories, Programmable
Logic Arrays, Programmable Array Logic, Programmable Logic Devices/Generic Array Logic;
Complex Programmable Logic Devices – Architecture of Xilinx Cool Runner XCR3064XL
CPLD, CPLD Implementation of a Parallel Adder with Accumulation.
UNIT-II: Field Programmable Gate Arrays
Organization of FPGAs, FPGA Programming Technologies, Programmable Logic Block
Architectures, Programmable Interconnects, Programmable I/O blocks in FPGAs, Dedicated
Specialized Components of FPGAs, Applications of FPGAs.
UNIT-III: SRAM Programmable FPGAs
Introduction, Programming Technology, Device Architecture, The Xilinx XC2000, XC3000 and
XC4000 Architectures.
UNIT-IV: Anti-Fuse Programmed FPGAs
Introduction, Programming Technology, Device Architecture, TheActel ACT1, ACT2 and ACT3
Architectures.
UNIT-V: Design Applications
General Design Issues, Counter Examples, A Fast Video Controller, A Position Tracker for a
Robot Manipulator, A Fast DMA Controller, Designing Counters with ACT devices, Designing
Adders and Accumulators with the ACT Architecture.
TEXT BOOKS:
1. Field Programmable Gate Array Technology - Stephen M. Trimberger, Springer
International Edition.
2. Digital Systems Design - Charles H. Roth Jr, LizyKurian John, Cengage Learning.
.,
Page 282
REFERENCE BOOKS:
1. Field Programmable Gate Arrays - John V. Oldfield, Richard C. Dorf, Wiley India.
2. Digital Design Using Field Programmable Gate Arrays - Pak K. Chan/SamihaMourad,
Pearson Low Price Edition.
3. Digital Systems Design with FPGAs and CPLDs - Ian Grout, Elsevier, Newnes.
4. FPGA based System Design - Wayne Wolf, Prentice Hall Modern Semiconductor Design
Series.
Page 283
I Year II Semester
L P C
4 0 3
CMOS MIXED SIGNAL CIRCUIT DESIGN
(ELECTIVE – III)
Page 284
I Year II Semester
L P C
4 0 3
MICRO ELECTRO MECHANICAL SYSTEM DESIGN
(ELECTIVE-III)
UNIT-I: Introduction
Basic structures of MEM devices – (Canti-Levers, Fixed Beams diaphragms).Broad Response of
Micro electromechanical systems (MEMS) to Mechanical (Force, pressure etc.)Thermal,
Electrical, optical and magnetic stimuli, compatibility of MEMS from the point of power
dissipation, leakage etc.
UNIT-II: Review
Review of mechanical concepts like stress, strain, bending moment, deflection curve.
Differential equations describing the deflection under concentrated force, Distributed force,
distributed force, Deflection curves for canti-levers- fixed beam. Electrostatic excitation –
columbic force between the fixed and moving electrodes.Deflection with voltage in C.L,
Deflection Vs Voltage curve, critical fringe field – field calculations using Laplace
equation.Discussion on the approximate solutions – Transient response of the MEMS.
UNIT-III: Types
Two terminal MEMS - capacitance Vs voltage Curve – Variable capacitor.Applications of
variable capacitors.Two terminal MEM structures.Three terminal MEM structures – Controlled
variable capacitors – MEM as a switch and possible applications.
UNIT-IV: MEM Circuits & Structures
MEM circuits & structures for simple GATES- AND, OR, NAND, NOR, Exclusive OR, simple
MEM configurations for flip-flops triggering applications to counters, converters. Applications
for analog circuits like frequency converters, wave shaping. RF Switches for modulation. MEM
Transducers for pressure, force temperature.Optical MEMS.
UNIT-V: MEM Technologies
Silicon based MEMS- Process flow – Brief account of various processes and layers like fixed
layer, moving layers spacers etc., and etching technologies.
Metal Based MEMS: Thin and thick film technologies for MEMS. Process flow and description
of the processes, Status of MEMS in the current electronics scenario.
Page 285
TEXT BOOKS:
1. MEMS Theory, Design and Technology - GABRIEL. M.Review, R.F.,2003, John
wiley& Sons. .
2. Strength of Materials –ThimoShenko, 2000, CBS publishers & Distributors.
3. MEMS and NEMS, Systems Devices; and Structures - ServeyE.Lyshevski, 2002, CRC
Press.
REFERENCE BOOKS:
1. Sensor Technology and Devices - Ristic L. (Ed) , 1994, Artech House, London.
Page 286
I Year II Semester
L P C
4 0 3
INTERNET PROTOCOLS
(ELECTIVE III)
UNIT -I:
Internetworking Concepts:
Principles of Internetworking, Connectionless Internetworking, Application level
Interconnections, Network level Interconnection, Properties of thee Internet, Internet
Architecture, Wired LANS, Wireless LANs, Point-to-Point WANs, Switched WANs,
Connecting Devices, TCP/IP Protocol Suite.
IP Address:
Classful Addressing: Introduction, Classful Addressing, Other Issues, Sub-netting and Super-
netting
Classless Addressing: Variable length Blocks, Sub-netting, Address Allocation. Delivery,
Forwarding, and Routing of IP Packets: Delivery, Forwarding, Routing, Structure of Router.
ARP and RARP: ARP, ARP Package, RARP.
UNIT -II:
Internet Protocol (IP): Datagram, Fragmentation, Options, Checksum, IP V.6.
Transmission Control Protocol (TCP): TCP Services, TCP Features, Segment, A TCP
Connection, State Transition Diagram, Flow Control, Error Control, Congestion Control, TCP
Times.
Stream Control Transmission Protocol (SCTP): SCTP Services, SCTP Features, Packet
Format, Flow Control, Error Control, Congestion Control.
Mobile IP: Addressing, Agents, Three Phases, Inefficiency in Mobile IP.
Classical TCP Improvements: Indirect TCP, Snooping TCP, Mobile TCP, Fast Retransmit/
Fast Recovery, Transmission/ Time Out Freezing, Selective Retransmission, Transaction
Oriented TCP.
UNIT -III:
Unicast Routing Protocols (RIP, OSPF, and BGP): Intra and Inter-domain Routing, Distance
Vector Routing, RIP, Link State Routing, OSPF, Path Vector Routing, BGP.
Multicasting and Multicast Routing Protocols: Unicast - Multicast- Broadcast, Multicast
Applications, Multicast Routing, Multicast Link State Routing: MOSPF, Multicast Distance
Vector: DVMRP.
UNIT -IV:
Domain Name System (DNS): Name Space, Domain Name Space, Distribution of Name
Space, and DNS in the internet.
Remote Login TELNET: Concept, Network Virtual Terminal (NVT).
File Transfer FTP and TFTP: File Transfer Protocol (FTP).
Electronic Mail: SMTP and POP.
Network Management-SNMP: Concept, Management Components, World Wide Web- HTTP
Architecture.
Page 287
UNIT -V:
Multimedia:
Digitizing Audio and Video, Network security, security in the internet firewalls. Audio and
Video Compression, Streaming Stored Audio/Video, Streaming Live Audio/Video, Real-Time
Interactive Audio/Video, RTP, RTCP, Voice Over IP. Network Security, Security in the
Internet, Firewalls.
TEXT BOOKS:
1. TCP/IP Protocol Suite- Behrouz A. Forouzan, Third Edition, TMH
2. Internetworking with TCP/IP Comer 3 rd edition PHI
REFERENCE BOOKS:
1. High performance TCP/IP Networking- Mahbub Hassan, Raj Jain, PHI, 2005
2. Data Communications & Networking – B.A. Forouzan – 2nd
Edition – TMH
3. High Speed Networks and Internets- William Stallings, Pearson Education, 2002.
4. Data and Computer Communications, William Stallings, 7th
Edition., PEI.
5. The Internet and Its Protocols – AdrinFarrel, Elsevier, 2005.
Page 288
I Year II Semester
L P C
4 0 3
SYSTEM ON CHIP DESIGN
(ELECTIVE-IV)
UNIT-I: Introduction to the System Approach:
System Architecture, Components of the system, Hardware & Software, Processor Architectures,
Memory and Addressing. System level interconnection, An approach for SOC Design, System
Architecture and Complexity.
UNIT-II: Processors:
Introduction , Processor Selection for SOC, Basic concepts in Processor Architecture, Basic
concepts in Processor Micro Architecture, Basic elements in Instruction handling. Buffers:
minimizing Pipeline Delays, Branches, More Robust Processors, Vector Processors and Vector
Instructions extensions, VLIW Processors, Superscalar Processors.
UNIT-III: Memory Design for SOC:
Overview of SOC external memory, Internal Memory, Size, Scratchpads and Cache memory,
Cache Organization, Cache data, Write Policies, Strategies for line replacement at miss time,
Types of Cache, Split – I, and D – Caches, Multilevel Caches, Virtual to real translation , SOC
Memory System, Models of Simple Processor – memory interaction.
UNIT-IV: Interconnect Customization and Configuration:
Inter Connect Architectures, Bus: Basic Architectures, SOC Standard Buses , Analytic Bus
Models, Using the Bus model, Effects of Bus transactions and contention time. SOC
Customization: An overview, Customizing Instruction Processor, Reconfiguration Technologies,
Mapping design onto Reconfigurable devices, Instance- Specific design, Customizable Soft
Processor, Reconfiguration - overhead analysis and trade-off analysis on reconfigurable
Parallelism.
UNIT-V: Application Studies / Case Studies:
SOC Design approach, AES algorithms, Design and evaluation, Image compression – JPEG
compression.
TEXT BOOKS:
1. Computer System Design System-on-Chip - Michael J. Flynn and Wayne Luk, Wiely
India Pvt. Ltd.
2. ARM System on Chip Architecture – Steve Furber –2nd
Ed., 2000, Addison Wesley
Professional.
Page 289
REFERENCE BOOKS:
1. Design of System on a Chip: Devices and Components – Ricardo Reis, 1st Ed., 2004,
Springer
2. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded
Technology) – Jason Andrews – Newnes, BK and CDROM.
3. System on Chip Verification – Methodologies and Techniques –PrakashRashinkar, Peter
Paterson and Leena Singh L, 2001, Kluwer Academic Publishers.
Page 290
I Year II Semester
L P C
4 0 3
WIRELESS LANs AND PANs
(ELECTIVE-IV)
UNIT-I: Wireless System & Random Access Protocols
Introduction, First and Second Generation Cellular Systems, Cellular Communications from 1G
to 3G, Wireless 4G systems, The Wireless Spectrum; Random Access Methods: Pure ALOHA,
Slotted ALOHA, Carrier Sense Multiple Access (CSMA), Carrier Sense Multiple Access with
Collision Detection (CSMA/CD), Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA).
UNIT-II: Wireless LANs
Introduction, importance of Wireless LANs, WLAN Topologies, Transmission Techniques:
Wired Networks, Wireless Networks, comparison of wired and Wireless LANs; WLAN
Technologies: Infrared technology, UHF narrowband technology, Spread Spectrum technology
UNIT-III: The IEEE 802.11 Standard for Wireless LANs
Network Architecture, Physical layer, The Medium Access Control Layer; MAC Layer issues:
Hidden Terminal Problem, Reliability, Collision avoidance, Congestion avoidance, Congestion
control, Security, The IEEE 802.11e MAC protocol
UNIT-IV: Wireless PANs
Introduction, importance of Wireless PANs, The Bluetooth technology: history and applications,
technical overview, the Bluetooth specifications, piconet synchronization and Bluetooth clocks,
Master-Slave Switch; Bluetooth security; Enhancements to Bluetooth: Bluetooth interference
issues, Intra and Inter Piconet scheduling, Bridge selection, Traffic Engineering, QoS and
Dynamics Slot Assigment, Scatternet formation.
UNIT-V: The IEEE 802.15 working Group for WPANs
The IEEE 802.15.3, The IEEE 802.15.4, ZigBee Technology, ZigBee components and network
topologies, The IEEE 802.15.4 LR-WPAN Device architecture: Physical Layer, Data Link
Layer, The Network Layer, Applications; IEEE 802.15.3a Ultra wideband.
Page 291
TEXT BOOKS:
1. Ad Hoc and Sensor Networks, Carlos de MoraisCordeiro and Dharma PrakashAgrawal,
Worlds Scientific,2011.
2. Wireless Communications and Networking, Vijay K.Garg, Morgan Kaufmann
Publishers,2009.
REFERENCE BOOKS:
1. Wireless Networks-KavehPahlaram, Prashant Krishnamurthy, PHI, 2002.
2. Wireless Communication- Marks Ciampor, JeorgeOlenewa, Cengage Learning, 2007.
Page 292
I Year II Semester
L P C
4 0 3
MULTIMEDIA AND SIGNAL CODING
(ELECTIVE -IV)
UNIT-I:
Introduction to Multimedia: Multimedia, World Wide Web, Overview of Multimedia Tools,
Multimedia Authoring, Graphics/ Image Data Types, and File Formats.
Color in Image and Video: Color Science – Image Formation, Camera Systems, Gamma
Correction, Color Matching Functions, CIE Chromaticity Diagram, Color Monitor
Specifications, Outof- Gamut Colors, White Point Correction, XYZ to RGB Transform,
Transform with Gamma Correction, L*A*B* Color Model. Color Models in Images – RGB
Color Model for CRT Displays, Subtractive Color: CMY Color Model, Transformation from
RGB to CMY, Under Color Removal: CMYK System, Printer Gamuts, Color Models in Video –
Video Color Transforms, YUV Color Model, YIQ Color Model, Ycbcr Color Model.
UNIT-II:
Video Concepts: Types of Video Signals, Analog Video, Digital Video.
Audio Concepts: Digitization of Sound, Quantization and Transmission of Audio.
UNIT-III:
Compression Algorithms:
Lossless Compression Algorithms: Run Length Coding, Variable Length Coding, Arithmetic
Coding, Lossless JPEG, Image Compression.
Lossy Image Compression Algorithms: Transform Coding: KLT And DCT Coding, Wavelet
Based Coding.
Image Compression Standards: JPEG and JPEG2000.
UNIT-IV:
Video Compression Techniques: Introduction to Video Compression, Video Compression
Based on Motion Compensation, Search for Motion Vectors, H.261- Intra-Frame and Inter-
Frame Coding, Quantization, Encoder and Decoder, Overview of MPEG1 and MPEG2.
UNIT-V:
Audio Compression Techniques: ADPCM in Speech Coding, G.726 ADPCM, Vocoders –
Phase Insensitivity, Channel Vocoder, Formant Vocoder, Linear Predictive Coding, CELP,
Hybrid Excitation, Vocoders, MPEG Audio – MPEG Layers, MPEG Audio Strategy, MPEG
Audio Compression Algorithms, MPEG-2 AAC, MPEG-4 Audio.
TEXT BOOKS:
1. Fundamentals of Multimedia – Ze- Nian Li, Mark S. Drew, PHI, 2010.
2. Multimedia Signals & Systems – Mrinal Kr. Mandal Springer International Edition 1st
Edition, 2009
Page 293
REFERENCE BOOKS:
1. Multimedia Communication Systems – Techniques, Stds&Netwroks K.R. Rao, Zorans.
Bojkoric, Dragorad A.Milovanovic, 1st Edition, 2002.
2. Fundamentals of Multimedia Ze- Nian Li, Mark S.Drew, Pearson Education (LPE), 1st
Edition, 2009.
3. Multimedia Systems John F. KoegelBufond Pearson Education (LPE), 1st Edition, 2003.
4. Digital Video Processing – A. Murat Tekalp, PHI, 1996.
5. Video Processing and Communications – Yaowang, JornOstermann, Ya-QinZhang, Pearson,
2002.
Page 294
I Year II Semester
L P C
0 3 2
EMBEDDED SYSTEM DESIGN LABORATORY
• The Students are required to write the programs using C-Language according to the
Experiment requirements using RTOS Library Functions and macros ARM-926
developer kits and ARM-Cortex.
• The following experiments are required to develop the algorithms, flow diagrams,
source code and perform the compilation, execution and implement the same using
necessary hardware kits for verification. The programs developed for the
implementation should be at the level of an embedded system design.
• The students are required to perform at least SIX experiments from Part-I and
TWO experiments from Part-II.
List of Experiments:
Part-I: Experiments using ARM-926 with PERFECT RTOS
1. Register a new command in CLI.
2. Create a new Task.
3. Interrupt handling.
4. Allocate resource using semaphores.
5. Share resource using MUTEX.
6. Avoid deadlock using BANKER’S algorithm.
7. Synchronize two identical threads using MONITOR.
8. Reader’s Writer’s Problem for concurrent Tasks.
Part-II Experiments on ARM-CORTEX processor using any open source RTOS.
(Coo-Cox-Software-Platform)
1. Implement the interfacing of display with the ARM- CORTEX processor.
2. Interface ADC and DAC ports with the Input and Output sensitive devices.
3. Simulate the temperature DATA Logger with the SERIAL communication with PC.
4. Implement the developer board as a modem for data communication using serial port
communication between two PC’s.
Page 295
Lab Requirements:
Software:
(iii)Eclipse IDE for C and C++ (YAGARTO Eclipse IDE), Perfect RTOS Library,
COO-COX Software Platform, YAGARTO TOOLS, and TFTP SERVER.
(iv) LINUX Environment for the compilation using Eclipse IDE & Java with latest
version.
Hardware:
(iii) The development kits of ARM-926 Developer Kits and ARM-Cortex
Boards.
(iv) Serial Cables, Network Cables and recommended power supply for the
board.
Page 296
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
I&CS (Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 297
I Semester
II Semester
S. No. Name of the Subject L P C
1 Transducers and Sensors 4 - 3
2 Digital Control Systems 4 - 3
3 Fiber Optic Sensors and Devices 4 - 3
4 Digital System Design 4 - 3
5
Elective I
1. Adaptive Control Systems
2. Soft Computing Techniques
3. Cyber Security
4. Object Oriented Programming
4 - 3
6
Elective II
1. Fuzzy Based Control Systems
2. VLSI Technology and Design
3. Advanced Digital Signal Processing
4 - 3
7 Transducers & Instrumentation Lab - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Data Acquisition Systems 4 - 3
2 Bio-Medical Instrumentation 4 - 3
3 Process Control Instrumentation 4 - 3
4 Embedded System Design 4 - 3
5
Elective III
1. Non Linear and Optimal Control Systems
2. PC Based Instrumentation
3. DSP Processors & Architecture
4 - 3
6
Elective IV
1. EMI / EMC
2. Control and guidance systems
3. Analytical Instrumentation
4 - 3
7 Process Control Instrumentation Lab - 3 2
Total Credits 20
Page 298
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 299
I Year I Semester
L P C
4 0 3
TRANSDUCERS AND SENSORS
Unit – 1
Introduction: functional elements of an instrument, Generalized performance characteristics of
instruments – static characteristics, dynamic characteristics.
Zero order, first order, second order instruments – step response, ramp response and impulse
response. Response of general form of instruments to periodic input and to transient input
Experimental determination of measurement system parameters, loading effects under dynamic
conditions.
Unit – 2
Transducers for motion and dimensional measurements: Relative displacement, translation
and rotational resistive potentiometers, resistance strain guages, LVDT, synchros, capacitance
pickups. Piezo-electric transducers, electro-optical devices, nozzle – flapper transducers, digital
displacement transducers, ultrasonic transducers.
Magnetic and photoelectric pulse counting methods, relative acceleration measurements, seismic
acceleration pickups, calibration of vibration pickups.Gyroscopic sensors.
Unit – 3
TRANSDUCERS FOR FORCE MEASUREMENT: Bonded strain guage transducers,
photoelectric transducers, variable reluctance pickup, torque measurement dynamometers.
TRANSDUCERS FOR FLOW MEASUREMENT: Hot wire and hot-film anemometers,
electromagnetic flow meters, laser dopplervelocimeter.
TRANSDUCERS FOR PRESSURE MEASUREMENT: Manometers, elastic transducers,
liquid systems, gas systems, very high pressure transducers. Thermal conductivity guages,
ionisationguages, microphone.
Unit – 4
TRANSDUCERS FOR TEMPERATURE MEASUREMENT: Thermal expansion methods,
thermometers (liquid in glass), pressure thermometers, Thermocouples. Materials configuration
and techniques.Resistance thermometers, Thermistors, junction semiconductors.Sensors,
Radiation methods.Optical pyrometers. Dynamic response of temperature sensors heat flux
sensors. Transducers for liquid level measurement, humidity, silicon and quartz sensors, fibre
optic sensors.
Page 300
Unit –5
Smart sensors: Introduction, primary sensors, converters, compensation. Recent trends in sensor
technology – film sensors, semi conductor IC technology, MEMS, Nano-sensors.
Text Book:
1. Doebelin, E.O., “Measurement systems – Application and Design”, McGraw Hill. 4 th
Ed.
2. D. Patranabis, “Sensors and Transducers”, PHI, 2nd
Edition.
Reference:
1. Instrumentation Measurement & Analysis, by B.C. Nakra, K.K. Choudry, (TMH)
2. Transducers and Instrumentation, by D.V.S. Murthy (PHI)
Page 301
I Year I Semester
L P C
4 0 3
DIGITAL CONTROL SYSTEMS
UNIT –I:
Sampling and Reconstruction:
Introduction, sample and hold operations, Sampling theorem, Reconstruction of original sampled
signal to continuous-time signal.
The Z – Transforms:
Introduction, Linear difference equations, pulse response, Z – transforms, Theorems of Z –
Transforms, the inverse Z – transforms, Modified Z- Transforms.
Z-Plane Analysis of Discrete-Time Control System:
Z-Transform method for solving difference equations; Pulse transforms function, block diagram
analysis of sampled – data systems, mapping between s-plane and z-plane: Primary strips and
Complementary Strips.
UNIT –II:
State Space Analysis:
State Space Representation of discrete time systems, Pulse Transfer Function Matrix solving
discrete time state space equations, State transition matrix and its Properties, Methods for
Computation of State Transition Matrix, Discretization of continuous time state – space
equations
UNIT –III:
Controllability and Observability:
Concepts of Controllability and Observability, Tests for controllability and Observability,
Duality between Controllability and Observability, Controllability and Observability conditions
for Pulse Transfer Function.
Stability Analysis:
Stability Analysis of closed loop systems in the Z-Plane, Jury stablility test – Stability Analysis
by use of the Bilinear Transformation and Routh Stability criterion, Stability analysis using
Liapunov theorems.
Page 302
UNIT –IV:
Design of Discrete Time Control System by Conventional Methods:
Design of digital control based on the frequency response method – Bilinear Transformation and
Design procedure in the W-plane, Lead, Lag and Lead-Lag compensators and digital PID
controllers. Design digital control through deadbeat response method.
UNIT –V:
State Feedback Controllers and Observers:
Design of state feedback controller through pole placement – Necessary and sufficient
conditions, Ackerman’s formula, State Observers – Full order and Reduced order observers.
Introduction to Kalman filters, State estimation through Kalman filters, introduction to adaptive
controls.
TEXT BOOKS:
1. K. Ogata - “Discrete-Time Control systems” - Pearson Education/PHI, 2nd
Edition.
2. M.Gopal - “Digital Control and State Variable Methods”- TMH
REFERENCE BOOKS:
1. Kuo - “Digital Control Systems”- Oxford University Press, 2nd
Edition, 2003.
2. M. Gopal - “Digital Control Engineering”.
Page 303
I Year I Semester
L P C
4 0 3
FIBRE OPTIC SENSORS AND DEVICES
Unit –1
Optical Sources and Detectors: Light-emitting diode: Principles, Structures, LED
characteristics, Modulation of LED.
Lasers: Principles, Laser diode structures and radiation pattern, Laser characteristics, Modulation
of Semiconductor Laser. Photo detectors: Principles, Quantum efficiency, Responsitivity of
P.I.N photodiode, and Avalanche photodiode.
Unit – 2
Optical Fiber Sensors and Devices: Overview of fibre optic sensors - advantages over
conventional sensors, broadband classification.
Intensity Modulated Optical Fibre Sensors: Introduction, intensity modulation through light
interruption shutter/ schlieren multimode fibre optic sensors - reflective fibre optic sensors,
evanescent wave fibre sensors -microbend optical fibre sensors - fibre optic refractometers,
intensity modulated fibre optic thermometers, distributed sensing with fibre optics.
Unit – 3
Interferometric Optical Fibre Sensors: Introduction, basic principles of interferometric optical
fibre sensors, components and applications of interferometric sensors.
Fused Single Mode Optical Fibre Couplers: Introduction, physical principles(coupling
coefficient) polarization effect, experimental properties, theoretical modelling, and comparison
with experiment.
Unit-4
Single Mode All Fibre Components: Introduction, directional couplers, polarizes, polarization
splitters polarization controllers, optical isolators, single mode fibre filters wave length
multiplexers and demultiplexers, switches and intensity modulators, phase and frequency
modulators.
Fibre Optic Sensor Multiplexing: Introduction, general topological configuration, and
incoherent and coherent detection.
Unit – 5
Signal Processing in MonomodeFibre Optic Sensor Systems: Introduction, Transduction
mechanisms, Optical Signal Processing, Electronic Processing.
Text Books:
1. Optical Fiber Communications – Gerd Keiser, 3 rd Ed. McGraw Hill.
2. Fundamentals of Fibre Optics in Telecommunication and Sensor Systems - Bishnu P PAL
Wiley Eastern Ltd. (1994).
Reference:
Optical Fiber Communications and Sensors – Dr. M. Arumugam.
Page 304
I Year I Semester
L P C
4 0 3
DIGITAL SYSTEM DESIGN
UNIT-I: Minimization Procedures and CAMP Algorithm:
Review on minimization of switching functions using tabular methods, k-map, QM algorithm,
CAMP-I algorithm, Phase-I: Determination of Adjacencies, DA, CSC, SSMs and EPCs,, CAMP-
I algorithm, Phase-II: Passport checking, Determination of SPC, CAMP-II algorithm:
Determination of solution cube, Cube based operations, determination of selected cubes are
wholly within the given switching function or not, Introduction to cube based algorithms.
UNIT-II: PLA Design, Minimization and Folding Algorithms:
Introduction to PLDs, basic configurations and advantages of PLDs, PLA-Introduction, Block
diagram of PLA, size of PLA, PLA design aspects, PLA minimization algorithm(IISc algorithm),
PLA folding algorithm(COMPACT algorithm)-Illustration of algorithms with suitable examples.
UNIT -III: Design of Large Scale Digital Systems:
Algorithmic state machine charts-Introduction, Derivation of SM Charts, Realization of SM
Chart, control implementation, control unit design, data processor design, ROM design, PAL
design aspects, digital system design approaches using CPLDs, FPGAs and ASICs.
UNIT-IV: Fault Diagnosis in Combinational Circuits:
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.
UNIT-V: Fault Diagnosis in Sequential Circuits:
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd
Edition, 2001, TMH
3. Digital system Design using PLDd-Lala
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th
Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
Page 305
I Year I Semester
L P C
4 0 3
ADAPTIVE CONTROL SYSTEMS
( ELECTIVE-I)
Unit-1.
Introduction: Definitions, History of adaptive Control, Essential aspects of adaptive
control, Classification of adaptive control system: Feedback adaptive controllers, Feed
forward adaptive controllers, Why adaptive control?
Unit-2:
Model Reference Adaptive System: Different configuration of model reference adaptive
systems; classification of MRAS, Mathematical description, and Equivalent
representation as a nonlinear time-varying system, direct and indirect MRAS.
Unit-3.
Analysis and Design of Model Reference Adaptive Systems: Model reference control
with local parametric optimization (Gradient method), MIT rule, MRAS for a first order
system, MRAS based on Lyapunov stability theory, Design of a first order MRAS based
on stability theory, Hyperstability approach, Monopoli's augmented error approach.
Unit-4:
Self Tuning Regulators: Introduction: The basic idea; process models, disturbance
models, General linear difference equation models, model simplification, Different
approaches to self-tuning, Recursive Parameter Estimation Methods: The RLS method,
extended Least squares, Recursive instrumental variable method; U-D factorization,
Covariance resulting, variable data forgetting. Estimation accuracy, Direct and Indirect
Self-tuning regulators, Clarke and Gawthrop's Self tuning Controller, Pole Placement
approach to self tuning control; Connection between MRAS and STR.
Unit 5:
Gain Scheduling: Introduction, The Principal, Design of Gain Scheduling Regulators,
Nonlinear transformations, Applications of gain scheduling.
Alternatives to Adaptive Control: Why not Adaptive Control? Robust High gain feedback
control, Variable Structure schemes,Practical aspects, application and Perspectives on adaptive
control.
Page 306
References Books
1. I. B Landau, Adaptive Control - The Model Reference Approach, New York; Marcel
Dekker, 1979.
2. K. J. Astrom and B. Wittenmark, Adaptive Control, Addison Wesley Publication
Company, 1989.
3. B. Roffel, P. J. Vermeer, P. A. Chin, Simulation and Implementation of self Tuning
Controllers, Prentice-Hall, Englewood cliffs, NJ, 1989.
4. R. Isermann, K. Lashmann and D. Marko, Adaptive Control Systems, Printice-Hall
International (UK) Ltd. 1992.
5. K. S. Narendra and A. M. Annaswamy, Stable Adaptive Systems
Page 307
I Year I Semester
L P C
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -I)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach, Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control, Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear time delay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
Page 308
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 309
I Year I Semester
L P C
4 0 3
CYBER SECURITY
(ELECTIVE – I)
Page 310
I Year I Semester
L P C
4 0 3
OBJECT ORIENTED PROGRAMMING
(ELECTIVE-I)
Objective: Implementing programs for user interface and application development using core
java principles
UNIT I:
Objective: Focus on object oriented concepts and java program structure and its installation
Introduction to OOP
Introduction, Need of Object Oriented Programming, Principles of Object Oriented Languages,
Procedural languages Vs OOP, Applications of OOP, History of JAVA, Java Virtual Machine,
Java Features, Installation of JDK1.6
UNIT II:
Objective: Comprehension of java programming constructs, control structures in Java
Programming Constructs
Variables , Primitive Datatypes, Identifiers- Naming Coventions, Keywords, Literals, Operators-
Binary,Unary and ternary, Expressions, Precedence rules and Associativity, Primitive Type
Conversion and Casting, Flow of control-Branching,Conditional, loops.,
Classes and Objects- classes, Objects, Creating Objects, Methods, constructors-Constructor
overloading, Garbage collector, Class variable and Methods-Static keyword, this keyword,
Arrays, Command line arguments
UNIT III:
Objective: Implementing Object oriented constructs such as various class hierarchies,
interfaces and exception handling
Inheritance: Types of Inheritance, Deriving classes using extends keyword, Method
overloading, super keyword, final keyword, Abstract class
Interfaces, Packages and Enumeration: Interface-Extending interface, Interface Vs Abstract
classes, Packages-Creating packages , using Packages, Access protection, java.lang package
Exceptions & Assertions - Introduction, Exception handling techniques-try...catch, throw,
throws, finally block, user defined exception, Assertions
UNIT IV:
Objective: Understanding of Thread concepts and I/O in Java
MultiThreading :java.lang.Thread, The main Thread, Creation of new threads, Thread priority,
Multithreading, Syncronization, suspending and Resuming threads, Communication between
Threads
Input/Output: reading and writing data, java.io package
Page 311
UNIT V:
Objective: Being able to build dynamic user interfaces using applets and Event handling in
java
Applets- Applet class, Applet structure, An Example Applet Program, Applet Life Cycle,
paint(),update() and repaint()
Event Handling -Introduction, Event Delegation Model, java.awt.event Description, Event
Listeners, Adapter classes, Inner classes
UNIT VI:
Objective: Understanding of various components of Java AWT and Swing and writing code
snippets using them
Abstract Window Toolkit
Why AWT?, java.awt package, Components and Containers, Button, Label, Checkbox, Radio
buttons, List boxes, Choice boxes, Text field and Text area, container classes, Layouts, Menu,
Scroll bar
Swing:
Introduction , JFrame, JApplet, JPanel, Components in swings, Layout Managers, JList and
JScroll Pane, Split Pane, JTabbedPane, Dialog Box
Text Books:
1. The Complete Refernce Java, 8ed, Herbert Schildt, TMH
2. Programming in JAVA, Sachin Malhotra, Saurabhchoudhary, Oxford.
3. JAVA for Beginners, 4e, Joyce Farrell, Ankit R. Bhavsar, Cengage Learning.
4. Object oriented programming with JAVA, Essentials and Applications, Raj Kumar
Bhuyya, Selvi, Chu TMH
5. Introduction to Java rogramming, 7th
ed, Y Daniel Liang, Pearson
Reference Books:
1. JAVA Programming, K.Rajkumar.Pearson
2. Core JAVA, Black Book, NageswaraRao, Wiley, Dream Tech
3. Core JAVA for Beginners, RashmiKanta Das, Vikas.
4. Object Oriented Programming through JAVA , P Radha Krishna , University Press.
Page 312
I Year I Semester
L P C
4 0 3
FUZZY BASED CONTROL SYSTEMS
(ELECTIVE-II)
Unit -1
Introduction: Motivation, Fuzzy Systems, Fuzzy control from an industrial perspective,
Uncertainty and Imprecision, Uncertainty in information, Chance Versus Ambiguity, The
mathematics of fuzzy control.
Unit -II
Classical sets and fuzzy sets: Vagueness, Fuzzy set theory versus Probability theory,
Operation and properties of classical and fuzzy sets.Classical relations and fuzzy relations:
Cartesian Product, Crisp relations, Fuzzy relations,Operations on fuzzy relations, Various types
of binary fuzzy relations, Fuzzy relationequations, The extension principle and its applications,
Tolerance and equivalence relations,Crisp equivalence relation, Crisp tolerance relation, Fuzzy
tolerance and equivalencerelation, Value assignments.
Unit -III
Fuzzy logic and Approximate reasoning: Introduction, Linguistic variables, Fuzzy logic:
Truth-values and truth tables in fuzzy logic, Fuzzy propositions. Approximate reasoning:
Categorical, qualitative, syllogistic, dispositional reasoning, fuzzy If - then statements,
Inference rules, The compositional rule of inference, representing a set of rule, Properties of
a set of rule.
Unit -IV
Fuzzy knowledge based controllers (FKBC) design parameters: Introduction, Structure of a
FKBC, Fuzzification and defuzzification module, Rule base, Choice of variable and contents
of rules, derivation of rules, data base, choice of membership function and scaling factors,
choice of fuzzification and defuzzification procedure, various methods.
Unit -V
Adaptive fuzzy control: Introduction, Design and performance evaluation, the main
approaches to design self-organizing controller, Model based controllers.
Neuro-fuzzy and fuzzy-neural control systems: Adaptive fuzzy systems, optimising the
membership functions and the rule base of fuzzy logic controllers using neural networks,
fuzzy transfer functions in neural networks, elements of evolutionary computation, case
studies.
Page 313
Reference Books
1. D. Drainkov, H. Hellendoorn and M. Reinfrank, An Introduction to Fuzzy Control,
Narosa Publishing House, 1993.
2. T. J. Ross, Fuzzy Logic with Engineering Applications, McGraw Hill, Inc 1995.
3. H. J. Zimmermann, Fuzzy set theory and its applications, second edition, Allied
Publishers limited, New Delhi, 1996.
4. T. Terano, K. Asai and M. Sugeno, Fuzzy systems theory and its application, Academic
Press, 1992.
Page 314
I Year I Semester
L P C
4 0 3
VLSI TECHNOLOGY AND DESIGN
(ELECTIVE-II)
UNIT-I:
VLSI Technology: Fundamentals and applications, IC production process, semiconductor
processes, design rules and process parameters, layout techniques and process parameters.
VLSI Design: Electronic design automation concept, ASIC and FPGA design flows, SOC
designs, design technologies: combinational design techniques, sequential design techniques,
state machine logic design techniques and design issues.
UNIT-II:
CMOS VLSI Design: MOSTechnology and fabrication process of pMOS, nMOS, CMOS and
BiCMOS technologies, comparison of different processes.
Building Blocks of a VLSI circuit: Computer architecture, memory architectures,
communication interfaces, mixed signal interfaces.
VLSI Design Issues: Design process, design for testability, technology options, power
calculations, package selection, clock mechanisms, mixed signal design.
UNIT-III:
Basic electrical properties of MOS and BiCMOS circuits, MOS and BiCMOS circuit design
processes, Basic circuit concepts, scaling of MOS circuits-qualitatitive and quantitative analysis
with proper illustrations and necessary derivations of expressions.
UNIT-IV:
Subsystem Design and Layout: Some architectural issues, switch logic, gate logic, examples of
structured design (combinational logic), some clocked sequential circuits, other system
considerations.
Subsystem Design Processes: Some general considerations and an illustration of design
processes, design of an ALU subsystem.
UNIT-V:
Floor Planning: Introduction, Floor planning methods, off-chip connections.
Architecture Design: Introduction, Register-Transfer design, high-level synthesis, architectures
for low power, architecture testing.
Chip Design: Introduction and design methodologies.
Page 315
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A. Pucknell,
SholehEshraghian, 2005, PHI Publications.
2. Modern VLSI Design-Wayne Wolf, 3rd
Ed., 1997, Pearson Education.
3. VLSI Design-Dr.K.V.K.K.Prasad, KattulaShyamala, Kogent Learning Solutions Inc.,
2012.
REFERENCE BOOKS:
1. VLSI Design Technologies for Analog and Digital Circuits, Randall L.Geiger, Phillip
E.Allen, Noel R.Strader, TMH Publications, 2010.
2. Introduction to VLSI Systems: A Logic, Circuit and System Perspective- Ming-BO Lin,
CRC Press, 2011.
3. Principals of CMOS VLSI Design-N.H.E Weste, K. Eshraghian, 2nd
Edition, Addison
Wesley.
Page 316
I Year I Semester
L P C
4 0 3
ADVANCED DIGITAL SIGNAL PROCESSING
(ELECTIVE – II)
UNIT –I:
Review of DFT, FFT, IIR Filters and FIR Filters:
Multi Rate Signal Processing: Introduction, Decimation by a factor D, Interpolation by a
factor I, Sampling rate conversion by a rational factor I/D, Multistage Implementation of
Sampling Rate Conversion, Filter design & Implementation for sampling rate conversion.
UNIT –II:
Applications of Multi Rate Signal Processing:
Design of Phase Shifters, Interfacing of Digital Systems with Different Sampling Rates,
Implementation of Narrow Band Low Pass Filters, Implementation of Digital Filter Banks,
Sub-band Coding of Speech Signals, Quadrature Mirror Filters, Trans-multiplexers, Over
Sampling A/D and D/A Conversion.
UNIT -III:
Non-Parametric Methods of Power Spectral Estimation: Estimation of spectra from finite
duration observation of signals, Non-parametric Methods: Bartlett, Welch & Blackman-
Tukey methods, Comparison of all Non-Parametric methods
UNIT –IV:
Implementation of Digital Filters:
Introduction to filter structures (IIR & FIR), Frequency sampling structures of FIR, Lattice
structures, Forward prediction error, Backward prediction error, Reflection coefficients for
lattice realization, Implementation of lattice structures for IIR filters, Advantages of lattice
structures.
UNIT –V:
Parametric Methods of Power Spectrum Estimation: Autocorrelation & Its
Properties,Relation between auto correlation & model parameters, AR Models - Yule-Walker
& Burg Methods, MA & ARMA models for power spectrum estimation, Finite word length
effect in IIR digital Filters – Finite word-length effects in FFT algorithms.
Page 317
TEXT BOOKS:
1. Digital Signal Processing: Principles, Algorithms & Applications - J.G.Proakis& D. G.
Manolakis, 4th
Ed., PHI.
2. Discrete Time Signal Processing - Alan V Oppenheim & R. W Schaffer, PHI.
3. DSP – A Practical Approach – Emmanuel C. Ifeacher, Barrie. W. Jervis, 2 Ed., Pearson
Education.
REFERENCE BOOKS:
1. Modern Spectral Estimation: Theory & Application – S. M .Kay, 1988, PHI.
2. Multi Rate Systems and Filter Banks – P.P.Vaidyanathan – Pearson Education.
3. Digital Signal Processing – S.Salivahanan, A.Vallavaraj, C.Gnanapriya, 2000,TMH
4. Digital Spectral Analysis – Jr. Marple
Page 318
I Year I Semester
L P C
0 3 2
TRANSDUCERS & INSTRUMENTATION LABORATORY
• The students are required to perform the following experiments using
necessary software tools and hardware equipment.
• The simulated results should be analyzed with appropriate procedures.
• The students are required to develop the necessary algorithms, flow
diagrams, source code and result description in case of software experiments.
• The students are required to analyze the hardware experiments with relevant
applications.
List of Experiments:
PART-A
1. To determine the variation of Percent error of potentiometer using MATLAB.
2. To find the step response, Impulse response, Frequency response of First order and
second order Instruments using MATLAB.
3. To find the variation of Gauge factor of a strain gauge with Poisson’s Ratio using
MATLAB.
4. Simulation of PID Controller using Simulink.
5. Simulation of a digital control system using Simulink.
PART-B
1. LVDT Characteristics
2. Measurement of weight using Load cell
3. Measurement of Pressure using Strain Gauge
4. Temperature measurement using Thermistor, Thermocouple, RTD.
5. Study of PID Controller Characteristics using Temperature Process Controller
6. Study of PID Controller Characteristics using Level Process Controller
7. Study of PID Controller Characteristics using PressureProcess Controller
8. Study of PLC based controllers
Page 319
I Year II Semester
L P C
4 0 3
DATA ACQUISITION SYSTEMS
UNIT-1
INTRODUCTION: Objective of a DAS, single channel DAS, Multi-channel DAS,Components
used in DAS– Converter Characteristics-Resolution-Non-linearity,settling time, Monotonicity.
UNIT-2
ANALOG TO DIGITAL CONVERTERS (ADCS): Classification of A/D
converters.Parallelfeed back – Successive approximation – Ramp comparison – Dual slope
integration – Voltage to frequency – Voltage to Time – Logarithmic types of ADCS.
NON-LINEAR DATA CONVERTERS (NDC): Basic NDC configurations – Some common
NDACS and NADCS – Programmable non-linear ADCS – NADC using optimal sized ROM –
High speed hybrid NADC – PLS based NADC – Switched capacitor NDCS.
ADC APPLICATIONS: Data Acquisition systems – Digital signal processing systems – PCM
voice communication systems – Test and measurement instruments – Electronic weighing
machines.
UNIT-3
DIGITAL TO ANALOG CONVERTERS (DACS): Principles and design of – Parallel R–
2R, Weighted resistor, inverted ladder, D/A decoding – Codes other than ordinary binary.
DATA CONVERTER APPLICATIONS: DAC applications – Digitally programmable V/I
sources – Arbitrary waveform generators – Digitally programmable gain amplifiers – Analog
multipliers/ dividers – Analog delay lines.
UNIT-4
Monolithic data converters: typical study of monolithic DACS and ADCS. Interfacing of
DACS and ADCS to a µP.
UNIT-5
Error budget of DACS and ADCS: Error sources, error reduction and noise reduction
techniques in DAS. Error budget analysis of DAS, case study of a DAC and an ADC.
Page 320
TEXT BOOKS:
1. Electronic data converters fundamentals and applications – Dinesh K. Anvekar, B.S. Sonde –
Tata McGraw Hill.
REFERENCES:
1. Electronic Analog/ Digital conversions – Hermann Schmid – Tata McGraw Hill.
2. E.R. Hanateck, User’s Handbook of D/A and A/D converters - Wiley
3. Electronic instrumentation by HS Kalsi- TMH 2 ndEdition, 2004.
4. Data converters by G.B. Clayton
Page 321
I Year II Semester
L P C
4 0 3
BIO-MEDICAL INSTRUMENTATION
UNIT-I
Sources of Bioelectric potentials and Electrodes: Resisting and Action Potentials, Propagation
of Action Potentials, The Bioelectric Potentials. Electrodes: Electrode theory, Bio Potential
Electrodes, Biochemical Transducers, introduction to bio-medical signals.
UNIT-II
The Cardiovascular System: The Heart and Cardiovascular System, The Heart, Blood Pressure,
Characteristics of Blood Flow, Heart Sounds, Cardio Vascular Measurements,
Electrocardiography, Measurement of Blood Pressure, Measurement of Blood Flow and Cardiac
output, Plethysmography, Measurement of Heart Sounds, Event detection, PQRS & T-Waves in
ECG, the first & second Heart beats, ECG rhythm analysis, the di-crotic notch in the carotid
pulse detection of events and waves, analysis of exercise ECG, analysis of event related
potentials, correlation analysis of EEG channels, correlation of muscular contraction.
UNIT- III
Patient Care & Monitory and Measurements in Respiratory System: The elements of
Intensive Care Monitory, Diagnosis, Calibration and reparability of Patient Monitoring
equipment, other instrumentation for monitoring patients, pace makers, defibrillators, the
physiology of respiratory system, tests and instrumentation for mechanics of breathing,
respiratory theory equipment, analysis of respiration.
UNIT-IV
Bio telemetry and Instrumentation for the clinical laboratory Introduction to bio telemetry,
Physiological parameters adaptable to bio telemetry, the components of bio telemetry system,
implantable units, applications of telemetry in patient care – The blood, tests on blood cells,
chemical test, automation of chemical tests.
UNIT-V
X-ray and radioisotope instrumentation and electrical safety of medical equipment:
Generation of Ionizing radiation, instrumentation for diagnostic X-rays, special techniques,
instrumentation for the medical use of radioisotopes, radiation therapy - Physiological effects of
electrical current, shock Hazards from electrical equipment, Methods of accident prevention,
Modern Imaging Systems: Tomography, Magnetic resonance Imaging System, Ultrasonic
Imaging System, Medical Thermography.
Page 322
TEXT BOOK:
1. Biomedical Instrumentation and Measurements – C. Cromwell, F.J. Weibell,
E.A.Pfeiffer – Pearson education.
2. Biomedical signal analysis – Rangaraj, M. Rangayya – Wiley Inter science – John
willey& Sons Inc.
Reference:
1. Hand Book of Bio-Medical Instrumentation – R.S. Khandpur, (TMH)
2. Introduction to Bio-Medical Engineering – Domach, (Pearson)
3. Introduction to Bio-Medical Equipment Technology – Cart, (Pearson)
Page 323
I Year II Semester
L P C
4 0 3
PROCESS CONTOL INSTRUMENTATION
UNIT-1
P & ID symbols. Process characteristics: Process load, Process lag, self-regulation.
Control system parameters: control lag, dead time, cycling.
Discontinuous controller modes: two position, multi position, floating control modes.
Continuous controller modes: Mathematical representation and description of P, I, D controller
modes. Composite control modes: Mathematical representation and description of PI, PD, PID
control modes. Response of control modes to linear, step and square wave error signals.
UNIT-2
Electronic Controller mode implementation: Designing of P, PI, PD, PID using OP-
amplifiers.
UNIT-3
Pneumatic controller mode implementation: Implementation of P, PI, PD, PID using flapper –
nozzle system.
UNIT-4
Final control: Actuators – Electrical & Pneumatic. Control Valves – Quick opening, linear and
equal percentage control valves, valve sizing. I to P, P to I converters.
UNIT-5
Programmable controllers & Digital Controllers:
Programmable controllers:Ladder Diagram, Programmable controller program from the ladder
diagram of simple applications.
Digital Controllers: Data logging, supervisory control, computer based controller.
Text Book:
1. Process control Instrumentation Technology by Curtis Johnson, 4 th Edition – PHI, Dec, 2000.
Reference Books:
1. Principles of Process control by D. Patranabis- TMH 2 nd Edition, 1996
2. P. Harriott, process control, Tata MoGraw – Hill publishing Co., Ltd., New Delhi, 1984.
Page 324
I Year II Semester
L P C
4 0 3
EMBEDDED SYSTEM DESIGN
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
Page 325
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
Page 326
I Year II Semester
L P C
4 0 3
NON-LINEAR & OPTIMAL CONTROL SYSTEMS
(ELECTIVE-IV)
Non-linear control systems
Unit – I
Introduction to Non-Linear Control systems.
Describing Functions, Describing function Analysis of Non-Linear Control Systems.
Unit – II
Introduction to Phase plane analysis, Methods for constructing Trajectories, singular points,
phase-plane analysis of linear control systems and Non-linear control systems.
Introduction to liapunov stability analysis, second method of liapunov, stability analysis of linear
systems, stability analysis of nonlinear systems (Variable gradient method and Krosovskii’s
method)
Optimal Control systems
Unit –III
Introduction to optimal control system, Formulation of optimal Control problem –
Characteristics of the plant, requirements made upon the plant, Nature of information about the
plant supplied to the controller.
Calculus of variations – fixed end problem and variable end problems
Unit – IV
Pontragin’s minimum/maximum principle, Hamilton Jacobii’s approach, Matrix-Riccati
equations..
Unit – V
Dynamic Programming,
Text Books:
1. Modern Control Engineering – Ogata.K. Prentice Hall of India, Eastern Economy Edition,
1986.
2. Modern Control System Theory – M. Gopal, Wiley Eastern, Second edition, 1993.
Page 327
I Year II Semester
L P C
4 0 3
PC BASED INSTRUMENTATION
(ELECTIVE – III)
Page 328
I Year II Semester
L P C
4 0 3
DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
(ELECTIVE-III)
UNIT-I:
Introduction to Digital Signal Processing
Introduction, a Digital signal-processing system, the sampling process, discrete time sequences.
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-invariant
systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT-II:
Architectures for Programmable DSP Devices
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT-III:
Programmable Digital Signal Processors
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX Instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX Processors, Pipeline Operation of
TMS320C54XX Processors.
UNIT-IV:
Analog Devices Family of DSP Devices
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Black fin Processor - The Black fin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
Page 329
UNIT-V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach To Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. Embedded Signal Processing with the Micro Signal Architecture: Woon-SengGan, Sen M.
Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications-B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
3. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
4. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
Page 330
I Year II Semester
L P C
4 0 3
ELECTROMAGNETIC INTERFERENCE AND ELECTROMAGNETIC
COMPATIBILITY (EMI / EMC)
(ELECTIVE-IV)
UNIT -I:
Introduction, Natural and Nuclear Sources of EMI / EMC:
Electromagnetic environment, History, Concepts, Practical experiences and concerns, frequency
spectrum conservations, An overview of EMI / EMC, Natural and Nuclear sources of EMI.
UNIT -II:
EMI from Apparatus, Circuits and Open Area Test Sites:
Electromagnetic emissions, Noise from relays and switches, Non-linearities in circuits, passive
intermodulation, Cross talk in transmission lines, Transients in power supply lines,
Electromagnetic interference (EMI), Open area test sites and measurements.
UNIT -III:
Radiated and Conducted Interference Measurements and ESD:
Anechoic chamber, TEM cell, GH TEM Cell, Characterization of conduction currents / voltages,
Conducted EM noise on power lines, Conducted EMI from equipment, Immunity to conducted
EMI detectors and measurements, ESD, Electrical fast transients / bursts, Electrical surges.
UNIT -IV:
Grounding, Shielding, Bonding and EMI filters:
Principles and types of grounding, Shielding and bonding, Characterization of filters, Power
lines filter design.
UNIT -V:
Cables, Connectors, Components and EMC Standards:
EMI suppression cables, EMC connectors, EMC gaskets, Isolation transformers, optoisolators,
National / International EMC standards.
Page 331
TEXT BOOKS:
1. Engineering Electromagnetic Compatibility - Dr. V.P. Kodali, IEEEPublication, Printed
in India by S. Chand & Co. Ltd., New Delhi, 2000.
2. Electromagnetic Interference and Compatibility IMPACT series, IIT – Delhi, Modules 1
– 9.
REFERENCE BOOKS:
1. Introduction to Electromagnetic Compatibility - Ny, John Wiley, 1992, by C.R. Pal.
Page 332
I Year II Semester
L P C
4 0 3
CONTROL AND GUIDANCE SYSTEMS
(ELECTIVE-IV)
Unit – I
The Accuracy of Target Trackers: Introduction, some objectives with feedback, some general
concepts on accuracy, A tracker servo, Tracking accuracy in the absence of noise, The effect of
thermal noise, The effect of other inputs and disturbances, A self optimising servo.
Unit – II
Missile Servos & control Methods: Servo requirements, Stored cold gas servos, Hot gas servos,
Ram air servos, Hydraulic servos, Electric servos with d.c. motors, Other electric servos, Some
tentative conclusions.
Missile control Methods: Introduction, Why not manoeuvre by banking?, Roll control,
Aerodynamic lateral control, Aerodynamic polar control versus cartesian control, Thrust vector
control, Methods of thrust vectoring.
Unit – III
Aerodynamic Derivatives and Aerodynamic Transfer Functions: Notation and conventions,
Euler’s equations of motion for a rigid body, Trajectory considerations, Control surface
conventions, Aerodynamic derivatives, Aerodynamic transfer functions, Altitude and speed
conversion factors, Aerodynamic derivatives with TVC.
Unit – IV
Missile Instruments: Introduction, Elementary theory of gyroscopes, Free or position gyros,
Rate or constrained gyros, Accelerometers, Resolvers, Altimeters.
Line of Sight Guidance Loops: The effect of target and missile motion on missile “g”
requirements, Types of LOS systems, Kinematic closure and stability of the guidance loop, The
concept of feed forward terms, Phasing error and orientation difficulties, The effect of a digital
computer inside guidance loop, Some numerical examples on the estimation of guidance
accuracy, Some general conclusions on accuracy.
Unit – V
Homing Heads and Some Associated Stability Problems: Introduction, Homing head
requirements, Some electro-mechanical arrangements, The effect of radome aberration, Isolated
sight line and missile compensation.
Proportional Navigation and Homing Guidance Loops: Introduction, A particular case, The
mathematical model, A summary of previous work, The effect of a missile heading error, Miss
distance due to a target lateral acceleration, Miss distance die to angular noise, Miss distance due
to glint, Three dimensional homing, An integrated form of proportional navigation, Other
homing guidance laws.
Text Book:
Guided Weapon Control Systems by P. Garnell, Brassey’sDefence Publishers, New York.
Reference Book:
Guided Weapons by R.G. Lee et al., Brassey’sDefence Publishers.
Page 333
I Year II Semester
L P C
4 0 3
ANALYTYCAL INSTRUMENTATION
(ELECTIVE – IV)
Page 334
I Year II Semester
L P C
0 3 2
PROCESS CONTROL INSTRUMENTATION LABORATORY
OBJECTIVES:
To experimentally verify the process control concepts on the selected process control loops using
LabVIEW and Experimental Trainers.
OBJECTIVES:
Ability to understand and analyse process control engineering problems.
List of Experiments:
PART-A
Using Quanser DC Motor control hardware / Heating Ventilation & Airconditioning hardware
and LabVIEW
1. Mathematical Modeling and simulation
2. Qualitative PD Control
3. PD Control to Specifications
4. Qualitative PI Control
5. PI Control to Specifications
6. PID Controller Design
7. Stability analysis
8. Time domain analysis
9. Frequency domain analysis
10. Fuzzy controller design
11. Special control design
PART-B
1. Study of Process Control Training Plant and Compact Flow Control Unit
2. Characteristics of Pneumatically Actuated Control Valve
3. Level Control and Pressure Control in Process Control Training Plant
4. Design of ON/OFF Controller for the Temperature Process
5. PID Implementation Issues
6. Tuning of PID Controller for mathematically described processes
7. PID Enhancements ( Cascade and Feed-forward Control Schemes)
8. Design and Implementation of Multi-loop PI Controller on the Three-tank system
9. Analysis of Multi-input Multi-output system (Four-tank System)
10. Auto-tuning of PID Controller
Page 335
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
MICROWAVE & COMMUNICATION ENGINEERING
(Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 336
I Semester
II Semester
S. No. Name of the Subject L P C
1 Advanced Electro Magnetic Theory 4 - 3
2 Microwave Components & Measurements 4 - 3
3 Microwave Solid State Devices 4 - 3
4 Digital Data Communications 4 - 3
5
Elective I
1. Microwave Integrated Circuits
2. Advanced Digital Signal Processing
3. Detection & Estimation Theory
4 - 3
6
Elective II
1. Optical Communication Technology
2. Statistical Signal Processing
3. Soft Computing Techniques
4. Cyber Security
4 - 3
7 Microwave Measurements Lab - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Advanced Antenna Theory & Design 4 - 3
2 Phased Array Systems 4 - 3
3 Software Defined Radio 4 - 3
4 Wireless Communications & Networks 4 - 3
5
Elective III
1. Microwave Networks
2. EMI / EMC
3. Radio & Navigational Aids
4 - 3
6
Elective IV
1. Smart Antennas
2. RF Circuit Design
3. Radar Signal Processing
4 - 3
7 Antenna Simulation Laboratory - 3 2
Total Credits 20
Page 337
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 338
I Year I Semester
L P C
4 0 3
ADVANCED ELECTRO MAGNETIC THEORY
UNIT -I:
Fundamental Concepts:
Introduction, Basic Equations, constitutive relation ships, generalized current concepts, energy
and power, circuit concepts, complex quantities, complex equations, complex constitutive
parameters, complex power, A-C Characteristics of matter, A discussion of current, A-C
behavior circuit elements, Singularities of field.
UNIT -II:
Introduction of Waves:
Wave Equation, Waves in perfect dielectrics, Intrinsic wave constants, waves in lossy matter,
reflection of waves, transmission line concepts, waveguide concepts, resonator concepts,
radiation, and antenna concepts.
UNIT -III:
Some Theorems & Concepts:
Source concepts, duality, uniqueness, Image theory, Equivalence principle, fields in off space,
Induction theorem, reciprocity, Green’s functions, Integral equations, construction of solutions,
the radiation field.
UNIT -IV:
Plane Wave Functions:
Wave functions, Plane waves, rectangular waveguides, alternative mode sets, Rectangular cavity,
partially filled wave guide, dielectric- slab guide, surface guided waves, modal Expansions of
fields, currents in waveguides, Apertures in ground planes.
UNIT -V:
Perturbational and Variational Techniques:
Intriduction, perturbation of cavity walls, cavity material perturbations, waveguide perturbations,
stationary formulas for cavity, Ritz procedure, reaction concepts, starionary formulas for
waveguides,stationary formulas for impedance, stationary formulas for scattering,scattering by
dielectric obstacles, transmission through Apertures.
TEXT BOOKS:
1. ‘Time Harmonic Electromagnetis’ by R. F Harrington., McGrawhill, 1961
2. Electromagnetic wave and Radiating systems, 2nd
Edition, By E.C Jordan &K.G.
Balmain, Prentice hall India, Pvt. Ltd., New Delhi.
Page 339
REFERENCE BOOKS:
1. ‘Elements of Elentromagnetics, 4th
edition by M.N.O.Sadiku, Oxford UIniversity
Press,2001
2. ‘Advanced Engineering Electromagnetics ’ by C.A. Balmain, Wiley India, Pvt. Ltd.,
2005
Page 340
I Year I Semester
L P C
4 0 3
MICROWAVE COMPONENTS AND MEASUREMENTS
UNIT -I:
Microwave Circuits & Theorems:
Equation of Voltage and Currents, Impedance description of waveguide circuits, Fosters
reactance theorem, N-Port circuits, Two-port junctions, S-matrix formulation and properties,
Illustrative problems.
UNIT -II:
Impedance Matching:
Impedance matching Concepts, Quarter wave Transformers, Theory of small reflections, single
and multi sections, Binomial and Chebysheve Transformers.
UNIT -III:
Passive Microwave Components:
Introduction to Power dividers and couplers-T Junctions and Willkinson power dividers,
Analysis and Design of Directional Couplers- Bethehole, Multi hole Couplers, Quadrature
Hybrids, Faraday rotation, S-matrix of Directional Couplers and T-Junctions, Gyrator, Isolator,
Circulator- Applications.
UNIT -IV:
Microwave Measurements-I:
Measurement of Wavelength, Frequency and Impedance-Introduction, Equivalent circuit of
Cavity wave meters, Typical wave meters, resonant cavities, Methods of frequency
measurements-direct method - Interpolation method, Standard wave reflectors, Measurement of
reflection coefficient, Low, Medium, High VSWR measurements, Standing wave pattern,
Slotted Line section and its limitation, Impedance measurement techniques, Reflectometer.
UNIT -V:
Microwave Measurements-II:
Vector Network analyzer, Concept and description, Reflection and Transmission measurements,
magnitude and Phase, measurement of S- Parameters, SWR and Impedances measurements,
errors and corrections.
TEXT BOOKS:
1. ‘Foundations for microwave Engineering’ - R.E. Collin, McGrawhillKogakusha,Ltd,
International Student edition, 2nd
Edition.
2. Microwave Engineering - David. M. Pozar 3rd
Edition, John wiley& sons Inc, 1998.
Page 341
REFERENCE BOOKS:
1. Microwave Circuits and Passive Devices - M.L.Sisodia, G.S.Raghuvamsi, New Age
International Pub. Ltd, WEL-1995.
2. Microwave Measurements - E.I.Ginzton, Mcgraw Hill Book Comp, INC, 1957.
3. Microwave and Circuit design - Ganesh Prasad Srivastava, Vijaya Lakshmi guptha,
Eastern Economy Edition, Printice Hall of India Pvt. Ltd., New Delhi-2006.
Page 342
I Year I Semester
L P C
4 0 3
MICROWAVE SOLID STATE DEVICES
UNIT –I:
Varactor Diode: Equivalent circuit, static and dynamic figures of merit Manley Rowe power
relation, Parametric amplifiers, Up converter, Degeneration amplifiers, Varactor multipliers,
Charge storage capacitance.
UNIT –II:
Tunnel Diode:
Equivalent circuit, Tunnel diode stability, Tunnel diode amplifiers, Gunn devices: Volt amp.
Characteristics, Small signal, Nonlinear, large signal theory, Modes of operation of Gunn diode,
Gunn amplifiers-Gunn oscillators, Avalanche transit time MW diodes. Small signal theory,
Large signal operation, Noise.
UNIT –III:
PIN Diodes:
Description, the I-layer, Equivalent circuit behavior under reverse bias and forward bias, Diode
impedance, Materials, Applications.
UNIT –IV;
Schottky Barrier Diode:
Physics of Schottky barriers, Design of and performance of Schottky barrier diode applications,
IMPATT & TRAPATT diodes: Principles and applications as amplifiers and oscillators.
UNIT –V:
Microwave Transistor:
Wafer design. Equivalent circuit, Design compromises, Package design.
TEXT BOOKS:
1. Watson - “Microwave Semiconductor Devices and their applications”, McGraw Hill,
1969.
2. Sze. S.M, and Kwok K. Ng - “Physics of Semiconductor Devices”, John Weiley-3rd
Edition 2007.
REFERENCE:
1. Shurmer,H.V - “Microwave Semiconductors”, Wien Oldenbourg,1971.
Page 343
I Year I Semester
L P C
4 0 3
DIGITAL DATA COMMUNICATIONS
UNIT -I:
Digital Modulation Schemes:
BPSK, QPSK, 8PSK, 16PSK, 8QAM, 16QAM, DPSK – Methods, Band Width Efficiency,
Carrier Recovery, Clock Recovery.
UNIT -II:
Basic Concepts of Data Communications, Interfaces and Modems:
Data Communication Networks, Protocols and Standards, UART, USB, Line Configuration,
Topology, Transmission Modes, Digital Data Transmission, DTE-DCE interface, Categories of
Networks – TCP/IP Protocol suite and Comparison with OSI model.
UNIT -III:
Error Correction: Types of Errors, Vertical Redundancy Check (VRC), LRC, CRC, Checksum,
Error Correction using Hamming code
Data Link Control: Line Discipline, Flow Control, Error Control
Data Link Protocols: Asynchronous Protocols, Synchronous Protocols, Character Oriented
Protocols, Bit-Oriented Protocol, Link Access Procedures.
UNIT -IV:
Multiplexing: Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM),
Multiplexing Application, DSL.
Local Area Networks: Ethernet, Other Ether Networks, Token Bus, Token Ring, FDDI.
Metropolitan Area Networks: IEEE 802.6, SMDS
Switching: Circuit Switching, Packet Switching, Message Switching.
Networking and Interfacing Devices: Repeaters, Bridges, Routers, Gateway, Other Devices.
UNIT -V:
Multiple Access Techniques:
Frequency- Division Multiple Access (FDMA), Time - Division Multiple Access (TDMA), Code
- Division Multiple Access (CDMA), OFDM and OFDMA. Random Access, Aloha- Carrier
Sense Multiple Access (CSMA)- Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA), Controlled Access- Reservation- Polling- Token Passing, Channelization.
TEXT BOOKS:
1. Data Communication and Computer Networking - B. A.Forouzan, 2nd
Ed., 2003, TMH.
2. Advanced Electronic Communication Systems - W. Tomasi, 5th E
d., 2008, PEI.
Page 344
REFERENCE BOOKS:
1. Data Communications and Computer Networks - Prakash C. Gupta, 2006, PHI.
2. Data and Computer Communications - William Stallings, 8th
Ed., 2007, PHI.
3. Data Communication and Tele Processing Systems -T. Housely, 2nd
Ed, 2008, BSP.
4. Data Communications and Computer Networks- Brijendra Singh, 2nd
Ed., 2005, PHI.
Page 345
I Year I Semester
L P C
4 0 3
MICROWAVE INTEGRATED CIRCUITS
(ELECTIVE-I )
UNIT I
MIC Technology – Thick film and Thin film technology, Hybrid MIC’s, Monolithic MIC
technology.
UNIT II
Analysis of stripline and microstripline, Method of conformal Transformation, Characteristic
parameters of strip, Microstrip lines, Microstrip Circuit Design, Impedance transformers, Filters,
Lumped constant Microstrip circuits.
UNIT III
Coupled Microstrips and Directional couplers, Even and odd mode analysis, Theory of
couledmicrostrip Directional couplers, Calculations for a coupled pair of Microstrips, Branch
line couplers.
UNIT IV
Lumped Elements for MIC’s Design and fabrication of lumped elements, circuits using lumped
elements.
UNIT V
Nonreciprocal components for MIC’s Microstrip on Ferrimagnetic substrates, Microstrip
circulators. Isolators and phase shifters, Design of microstrip circuits – high power and low
power circuits.
TEXT BOOKS:
1. Gupta KC and Amarjit Singh - Microwave Integrated circuits, Wiley Eastern, 1974.
2. Leo Young - Advances in Microwaves, Academic Press.
REFERENCE BOOKS:
1. BharathiBhat,and S.K. Koul -“Stripline-like Transmission Lines for Microwave Integrated
Circuits, New Age International, 2007.
Page 346
I Year I Semester
L P C
4 0 3
ADVANCED DIGITAL SIGNAL PROCESSING
(ELECTIVE-I)
UNIT –I:
Review of DFT, FFT, IIR Filters and FIR Filters:
Multi Rate Signal Processing: Introduction, Decimation by a factor D, Interpolation by a
factor I, Sampling rate conversion by a rational factor I/D, Multistage Implementation of
Sampling Rate Conversion, Filter design & Implementation for sampling rate conversion.
UNIT –II:
Applications of Multi Rate Signal Processing:
Design of Phase Shifters, Interfacing of Digital Systems with Different Sampling Rates,
Implementation of Narrow Band Low Pass Filters, Implementation of Digital Filter Banks,
Sub-band Coding of Speech Signals, Quadrature Mirror Filters, Trans-multiplexers, Over
Sampling A/D and D/A Conversion.
UNIT -III:
Non-Parametric Methods of Power Spectral Estimation: Estimation of spectra from finite
duration observation of signals, Non-parametric Methods: Bartlett, Welch & Blackman-
Tukey methods, Comparison of all Non-Parametric methods
UNIT –IV:
Implementation of Digital Filters:
Introduction to filter structures (IIR & FIR), Frequency sampling structures of FIR, Lattice
structures, Forward prediction error, Backward prediction error, Reflection coefficients for
lattice realization, Implementation of lattice structures for IIR filters, Advantages of lattice
structures.
UNIT –V:
Parametric Methods of Power Spectrum Estimation: Autocorrelation & Its
Properties,Relation between auto correlation & model parameters, AR Models - Yule-Walker
& Burg Methods, MA & ARMA models for power spectrum estimation, Finite word length
effect in IIR digital Filters – Finite word-length effects in FFT algorithms.
TEXT BOOKS:
1. Digital Signal Processing: Principles, Algorithms & Applications - J.G.Proakis& D. G.
Manolakis, 4th
Ed., PHI.
2. Discrete Time Signal Processing - Alan V Oppenheim & R. W Schaffer, PHI.
3. DSP – A Practical Approach – Emmanuel C. Ifeacher, Barrie. W. Jervis, 2 Ed., Pearson
Education.
Page 347
REFERENCE BOOKS:
1. Modern Spectral Estimation: Theory & Application – S. M .Kay, 1988, PHI.
2. Multi Rate Systems and Filter Banks – P.P.Vaidyanathan – Pearson Education.
3. Digital Signal Processing – S.Salivahanan, A.Vallavaraj, C.Gnanapriya, 2000,TMH
4. Digital Spectral Analysis – Jr. Marple
Page 348
I Year I Semester
L P C
4 0 3
DETECTION AND ESTIMATION THEORY
(ELECTIVE-I)
UNIT –I:
Random Processes:
Discrete Linear Models, Markov Sequences and Processes, Point Processes, and Gaussian
Processes.
UNIT –II:
Detection Theory:
Basic Detection Problem, Maximum A posteriori Decision Rule, Minimum Probability of Error
Classifier, Bayes Decision Rule, Multiple-Class Problem (Bayes)- minimum probability error with
and without equal a priori probabilities, Neyman-Pearson Classifier, General Calculation of
Probability of Error, General Gaussian Problem, Composite Hypotheses.
UNIT –III:
Linear Minimum Mean-Square Error Filtering:
Linear Minimum Mean Squared Error Estimators, Nonlinear Minimum Mean Squared Error
Estimators. Innovations, Digital Wiener Filters with Stored Data, Real-time Digital Wiener
Filters, Kalman Filters.
UNIT –IV:
Statistics:
Measurements, Nonparametric Estimators of Probability Distribution and Density Functions, Point
Estimators of Parameters, Measures of the Quality of Estimators, Introduction to Interval
Estimates, Distribution of Estimators, Tests of Hypotheses, Simple Linear Regression, Multiple
Linear Regression.
UNIT –V:
Estimating the Parameters of Random Processes from Data:
Tests for Stationarity and Ergodicity, Model-free Estimation, Model-based Estimation of
Autocorrelation Functions, Power Special Density Functions.
TEXT BOOKS:
1. Random Signals: Detection, Estimation and Data Analysis - K. Sam Shanmugan& A.M.
Breipohl, Wiley India Pvt. Ltd, 2011.
2. Random Processes: Filtering, Estimation and Detection - Lonnie C. Ludeman, Wiley India
Pvt. Ltd., 2010.
Page 349
REFERENCE BOOKS:
1. Fundamentals of Statistical Signal Processing: Volume I Estimation Theory–
Steven.M.Kay, Prentice Hall, USA, 1998.
2. Fundamentals of Statistical Signal Processing: Volume I Detection Theory– Steven.M.Kay,
Prentice Hall, USA, 1998.
3. Introduction to Statistical Signal Processing with Applications - Srinath, Rajasekaran,
Viswanathan, 2003, PHI.
4. Statistical Signal Processing: Detection, Estimation and Time Series Analysis – Louis
L.Scharf, 1991, Addison Wesley.
5. Detection, Estimation and Modulation Theory: Part – I – Harry L. Van Trees, 2001, John
Wiley & Sons, USA.
6. Signal Processing: Discrete Spectral Analysis – Detection & Estimation – Mischa
Schwartz, Leonard Shaw, 1975, McGraw Hill.
Page 350
I Year I Semester
L P C
4 0 3
OPTICAL COMMUNICATIONS TECHNOLOGY
(ELECTIVE-II)
UNIT –I:
Signal propagation in Optical Fibers:
Geometrical Optics approach and Wave Theory approach, Loss and Bandwidth, Chromatic
Dispersion, Non Linear effects- Stimulated Brillouin and Stimulated Raman Scattering,
Propagation in a Non-Linear Medium, Self-Phase Modulation and Cross Phase Modulation,
Four Wave Mixing, Principle of Solitons.
UNIT –II:
Fiber Optic Components for Communication & Networking:
Couplers, Isolators and Circulators, Multiplexers, Bragg Gratings, Fabry-Perot Filters, Mach
Zender Interferometers, Arrayed Waveguide Grating, Tunable Filters, High Channel Count
Multiplexer Architectures, Optical Amplifiers, Direct and External Modulation Transmitters,
Pump Sources for Amplifiers, Optical Switches and Wavelength Converters.
UNIT –III:
Modulation and Demodulation:
Signal formats for Modulation, Subcarrier Modulation and Multiplexing, Optical Modulations –
Duobinary, Single Side Band and Multilevel Schemes, Ideal and Practical receivers for
Demodulation, Bit Error Rates, Timing Recovery and Equalization, Reed-Solomon Codes for
Error Detection and Correction.
UNIT -IV:
Transmission System Engineering:
System Model, Power Penalty in Transmitter and Receiver, Optical Amplifiers, Crosstalk and
Reduction of Crosstalk, Cascaded Filters, Dispersion Limitations and Compensation
Techniques.
UNIT –V:
Fiber Non-linearities and System Design Considerations:
Limitation in High Speed and WDM Systems due to Non-linearities in Fibers, Wavelength
Stabilization against Temperature Variations, Overall System Design considerations – Fiber
Dispersion, Modulation, Non-Linear Effects, Wavelengths, All Optical Networks.
TEXT BOOKS:
1. Optical Networks: A Practical Perspective - Rajiv Ramaswami and Kumar N. Sivarajan,
2nd
Ed., 2004, Elsevier Morgan Kaufmann Publishers (An Imprint of Elsevier).
2. Optical Fiber Communications – Gerd Keiser, 3rd
Ed., 2000, McGraw Hill.
Page 351
REFERENCE BOOKS:
1. Optical Fiber Communications: Principles and Practice – John.M.Senior, 2nd
Ed., 2000, PE.
2. Fiber Optics Communication – Harold Kolimbris, 2nd
Ed., 2004, PEI
3. Optical Networks: Third Generation Transport Systems – Uyless Black, 2nd
Ed., 2009, PEI
4. Optical Fiber Communications – GovindAgarwal, 2nd
Ed., 2004, TMH.
5. Optical Fiber Communications and Its Applications – S.C.Gupta, 2004, PHI.
Page 352
I Year I Semester
L P C
4 0 3
STATISTICAL SIGNAL PROCESSING
(ELECTIVE-II)
UNIT I
Signal models and characterization: Types and properties of statistical models for signals and how they relate to signal processing,Common second-order methods of characterizing signals including autocorrelation,partial correlation, cross-correlation, power spectral density and cross-power spectral density.
UNIT II
Spectral estimation: Nonparametric methods for estimation of power spectral density, autocorreleation, cross-correlation,transfer functions, and coherence form finite signal samples.
UNIT III
Review of signal processing: A review on random processes, Areview on filtering random processes, Examples.
Statistical parameter estimation: Maximum likehood estimation, maximum a posterior stimation, Cramer-Rao bound.
UNIT IV
Eigen structure based requency estimation: Pisarenko, MUSIC, ESPRIT their application sensor array direction finding.
Spectrum estimation: Moving average (MA), Auto Regressive (AR), Auto Regressive Moving Average (ARMA), Various non-parametirc approaches.
UNIT V
Wiener filtering: The finite impulse case, causal and non-causal infinite impulse responses cases, Least mean squares adaptation, recursive least squares adaptation, Kalman filtering.
Text books:
1. Steven M.Kay, fundamentals of statistical signal processing: estimation Theory,Pretice-Hall,1993.
2. Monsoon H. Hayes, Stastical digital signal processing and modeling, USA, Wiley,1996.
Reference books:
1. DimitrisG.Manolakis, Vinay K. Ingle, and Stephen M. Kogon, Statistical and adaptive signal processing, Artech House, Inc,2005, ISBN 1580536107
Page 353
I Year I Semester
L P C
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -II)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach, Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control, Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear time delay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
Page 354
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 355
I Year I Semester
L P C
4 0 3
CYBER SECURITY
(ELECTIVE – II)
Page 356
I Year I Semester
L P C
0 3 2
MICROWAVE MEASUREMENTS LABORATORY
Note: All the Experiments are to be conducted preferably using X-band setup.
1. Microwave source characteristics-Reflex Klystron and Gunn oscillator
2. Waveguide Discontinuities-Inductive and capacitive Diaphragms
3. Slide Screw Tuner-Equivalent circuit
4. S-matrix of Directional Coupler, Circulator, Magic Tee
5. Gain measurement of 1) Pyramidal Horn, 2) Conical Horn antennas.
6. Pattern Measurement of 1. Pyramidal Horn, 2.Conical Horn antennas.
6. Characterization of Waveguide Slotted Array
7. Frequency Scanned Array Characteristics
8. Measurement of Input Impedance of an Antenna
9. Measurements with Network Analyzer
Page 357
I Year II Semester
L P C
4 0 3
ADVANCED ANTENNA THEORY AND DESIGN
UNIT -I:
Antenna Theory:
Antennas, Radiation concept, Types of Antennas, Antenna parameters, Friis Transmission
equation.
UNIT -II:
Aperture Antenna:
Introduction, Pyramidal Horns- Design Procedure, Conical and Corrugated Horns, Aperture
Corrugated Horns, Reflected Antennas- Parameters, Analysis of front-fed parabolic reflector,
Feed methods and feed types, Cassegrain Reflector Horns.
UNIT -III:
Microstrip Radiators:
Introduction, Rectangular Microstrip Antenna analysis and Design, Circular Microstrip Antenna
Analysis and Design,
UNIT -IV:
Microstrip Slot Antennas:
Wave guide fed slots, Radiational mechanism, Micro strip slot antennas, Introduction rectangular
slot antennas, narrow, wide, tapered and circularly polarized slot antennas, Annular slot
antennas, Comparison of microstrip slot antennas with patch antennas.
UNIT -V:
Micro Strip Antenna Arrays:
Introduction, Micro strip array antennas, Characteristics of fixed beam linear antenna arrays,
Linear micro strip arrays, Characteristics of planar arrays, Microstrip planar arrays, Microstrip
scanned array antennas, Phase scanned microstrip arrays, Time delay scanning, Electronic feed
switching, Frequency scanned microstrip arrays, Advantage and disadvantages of phased array
antennas.
TEXT BOOKS:
1. Constantine Balanis. A - ‘Antenna Theory-Analysis and Design’, 3rd
Edition, John Wiley,
2005.
2. Bahl IJ, and Bhartia -NMicrostrip Antennas, Artech House, 1982.
Page 358
REFERENCE BOOKS:
1. Microstrip Antenna Design Hand Book -Ramesh Garg, Prakash Bhatia, Architect
House Inc. 2001.
2. Samuel Silve - Microwave Antenna - Theory and design, IEE Press, 1984.
3. James.J R. Hall, P S. Wood.C. - Micro strip Antenna-Theory and Design,
PeterPeregrinu,1981.
Page 359
I Year II Semester
L P C
4 0 3
PHASED ARRAY SYSTEMS
UNIT –I:
Conventional Scanning Techniques:
Mechanical versus electronic scanning, Techniques of Electronic scanning, Frequency, Phase
and time delay scanning principle, Hybrid scanning techniques.
UNIT –II:
Array Theory:
Linear and Planner arrays, various grid configuration, Concept of cell and grid, Calculation of
minimum number of elements, Radiation pattern, Grating lobe formation, Rectangular and
triangular grid design of arrays.
UNIT –III:
Feed Networks for phased Arrays:
Corporate Feed, Lens and Reflect feed
Techniques, Optimum f/d ratio basic building block for corporate feed network, Series, Parallel
feed networks, Comparison of various feeding techniques, Antenna Array Architecture, Brick/
Tile Type construction.
UNIT –IV:
Frequency Scanned Array Design:
Snake feed, Frequency-phase scanning, Phase scanning, Digital phase shifter PIN diode and
Ferrite phase shifters for phased arrays, Beam pointing errors due to digitalization, Beam
pointing accuracy.
UNIT –V:
Search Patterns:
Calculation of search frame time, airborne phased array design, Electronic scanning radar
parameter calculation, Application of phased arrays, Phased Array Radar Systems, Active
Phased Array, TR/ATR Modules.
Page 360
TEXT BOOKS:
1. Olliner, A.A, and G.H. Knittel - Phased Array Antennas, Artech House, 1972.
2. Kahrilas. PJ - Electronic Scanning Radar Systems Design Handbook, Artech House,
1976.
REFERENCE BOOKS:
1. Skolnik. MI- Radar Handbook, McgrawHillso, NY,McGrow Hills-2007
2. Galati,G-(editor) - Advanced Radar Technique and Systems, Peter Peregrims Ltd,
London, 1993.
Page 361
I Year II Semester
L P C
4 0 3
SOFTWARE DEFINED RADIO
UNIT -I:
Introduction:
The Need for Software Radios, What is Software Radio, Characteristics and benefits of
software radio- Design Principles of Software Radio, RF Implementation issues- The Purpose
of RF Front – End, Dynamic Range- The Principal Challenge of Receiver Design – RF Receiver
Front- End Topologies- Enhanced Flexibility of the RF Chain with Software Radios-
Importance of the Components to Overall Performance- Transmitter Architectures and Their
Issues- Noise and Distortion in the RF Chain, ADC and DAC Distortion.
UNIT -II:
Multi Rate Signal Processing:
Introduction- Sample Rate Conversion Principles- Polyphase Filters- Digital Filter Banks-
Timing Recovery in Digital Receivers Using Multirate Digital Filters.
Digital Generation of Signals:
Introduction- Comparison of Direct Digital Synthesis with Analog Signal Synthesis-
Approaches to Direct Digital Synthesis- Analysis of Spurious Signals- Spurious Components
due to Periodic jitter- Band Pass Signal Generation- Performance of Direct Digital Synthesis
Systems- Hybrid DDS-PLL Systems- Applications of direct Digital Synthesis- Generation of
Random Sequences- ROM Compression Techniques.
UNIT -III:
Analog to Digital and Digital to Analog Conversion:
Parameters of ideal data converters- Parameters of Practical data converters- Analog to Digital
and Digital to Analog Conversion- Techniques to improve data converter performance-
Common ADC and DAC architectures.
UNIT -IV:
Digital Hardware Choices:
Introduction- Key Hardware Elements- DSP Processors- Field Programmable Gate Arrays-
Trade-Offs in Using DSPs, FPGAs, and ASICs- Power Management Issues- Using a
Combination of DSPs, FPGAs, and ASICs.
UNIT -V:
Object – Oriented Representation of Radios and Network Resources:
Networks- Object Oriented Programming- Object Brokers- Mobile Application Environments-
Joint Tactical Radio System.
Case Studies in Software Radio Design: Introduction and Historical Perspective, SPEAK
easy- JTRS, Wireless Information Transfer System, SDR-3000 Digital Transceiver Subsystem,
Spectrum Ware, CHARIOT.
Page 362
TEXT BOOKS:
1. Software Radio: A Modern Approach to Radio Engineering - Jeffrey H. Reed, 2002, PEA
Publication.
2. Software Defined Radio: Enabling Technologies- Walter Tuttle Bee, 2002, Wiley
Publications.
REFERENCE BOOKS:
1. Software Defined Radio for 3G - Paul Burns, 2002, Artech House.
2. Software Defined Radio: Architectures, Systems and Functions - Markus Dillinger,
KambizMadani, Nancy Alonistioti, 2003, Wiley.
3. Software Radio Architecture: Object Oriented Approaches to wireless System Enginering –
Joseph Mitola, III, 2000, John Wiley & Sons.
4. R.F Microelectronics – B. Razavi, 1998, PHI.
5. DSP – A Computer Based Approach – S. K. Mithra, 1998, McGraw-Hill.
Page 363
I Year II Semester
L P C
4 0 3
WIRELESS COMMUNICATIONS AND NETWORKS
UNIT -I:
The Cellular Concept-System Design Fundamentals:
Introduction, Frequency Reuse, Interference and system capacity – Co channel Interference and
system capacity, Channel planning for Wireless Systems, Adjacent Channel interference , Power
Control for Reducing interference, Improving Coverage & Capacity in Cellular Systems- Cell
Splitting, Sectoring, Channel Assignment Strategies, Handoff Strategies- Prioritizing Handoffs,
Practical Handoff Considerations, Trunking and Grade of Service
UNIT –II:
Mobile Radio Propagation: Large-Scale Path Loss:
Introduction to Radio Wave Propagation, Free Space Propagation Model, Relating Power to
Electric Field, Basic Propagation Mechanisms, Reflection: Reflection from Dielectrics,
Brewster Angle, Reflection from prefect conductors, Ground Reflection (Two-Ray) Model,
Diffraction: Fresnel Zone Geometry, Knife-edge Diffraction Model, Multiple knife-edge
Diffraction, Scattering, Outdoor Propagation Models- Longley-Ryce Model, Okumura Model,
Hata Model, PCS Extension to Hata Model, Walfisch and Bertoni Model, Wideband PCS
Microcell Model, Indoor Propagation Models-Partition losses (Same Floor), Partition losses
between Floors, Log-distance path loss model, Ericsson Multiple Breakpoint Model, Attenuation
Factor Model, Signal penetration into buildings, Ray Tracing and Site Specific Modeling.
UNIT –III:
Mobile Radio Propagation: Small –Scale Fading and Multipath
Small Scale Multipath propagation-Factors influencing small scale fading, Doppler shift,
Impulse Response Model of a multipath channel- Relationship between Bandwidth and Received
power, Small-Scale Multipath Measurements-Direct RF Pulse System, Spread Spectrum Sliding
Correlator Channel Sounding, Frequency Domain Channels Sounding, Parameters of Mobile
Multipath Channels-Time Dispersion Parameters, Coherence Bandwidth, Doppler Spread and
Coherence Time, Types of Small-Scale Fading-Fading effects Due to Multipath Time Delay
Spread, Flat fading, Frequency selective fading, Fading effects Due to Doppler Spread-Fast
fading, slow fading, Statistical Models for multipath Fading Channels-Clarke’s model for flat
fading, spectral shape due to Doppler spread in Clarke’s model, Simulation of Clarke and Gans
Fading Model, Level crossing and fading statistics, Two-ray Rayleigh Fading Model.
Page 364
UNIT -IV:
Equalization and Diversity
Introduction, Fundamentals of Equalization, Training a Generic Adaptive Equalizer, Equalizers
in a communication Receiver, Linear Equalizers, Non-linear Equalization-Decision Feedback
Equalization (DFE), Maximum Likelihood Sequence Estimation (MLSE) Equalizer, Algorithms
for adaptive equalization-Zero Forcing Algorithm, Least Mean Square Algorithm, Recursive
least squares algorithm. Diversity -Derivation of selection Diversity improvement, Derivation of
Maximal Ratio Combining improvement, Practical Space Diversity Consideration-Selection
Diversity, Feedback or Scanning Diversity, Maximal Ratio Combining, Equal Gain Combining,
Polarization Diversity, Frequency Diversity, Time Diversity, RAKE Receiver.
UNIT -V:
Wireless Networks
Introduction to wireless Networks, Advantages and disadvantages of Wireless Local Area
Networks, WLAN Topologies, WLAN Standard IEEE 802.11, IEEE 802.11 Medium Access
Control, Comparison of IEEE 802.11 a,b,g and n standards, IEEE 802.16 and its enhancements,
Wireless PANs, HiperLan, WLL.
TEXT BOOKS:
1. Wireless Communications, Principles, Practice – Theodore, S. Rappaport, 2nd
Ed., 2002,
PHI.
2. Wireless Communications-Andrea Goldsmith, 2005 Cambridge University Press.
3. Mobile Cellular Communication – GottapuSasibhushanaRao, Pearson Education, 2012.
REFERENCE BOOKS:
1. Principles of Wireless Networks – KavehPahLaven and P. Krishna Murthy, 2002, PE
2. Wireless Digital Communications – KamiloFeher, 1999, PHI.
3. Wireless Communication and Networking – William Stallings, 2003, PHI.
4. Wireless Communication – UpenDalal, Oxford Univ. Press
5. Wireless Communications and Networking – Vijay K. Gary, Elsevier.
Page 365
I Year II Semester
L P C
4 0 3
MICROWAVE NETWORKS
(ELECTIVE-III)
UNIT –I:
Introduction to Microwave Circuit Concept:
One port junction, Terminal voltage and currents in multipart junctions, Poynting’s energy
theorem, Normalized waves and scattering matrix. Properties of [s]matrix
UNIT –II:
Relationship between [s], [z] and [y] Parameters:
Wave amplitude transmission matrix[A], Relation between [A] and [s], [s] matrix of magic T, E
and H plane tees, Directionl coupler, Applications of hybrid junction and magic tee.
UNIT –III:
Passive Microwave Devices:
Even and odd mode analysis of symmetrical 4 port networks, Analysis and design of branch line
couplers, Hybrid ring coupler, Frequency response, Branching synthesis of hybrids, Applications
of hybrids.
UNIT –IV:
Microwave Propagation in Ferrites:
Principles of Faraday rotation, Isolator, Gyrator, Circulator, Phase shifters, S-matrix of non
reciprocal devices, Broad band matching multisection quarter wave transformers, Binomial and
chebshev transformers design, Tapered transmission line exponential and triangular tapers,
Synthesis of transmission line tapers.
UNIT –V:
Wave Analysis of Periodic Structures:
Image parameters method of micro wave filter design, Power loss ratio, Filter design by insertion
loss method, Frequency transformation maximally flat and chebyshev filter design and
characteristics.
Page 366
TEXT BOOKS:
1. Altmen JL -Microwave circuit, D van Nostrand Co.,Inc.,1964.
2. Collins. RE - Foundations for microwave engineering, John Wiley & Sons, inc 2nd
Edn,
2009.
REFERENCE BOOKS:
1. Ghosh.RN - Microwave Circuit Theory and Analysis, McGrew Hill.
2. Pozer.D M - Microwave Engineering, 2nd
Edn., John Wiley and Sons, Inc.,1999.
Page 367
I Year II Semester
L P C
4 0 3
ELECTROMAGNETIC INTERFERENCE AND ELECTROMAGNETIC
COMPATIBILITY (EMI / EMC)
(ELECTIVE-III)
UNIT -I:
Introduction, Natural and Nuclear Sources of EMI / EMC:
Electromagnetic environment, History, Concepts, Practical experiences and concerns, frequency
spectrum conservations, An overview of EMI / EMC, Natural and Nuclear sources of EMI.
UNIT -II:
EMI from Apparatus, Circuits and Open Area Test Sites:
Electromagnetic emissions, Noise from relays and switches, Non-linearities in circuits, passive
intermodulation, Cross talk in transmission lines, Transients in power supply lines,
Electromagnetic interference (EMI), Open area test sites and measurements.
UNIT -III:
Radiated and Conducted Interference Measurements and ESD:
Anechoic chamber, TEM cell, GH TEM Cell, Characterization of conduction currents / voltages,
Conducted EM noise on power lines, Conducted EMI from equipment, Immunity to conducted
EMI detectors and measurements, ESD, Electrical fast transients / bursts, Electrical surges.
UNIT -IV:
Grounding, Shielding, Bonding and EMI filters:
Principles and types of grounding, Shielding and bonding, Characterization of filters, Power
lines filter design.
UNIT -V:
Cables, Connectors, Components and EMC Standards:
EMI suppression cables, EMC connectors, EMC gaskets, Isolation transformers, optoisolators,
National / International EMC standards.
Page 368
TEXT BOOKS:
1. Engineering Electromagnetic Compatibility - Dr. V.P. Kodali, IEEEPublication, Printed
in India by S. Chand & Co. Ltd., New Delhi, 2000.
2. Electromagnetic Interference and Compatibility IMPACT series, IIT – Delhi, Modules 1
– 9.
REFERENCE BOOKS:
1. Introduction to Electromagnetic Compatibility - Ny, John Wiley, 1992, by C.R. Pal.
Page 369
I Year II Semester
L P C
4 0 3
RADIO AND NAVIGATIONAL AIDS
(ELECTIVE-III)
UNIT –I:
Navigational Systems:
Review of Navigational Systems: Aircraft navigational system, Geometry of the earth.
Navigation equation, Navigation errors, Radio navigation system types and Performance
parameters, ILS System, Hyperbolic navigation systems, Loran, Omega, Decca Radio direction
finding, DME, TACAN and VORTAC.
UNIT -II:
Inertial Navigation:
Inertial navigation system, Sensing instruments: Accelerometer. Gyro- copes, Analytic and
Gimbaled platforms, Mechanization, Error analysis, Alignment.
UNIT –III:
Global Positioning System (GPS) for Navigation:
Overview of GPS, Reference systems.Satellite orbits, Signal structure, Geometric dilution of
precision (GDOP), or Precision dilution of recision (PDOP), Satellite ephemeris, Satellite clock,
Ionospheric group delay.Tropospheric group delay, Multipath errors and Receiver measurement
errors.
UNIT -IV:
Differential GPS and WAAS:
Standard and precise positioning service local area DGPS and Wide area DGPS errors, Wide
Area Augmentation System (WAAS) architecture, Link budget and Data Capacity, Ranging
function, Precision approach and error estimates.
UNIT –V:
GPS Navigational Applications:
General applications of GPS, DGPS, Marine, Air and Land Navigation, Surveying, Mapping and
Geographical information systems, Military and Space.
TEXT BOOKS:
1. Myron Kavton and Walter Friend, R. - “Avionics Navigation Systems”, Wiley,1997
2. Parkinson. BW. Spilker - “Global Positioning System Theory and Applications”,
Progress in Astronautics, Vol. I and II, 1996.
Page 370
REFERENCE BOOKS:
1. Hoffman. B., Wellenhof. H... Lichtenegger and J. Collins - “GPS Theory andPractice”,
Springer Verlang Wien New York, 1992.
2. Elliot D. Kaplan - “Understanding GPS Principles and Applications”, Artech House. Inc.,
1996.
3. Lieck Alfred. - “GPS Satellite Surveying”, John Wiley, 1990.
Page 371
I Year II Semester
L P C
4 0 3
SMART ANTENNAS
(ELECTIVE-IV)
UNIT -I:
Smart Antennas:
Introduction, Need for Smart Antennas, Overview, Smart Antenna Configurations, Switched-
Beam Antennas, Adaptive Antenna Approach, Space Division Multiple Access (SDMA),
Architecture of a Smart Antenna System, Receiver, Transmitter, Benefits and Drawbacks, Basic
Principles, Mutual Coupling Effects.
UNIT -II:
DOA Estimation Fundamentals:
Introduction, Array Response Vector, Received Signal Model, Subspace-Based Data Model,
Signal Autocovariance, Conventional DOA Estimation Methods, Conventional Beamforming
Method, Capon’s Minimum Variance Method, Subspace Approach to DOA Estimation, MUSIC
Algorithm, ESPRIT Algorithm, Uniqueness of DOA Estimates .
UNIT -III:
Beam Forming Fundamentals:
Classical Beam former, Statistically Optimum Beamforming Weight Vectors, Maximum SNR
Beam former, Multiple Sidelobe Canceller and Maximum, SINR Beam former, Minimum Mean
Square Error (MMSE), Direct Matrix Inversion (DMI), Linearly Constrained Minimum Variance
(LCMV), Adaptive Algorithms for Beamforming
UNIT -IV:
Integration and Simulation of Smart Antennas:
Overview, Antenna Design, Mutual Coupling, Adaptive Signal Processing Algorithms, DOA,
Adaptive Beam forming, Beam forming and Diversity Combining for Rayleigh-Fading, Channel,
Trellis-Coded Modulation (TCM) for Adaptive Arrays, Smart Antenna Systems for Mobile Ad
Hoc Networks (MANETs), Protocol, Simulations, Discussion.
Page 372
UNIT -V:
Space–Time Processing:
Introduction, Discrete Space–Time Channel and Signal Models, Space–Time Beamforming,
Intersymbol and Co-Channel Suppression, Space–Time Processing for DS-CDMA, Capacity and
Data Rates in MIMO Systems, Discussion.
TEXT BOOKS:
1. ‘Introduction to Smart Antennas’ - Constantine A. Balanis& Panayiotis I. Ioannides,
Morgan & Claypool Publishers’ series-2007
2. Joseph C. Liberti Jr., Theodore S Rappaport - “Smart Antennas for Wireless
Communications IS-95 and Third Generation CDMA Applications”, PTR – PH
publishers, 1st Edition, 1989.
REFERENCE BOOKS:
1. T.S Rappaport - “Smart Antennas Adaptive Arrays Algorithms and Wireless Position
Location”, IEEE press 1998, PTR – PH publishers 1999. Smart Antennas - Lal Chand
Godara, CRC Press, LLC-2004.
Page 373
I Year II Semester
L P C
4 0 3
RF CIRCUIT DESIGN
(ELECTIVE -IV)
UNIT -I:
Introduction to RF Electronics:
The Electromagnetic Spectrum, units and Physical Constants, Microwave bands – RF behavior
of Passive components: Tuned resonant circuits, Vectors, Inductors and Capacitors - Voltage and
Current in capacitor circuits – Tuned RF / IF Transformers.
UNIT -II:
Transmission Line Analysis: Examples of transmission lines- Transmission line equations and
Biasing- Micro Strip Transmission Lines- Special Termination Conditions- sourced and Loaded
Transmission Lines. Single And Multiport Networks: The Smith Chart, Interconnectivity
networks, Network properties and Applications, Scattering Parameters.
UNIT -III:
Matching and Biasing Networks:
Impedance matching using discrete components – Micro strip line matching networks, Amplifier
classes of Operation and Biasing networks. RF Passive & Active Components: Filter Basics –
Lumped filter design – Distributed Filter Design – Diplexer Filters- Crystal and Saw filters-
Active Filters - Tunable filters – Power Combiners / Dividers – Directional Couplers – Hybrid
Couplers – Isolators. RF Diodes – BJTs- FETs- HEMTs and Models.
UNIT -IV:
RF Transistor Amplifier Design: Characteristics of Amplifiers - Amplifier Circuit
Configurations, Amplifier Matching Basics, Distortion and noise products, Stability
Considerations, Small Signal amplifier design, Power amplifier design, MMIC amplifiers,
Broadband High Power multistage amplifiers, Low noise amplifiers, VGA Amplifiers.
UNIT -V:
Oscillators: Oscillator basics, Low phase noise oscillator design, High frequency Oscillator
configuration, LC Oscillators, VCOs, Crystal Oscillators, PLL Synthesizer, and Direct Digital
Synthesizer. RF Mixers: Basic characteristics of a mixer - Active mixers- Image Reject and
Harmonic mixers, Frequency domain considerations.
TEXT BOOKS:
1. RF Circuit design: Theory and applications by Reinhold Ludwing, PavelBretchko.
Pearson Education Asia Publication, New Delhi 2001.
2. Radio Frequency and Microwave Communication Circuits – Analysis and Design –
Devendra K. Misra, Wiley Student Edition, John Wiley & Sons
Page 374
REFERENCE BOOKS:
1. Radio frequency and Microwave Electronics - Mathew M.Radmangh, 2001, PE Asia Publ.
2. RF Circuit Design – Christopher Bowick, Cheryl Aljuni and John Biyler, Elsevier Science,
2008.
3. Secrets of RF Design - Joseph Carr., 3rd
Edition, Tab Electronics.
4. Complete Wireless Design - Cotter W. Sawyer, 2nd
Edition, Mc-Graw Hill.
5. Practical RF Circuit Design for Modem Wireless Systems Vol.2 -Less Besser and Rowan
Gilmore.
Page 375
I Year II Semester
L P C
4 0 3
RADAR SIGNAL PROCESSING
(ELECTIVE -IV)
UNIT -I:
Introduction:
Radar Block Diagram, Bistatic Radar, Monostatic Radar, Radar Equation, Information
Available from Radar Echo. Review of Radar Range Performance– General Radar Range
Equation, Radar Detection with Noise Jamming, Beacon and Repeater Equations, MTI and
Pulse Doppler Radar.
Matched Filter Receiver – Impulse Response, Frequency Response Characteristic and its
Derivation, Matched Filter and Correlation Function, Correlation Detection and Cross-
Correlation Receiver, Efficiency of Non-Matched Filters, Matched Filter for Non-White
Noise.
UNIT -II:
Detection of Radar Signals in Noise:
Detection Criteria – Neyman-Pearson Observer, Likelihood-Ratio Receiver, Inverse
Probability Receiver, Sequential Observer, Detectors–Envelope Detector, Logarithmic
Detector, I/Q Detector. Automatic Detection-CFAR Receiver, Cell Averaging CFAR
Receiver, CFAR Loss, CFAR Uses in Radar. Radar Signal Management–Schematics,
Component Parts, Resources and Constraints.
UNIT -III:
Waveform Selection [3, 2]:
Radar Ambiguity Function and Ambiguity Diagram – Principles and Properties; Specific
Cases – Ideal Case, Single Pulse of Sine Wave, Periodic Pulse Train, Single Linear FM
Pulse, Noise Like Waveforms, Waveform Design Requirements, Optimum Waveforms for
Detection in Clutter, Family of Radar Waveforms.
UNIT -IV:
Pulse Compression in Radar Signals:
Introduction, Significance, Types, Linear FM Pulse Compression – Block Diagram,
Characteristics, Reduction of Time Side lobes, Stretch Techniques, Generation and
Decoding of FM Waveforms – Block Schematic and Characteristics of Passive System,
Digital Compression, SAW Pulse Compression.
UNIT V:
Phase Coding Techniques:
Principles, Binary Phase Coding, Barker Codes, Maximal Length Sequences
(MLS/LRS/PN), Block Diagram of a Phase Coded CW Radar.
Poly Phase Codes : Frank Codes, Costas Codes, Non-Linear FM Pulse Compression,
Doppler Tolerant PC Waveforms – Short Pulse, Linear Period Modulation (LPM/HFM),
Sidelobe Reduction for Phase Coded PC Signals.
Page 376
TEXT BOOKS:
1. Radar Handbook - M.I. Skolnik, 2nd
Ed., 1991, McGraw Hill.
2. Radar Design Principles : Signal Processing and The Environment - Fred E. Nathanson, 2nd
Ed.,
1999, PHI.
3. Introduction to Radar Systems - M.I. Skolnik, 3rd
Ed., 2001, TMH.
REFERENCE BOOKS:
1. Radar Principles - Peyton Z. Peebles, Jr., 2004, John Wiley.
2. Radar Signal Processing and Adaptive Systems - R. Nitzberg, 1999, Artech House.
Page 377
I Year II Semester
L P C
0 3 2
ANTENNA SIMULATION LABORATORY
SECTION –A
Design and testing of microwave Antennas operations:
1. Pyramidal Horn- Antenna
2. Conical Horn –Antenna
3. Rectangular Microstrip patch Antenna
4. Circular Microstrip patch Antenna
5. Microstrip Monopole Antenna.
SECTION –B
Software Simulation (using HFSS/IE3D/FEKO or Equivalent) and Testing of:
1. Rectangular Microstrip Antenna, Circular Microstrip antenna.
2. Micro strip Monopole
3. Microstrip Tee
4. Cylindrical Horn antenna, Pyramidal Horn antenna
5. Microstrip Filters
6. Microstrip power Dividers, Passive Components
7. Radar Signals
Page 378
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
SSP, DIP, CE&SP AND IP
(Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 379
I Semester
II Semester
S. No. Name of the Subject L P C
1 Coding Theory and Applications 4 - 3
2 Transform Techniques 4 - 3
3 Advanced Digital Signal Processing 4 - 3
4 Digital Data Communications 4 - 3
5
Elective I 1. Statistical Signal Processing
2. Network Security and Cryptography
3. Pattern Recognition Principles
4 - 3
6
Elective II
1. Speech Processing
2. Soft Computing Techniques
3. Object Oriented Programming
4. Cyber Security
4 - 3
7 Signal Processing Laboratory - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Adaptive Signal Processing 4 - 3
2 Image & Video Processing 4 - 3
3 Detection and Estimation Theory 4 - 3
4 DSP Processors and Architectures 4 - 3
5
Elective III
1. Computer Vision
2. Embedded System Design
3. Bio-Medical Signal Processing
4 - 3
6
Elective IV
1. Internet Protocols
2. Radar Signal Processing
3. Wireless Communications & Networks
4 - 3
7 Advanced Signal Processing Laboratory - 3 2
Total Credits 20
Page 380
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 381
I Year I Semester
L P C
4 0 3
CODING THEORY AND APPLICATIONS
UNIT –I:
Coding for Reliable Digital Transmission and Storage:
Mathematical model of Information, A Logarithmic Measure of Information, Average and
Mutual Information and Entropy, Types of Errors, Error Control Strategies.
Linear Block Codes:
Introduction to Linear Block Codes, Syndrome and Error Detection, Minimum Distance of a
Block code, Error-Detecting and Error-correcting Capabilities of a Block code, Standard array
and Syndrome Decoding, Probability of an undetected error for Linear Codes over a BSC,
Hamming Codes. Applications of Block codes for Error control in data storage system
UNIT –II:
Cyclic Codes:
Description, Generator and Parity-check Matrices, Encoding, Syndrome Computation and Error
Detection, Decoding ,Cyclic Hamming Codes, Shortened cyclic codes, Error-trapping decoding
for cyclic codes, Majority logic decoding for cyclic codes.
UNIT –III:
Convolutional Codes:
Encoding of Convolutional Codes, Structural and Distance Properties, maximum likelihood
decoding, Sequential decoding, Majority- logic decoding of Convolution codes. Application of
Viterbi Decoding and Sequential Decoding, Applications of Convolutional codes in ARQ
system.
UNIT –IV:
Burst –Error-Correcting Codes:
Decoding of Single-Burst error Correcting Cyclic codes, Single-Burst-Error-Correcting Cyclic
codes, Burst-Error-Correcting Convolutional Codes, Bounds on Burst Error-Correcting
Capability, Interleaved Cyclic and Convolutional Codes, Phased-Burst –Error-Correcting Cyclic
and Convolutional codes.
UNIT -V:
BCH – Codes:
BCH code- Definition, Minimum distance and BCH Bounds, Decoding Procedure for BCH
Codes- Syndrome Computation and Iterative Algorithms, Error Location Polynomials and
Numbers for single and double error correction
Page 382
TEXT BOOKS:
1. Error Control Coding- Fundamentals and Applications –Shu Lin, Daniel J.Costello,Jr,
Prentice Hall, Inc.
2. Error Correcting Coding Theory-Man Young Rhee- 1989, McGraw-Hill Publishing.
REFERENCE BOOKS:
1. Digital Communications-Fundamental and Application - Bernard Sklar, PE.
2. Digital Communications- John G. Proakis, 5th
Ed., 2008, TMH.
3. Introduction to Error Control Codes-Salvatore Gravano-oxford
4. Error Correction Coding – Mathematical Methods and Algorithms – Todd K.Moon,
2006, Wiley India.
5. Information Theory, Coding and Cryptography – Ranjan Bose, 2nd
Ed, 2009, TMH.
Page 383
I Year I Semester
L P C
4 0 3
TRANSFORM TECHNIQUES
UNIT -I:
Fourier Analysis:
Fourier series, Examples, Fourier Transform, Properties of Fourier Transform, Examples of
Fourier transform, sampling theorem, Partial sum and Gibbs phenomenon, Fourier analysis of
Discrete time Signals, Discrete Fourier Transform.
Time – Frequency Analysis: Window function, Short Time Fourier Transform, Discrete Short
Time Fourier Transform, Continuous wavelet transform, Discrete wavelet transform, wavelet
series, Interpretations of the Time-Frequency plot.
UNIT -II:
Transforms:
Walsh, Hadamard, Haar and Slant Transforms, DCT, DST, KLT, Singular value Decomposition
– definition, properties and applications
UNIT -III:
Continuous Wavelet Transform (CWT):
Short comings of STFT, Need for wavelets, Wavelet Basis- Concept of Scale and its relation
with frequency, Continuous time wavelet Transform Equation- Series Expansion using
Wavelets- CWT- Tiling of time scale plane for CWT. Important Wavelets: Haar, Mexican Hat,
Meyer, Shannon, Daubechies.
UNIT -IV:
Multi Rate Analysis and DWT:
Need for Scaling function – Multi Resolution Analysis, Two-Channel Filter Banks, Perfect
Reconstruction Condition, Relationship between Filter Banks and Wavelet Basis, DWT,
Structure of DWT Filter Banks, Daubechies Wavelet Function, Applications of DWT.
UNIT -V:
Wavelet Packets and Lifting: Wavelet Packet Transform, Wavelet packet algorithms,
Thresholding-Hard thresholding, Soft thresholding, Multidimensional Wavelets, Bi-orthogonal
basis- B-Splines, Lifting Scheme of Wavelet Generation, Multi Wavelets
TEXT BOOKS:
1. A Wavelet Tour of Signal Processing theory and applications -RaghuveerM.Rao and Ajit S.
Bopardikar, Pearson Edu, Asia, New Delhi, 2003.
2. K.P.Soman and K.I Ramachandran, “ Insight into Wavelets – from theory to practice” PHI,
Second edition,2008
Page 384
REFERENCE BOOKS:
1. Fundamentals of Wavelets- Theory, Algorithms and Applications -Jaideva C Goswami,
Andrew K Chan, John Wiley & Sons, Inc, Singapore, 1999.
2. JaidevaC.Goswami and Andrew K.Chan, “ Fundamentals of Wavelets” Wiley publishers,
2006
3. A Wavelet Tour of Signal Processing-Stephen G. Mallat, Academic Press, 2 Ed
4. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar – TMH,2009
Page 385
I Year I Semester
L P C
4 0 3
ADVANCED DIGITAL SIGNAL PROCESSING
UNIT –I:
Review of DFT, FFT, IIR Filters and FIR Filters:
Multi Rate Signal Processing: Introduction, Decimation by a factor D, Interpolation by a
factor I, Sampling rate conversion by a rational factor I/D, Multistage Implementation of
Sampling Rate Conversion, Filter design & Implementation for sampling rate conversion.
UNIT –II:
Applications of Multi Rate Signal Processing:
Design of Phase Shifters, Interfacing of Digital Systems with Different Sampling Rates,
Implementation of Narrow Band Low Pass Filters, Implementation of Digital Filter Banks,
Sub-band Coding of Speech Signals, Quadrature Mirror Filters, Trans-multiplexers, Over
Sampling A/D and D/A Conversion.
UNIT -III:
Non-Parametric Methods of Power Spectral Estimation: Estimation of spectra from finite
duration observation of signals, Non-parametric Methods: Bartlett, Welch & Blackman-
Tukey methods, Comparison of all Non-Parametric methods
UNIT –IV:
Implementation of Digital Filters:
Introduction to filter structures (IIR & FIR), Frequency sampling structures of FIR, Lattice
structures, Forward prediction error, Backward prediction error, Reflection coefficients for
lattice realization, Implementation of lattice structures for IIR filters, Advantages of lattice
structures.
UNIT –V:
Parametric Methods of Power Spectrum Estimation: Autocorrelation & Its
Properties,Relation between auto correlation & model parameters, AR Models - Yule-Walker
& Burg Methods, MA & ARMA models for power spectrum estimation, Finite word length
effect in IIR digital Filters – Finite word-length effects in FFT algorithms.
TEXT BOOKS:
1. Digital Signal Processing: Principles, Algorithms & Applications - J.G.Proakis& D. G.
Manolakis, 4th
Ed., PHI.
2. Discrete Time Signal Processing - Alan V Oppenheim & R. W Schaffer, PHI.
3. DSP – A Practical Approach – Emmanuel C. Ifeacher, Barrie. W. Jervis, 2 Ed., Pearson
Education.
Page 386
REFERENCE BOOKS:
1. Modern Spectral Estimation: Theory & Application – S. M .Kay, 1988, PHI.
2. Multi Rate Systems and Filter Banks – P.P.Vaidyanathan – Pearson Education.
3. Digital Signal Processing – S.Salivahanan, A.Vallavaraj, C.Gnanapriya, 2000,TMH
4. Digital Spectral Analysis – Jr. Marple
Page 387
I Year I Semester
L P C
4 0 3
DIGITAL DATA COMMUNICATIONS
UNIT -I:
Digital Modulation Schemes:
BPSK, QPSK, 8PSK, 16PSK, 8QAM, 16QAM, DPSK – Methods, Band Width Efficiency,
Carrier Recovery, Clock Recovery.
UNIT -II:
Basic Concepts of Data Communications, Interfaces and Modems:
Data Communication Networks, Protocols and Standards, UART, USB, Line Configuration,
Topology, Transmission Modes, Digital Data Transmission, DTE-DCE interface, Categories of
Networks – TCP/IP Protocol suite and Comparison with OSI model.
UNIT -III:
Error Correction: Types of Errors, Vertical Redundancy Check (VRC), LRC, CRC, Checksum,
Error Correction using Hamming code
Data Link Control: Line Discipline, Flow Control, Error Control
Data Link Protocols: Asynchronous Protocols, Synchronous Protocols, Character Oriented
Protocols, Bit-Oriented Protocol, Link Access Procedures.
UNIT -IV:
Multiplexing: Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM),
Multiplexing Application, DSL.
Local Area Networks: Ethernet, Other Ether Networks, Token Bus, Token Ring, FDDI.
Metropolitan Area Networks: IEEE 802.6, SMDS
Switching: Circuit Switching, Packet Switching, Message Switching.
Networking and Interfacing Devices: Repeaters, Bridges, Routers, Gateway, Other Devices.
UNIT -V:
Multiple Access Techniques:
Frequency- Division Multiple Access (FDMA), Time - Division Multiple Access (TDMA), Code
- Division Multiple Access (CDMA), OFDM and OFDMA. Random Access, Aloha- Carrier
Sense Multiple Access (CSMA)- Carrier Sense Multiple Access with Collision Avoidance
(CSMA/CA), Controlled Access- Reservation- Polling- Token Passing, Channelization.
Page 388
TEXT BOOKS:
1. Data Communication and Computer Networking - B. A.Forouzan, 2nd
Ed., 2003, TMH.
2. Advanced Electronic Communication Systems - W. Tomasi, 5th E
d., 2008, PEI.
REFERENCE BOOKS:
1. Data Communications and Computer Networks - Prakash C. Gupta, 2006, PHI.
2. Data and Computer Communications - William Stallings, 8th
Ed., 2007, PHI.
3. Data Communication and Tele Processing Systems -T. Housely, 2nd
Ed, 2008, BSP.
4. Data Communications and Computer Networks- Brijendra Singh, 2nd
Ed., 2005, PHI.
Page 389
I Year I Semester
L P C
4 0 3
STATISTICAL SIGNAL PROCESSING
(ELECTIVE - I)
UNIT I
Signal models and characterization: Types and properties of statistical models for signals and how they relate to signal processing,Common second-order methods of characterizing signals including autocorrelation,partial correlation, cross-correlation, power spectral density and cross-power spectral density.
UNIT II
Spectral estimation: Nonparametric methods for estimation of power spectral density, autocorreleation, cross-correlation,transfer functions, and coherence form finite signal samples.
UNIT III
Review of signal processing: A review on random processes, Areview on filtering random processes, Examples.
Statistical parameter estimation: Maximum likehood estimation, maximum a posterior stimation, Cramer-Rao bound.
UNIT IV
Eigen structure based requency estimation: Pisarenko, MUSIC, ESPRIT their application sensor array direction finding.
Spectrum estimation: Moving average (MA), Auto Regressive (AR), Auto Regressive Moving Average (ARMA), Various non-parametirc approaches.
UNIT V
Wiener filtering: The finite impulse case, causal and non-causal infinite impulse responses cases, Least mean squares adaptation, recursive least squares adaptation, Kalman filtering.
Text books:
1. Steven M.Kay, fundamentals of statistical signal processing: estimation Theory,Pretice-Hall,1993.
2. Monsoon H. Hayes, Stastical digital signal processing and modeling, USA, Wiley,1996.
Reference books:
2. DimitrisG.Manolakis, Vinay K. Ingle, and Stephen M. Kogon, Statistical and adaptive signal processing, Artech House, Inc,2005, ISBN 1580536107
Page 390
I Year I Semester
L P C
4 0 3
NETWORK SECURITY AND CRYPTOGRAPHY
(ELECTIVE -I)
UNIT -I:
Introduction:
Attacks, Services and Mechanisms, Security attacks, Security services, A Model for
Internetwork security.Classical Techniques:Conventional Encryption model, Steganography,
Classical Encryption Techniques.
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
UNIT -II:
Encryption Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.Conventional Encryption :Placement of
Encryption function, Traffic confidentiality, Key distribution, Random Number Generation.
UNIT -III:
Public Key Cryptography:Principles, RSA Algorithm, Key Management, Diffie-Hellman Key
exchange, Elliptic Curve Cryptograpy.Number Theory:Prime and Relatively prime numbers,
Modular arithmetic, Fermat’s and Euler’s theorems, Testing for primality, Euclid’s Algorithm,
the Chinese remainder theorem, Discrete logarithms.
UNIT -IV:
Message Authentication and Hash Functions:Authentication requirements and functions,
Message Authentication, Hash functions, Security of Hash functions and MACs.Hash and Mac
Algorithms
MD File, Message digest Algorithm, Secure Hash Algorithm, RIPEMD-160, HMAC.Digital
signatures and Authentication protocols: Digital signatures, Authentication Protocols, Digital
signature standards.
Authentication Applications :Kerberos, X.509 directory Authentication service.Electronic Mail
Security: Pretty Good Privacy, S/MIME.
UNIT –V:
IP Security:
Overview, Architecture, Authentication, Encapsulating Security Payload, Combining security
Associations, Key Management. Web Security: Web Security requirements, Secure sockets layer
and Transport layer security, Secure Electronic Transaction.
Intruders, Viruses and Worms
Intruders, Viruses and Related threats.
Fire Walls: Fire wall Design Principles, Trusted systems.
Page 391
TEXT BOOKS:
1. Cryptography and Network Security: Principles and Practice - William Stallings, Pearson
Education.
2. Network Security Essentials (Applications and Standards) by William Stallings Pearson
Education.
REFERENCE BOOKS:
1. Fundamentals of Network Security by Eric Maiwald (Dreamtech press)
2. Network Security - Private Communication in a Public World by Charlie Kaufman,
Radia Perlman and Mike Speciner, Pearson/PHI.
3. Principles of Information Security, Whitman, Thomson.
4. Network Security: The complete reference, Robert Bragg, Mark Rhodes, TMH
5. Introduction to Cryptography, Buchmann, Springer.
Page 392
I Year I Semester
L P C
4 0 3
PATTERN RECOGNITION PRINCIPLES
(ELECTIVE - I)
UNIT I : Introduction:
Fundamental problems in pattern Recognition system design, Design concepts and
methodologies, Simple pattern recognition model.
Decisions and Distance Functions:
Linear and generalized decision functions, Pattern space and weight space, Geometrical
properties, implementations of decision functions, Minimum-distance pattern classifications.
Probability - Probability of events:
Random variables, Joint distributions and densities, Movements of random variables, Estimation
of parameter from samples.
UNIT - II: Decision making - Baye’s theorem, Multiple features, Conditionally independent
features, Decision boundaries, Unequal cost of error, estimation of error rates, the leaving-one-
out-techniques, characteristic curves, estimating the composition of populations. Baye’s
classifier for normal patterns.
Non Parametric Decision Making:
histogram, kernel and window estimation, nearest neighbour classification techniques. Adaptive
decision boundaries, adaptive discriminant functions, Minimum squared error discriminant
functions, choosing a decision making techniques.
UNIT III: Clustering and Partitioning:
Hierarchical Clustering: Introduction, agglomerative clustering algorithm, the single-linkage,
complete-linkage and average-linkage algorithm. Ward’s method Partition clustering-Forg’s
algorithm, K-means’s algorithm, Isodata algorithm.
UNIT IV: Pattern Preprocessing and Feature selection:
distance measures, clustering transformation and feature ordering, clustering in feature selection
through entropy minimization, features selection through orthogonal expansion, binary feature
selection.
UNIT V: Syntactic Pattern Recognition and Application of Pattern Recognition:
Concepts from formal language theory, formulation of syntactic pattern recognition problem,
syntactic pattern description, recognition grammars, automata as pattern recognizers, Application
of pattern recognition techniques in bio-metric, facial recognition, IRIS scon, Finger prints, etc.,
Page 393
Reference books:
1. Pattern recognition and Image Analysis, Gose. JohnsonbaughJost, PHI.
2. Pattern Recognition Principle, Tou. Rafael. Gonzalez, Pea.
3. Pattern Classification, Richard duda, Hart., David Strok, Wiley.
Page 394
I Year I Semester
L P C
4 0 3
SPEECH PROCESSING
(ELECTIVE – II)
UNIT –I:
Fundamentals of Digital Speech Processing:
Anatomy & Physiology of Speech Organs, The process of Speech Production, Acoustic
Phonetics, Articulatory Phonetics, The Acoustic Theory of Speech Production- Uniform lossless
tube model, effect of losses in vocal tract, effect of radiation at lips, Digital models for speech
signals.
UNIT –II:
Time Domain Models for Speech Processing:
Introduction- Window considerations, Short time energy and average magnitude Short time
average zero crossing rate, Speech Vs Silence discrimination using energy and zero crossing,
Pitch period estimation using a parallel processing approach, The short time autocorrelation
function, The short time average magnitude difference function, Pitch period estimation using
the autocorrelation function.
UNIT –III:
Linear Predictive Coding (LPC) Analysis:
Basic principles of Linear Predictive Analysis: The Autocorrelation Method, The Covariance
Method, Solution of LPC Equations: Cholesky Decomposition Solution for Covariance Method,
Durbin’s Recursive Solution for the Autocorrelation Equations, Comparison between the Methods
of Solution of the LPC Analysis Equations, Applications of LPC Parameters: Pitch Detection using
LPC Parameters, Formant Analysis using LPC Parameters.
UNIT –IV:
Homomorphic Speech Processing:
Introduction, Homomorphic Systems for Convolution: Properties of the Complex Cepstrum,
Computational Considerations, The Complex Cepstrum of Speech, Pitch Detection, Formant
Estimation, The HomomorphicVocoder.
Speech Enhancement:
Nature of interfering sounds, Speech enhancement techniques: Single Microphone Approach :
spectral subtraction, Enhancement by re-synthesis, Comb filter, Wiener filter, Multi microphone
Approach.
UNIT-V:
Automatic Speech & Speaker Recognition:
Basic pattern recognition approaches, Parametric representation of speech, Evaluating the
similarity of speech patterns, Isolated digit Recognition System, Continuous digit Recognition
System
Hidden Markov Model (HMM) for Speech:
Hidden Markov Model (HMM) for speech recognition, Viterbi algorithm, Training and testing
using HMMS,
Page 395
Speaker Recognition: Recognition techniques, Features that distinguish speakers, Speaker Recognition Systems:
Speaker Verification System, Speaker Identification System.
TEXT BOOKS:
1. Digital Processing of Speech Signals - L.R. Rabiner and S. W. Schafer. Pearson Education.
2. Speech Communications: Human & Machine - Douglas O'Shaughnessy, 2nd
Ed., Wiley
India, 2000.
3. Digital Processing of Speech Signals. L.R Rabinar and R W Jhaung, 1978, Pearson
Education.
REFERENCE BOOKS:
1. Discrete Time Speech Signal Processing: Principles and Practice - Thomas F. Quateri, 1st
Ed., PE.
2. Speech & Audio Signal Processing- Ben Gold & Nelson Morgan, 1st Ed., Wiley.
Page 396
I Year I Semester
L P C
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -II)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach, Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control, Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear time delay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
Page 397
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan, Sanjay
Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 398
I Year I Semester
L P C
4 0 3
OBJECT ORIENTED PROGRAMMING
(ELECTIVE - II)
Objective: Implementing programs for user interface and application development using core
java principles
UNIT I:
Objective: Focus on object oriented concepts and java program structure and its installation
Introduction to OOP
Introduction, Need of Object Oriented Programming, Principles of Object Oriented Languages,
Procedural languages Vs OOP, Applications of OOP, History of JAVA, Java Virtual Machine,
Java Features, Installation of JDK1.6
UNIT II:
Objective: Comprehension of java programming constructs, control structures in Java
Programming Constructs
Variables , Primitive Datatypes, Identifiers- Naming Coventions, Keywords, Literals, Operators-
Binary,Unary and ternary, Expressions, Precedence rules and Associativity, Primitive Type
Conversion and Casting, Flow of control-Branching,Conditional, loops.,
Classes and Objects- classes, Objects, Creating Objects, Methods, constructors-Constructor
overloading, Garbage collector, Class variable and Methods-Static keyword, this keyword,
Arrays, Command line arguments
UNIT III:
Objective: Implementing Object oriented constructs such as various class hierarchies,
interfaces and exception handling
Inheritance: Types of Inheritance, Deriving classes using extends keyword, Method
overloading, super keyword, final keyword, Abstract class
Interfaces, Packages and Enumeration: Interface-Extending interface, Interface Vs Abstract
classes, Packages-Creating packages , using Packages, Access protection, java.lang package
Exceptions & Assertions - Introduction, Exception handling techniques-try...catch, throw,
throws, finally block, user defined exception, Assertions
UNIT IV:
Objective: Understanding of Thread concepts and I/O in Java
MultiThreading :java.lang.Thread, The main Thread, Creation of new threads, Thread priority,
Multithreading, Syncronization, suspending and Resuming threads, Communication between
Threads
Input/Output: reading and writing data, java.io package
Page 399
UNIT V:
Objective: Being able to build dynamic user interfaces using applets and Event handling in
java
Applets- Applet class, Applet structure, An Example Applet Program, Applet Life Cycle,
paint(),update() and repaint()
Event Handling -Introduction, Event Delegation Model, java.awt.event Description, Event
Listeners, Adapter classes, Inner classes
UNIT VI:
Objective: Understanding of various components of Java AWT and Swing and writing code
snippets using them
Abstract Window Toolkit
Why AWT?, java.awt package, Components and Containers, Button, Label, Checkbox, Radio
buttons, List boxes, Choice boxes, Text field and Text area, container classes, Layouts, Menu,
Scroll bar
Swing:
Introduction , JFrame, JApplet, JPanel, Components in swings, Layout Managers, JList and
JScroll Pane, Split Pane, JTabbedPane, Dialog Box
Text Books:
1. The Complete Refernce Java, 8ed, Herbert Schildt, TMH
2. Programming in JAVA, Sachin Malhotra, Saurabhchoudhary, Oxford.
3. JAVA for Beginners, 4e, Joyce Farrell, Ankit R. Bhavsar, Cengage Learning.
4. Object oriented programming with JAVA, Essentials and Applications, Raj Kumar
Bhuyya, Selvi, Chu TMH
5. Introduction to Java rogramming, 7th
ed, Y Daniel Liang, Pearson
Reference Books:
1. JAVA Programming, K.Rajkumar.Pearson
2. Core JAVA, Black Book, NageswaraRao, Wiley, Dream Tech
3. Core JAVA for Beginners, RashmiKanta Das, Vikas.
4. Object Oriented Programming through JAVA , P Radha Krishna , University Press.
Page 400
I Year I Semester
L P C
4 0 3
Cyber Security
(ELECTIVE - II)
Page 401
I Year I Semester
L P C
0 3 2
SIGNAL PROCESSING LAB
Note:
G. Minimum of 10 Experiments have to be conducted
H. All Experiments may be Simulated using MATLAB and to be verified theoretically.
1. Basic Operations on Signals, Generation of Various Signals and finding its FFT.
2. Program to verify Decimation and Interpolation of a given Sequences.
3. Program to Convert CD data into DVD data
4. Generation of Dual Tone Multiple Frequency (DTMF) Signals
5. Plot the Periodogram of a Noisy Signal and estimate PSD using Periodogram and
Modified Periodogram methods
6. Estimation of Power Spectrum using Bartlett and Welch methods
7. Verification of Autocorrelation Theorem
8. Parametric methods (Yule-Walker and Burg) of Power Spectrum Estimation
9. Estimation of data series using Nth order Forward Predictor and comparing to the
Original Signal
10. Design of LPC filter using Levinson-Durbin Algorithm
11. Computation of Reflection Coefficients using Schur Algorithm
12. To study Finite Length Effects using Simulink
13. Design and verification of Matched filter
14. Adaptive Noise Cancellation using Simulink
15. Design and Simulation of Notch Filter to remove 60Hz Hum/any unwanted frequency
component of given Signal (Speech/ECG)
Page 402
I Year II Semester
L P C
4 0 3
ADAPTIVE SIGNAL PROCESSING
UNIT –I:
Introduction to Adaptive Systems:
Adaptive Systems: Definitions, Characteristics, Applications, Example of an Adaptive
System. The Adaptive Linear Combiner - Description, Weight Vectors, Desired Response
Performance function - Gradient & Mean Square Error.
UNIT –II:
Development of Adaptive Filter Theory & Searching the Performance surface:
Introduction to Filtering - Smoothing and Prediction – Linear Optimum Filtering, Problem
statement, Principle of Orthogonality - Minimum Mean Square Error, Wiener- Hopf
equations, Error Performance - Minimum Mean Square Error.
Searching the performance surface – Methods & Ideas of Gradient Search methods -
Gradient Searching Algorithm & its Solution - Stability & Rate of convergence - Learning
Curves.
UNIT –III:
Steepest Descent Algorithms:
Gradient Search by Newton’s Method, Method of Steepest Descent, Comparison of
Learning Curves.
UNIT –IV:
LMS Algorithm & Applications:
Overview - LMS Adaptation algorithms, Stability & Performance analysis of LMS
Algorithms - LMS Gradient & Stochastic algorithms - Convergence of LMS algorithm.
Applications: Noise cancellation – Cancellation of Echoes in long distance telephone
circuits, Adaptive Beam forming.
UNIT –V:
Kalman Filtering:
Introduction to RLS Algorithm, Statement of Kalman filtering problem, The Innovation
Process, Estimation of State using the Innovation Process- Expression of Kalman Gain,
Filtering Examples using Kalman filtering.
Page 403
TEXT BOOKS:
1. Adaptive Signal Processing - Bernard Widrow, Samuel D.Strearns, 2005, PE.
2. Adaptive Filter Theory - Simon Haykin-, 4th
Ed., 2002,PE Asia.
REFERENCE BOOKS:
1. Optimum signal processing: An introduction - Sophocles.J.Orfamadis, 2nd
Ed., 1988,
McGraw-Hill, New York
2. Adaptive signal processing-Theory and Applications - S.Thomas Alexander, 1986,
Springer –Verlag.
3. Signal analysis – Candy, McGraw Hill Int. Student Edition
4. James V. Candy - Signal Processing: A Modern Approach, McGraw-Hill, International
Edition, 1988.
Page 404
I Year II Semester
L P C
4 0 3
IMAGE AND VIDEO PROCESSING
UNIT –I:
Fundamentals of Image Processing and Image Transforms:
Introduction, Image sampling, Quantization, Resolution, Image file formats, Elements of image
processing system, Applications of Digital image processing
Introduction, Need for transform, image transforms, Fourier transform, 2 D Discrete Fourier
transform and its transforms, Importance of phase, Walsh transform, Hadamard transform, Haar
transform, slant transform Discrete cosine transform, KL transform, singular value
decomposition, Radon transform, comparison of different image transforms.
UNIT –II:
Image Enhancement:
Spatial domain methods: Histogram processing, Fundamentals of Spatial filtering, Smoothing
spatial filters, Sharpening spatial filters.
Frequency domain methods: Basics of filtering in frequency domain, image smoothing, image
sharpening, Selective filtering.
Image Restoration:
Introduction to Image restoration, Image degradation, Types of image blur, Classification of
image restoration techniques, Image restoration model, Linear and Nonlinear image restoration
techniques, Blind deconvolution
UNIT –III:
Image Segmentation:
Introduction to image segmentation, Point, Line and Edge Detection, Region based
segmentation., Classification of segmentation techniques, Region approach to image
segmentation, clustering techniques, Image segmentation based on thresholding, Edge based
segmentation, Edge detection and linking, Hough transform, Active contour
Image Compression:
Introduction, Need for image compression, Redundancy in images, Classification of redundancy
in images, image compression scheme, Classification of image compression schemes,
Fundamentals of information theory, Run length coding, Shannon – Fano coding, Huffman
coding, Arithmetic coding, Predictive coding, Transformed based compression, Image
compression standard, Wavelet-based image compression, JPEG Standards.
UNIT -IV:
Basic Steps of Video Processing:
Analog Video, Digital Video. Time-Varying Image Formation models: Three-Dimensional
Motion Models, Geometric Image Formation, Photometric Image Formation, Sampling of Video
signals, Filtering operations.
Page 405
UNIT –V:
2-D Motion Estimation:
Optical flow, General Methodologies, Pixel Based Motion Estimation, Block- Matching
Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based Motion
Estimation, Multi resolution motion estimation, Waveform based coding, Block based transform
coding, Predictive coding, Application of motion estimation in Video coding.
TEXT BOOKS:
1. Digital Image Processing – Gonzaleze and Woods, 3rd
Ed., Pearson.
2. Video Processing and Communication – Yao Wang, JoemOstermann and Ya–quin
Zhang. 1st Ed., PH Int.
3. S.Jayaraman, S.Esakkirajan and T.VeeraKumar, “Digital Image processing, Tata
McGraw Hill publishers, 2009
REFRENCE BOOKS:
1. Digital Image Processing and Analysis-Human and Computer Vision Application with
CVIP Tools – ScotteUmbaugh, 2nd
Ed, CRC Press, 2011.
2. Digital Video Processing – M. Tekalp, Prentice Hall International.
3. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar – TMH, 2009.
4. Multidimentional Signal, Image and Video Processing and Coding – John Woods, 2nd
Ed,
Elsevier.
5. Digital Image Processing with MATLAB and Labview – Vipula Singh, Elsevier.
6. Video Demystified – A Hand Book for the Digital Engineer – Keith Jack, 5th
Ed.,
Elsevier.
Page 406
I Year II Semester
L P C
4 0 3
DETECTION AND ESTIMATION THEORY
UNIT –I:
Random Processes:
Discrete Linear Models, Markov Sequences and Processes, Point Processes, and Gaussian
Processes.
UNIT –II:
Detection Theory:
Basic Detection Problem, Maximum A posteriori Decision Rule, Minimum Probability of Error
Classifier, Bayes Decision Rule, Multiple-Class Problem (Bayes)- minimum probability error with
and without equal a priori probabilities, Neyman-Pearson Classifier, General Calculation of
Probability of Error, General Gaussian Problem, Composite Hypotheses.
UNIT –III:
Linear Minimum Mean-Square Error Filtering:
Linear Minimum Mean Squared Error Estimators, Nonlinear Minimum Mean Squared Error
Estimators. Innovations, Digital Wiener Filters with Stored Data, Real-time Digital Wiener
Filters, Kalman Filters.
UNIT –IV:
Statistics:
Measurements, Nonparametric Estimators of Probability Distribution and Density Functions, Point
Estimators of Parameters, Measures of the Quality of Estimators, Introduction to Interval
Estimates, Distribution of Estimators, Tests of Hypotheses, Simple Linear Regression, Multiple
Linear Regression.
UNIT –V:
Estimating the Parameters of Random Processes from Data:
Tests for Stationarity and Ergodicity, Model-free Estimation, Model-based Estimation of
Autocorrelation Functions, Power Special Density Functions.
TEXT BOOKS:
1. Random Signals: Detection, Estimation and Data Analysis - K. Sam Shanmugan& A.M.
Breipohl, Wiley India Pvt. Ltd, 2011.
2. Random Processes: Filtering, Estimation and Detection - Lonnie C. Ludeman, Wiley India
Pvt. Ltd., 2010.
Page 407
REFERENCE BOOKS:
1. Fundamentals of Statistical Signal Processing: Volume I Estimation Theory–
Steven.M.Kay, Prentice Hall, USA, 1998.
2. Fundamentals of Statistical Signal Processing: Volume I Detection Theory– Steven.M.Kay,
Prentice Hall, USA, 1998.
3. Introduction to Statistical Signal Processing with Applications - Srinath, Rajasekaran,
Viswanathan, 2003, PHI.
4. Statistical Signal Processing: Detection, Estimation and Time Series Analysis – Louis
L.Scharf, 1991, Addison Wesley.
5. Detection, Estimation and Modulation Theory: Part – I – Harry L. Van Trees, 2001, John
Wiley & Sons, USA.
6. Signal Processing: Discrete Spectral Analysis – Detection & Estimation – Mischa
Schwartz, Leonard Shaw, 1975, McGraw Hill.
Page 408
I Year II Semester
L P C
4 0 3
DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
UNIT –I:
Introduction to Digital Signal Processing:
Introduction, A Digital signal-processing system, The sampling process, Discrete time
sequences. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-
invariant systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations:
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT –II:
Architectures for Programmable DSP Devices:
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT -III:
Programmable Digital Signal Processors:
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX processors, Pipeline operation of
TMS320C54XX Processors.
UNIT –IV:
Analog Devices Family of DSP Devices:
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Blackfin Processor - The Blackfin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
UNIT –V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices:
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
Page 409
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach to Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. EmbeddedSignalProcessingwiththeMicroSignalArchitecturePublisher: Woon-SengGan,
Sen M. Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications – B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. Digital Signal Processing –Jonatham Stein, 2005, John Wiley.
3. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
4. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
5. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
6. Embedded Media Processing by David J. Katz and Rick Gentile of Analog Devices,
Newnes , ISBN 0750679123, 2005
Page 410
I Year II Semester
L P C
4 0 3
COMPUTER VISION
(ELECTIVE – III)
Page 411
I Year II Semester
L P C
4 0 3
EMBEDDED SYSTEM DESIGN
(ELECTIVE – III)
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
Page 412
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
Page 413
I Year II Semester
L P C
4 0 3
BIOMEDICAL SIGNAL PROCESSING
(ELECTIVE – III)
UNIT -I:
Random Processes:
Stationary random process, Ergodicity, Power spectral density and autocorrelation function
of random processes. Noise power spectral density analysis, Noise bandwidth and noise
figure of systems.
UNIT -II:
Data Compression Techniques:
Lossy and Lossless data reduction Algorithms, ECG data compression using Turning point,
AZTEC, CORTES, Huffman coding, vector quantisation, DICOM Standards
UNIT -III:
Cardiological Signal Processing:
Pre-processing, QRS Detection Methods, Rhythm analysis, Arrhythmia Detection
Algorithms, Automated ECG Analysis, ECG Pattern Recognition.
Adaptive Noise Cancelling: Principles of Adaptive Noise Cancelling, Adaptive Noise
Cancelling with the LMS Adaptation Algorithm, Noise Cancelling Method to Enhance ECG
Monitoring, Fetal ECG Monitoring.
UNIT -IV:
Signal Averaging, Polishing: Mean and trend removal, Prony’s method, Prony's Method
based on the Least Squares Estimate, Linear prediction, Yule – Walker (Y –W) equations,
Analysis of Evoked Potentials.
UNIT -V:
Neurological Signal Processing:
Modelling of EEG Signals, Detection of spikes and spindles Detection of Alpha, Beta and
Gamma Waves, Auto Regressive (A.R.) modelling of seizure EEG, Sleep Stage analysis,
Inverse Filtering, Least squares and polynomial modelling.
TEXT BOOKS:
1. Probability, Random Variables & Random Signal Principles – Peyton Z. Peebles, 4th
Ed.,
2009, TMH.
2. Biomedical Signal Processing- Principles and Techniques - D. C. Reddy, 2005, TMH.
Page 414
REFERENCE BOOKS:
1. Digital Biosignal Processing - Weitkunat R, 1991, Elsevier.
2. Biomedical Signal Processing - Akay M , IEEE Press.
3. Biomedical Signal Processing -Vol. I Time & Frequency Analysis - Cohen.A, 1986, CRC
Press.
4. Biomedical Digital Signal Processing: C-Language Experiments and Laboratory
Experiments, Willis J.Tompkins, PHI.
Page 415
I Year II Semester
L P C
4 0 3
INTERNET PROTOCOLS
(ELECTIVE - IV)
UNIT -I:
Internetworking Concepts:
Principles of Internetworking, Connectionless Internetworking, Application level
Interconnections, Network level Interconnection, Properties of thee Internet, Internet
Architecture, Wired LANS, Wireless LANs, Point-to-Point WANs, Switched WANs,
Connecting Devices, TCP/IP Protocol Suite.
IP Address:
Classful Addressing: Introduction, Classful Addressing, Other Issues, Sub-netting and Super-
netting
Classless Addressing: Variable length Blocks, Sub-netting, Address Allocation. Delivery,
Forwarding, and Routing of IP Packets: Delivery, Forwarding, Routing, Structure of Router.
ARP and RARP: ARP, ARP Package, RARP.
UNIT -II:
Internet Protocol (IP): Datagram, Fragmentation, Options, Checksum, IP V.6.
Transmission Control Protocol (TCP): TCP Services, TCP Features, Segment, A TCP
Connection, State Transition Diagram, Flow Control, Error Control, Congestion Control, TCP
Times.
Stream Control Transmission Protocol (SCTP): SCTP Services, SCTP Features, Packet
Format, Flow Control, Error Control, Congestion Control.
Mobile IP: Addressing, Agents, Three Phases, Inefficiency in Mobile IP.
Classical TCP Improvements: Indirect TCP, Snooping TCP, Mobile TCP, Fast Retransmit/
Fast Recovery, Transmission/ Time Out Freezing, Selective Retransmission, Transaction
Oriented TCP.
UNIT -III:
Unicast Routing Protocols (RIP, OSPF, and BGP): Intra and Inter-domain Routing, Distance
Vector Routing, RIP, Link State Routing, OSPF, Path Vector Routing, BGP.
Multicasting and Multicast Routing Protocols: Unicast - Multicast- Broadcast, Multicast
Applications, Multicast Routing, Multicast Link State Routing: MOSPF, Multicast Distance
Vector: DVMRP.
Page 416
UNIT -IV:
Domain Name System (DNS): Name Space, Domain Name Space, Distribution of Name
Space, and DNS in the internet.
Remote Login TELNET: Concept, Network Virtual Terminal (NVT).
File Transfer FTP and TFTP: File Transfer Protocol (FTP).
Electronic Mail: SMTP and POP.
Network Management-SNMP: Concept, Management Components, World Wide Web- HTTP
Architecture.
UNIT -V:
Multimedia:
Digitizing Audio and Video, Network security, security in the internet firewalls. Audio and
Video Compression, Streaming Stored Audio/Video, Streaming Live Audio/Video, Real-Time
Interactive Audio/Video, RTP, RTCP, Voice Over IP. Network Security, Security in the
Internet, Firewalls.
TEXT BOOKS:
1. TCP/IP Protocol Suite- Behrouz A. Forouzan, Third Edition, TMH
2. Internetworking with TCP/IP Comer 3 rd edition PHI
REFERENCE BOOKS:
1. High performance TCP/IP Networking- Mahbub Hassan, Raj Jain, PHI, 2005
2. Data Communications & Networking – B.A. Forouzan– 2nd
Edition – TMH
3. High Speed Networks and Internets- William Stallings, Pearson Education, 2002.
4. Data and Computer Communications, William Stallings, 7th
Edition., PEI.
5. The Internet and Its Protocols – AdrinFarrel, Elsevier, 2005.
Page 417
I Year II Semester
L P C
4 0 3
RADAR SIGNAL PROCESSING
(ELECTIVE -IV)
UNIT -I:
Introduction:
Radar Block Diagram, Bistatic Radar, Monostatic Radar, Radar Equation, Information
Available from Radar Echo. Review of Radar Range Performance– General Radar Range
Equation, Radar Detection with Noise Jamming, Beacon and Repeater Equations, MTI and
Pulse Doppler Radar.
Matched Filter Receiver – Impulse Response, Frequency Response Characteristic and its
Derivation, Matched Filter and Correlation Function, Correlation Detection and Cross-
Correlation Receiver, Efficiency of Non-Matched Filters, Matched Filter for Non-White
Noise.
UNIT -II:
Detection of Radar Signals in Noise:
Detection Criteria – Neyman-Pearson Observer, Likelihood-Ratio Receiver, Inverse
Probability Receiver, Sequential Observer, Detectors–Envelope Detector, Logarithmic
Detector, I/Q Detector. Automatic Detection-CFAR Receiver, Cell Averaging CFAR
Receiver, CFAR Loss, CFAR Uses in Radar. Radar Signal Management–Schematics,
Component Parts, Resources and Constraints.
UNIT -III:
Waveform Selection [3, 2]:
Radar Ambiguity Function and Ambiguity Diagram – Principles and Properties; Specific
Cases – Ideal Case, Single Pulse of Sine Wave, Periodic Pulse Train, Single Linear FM
Pulse, Noise Like Waveforms, Waveform Design Requirements, Optimum Waveforms for
Detection in Clutter, Family of Radar Waveforms.
UNIT -IV:
Pulse Compression in Radar Signals:
Introduction, Significance, Types, Linear FM Pulse Compression – Block Diagram,
Characteristics, Reduction of Time Side lobes, Stretch Techniques, Generation and
Decoding of FM Waveforms – Block Schematic and Characteristics of Passive System,
Digital Compression, SAW Pulse Compression.
Page 418
UNIT V:
Phase Coding Techniques:
Principles, Binary Phase Coding, Barker Codes, Maximal Length Sequences
(MLS/LRS/PN), Block Diagram of a Phase Coded CW Radar.
Poly Phase Codes : Frank Codes, Costas Codes, Non-Linear FM Pulse Compression,
Doppler Tolerant PC Waveforms – Short Pulse, Linear Period Modulation (LPM/HFM),
Sidelobe Reduction for Phase Coded PC Signals.
TEXT BOOKS:
1. Radar Handbook - M.I. Skolnik, 2nd
Ed., 1991, McGraw Hill.
2. Radar Design Principles : Signal Processing and The Environment - Fred E. Nathanson, 2nd
Ed.,
1999, PHI.
3. Introduction to Radar Systems - M.I. Skolnik, 3rd
Ed., 2001, TMH.
REFERENCE BOOKS:
1. Radar Principles - Peyton Z. Peebles, Jr., 2004, John Wiley.
2. Radar Signal Processing and Adaptive Systems - R. Nitzberg, 1999, Artech House.
Page 419
I Year II Semester
L P C
4 0 3
WIRELESS COMMUNICATIONS AND NETWORKS
ELECTIVE - IV
UNIT -I:
The Cellular Concept-System Design Fundamentals:
Introduction, Frequency Reuse, Interference and system capacity – Co channel Interference and
system capacity, Channel planning for Wireless Systems, Adjacent Channel interference , Power
Control for Reducing interference, Improving Coverage & Capacity in Cellular Systems- Cell
Splitting, Sectoring, Channel Assignment Strategies, Handoff Strategies- Prioritizing Handoffs,
Practical Handoff Considerations, Trunking and Grade of Service
UNIT –II:
Mobile Radio Propagation: Large-Scale Path Loss:
Introduction to Radio Wave Propagation, Free Space Propagation Model, Relating Power to
Electric Field, Basic Propagation Mechanisms, Reflection: Reflection from Dielectrics,
Brewster Angle, Reflection from prefect conductors, Ground Reflection (Two-Ray) Model,
Diffraction: Fresnel Zone Geometry, Knife-edge Diffraction Model, Multiple knife-edge
Diffraction, Scattering, Outdoor Propagation Models- Longley-Ryce Model, Okumura Model,
Hata Model, PCS Extension to Hata Model, Walfisch and Bertoni Model, Wideband PCS
Microcell Model, Indoor Propagation Models-Partition losses (Same Floor), Partition losses
between Floors, Log-distance path loss model, Ericsson Multiple Breakpoint Model, Attenuation
Factor Model, Signal penetration into buildings, Ray Tracing and Site Specific Modeling.
UNIT –III:
Mobile Radio Propagation: Small –Scale Fading and Multipath
Small Scale Multipath propagation-Factors influencing small scale fading, Doppler shift,
Impulse Response Model of a multipath channel- Relationship between Bandwidth and Received
power, Small-Scale Multipath Measurements-Direct RF Pulse System, Spread Spectrum Sliding
Correlator Channel Sounding, Frequency Domain Channels Sounding, Parameters of Mobile
Multipath Channels-Time Dispersion Parameters, Coherence Bandwidth, Doppler Spread and
Coherence Time, Types of Small-Scale Fading-Fading effects Due to Multipath Time Delay
Spread, Flat fading, Frequency selective fading, Fading effects Due to Doppler Spread-Fast
fading, slow fading, Statistical Models for multipath Fading Channels-Clarke’s model for flat
fading, spectral shape due to Doppler spread in Clarke’s model, Simulation of Clarke and Gans
Fading Model, Level crossing and fading statistics, Two-ray Rayleigh Fading Model.
Page 420
UNIT -IV:
Equalization and Diversity
Introduction, Fundamentals of Equalization, Training a Generic Adaptive Equalizer, Equalizers
in a communication Receiver, Linear Equalizers, Non-linear Equalization-Decision Feedback
Equalization (DFE), Maximum Likelihood Sequence Estimation (MLSE) Equalizer, Algorithms
for adaptive equalization-Zero Forcing Algorithm, Least Mean Square Algorithm, Recursive
least squares algorithm. Diversity -Derivation of selection Diversity improvement, Derivation of
Maximal Ratio Combining improvement, Practical Space Diversity Consideration-Selection
Diversity, Feedback or Scanning Diversity, Maximal Ratio Combining, Equal Gain Combining,
Polarization Diversity, Frequency Diversity, Time Diversity, RAKE Receiver.
UNIT -V:
Wireless Networks
Introduction to wireless Networks, Advantages and disadvantages of Wireless Local Area
Networks, WLAN Topologies, WLAN Standard IEEE 802.11, IEEE 802.11 Medium Access
Control, Comparison of IEEE 802.11 a,b,g and n standards, IEEE 802.16 and its enhancements,
Wireless PANs, HiperLan, WLL.
TEXT BOOKS:
1. Wireless Communications, Principles, Practice – Theodore, S. Rappaport, 2nd
Ed., 2002,
PHI.
2. Wireless Communications-Andrea Goldsmith, 2005 Cambridge University Press.
3. Mobile Cellular Communication – GottapuSasibhushanaRao, Pearson Education, 2012.
REFERENCE BOOKS:
1. Principles of Wireless Networks – KavehPahLaven and P. Krishna Murthy, 2002, PE
2. Wireless Digital Communications – KamiloFeher, 1999, PHI.
3. Wireless Communication and Networking – William Stallings, 2003, PHI.
4. Wireless Communication – UpenDalal, Oxford Univ. Press
5. Wireless Communications and Networking – Vijay K. Gary, Elsevier.
Page 421
I Year II Semester
L P C
4 0 3
ADVANCED SIGNAL PROCESSING LAB
Note:
A. Minimum of 10 Experiments have to be conducted
B. All Simulations are be carried out using MATLAB/DSP Processors/Labview
Software & DSP Kits
1. Study of various addressing modes of DSP using simple programming examples
2. Generation of waveforms using recursive/filter methods
3. Sampling of input signal and display
4. Implementation of Linear and Circular Convolution for sinusoidal signals
5. Framing & windowing of speech signal.
6. Finding voiced & unvoiced detection for each frame of speech signal.
7. IIR Filter implementation using probe points
8. Implementation of FIR filters on DSP processor
9. Loop back using DSK kit
10. Real time signal enhancement using Adaptive Filter.
11. Representation of different Q-formats using GEL function
12. Verification of Finite word length effects (Overflow, Coefficient Quantization, Scaling
and Saturation mode in DSP processors)
13. Image enhancement using spatial & frequency domain
14. Implementation of Image segmentation techniques
15. Extraction of frames from Video signal
Page 422
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
TELEMATICS (Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 423
I Semester
II Semester
S. No. Name of the Subject L P C
1 Telecommunication Switching Systems 4 - 3
2 Optical Communication Technology 4 - 3
3 Mobile Cellular Communications 4 - 3
4 Digital Data Communications 4 - 3
5
Elective I
1. Stochastic Signal Processing
2. Software Defined Radio
3. Radio and Navigational Aids
4 - 3
6
Elective II
1. Digital System Design
2. Cyber Security
3. Network Security and Cryptography
4. Advanced Computer Networks
4 - 3
7 Wireless Communications Lab - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Internet Protocols 4 - 3
2 Coding Theory and Applications 4 - 3
3 Wireless Communication & Networks 4 - 3
4 Telematics and Control 4 - 3
5
Elective III
1. Internet of Things
2. Adhoc Networks
3. Multi Media Signal Coding
4 - 3
6
Elective IV
1. DSP Processors and Architectures
2. GPS
3. Design for Testability
4 - 3
7 Advanced Communications Lab - 3 2
Total Credits 20
Page 424
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 425
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
VLSI&ES, ES&VLSI, VLSID&ES (Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 426
I Semester
II Semester
S. No. Name of the Subject L P C
1 Digital System Design 4 - 3
2 VLSI Technology and Design 4 - 3
3 CMOS Analog IC Design 4 - 3
4 Hardware Software Co-Design 4 - 3
5
Elective I
1. Embedded - C
2. CMOS Digital IC Design
3. Soft Computing Techniques
4. Cyber Security
4 - 3
6
Elective II
1. Advanced Operating Systems
2. System on Chip Design
3. Network Security and Cryptography
4 - 3
7 VLSI Laboratory - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 Embedded System Design 4 - 3
2 CMOS Mixed Signal Circuit Design 4 - 3
3 Embedded Real Time Operating Systems 4 - 3
4 Design For Testability 4 - 3
5
Elective III
1. DSP Processors & Architectures
2. Low Power VLSI Design
3. VLSI Signal Processing
4 - 3
6
Elective IV
1. Micro Electro Mechanical Systems (MEMS) Design
2. CPLD and FPGA Architectures and Applications.
3. Semiconductor Memory Design and Testing.
4 - 3
7 Embedded System Design Laboratory - 3 2
Total Credits 20
Page 427
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 428
I Year I Semester
L P C
4 0 3
DIGITAL SYSTEM DESIGN
UNIT-I: Minimization Procedures and CAMP Algorithm
Review on minimization of switching functions using tabular methods, k-map, QM algorithm,
CAMP-I algorithm, Phase-I: Determination of Adjacencies, DA, CSC, SSMs and EPCs,, CAMP-
I algorithm, Phase-II: Passport checking,Determination of SPC, CAMP-II algorithm:
Determination of solution cube, Cube based operations, determination of selected cubes are
wholly within the given switching function or not, Introduction to cube based algorithms.
UNIT-II: PLA Design, PLA Minimization and Folding Algorithms
Introduction to PLDs, basic configurations and advantages of PLDs, PLA-Introduction, Block
diagram of PLA, size of PLA, PLA design aspects, PLA minimization algorithm(IISc algorithm),
PLA folding algorithm(COMPACT algorithm)-Illustration of algorithms with suitable examples.
UNIT -III: Design of Large Scale Digital Systems
Algorithmic state machinecharts-Introduction, Derivation of SM Charts, Realization of SM
Chart, control implementation, control unit design, data processor design, ROM design, PAL
design aspects, digital system design approaches using CPLDs, FPGAs and ASICs.
UNIT-IV: Fault Diagnosis in Combinational Circuits
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.
UNIT-V: Fault Diagnosis in Sequential Circuits
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd
Edition, 2001, TMH
3. Digital system Design using PLDd-Lala
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th
Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
Page 429
I Year I Semester
L P C
4 0 3
VLSI TECHNOLOGY AND DESIGN
UNIT-I:
VLSI Technology: Fundamentals and applications, IC production process, semiconductor
processes, design rules and process parameters, layout techniques and process parameters.
VLSI Design: Electronic design automation concept, ASIC and FPGA design flows, SOC
designs, design technologies: combinational design techniques, sequential design techniques,
state machine logic design techniques and design issues.
UNIT-II:
CMOS VLSI Design: MOSTechnology and fabrication process of pMOS, nMOS, CMOS and
BiCMOS technologies, comparison of different processes.
Building Blocks of a VLSI circuit: Computer architecture, memory architectures,
communication interfaces, mixed signal interfaces.
VLSI Design Issues: Design process, design for testability, technology options, power
calculations, package selection, clock mechanisms, mixed signal design.
UNIT-III:
Basic electrical properties of MOS and BiCMOS circuits, MOS and BiCMOS circuit design
processes, Basic circuit concepts, scaling of MOS circuits-qualitatitive and quantitative analysis
with proper illustrations and necessary derivations of expressions.
UNIT-IV:
Subsystem Design and Layout: Some architectural issues, switch logic, gate logic, examples of
structured design (combinational logic), some clocked sequential circuits, other system
considerations.
Subsystem Design Processes: Some general considerations and an illustration of design
processes, design of an ALU subsystem.
Page 430
UNIT-V:
Floor Planning: Introduction, Floor planning methods, off-chip connections.
Architecture Design: Introduction, Register-Transfer design, high-level synthesis, architectures
for low power, architecture testing.
Chip Design: Introduction and design methodologies.
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A. Pucknell,
SholehEshraghian, 2005, PHI Publications.
2. Modern VLSI Design-Wayne Wolf, 3rd
Ed., 1997, Pearson Education.
3. VLSI Design-Dr.K.V.K.K.Prasad, KattulaShyamala, Kogent Learning Solutions Inc.,
2012.
REFERENCE BOOKS:
1. VLSI Design Technologies for Analog and Digital Circuits, Randall L.Geiger, Phillip
E.Allen, Noel R.Strader, TMH Publications, 2010.
2. Introduction to VLSI Systems: A Logic, Circuit and System Perspective- Ming-BO Lin,
CRC Press, 2011.
3. Principals of CMOS VLSI Design-N.H.E Weste, K. Eshraghian, 2nd
Edition, Addison
Wesley.
Page 431
I Year I Semester
L P C
4 0 3
CMOS ANALOG IC DESIGN
UNIT -I: MOS Devices and Modeling
The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout,
CMOS Device Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small-
Signal Model for the MOS Transistor, Computer Simulation Models, Sub-threshold MOS
Model.
UNIT -II: Analog CMOS Sub-Circuits
MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors-
Current mirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current
Mirror, Current and Voltage References, Band gap Reference.
UNIT -III: CMOS Amplifiers
Inverters, Differential Amplifiers, Cascode Amplifiers, Current Amplifiers, Output Amplifiers,
High Gain Amplifiers Architectures.
UNIT -IV: CMOS Operational Amplifiers
Design of CMOS Op Amps, Compensation of Op Amps, Design of Two-Stage Op Amps,
Power- Supply Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps, Measurement
Techniques of OP Amp.
UNIT -V: Comparators
Characterization of Comparator, Two-Stage, Open-Loop Comparators, Other Open-Loop
Comparators, Improving the Performance of Open-Loop Comparators, Discrete-Time
Comparators.
TEXT BOOKS:
1. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford
University Press, International Second Edition/Indian Edition, 2010.
2. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul J. Hurst, S. Lewis
and R. G. Meyer, Wiley India, Fifth Edition, 2010.
REFERENCE BOOKS:
1. Analog Integrated Circuit Design- David A.Johns, Ken Martin, Wiley Student Edn, 2016.
2. Design of Analog CMOS Integrated Circuits- BehzadRazavi, TMH Edition.
3. CMOS: Circuit Design, Layout and Simulation- Baker, Li and Boyce, PHI.
Page 432
I Year I Semester
L P C
4 0 3
HARDWARE SOFTWARE CO-DESIGN
UNIT-I:
Co- Design Issues
Co- Design Models, Architectures, Languages, A Generic Co-design Methodology.
Co- Synthesis Algorithms
Hardware software synthesis algorithms: hardware – software partitioning distributed system co-
synthesis.
UNIT-II:
Prototyping and Emulation
Prototyping and emulation techniques, prototyping and emulation environments, future
developments in emulation and prototyping architecture specialization techniques, system
communication infrastructure
Target Architectures
Architecture Specialization techniques, System Communication infrastructure, Target
Architecture and Application System classes, Architecture for control dominated systems (8051-
Architectures for High performance control), Architecture for Data dominated systems
(ADSP21060, TMS320C60), Mixed Systems.
UNIT-III:
Compilation Techniques and Tools for Embedded Processor Architectures
Modern embedded architectures, embedded software development needs, compilation
technologies, practical consideration in a compiler development environment.
UNIT-IV:
Design Specification and Verification
Design, co-design, the co-design computational model, concurrency coordinating concurrent
computations, interfacing components, design verification, implementation verification,
verification tools, interface verification.
Page 433
UNIT-V:
Languages for System-Level Specification and Design-I
System-level specification, design representation for system level synthesis, system level
specification languages.
Languages for System-Level Specification and Design-II
Heterogeneous specifications and multi language co-simulation, the cosyma system and lycos
system.
TEXT BOOKS:
1. Hardware / Software Co- Design Principles and Practice – Jorgen Staunstrup, Wayne
Wolf – 2009, Springer.
2. Hardware / Software Co- Design - Giovanni De Micheli, Mariagiovanna Sami, 2002,
Kluwer Academic Publishers.
REFERENCE BOOKS:
1. A Practical Introduction to Hardware/Software Co-design -Patrick R. Schaumont -
2010 – Springer Publications.
Page 434
I Year I Semester
L P C
4 0 3
EMBEDDED C
(ELECTIVE -I)
UNIT-I:
Programming Embedded Systems in C
Introduction ,What is an embedded system, Which processor should you use, Which
programming language should you use, Which operating system should you use, How do you
develop embedded software, Conclusions
Introducing the 8051 Microcontroller Family
Introduction, What’s in a name, The external interface of the Standard 8051, Reset requirements
,Clock frequency and performance, Memory issues, I/O pins, Timers, Interrupts, Serial interface,
Power consumption ,Conclusions
UNIT-II: Reading Switches
Introduction, Basic techniques for reading from port pins, Example: Reading and writing bytes,
Example: Reading and writing bits (simple version), Example: Reading and writing bits (generic
version), The need for pull-up resistors, Dealing with switch bounce, Example: Reading switch
inputs (basic code), Example: Counting goats, Conclusions
UNIT-III: Adding Structure to the Code
Introduction, Object-oriented programming with C, The Project Header (MAIN.H), The Port
Header (PORT.H), Example: Restructuring the ‘Hello Embedded World’ example, Example:
Restructuring the goat-counting example, Further examples, Conclusions
UNIT-IV: Meeting Real-Time Constraints
Introduction, Creating ‘hardware delays’ using Timer 0 and Timer 1, Example: Generating a
precise 50 ms delay, Example: Creating a portable hardware delay, Why not use Timer 2?, The
need for ‘timeout’ mechanisms, Creating loop timeouts, Example: Testing loop timeouts,
Example: A more reliable switch interface, Creating hardware timeouts, Example: Testing a
hardware timeout, Conclusions
UNIT-V: Case Study-Intruder Alarm System
Introduction, The software architecture, Key software components used in this example, running
the program, the software, Conclusions
Page 435
TEXT BOOKS:
1. Embedded C - Michael J. Pont, 2nd
Ed., Pearson Education, 2008.
REFERENCE BOOKS:
1. PIC MCU C-An introduction to programming, The Microchip PIC in CCS C - Nigel
Gardner.
Page 436
I Year I Semester
L P C
4 0 3
CMOS DIGITAL IC DESIGN
(ELECTIVE -I)
UNIT-I: MOS Design
Pseudo NMOS Logic – Inverter, Inverter threshold voltage, Output high voltage, Output Low
voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS
logic gates, Transistor equivalency, CMOS Inverter logic.
UNIT-II: Combinational MOS Logic Circuits:
MOS logic circuits with NMOS loads, Primitive CMOS logic gates – NOR & NAND gate,
Complex Logic circuits design – Realizing Boolean expressions using NMOS gates and CMOS
gates , AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with
Transmission gates.
UNIT-III: Sequential MOS Logic Circuits
Behaviour of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch
and edge triggered flip-flop.
UNIT-IV: Dynamic Logic Circuits
Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic
CMOS transmission gate logic, High performance Dynamic CMOS circuits.
UNIT-V: Semiconductor Memories
Types, RAM array organization, DRAM – Types, Operation, Leakage currents in DRAM cell
and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR
flash and NAND flash.
TEXT BOOKS:
1. Digital Integrated Circuit Design – Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo Kang, Yusuf Leblebici,
TMH, 3rd
Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective – Ming-BO Lin,
CRC Press, 2011
2. Digital Integrated Circuits – A Design Perspective, Jan M. Rabaey, AnanthaChandrakasan,
BorivojeNikolic, 2nd
Ed., PHI.
Page 437
I Year I Semester
L P C
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -I)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach, Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control, Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear time delay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
Page 438
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 439
I Year I Semester
L P C
4 0 3
CYBER SECURITY
(ELECTIVE -I)
Page 440
I Year I Semester
L P C
4 0 3
ADVANCED OPERATING SYSTEMS
(ELECTIVE-II)
UNIT-I: Introduction to Operating Systems
Overview of computer system hardware, Instruction execution, I/O function, Interrupts, Memory
hierarchy, I/O Communication techniques, Operating system objectives and functions,
Evaluation of operating System
UNIT-II: Introduction to UNIX and LINUX
Basic Commands & Command Arguments, Standard Input, Output, Input / Output Redirection,
Filters and Editors, Shells and Operations
UNIT –III:
System Calls:System calls and related file structures, Input / Output, Process creation &
termination.
Inter Process Communication:Introduction, File and record locking, Client – Server example,
Pipes, FIFOs, Streams & Messages, Name Spaces, Systems V IPC, Message queues,
Semaphores, Shared Memory, Sockets & TLI.
UNIT –IV:
Introduction to Distributed Systems:
Goals of distributed system, Hardware and software concepts, Design issues.
Communication in Distributed Systems:
Layered protocols, ATM networks, Client - Server model, Remote procedure call and Group
communication.
UNIT –V:
Synchronization in Distributed Systems:
Clock synchronization, Mutual exclusion, E-tech algorithms, Bully algorithm, Ring algorithm,
Atomic transactions
Deadlocks:
Dead lock in distributed systems, Distributed dead lock prevention and distributed dead
lock detection.
Page 441
TEXT BOOKS:
1. The Design of the UNIX Operating Systems – Maurice J. Bach, 1986, PHI.
2. Distributed Operating System - Andrew. S. Tanenbaum, 1994, PHI.
3. The Complete Reference LINUX – Richard Peterson, 4th
Ed., McGraw – Hill.
REFERENCE BOOKS:
1. Operating Systems: Internal and Design Principles - Stallings, 6th
Ed., PE.
2. Modern Operating Systems - Andrew S Tanenbaum, 3rd
Ed., PE.
3. Operating System Principles - Abraham Silberchatz, Peter B. Galvin, Greg Gagne, 7th
Ed., John Wiley
4. UNIX User Guide – Ritchie & Yates.
5. UNIX Network Programming - W.Richard Stevens, 1998, PHI.
Page 442
I Year I Semester
L P C
4 0 3
SYSTEM ON CHIP DESIGN
(ELECTIVE-II)
UNIT-I: Introduction to the System Approach
System Architecture, Components of the system, Hardware & Software, Processor Architectures,
Memory and Addressing. System level interconnection, An approach for SOC Design, System
Architecture and Complexity.
UNIT-II: Processors
Introduction , Processor Selection for SOC, Basic concepts in Processor Architecture, Basic
concepts in Processor Micro Architecture, Basic elements in Instruction handling. Buffers:
minimizing Pipeline Delays, Branches, More Robust Processors, Vector Processors and Vector
Instructions extensions, VLIW Processors, Superscalar Processors.
UNIT-III: Memory Design for SOC
Overview of SOC external memory, Internal Memory, Size, Scratchpads and Cache memory,
Cache Organization, Cache data, Write Policies, Strategies for line replacement at miss time,
Types of Cache, Split – I, and D – Caches, Multilevel Caches, Virtual to real translation , SOC
Memory System, Models of Simple Processor – memory interaction.
UNIT-IV: Interconnect Customization and Configuration
Inter Connect Architectures, Bus: Basic Architectures, SOC Standard Buses , Analytic Bus
Models, Using the Bus model, Effects of Bus transactions and contention time. SOC
Customization: An overview, Customizing Instruction Processor, Reconfiguration Technologies,
Mapping design onto Reconfigurable devices, Instance- Specific design, Customizable Soft
Processor, Reconfiguration - overhead analysis and trade-off analysis on reconfigurable
Parallelism.
UNIT-V: Application Studies / Case Studies
SOC Design approach, AES algorithms, Design and evaluation, Image compression – JPEG
compression.
TEXT BOOKS:
1. Computer System Design System-on-Chip - Michael J. Flynn and Wayne Luk, Wiely
India Pvt. Ltd.
2. ARM System on Chip Architecture – Steve Furber –2nd
Ed., 2000, Addison Wesley
Professional.
Page 443
REFERENCE BOOKS:
1. Design of System on a Chip: Devices and Components – Ricardo Reis, 1st Ed., 2004,
Springer
2. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded
Technology) – Jason Andrews – Newnes, BK and CDROM.
3. System on Chip Verification – Methodologies and Techniques –PrakashRashinkar, Peter
Paterson and Leena Singh L, 2001, Kluwer Academic Publishers.
Page 444
I Year I Semester
L P C
4 0 3
NETWORK SECURITY & CRYPTOGRAPHY
(ELECTIVE-II)
UNIT-I: Introduction
Attacks, Services and Mechanisms, Security attacks, Security services, A Model for
Internetwork security.Classical Techniques: Conventional Encryption model, Steganography,
Classical Encryption Techniques.
UNIT-II:
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.
Conventional Encryption:
Placement of Encryption function, Traffic confidentiality, Key distribution, Random Number
Generation.
Public Key Cryptography:
Principles, RSA Algorithm, Key Management, Diffie-Hellman Key exchange, Elliptic Curve
Cryptography.
UNIT-III:
Number Theory:
Prime and Relatively prime numbers, Modular arithmetic, Fermat’s and Euler’s theorems,
Testing for primality, Euclid’s Algorithm, the Chinese remainder theorem, Discrete logarithms.
Message authentication and Hash Functions:
Authentication requirements and functions, Message Authentication, Hash functions, Security of
Hash functions and MACs.
Page 445
UNIT-IV:
Hash and Mac Algorithms: MD File, Message digest Algorithm, Secure Hash Algorithm,
RIPEMD-160, HMAC.
Digital signatures and Authentication Protocols: Digital signatures, Authentication Protocols,
Digital signature standards.
Authentication Applications: Kerberos, X.509 directory Authentication service.Electronic Mail
Security: Pretty Good Privacy, S/MIME.
UNIT-V:
IP Security: Overview, Architecture, Authentication, Encapsulating Security Payload,
Combining security Associations, Key Management.
Web Security: Web Security requirements, Secure sockets layer and Transport layer security,
Secure Electronic Transaction.
Intruders, Viruses and Worms: Intruders, Viruses and Related threats.
Fire Walls: Fire wall Design Principles, Trusted systems.
TEXT BOOKS:
1. Cryptography and Network Security: Principles and Practice - William Stallings, 2000, PE.
REFERENCE BOOKS:
1. Principles of Network and Systems Administration, Mark Burgess,JohnWiey.
Page 446
I Year I Semester
L P C
0 3 2
VLSI LABORATORY
PART-A: VLSI Lab (Front-end Environment)
• The students are required to design the logic circuit to perform the following
experiments using necessary simulator (Xilinx ISE Simulator/ Mentor Graphics
Questa Simulator) to verify the logical /functional operation and to perform the
analysis with appropriate synthesizer (Xilinx ISE Synthesizer/Mentor Graphics
Precision RTL) and then verify the implemented logic with different hardware
modules/kits (CPLD/FPGA kits).
• The students are required to acquire the knowledge in both the Platforms (Xilinx
and Mentor graphics) by perform at least SIX experiments on each Platform.
List of Experiments:
1. Realization of Logic gates.
2. Parity Encoder.
3. Random Counter
4. Synchronous RAM.
5. ALU.
6. UART Model.
7. Fire Detection and Control System using Combinational Logic circuits.
8. Traffic Light Controller using Sequential Logic circuits
9. Pattern Detection using Moore Machine.
10. Finite State Machine (FSM) based logic circuit.
Page 447
PART-A: VLSI Lab (Back-end Environment)
• The students are required to design and implement the Layout of the following
experiments of any FOUR using CMOS 130nm Technology withMentor Graphics
Tool.
List of Experiments:
1. Inverter Characteristics.
2. Full Adder.
3. RS-Latch, D-Latch and Clock Divider.
4. Synchronous Counter and Asynchronous Counter.
5. Static and Dynamic RAM.
6. ROM
7. Digital-to-Analog-Converter.
8. Analog-to-Digital Converter.
Lab Requirements:
Software:Xilinx ISE Suite 13.2 Version, Mentor Graphics-Questa Simulator, Mentor Graphics-
Precision RTL, Mentor Graphics Back End/Tanner Software tool.
Hardware:Personal Computer with necessary peripherals, configuration and operating System
and relevant VLSI (CPLD/FPGA) hardware Kits.
Page 448
I Year II Semester
L P C
4 0 3
EMBEDDED SYSTEM DESIGN
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
Page 449
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
Page 450
I Year II Semester
L P C
4 0 3
CMOS MIXED SIGNAL CIRCUIT DESIGN
UNIT-I: Switched Capacitor Circuits
Introduction to Switched Capacitor circuits- basic building blocks, Operation and Analysis, Non-
ideal effects in switched capacitor circuits, Switched capacitor integrators first order filters,
Switch sharing, biquad filters.
UNIT-II: Phased Lock Loop (PLL)
Basic PLL topology, Dynamics of simple PLL, Charge pump PLLs-Lock acquisition,
Phase/Frequency detector and charge pump, Basic charge pump PLL, Non-ideal effects in PLLs-
PFD/CP non-idealities, Jitter in PLLs, Delay locked loops, applications.
UNIT-III: Data Converter Fundamentals
DC and dynamic specifications, Quantization noise, Nyquist rate D/A converters- Decoder based
converters, Binary-Scaled converters, Thermometer-code converters, Hybrid converters
UNIT-IV: Nyquist Rate A/D Converters
Successive approximation converters, Flash converter, Two-step A/D converters, Interpolating
A/D converters, Folding A/D converters, Pipelined A/D converters, Time-interleaved converters.
UNIT-V: Oversampling Converters
Noise shaping modulators, Decimating filters and interpolating filters, Higher order modulators,
Delta sigma modulators with multibitquantizers, Delta sigma D/A
TEXT BOOKS:
1. Design of Analog CMOS Integrated Circuits- BehzadRazavi, TMH Edition, 2002
2. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford
University Press, International Second Edition/Indian Edition, 2010.
3. Analog Integrated Circuit Design- David A. Johns,Ken Martin, Wiley Student Edition,
2016
REFERENCE BOOKS:
1. CMOS Integrated Analog-to- Digital and Digital-to-Analog converters-Rudy Van De
Plassche, Kluwer Academic Publishers, 2003
2. Understanding Delta-Sigma Data converters-Richard Schreier, Wiley Interscience, 2005.
3. CMOS Mixed-Signal Circuit Design - R. Jacob Baker, Wiley Interscience, 2009.
Page 451
I Year II Semester
L P C
4 0 3
EMBEDDED REAL TIME OPERATING SYSTEMS
UNIT-I: Introduction
OS Services, Process Management, Timer Functions, Event Functions, Memory Management,
Device, File and IO Systems Management, Interrupt Routines in RTOS Environment and
Handling of Interrupt Source Calls, Real-Time Operating Systems, Basic Design Using an
RTOS, RTOS Task Scheduling Models, Interrupt Latency and Response of the Tasks as
Performance Metrics, OS Security Issues.
UNIT-II: RTOS Programming
Basic Functions and Types of RTOS for Embedded Systems, RTOS mCOS-II, RTOS Vx Works,
Programming concepts of above RTOS with relevant Examples, Programming concepts of
RTOS Windows CE, RTOS OSEK, RTOS Linux 2.6.x and RTOS RT Linux.
UNIT-III: Program Modeling – Case Studies
Case study of embedded system design and coding for an Automatic Chocolate Vending
Machine (ACVM) Using Mucos RTOS, case study of digital camera hardware and software
architecture, case study of coding for sending application layer byte streams on a TCP/IP
Network Using RTOS Vx Works, Case Study of Embedded System for an Adaptive Cruise
Control (ACC) System in Car, Case Study of Embedded System for a Smart Card, Case Study of
Embedded System of Mobile Phone Software for Key Inputs.
UNIT-IV: Target Image Creation & Programming in Linux
Off-The-Shelf Operating Systems, Operating System Software, Target Image Creation for
Window XP Embedded, Porting RTOS on a Micro Controller based Development
Board.Overview and programming concepts of Unix/Linux Programming, Shell Programming,
System Programming.
UNIT-V: Programming in RT Linux
Overview of RT Linux, Core RT Linux API, Program to display a message periodically,
semaphore management, Mutex, Management, Case Study of Appliance Control by RT Linux
System.
Page 452
TEXT BOOKS:
1. Dr. K.V.K.K. Prasad: “Embedded/Real-Time Systems” Dream Tech Publications, Black
pad book.
2. Rajkamal: “Embedded Systems-Architecture, Programming and Design”, Tata McGraw
Hill Publications, Second Edition, 2008.
REFERENCES:
1. Labrosse, “Embedding system building blocks “, CMP publishers.
2. Rob Williams,” Real time Systems Development”, Butterworth Heinemann Publications.
Page 453
I Year II Semester
L P C
4 0 3
DESIGN FOR TESTABILITY
UNIT-I: Introduction to Testing
Testing Philosophy, Role of Testing, Digital and Analog VLSI Testing, VLSI Technology
Trends affecting Testing, Types of Testing, Fault Modeling: Defects, Errors and Faults,
Functional Versus Structural Testing, Levels of Fault Models, Single Stuck-at Fault.
UNIT-II: Logic and Fault Simulation
Simulation for Design Verification and Test Evaluation, Modeling Circuits for Simulation,
Algorithms for True-value Simulation, Algorithms for Fault Simulation.
UNIT -III: Testability Measures
SCOAP Controllability and Observability, High Level Testability Measures, Digital DFT and
Scan Design: Ad-Hoc DFT Methods, Scan Design, Partial-Scan Design, Variations of Scan.
UNIT-IV: Built-In Self-Test
The Economic Case for BIST, Random Logic BIST: Definitions, BIST Process, Pattern
Generation, Response Compaction, Built-In Logic Block Observers, Test-Per-Clock, Test-Per-
Scan BIST Systems, Circular Self Test Path System, Memory BIST, Delay Fault BIST.
UNIT-V: Boundary Scan Standard
Motivation, System Configuration with Boundary Scan: TAP Controller and Port, Boundary
Scan Test Instructions, Pin Constraints of the Standard, Boundary Scan Description Language:
BDSL Description Components, Pin Descriptions.
TEXT BOOKS:
1. Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits -
M.L. Bushnell, V. D. Agrawal, Kluwer Academic Pulishers.
REFERENCE BOOKS:
1. Digital Systems and Testable Design - M. Abramovici, M.A.Breuer and A.D Friedman,
Jaico Publishing House.
2. Digital Circuits Testing and Testability - P.K. Lala, Academic Press.
Page 454
I Year II Semester
L P C
4 0 3
DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
(ELECTIVE-III)
UNIT-I:
Introduction to Digital Signal Processing
Introduction, a Digital signal-processing system, the sampling process, discrete time sequences.
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-invariant
systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT-II:
Architectures for Programmable DSP Devices
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT-III:
Programmable Digital Signal Processors
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX Instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX Processors, Pipeline Operation of
TMS320C54XX Processors.
UNIT-IV:
Analog Devices Family of DSP Devices
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Black fin Processor - The Black fin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
Page 455
UNIT-V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach To Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. Embedded Signal Processing with the Micro Signal Architecture: Woon-SengGan, Sen M.
Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications-B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
3. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
4. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
Page 456
I Year II Semester
L P C
4 0 3
LOW POWER VLSI DESIGN
(ELECTIVE -III)
UNIT-I: Fundamentals of Low Power VLSI Design
Need for Low Power Circuit Design, Sources of Power Dissipation – Switching Power
Dissipation, Short Circuit Power Dissipation, Leakage Power Dissipation, Glitching Power
Dissipation, Short Channel Effects –Drain Induced Barrier Lowering and Punch Through,
Surface Scattering, Velocity Saturation, Impact Ionization, Hot Electron Effect.
UNIT-II: Low-Power Design Approaches
Low-Power Design through Voltage Scaling – VTCMOS circuits, MTCMOS circuits,
Architectural Level Approach –Pipelining and Parallel Processing Approaches.
Switched Capacitance Minimization Approaches
System Level Measures, Circuit Level Measures, Mask level Measures.
UNIT-III: Low-Voltage Low-Power Adders
Introduction, Standard Adder Cells, CMOS Adder’s Architectures – Ripple Carry Adders, Carry
Look-Ahead Adders, Carry Select Adders, Carry Save Adders, Low-Voltage Low-Power Design
Techniques –Trends of Technology and Power Supply Voltage, Low-Voltage Low-Power Logic
Styles.
UNIT-IV: Low-Voltage Low-Power Multipliers
Introduction, Overview of Multiplication, Types of Multiplier Architectures, Braun Multiplier,
Baugh-Wooley Multiplier, Booth Multiplier, Introduction to Wallace Tree Multiplier.
UNIT-V: Low-Voltage Low-Power Memories
Basics of ROM, Low-Power ROM Technology, Future Trend and Development of ROMs,
Basics of SRAM, Memory Cell, Precharge and Equalization Circuit, Low-Power SRAM
Technologies, Basics of DRAM, Self-Refresh Circuit, Future Trend and Development of
DRAM.
TEXT BOOKS:
1. CMOS Digital Integrated Circuits – Analysis and Design – Sung-Mo Kang, Yusuf
Leblebici, TMH, 2011.
2. Low-Voltage, Low-Power VLSI Subsystems – Kiat-Seng Yeo, Kaushik Roy, TMH
Professional Engineering.
Page 457
REFERENCE BOOKS:
1. Low Power CMOS Design – AnanthaChandrakasan, IEEE Press/Wiley International,
1998.
2. Low Power CMOS VLSI Circuit Design – Kaushik Roy, Sharat C. Prasad, John Wiley &
Sons, 2000.
3. Practical Low Power Digital VLSI Design – Gary K. Yeap, Kluwer Academic Press,
2002.
4. Low Power CMOS VLSI Circuit Design – A. Bellamour, M. I. Elamasri, Kluwer
Academic Press, 1995.
Page 458
I Year II Semester
L P C
4 0 3
VLSI SIGNAL PROCESSING
(ELECTIVE-III)
UNIT-I:
Introduction to DSP
Typical DSP algorithms, DSP algorithms benefits, Representation of DSP algorithms
Pipelining and Parallel Processing
Introduction, Pipelining of FIR Digital filters, Parallel Processing, Pipelining and Parallel
Processing for Low Power
Retiming
Introduction – Definitions and Properties – Solving System of Inequalities – Retiming
Techniques
UNIT-II:
Folding: Introduction -Folding Transform - Register minimization Techniques – Register
minimization in folded architectures – folding of multirate systems
Unfolding: Introduction – An Algorithm for Unfolding – Properties of Unfolding – critical Path,
Unfolding and Retiming – Applications of Unfolding
UNIT-III:
Systolic Architecture Design
Introduction – Systolic Array Design Methodology – FIR Systolic Arrays – Selection of
Scheduling Vector – Matrix Multiplication and 2D Systolic Array Design – Systolic Design for
Space Representations contain Delays
UNIT-IV:
Fast Convolution
Introduction – Cook-Toom Algorithm – Winogard algorithm – Iterated Convolution – Cyclic
Convolution – Design of Fast Convolution algorithm by Inspection
UNIT-V:
Low Power Design
Scaling Vs Power Consumption –Power Analysis, Power Reduction techniques – Power
Estimation Approaches
Programmable DSP: Evaluation of Programmable Digital Signal Processors, DSP Processors for
Mobile and Wireless Communications, Processors for Multimedia Signal Processing.
Page 459
TEXT BOOKS:
1. VLSI Digital Signal Processing- System Design and Implementation – Keshab K. Parhi,
1998, Wiley Inter Science.
2. VLSI and Modern Signal Processing – Kung S. Y, H. J. While House, T. Kailath, 1985,
Prentice Hall.
REFERENCE BOOKS:
1. Design of Analog – Digital VLSI Circuits for Telecommunications and Signal
Processing – Jose E. France, YannisTsividis, 1994, Prentice Hall.
2. VLSI Digital Signal Processing – Medisetti V. K, 1995, IEEE Press (NY), USA.
Page 460
I Year II Semester
L P C
4 0 3
MICRO ELECTRO MECHANICAL SYSTEM (MEMS) DESIGN
(ELECTIVE-IV)
UNIT-I: Introduction
Basic structures of MEM devices – (Canti-Levers, Fixed Beams diaphragms).Broad Response of
Micro electromechanical systems (MEMS) to Mechanical (Force, pressure etc.)Thermal,
Electrical, optical and magnetic stimuli, compatibility of MEMS from the point of power
dissipation, leakage etc.
UNIT-II: Review
Review of mechanical concepts like stress, strain, bending moment, deflection curve.
Differential equations describing the deflection under concentrated force, Distributed force,
distributed force, Deflection curves for canti-levers- fixed beam. Electrostatic excitation –
columbic force between the fixed and moving electrodes.Deflection with voltage in C.L,
Deflection Vs Voltage curve, critical fringe field – field calculations using Laplace
equation.Discussion on the approximate solutions – Transient response of the MEMS.
UNIT-III: Types
Two terminal MEMS - capacitance Vs voltage Curve – Variable capacitor.Applications of
variable capacitors.Two terminal MEM structures.Three terminal MEM structures – Controlled
variable capacitors – MEM as a switch and possible applications.
UNIT-IV: MEM Circuits & Structures
MEM circuits & structures for simple GATES- AND, OR, NAND, NOR, Exclusive OR, simple
MEM configurations for flip-flops triggering applications to counters, converters. Applications
for analog circuits like frequency converters, wave shaping. RF Switches for modulation. MEM
Transducers for pressure, force temperature.Optical MEMS.
UNIT-V: MEM Technologies
Silicon based MEMS- Process flow – Brief account of various processes and layers like fixed
layer, moving layers spacers etc., and etching technologies.
Metal Based MEMS: Thin and thick film technologies for MEMS. Process flow and description
of the processes, Status of MEMS in the current electronics scenario.
TEXT BOOKS:
1. MEMS Theory, Design and Technology - GABRIEL. M.Review, R.F.,2003, John
wiley& Sons. .
2. Strength of Materials –ThimoShenko, 2000, CBS publishers & Distributors.
3. MEMS and NEMS, Systems Devices; and Structures - ServeyE.Lyshevski, 2002, CRC
Press.
REFERENCE BOOKS:
1. Sensor Technology and Devices - Ristic L. (Ed) , 1994, Artech House, London.
Page 461
I Year II Semester
L P C
4 0 3
CPLD AND FPGA ARCHITECURES AND APPLICATIONS
(ELECTIVE -IV)
UNIT-I: Introduction to Programmable Logic Devices
Introduction, Simple Programmable Logic Devices – Read Only Memories, Programmable
Logic Arrays, Programmable Array Logic, Programmable Logic Devices/Generic Array Logic;
Complex Programmable Logic Devices – Architecture of Xilinx Cool Runner XCR3064XL
CPLD, CPLD Implementation of a Parallel Adder with Accumulation.
UNIT-II: Field Programmable Gate Arrays
Organization of FPGAs, FPGA Programming Technologies, Programmable Logic Block
Architectures, Programmable Interconnects, Programmable I/O blocks in FPGAs, Dedicated
Specialized Components of FPGAs, Applications of FPGAs.
UNIT -III: SRAM Programmable FPGAs
Introduction, Programming Technology, Device Architecture, The Xilinx XC2000, XC3000 and
XC4000 Architectures.
UNIT -IV: Anti-Fuse Programmed FPGAs
Introduction, Programming Technology, Device Architecture, TheActel ACT1, ACT2 and ACT3
Architectures.
UNIT -V: Design Applications
General Design Issues, Counter Examples, A Fast Video Controller, A Position Tracker for a
Robot Manipulator, A Fast DMA Controller, Designing Counters with ACT devices, Designing
Adders and Accumulators with the ACT Architecture.
TEXT BOOKS:
1. Field Programmable Gate Array Technology - Stephen M. Trimberger, Springer
International Edition.
2. Digital Systems Design - Charles H. Roth Jr, LizyKurian John, Cengage Learning.
REFERENCE BOOKS:
1. Field Programmable Gate Arrays - John V. Oldfield, Richard C. Dorf, Wiley India.
2. Digital Design Using Field Programmable Gate Arrays - Pak K. Chan/SamihaMourad,
Pearson Low Price Edition.
3. Digital Systems Design with FPGAs and CPLDs - Ian Grout, Elsevier, Newnes.
4. FPGA based System Design - Wayne Wolf, Prentice Hall Modern Semiconductor Design
Series.
Page 462
I Year II Semester
L P C
4 0 3
SEMICONDUCTOR MEMORY DESIGN AND TESTING
(ELECTIVE-IV)
UNIT-I: Random Access Memory Technologies
SRAM – SRAM Cell structures, MOS SRAM Architecture, MOS SRAM cell and peripheral
circuit operation, Bipolar SRAM technologies, SOI technology, Advanced SRAM architectures
and technologies, Application specific SRAMs, DRAM – DRAM technology development,
CMOS DRAM, DRAM cell theory and advanced cell structures, BICMOS DRAM, soft error
failure in DRAM, Advanced DRAM design and architecture, Application specific DRAM.
UNIT-II: Non-volatile Memories
Masked ROMs, High density ROM, PROM, Bipolar ROM, CMOS PROMS, EPROM, Floating
gate EPROM cell, One time programmable EPROM, EEPROM, EEPROM technology and
architecture, Non-volatile SRAM, Flash Memories (EPROM or EEPROM), advanced Flash
memory architecture
UNIT-III: Memory Fault Modeling Testing and Memory Design for Testability and
Fault Tolerance
RAM fault modeling, Electrical testing, Pseudo Random testing, Megabit DRAM Testing, non-
volatile memory modeling and testing, IDDQ fault modeling and testing, Application specific
memory testing, RAM fault modeling, BIST techniques for memory
UNIT-IV: Semiconductor Memory Reliability and Radiation Effects
General reliability issues RAM failure modes and mechanism, Non-volatile memory reliability,
reliability modeling and failure rate prediction, Design for Reliability, Reliability Test Structures,
Reliability Screening and qualification, Radiation effects, Single Event Phenomenon (SEP),
Radiation Hardening techniques, Radiation Hardening Process and Design Issues, Radiation
Hardened Memory characteristics, Radiation Hardness Assurance and Testing, Radiation
Dosimetry, Water Level Radiation Testing and Test structures
UNIT-V:Advanced Memory Technologies and High-density Memory Packing Technologies
Ferroelectric RAMs (FRAMs), GaAs FRAMs, Analog memories, magneto resistive RAMs
(MRAMs), Experimental memory devices, Memory Hybrids and MCMs (2D), Memory Stacks
and MCMs (3D), Memory MCM testing and reliability issues, Memory cards, High Density
Memory Packaging Future Directions.
TEXT BOOKS:
1. Semiconductor Memories Technology – Ashok K. Sharma, 2002, Wiley.
2. Advanced Semiconductor Memories – Architecture, Design and Applications - Ashok K.
Sharma- 2002, Wiley.
3. Modern Semiconductor Devices for Integrated Circuits – Chenming C Hu, 1st Ed.,
Prentice Hall.
Page 463
I Year II Semester
L P C
0 3 2
EMBEDDED SYSTEM DESIGN LABORATORY
• The Students are required to write the programs using C-Language according to the
Experiment requirements using RTOS Library Functions and macros ARM-926
developer kits and ARM-Cortex.
• The following experiments are required to develop the algorithms, flow diagrams,
source code and perform the compilation, execution and implement the same using
necessary hardware kits for verification. The programs developed for the
implementation should be at the level of an embedded system design.
• The students are required to perform at least SIX experiments from Part-I and
TWO experiments from Part-II.
List of Experiments:
Part-I: Experiments using ARM-926 with PERFECT RTOS
1. Register a new command in CLI.
2. Create a new Task.
3. Interrupt handling.
4. Allocate resource using semaphores.
5. Share resource using MUTEX.
6. Avoid deadlock using BANKER’S algorithm.
7. Synchronize two identical threads using MONITOR.
8. Reader’s Writer’s Problem for concurrent Tasks.
Part-II Experiments on ARM-CORTEX processor using any open source RTOS.
(Coo-Cox-Software-Platform)
1. Implement the interfacing of display with the ARM- CORTEX processor.
2. Interface ADC and DAC ports with the Input and Output sensitive devices.
3. Simulate the temperature DATA Logger with the SERIAL communication with PC.
4. Implement the developer board as a modem for data communication using serial port
communication between two PC’s.
Lab Requirements:
Software:
(v) Eclipse IDE for C and C++ (YAGARTO Eclipse IDE), Perfect RTOS Library,
COO-COX Software Platform, YAGARTO TOOLS, and TFTP SERVER.
(vi) LINUX Environment for the compilation using Eclipse IDE & Java with latest
version.
Page 464
Hardware:
(v) The development kits of ARM-926 Developer Kits and ARM-Cortex
Boards.
(vi) Serial Cables, Network Cables and recommended power supply for the
board.
Page 465
ACADEMIC REGULATIONS &
COURSE STRUCTURE
For
VLSI, VLSID, VLSISD
(Applicable for batches admitted from 2016-2017)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA - 533 003, Andhra Pradesh, India
Page 466
I Semester
II Semester
S. No. Name of the Subject L P C
1 Digital System Design 4 - 3
2 VLSI Technology and Design 4 - 3
3 CMOS Analog IC Design 4 - 3
4 CMOS Digital IC Design 4 - 3
5
Elective I
1. Digital Design using HDL
2. Advanced Operating Systems
3 Soft Computing Techniques
4. Cyber Security
4 - 3
6
Elective II
1. CPLD and FPGA Architectures and
Applications
2. Advanced Computer Architecture
3. Hardware Software Co-Design
4 - 3
7 Front end VLSI Design Laboratory - 3 2
Total Credits 20
S. No. Name of the Subject L P C
1 CMOS Mixed Signal Circuit Design 4 - 3
2 Embedded System Design 4 - 3
3 Low Power VLSI Design 4 - 3
4 Design For Testability 4 - 3
5
Elective III
1. CAD for VLSI
2. DSP Processors & Architectures
3. VLSI Signal Processing
4 - 3
6
Elective IV
1. System on Chip Design
2. Optimization Techniques in VLSI Design
3. Semiconductor Memory Design and Testing
4 - 3
7 1. Back end VLSI Design Laboratory - 3 2
Total Credits 20
Page 467
III Semester
S. No. Subject L P Credits
1 Comprehensive Viva-Voce -- -- 2
2 Seminar – I -- -- 2
3 Project Work Part – I -- -- 16
Total Credits 20
IV Semester
S. No. Subject L P Credits
1 Seminar – II -- -- 2
2 Project Work Part - II -- -- 18
Total Credits 20
Page 468
I Year I Semester
L P C
4 0 3
DIGITAL SYSTEM DESIGN
UNIT-I: Minimization Procedures and CAMP Algorithm
Review on minimization of switching functions using tabular methods, k-map, QM algorithm,
CAMP-I algorithm, Phase-I: Determination of Adjacencies, DA, CSC, SSMs and EPCs,, CAMP-
I algorithm, Phase-II: Passport checking,Determination of SPC, CAMP-II algorithm:
Determination of solution cube, Cube based operations, determination of selected cubes are
wholly within the given switching function or not, Introduction to cube based algorithms.
UNIT-II: PLA Design, PLA Minimization and Folding Algorithms
Introduction to PLDs, basic configurations and advantages of PLDs, PLA-Introduction, Block
diagram of PLA, size of PLA, PLA design aspects, PLA minimization algorithm(IISc algorithm),
PLA folding algorithm(COMPACT algorithm)-Illustration of algorithms with suitable examples.
UNIT -III: Design of Large Scale Digital Systems
Algorithmic state machinecharts-Introduction, Derivation of SM Charts, Realization of SM
Chart, control implementation, control unit design, data processor design, ROM design, PAL
design aspects, digital system design approaches using CPLDs, FPGAs and ASICs.
UNIT-IV: Fault Diagnosis in Combinational Circuits
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.
UNIT-V: Fault Diagnosis in Sequential Circuits
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd
Edition, 2001, TMH
3. Digital system Design using PLDd-Lala
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th
Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
Page 469
I Year I Semester
L P C
4 0 3
VLSI TECHNOLOGY AND DESIGN
UNIT-I:
VLSI Technology: Fundamentals and applications, IC production process, semiconductor
processes, design rules and process parameters, layout techniques and process parameters.
VLSI Design: Electronic design automation concept, ASIC and FPGA design flows, SOC
designs, design technologies: combinational design techniques, sequential design techniques,
state machine logic design techniques and design issues.
UNIT-II:
CMOS VLSI Design: MOSTechnology and fabrication process of pMOS, nMOS, CMOS and
BiCMOS technologies, comparison of different processes.
Building Blocks of a VLSI circuit: Computer architecture, memory architectures,
communication interfaces, mixed signal interfaces.
VLSI Design Issues: Design process, design for testability, technology options, power
calculations, package selection, clock mechanisms, mixed signal design.
UNIT-III:
Basic electrical properties of MOS and BiCMOS circuits, MOS and BiCMOS circuit design
processes, Basic circuit concepts, scaling of MOS circuits-qualitatitive and quantitative analysis
with proper illustrations and necessary derivations of expressions.
UNIT-IV:
Subsystem Design and Layout: Some architectural issues, switch logic, gate logic, examples of
structured design (combinational logic), some clocked sequential circuits, other system
considerations.
Subsystem Design Processes: Some general considerations and an illustration of design
processes, design of an ALU subsystem.
UNIT-V:
Floor Planning: Introduction, Floor planning methods, off-chip connections.
Architecture Design: Introduction, Register-Transfer design, high-level synthesis, architectures
for low power, architecture testing.
Chip Design: Introduction and design methodologies.
Page 470
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A. Pucknell,
SholehEshraghian, 2005, PHI Publications.
2. Modern VLSI Design-Wayne Wolf, 3rd
Ed., 1997, Pearson Education.
3. VLSI Design-Dr.K.V.K.K.Prasad, KattulaShyamala, Kogent Learning Solutions Inc.,
2012.
REFERENCE BOOKS:
1. VLSI Design Technologies for Analog and Digital Circuits, Randall L.Geiger, Phillip
E.Allen, Noel R.Strader, TMH Publications, 2010.
2. Introduction to VLSI Systems: A Logic, Circuit and System Perspective- Ming-BO Lin,
CRC Press, 2011.
3. Principals of CMOS VLSI Design-N.H.E Weste, K. Eshraghian, 2nd
Edition, Addison
Wesley.
Page 471
I Year I Semester
L P C
4 0 3
CMOS ANALOG IC DESIGN
UNIT -I: MOS Devices and Modeling
The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout,
CMOS Device Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small-
Signal Model for the MOS Transistor, Computer Simulation Models, Sub-threshold MOS
Model.
UNIT -II: Analog CMOS Sub-Circuits
MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors-
Current mirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current
Mirror, Current and Voltage References, Band gap Reference.
UNIT -III: CMOS Amplifiers
Inverters, Differential Amplifiers, Cascode Amplifiers, Current Amplifiers, Output Amplifiers,
High Gain Amplifiers Architectures.
UNIT -IV: CMOS Operational Amplifiers
Design of CMOS Op Amps, Compensation of Op Amps, Design of Two-Stage Op Amps,
Power- Supply Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps, Measurement
Techniques of OP Amp.
UNIT -V: Comparators
Characterization of Comparator, Two-Stage, Open-Loop Comparators, Other Open-Loop
Comparators, Improving the Performance of Open-Loop Comparators, Discrete-Time
Comparators.
TEXT BOOKS:
1. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford
University Press, International Second Edition/Indian Edition, 2010.
2. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul J. Hurst, S. Lewis
and R. G. Meyer, Wiley India, Fifth Edition, 2010.
REFERENCE BOOKS:
1. Analog Integrated Circuit Design- David A. Johns, Ken Martin, Wiley Student Edn,
2013.
2. Design of Analog CMOS Integrated Circuits- BehzadRazavi, TMH Edition.
3. CMOS: Circuit Design, Layout and Simulation- Baker, Li and Boyce, PHI.
Page 472
I Year I Semester
L P C
4 0 3
CMOS DIGITAL IC DESIGN
UNIT-I: MOS Design
Pseudo NMOS Logic – Inverter, Inverter threshold voltage, Output high voltage, Output Low
voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS
logic gates, Transistor equivalency, CMOS Inverter logic.
UNIT-II: Combinational MOS Logic Circuits:
MOS logic circuits with NMOS loads, Primitive CMOS logic gates – NOR & NAND gate,
Complex Logic circuits design – Realizing Boolean expressions using NMOS gates and CMOS
gates , AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with
Transmission gates.
UNIT-III: Sequential MOS Logic Circuits
Behaviour of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch
and edge triggered flip-flop.
UNIT-IV: Dynamic Logic Circuits
Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic
CMOS transmission gate logic, High performance Dynamic CMOS circuits.
UNIT-V: Semiconductor Memories
Types, RAM array organization, DRAM – Types, Operation, Leakage currents in DRAM cell
and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR
flash and NAND flash.
TEXT BOOKS:
1. Digital Integrated Circuit Design – Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo Kang, Yusuf
Leblebici, TMH, 3rd
Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective – Ming-BO Lin,
CRC Press, 2011
2. Digital Integrated Circuits – A Design Perspective, Jan M. Rabaey,
AnanthaChandrakasan, BorivojeNikolic, 2nd
Ed., PHI.
Page 473
I Year I Semester
L P C
4 0 3
DIGITAL DESIGN USING HDL
(ELECTIVE-I)
UNIT-I:
Digital Logic Design using VHDL
Introduction, designing with VHDL, design entry methods, logic synthesis , entities , architecture
, packages and configurations, types of models: dataflow , behavioral , structural, signals vs.
variables, generics, data types, concurrent vs. sequential statements , loops and program controls.
Digital Logic Design using Verilog HDL
Introduction, Verilog Data types and Operators, Binary data manipulation, Combinational and
Sequential logic design, Structural Models of Combinational Logic, Logic Simulation, Design
Verification and Test Methodology, Propagation Delay, Truth Table models using Verilog.
UNIT-II:
Combinational Logic Circuit Design using VHDL
Combinational circuits building blocks: Multiplexers, Decoders , Encoders , Code converters,
Arithmetic comparison circuits , VHDL for combinational circuits , Adders-Half Adder, Full
Adder, Ripple-Carry Adder, Carry Look-Ahead Adder, Subtraction, Multiplication.
Sequential Logic Circuit Design using VHDL
Flip-flops, registers & counters, synchronous sequential circuits: Basic design steps, Mealy State
model, Design of FSM using CAD tools, Serial Adder Example, State Minimization, Design of
Counter using sequential Circuit approach.
UNIT-III: Digital Logic Circuit Design Examples using Verilog HDL
Behavioralmodeling , Data types, Boolean-Equation-Based behavioral models of combinational
logics , Propagation delay and continuous assignments , latches and level-sensitive circuits in
Verilog, Cyclic behavioral models of flip-flops and latches and Edge detection, comparison of
styles for behavioral model; Behavioral model, Multiplexers, Encoders and Decoders, Counters,
Shift Registers, Register files, Dataflow models of a linear feedback shift register, Machines with
multi cycle operations, ASM and ASMD charts for behavioralmodeling, Design examples,
Keypad scanner and encoder.
UNIT-IV: Synthesis of Digital Logic Circuit Design
Introduction to Synthesis, Synthesis of combinational logic, Synthesis of sequential logic with
latches and flip-flops, Synthesis of Explicit and Implicit State Machines, Registers and
counters.
Page 474
UNIT-V: Testing of Digital Logic Circuits and CAD Tools
Testing of logic circuits, fault model, complexity of a test set, path-sensitization, circuits with
tree structure, random tests, testing of sequential circuits, built in self test, printed circuit boards,
computer aided design tools, synthesis, physical design.
TEXT BOOKS:
1. Stephen Brown &ZvonkoVranesic, ”Fundamentals of Digital logic design with VHDL”, Tata
McGraw Hill,2nd
edition.
2. Michael D. Ciletti, “Advanced digital design with the Verilog HDL”, Eastern economy
edition, PHI.
REFERENCE BOOKS:
1. Stephen Brown &ZvonkoVranesic, ”Fundamentals of Digital logic with Verilog design”,
Tata McGraw Hill,2nd
edition.
2. Bhaskar, ”VHDL Primer”,3rd
Edition, PHI Publications.
3. Ian Grout, “Digital systems design with FPGAs and CPLDs”, Elsevier Publications.
Page 475
I Year I Semester
L P C
4 0 3
ADVANCED OPERATING SYSTEMS
(ELECTIVE-I)
UNIT-I: Introduction to Operating Systems
Overview of computer system hardware, Instruction execution, I/O function, Interrupts,
Memory hierarchy, I/O Communication techniques, Operating system objectives and
functions, Evaluation of operating System
UNIT-II: Introduction to UNIX and LINUX
Basic Commands & Command Arguments, Standard Input, Output, Input / Output
Redirection, Filters and Editors, Shells and Operations
UNIT –III:
System Calls:
System calls and related file structures, Input / Output, Process creation & termination.
Inter Process Communication:
Introduction, File and record locking, Client – Server example, Pipes, FIFOs, Streams &
Messages, Name Spaces, Systems V IPC, Message queues, Semaphores, Shared Memory,
Sockets & TLI.
UNIT –IV:
Introduction to Distributed Systems:
Goals of distributed system, Hardware and software concepts, Design issues.
Communication in Distributed Systems:
Layered protocols, ATM networks, Client - Server model, Remote procedure call and Group
communication.
UNIT –V:
Synchronization in Distributed Systems:
Clock synchronization, Mutual exclusion, E-tech algorithms, Bully algorithm, Ring
algorithm, Atomic transactions
Page 476
Deadlocks:
Dead lock in distributed systems, Distributed dead lock prevention and distributed dead
lock detection.
TEXT BOOKS:
1. The Design of the UNIX Operating Systems – Maurice J. Bach, 1986, PHI.
2. Distributed Operating System - Andrew. S. Tanenbaum, 1994, PHI.
3. The Complete Reference LINUX – Richard Peterson, 4th
Ed., McGraw – Hill.
REFERENCE BOOKS:
1. Operating Systems: Internal and Design Principles - Stallings, 6th
Ed., PE.
2. Modern Operating Systems - Andrew S Tanenbaum, 3rd
Ed., PE.
3. Operating System Principles - Abraham Silberchatz, Peter B. Galvin, Greg Gagne, 7th
Ed., John Wiley
4. UNIX User Guide – Ritchie & Yates.
5. UNIX Network Programming - W.Richard Stevens, 1998, PHI.
Page 477
I Year I Semester
L P C
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -I)
UNIT –I:
Introduction:
Approaches to intelligent control, Architecture for intelligent control, Symbolic reasoning
system, Rule-based systems, the AI approach, Knowledge representation - Expert systems.
UNIT –II:
Artificial Neural Networks:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Fuzzy Logic System:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control, Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear time delay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
Page 478
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
TEXT BOOKS:
1. Introduction to Artificial Neural Systems - Jacek.M.Zurada, Jaico Publishing House,
1999.
2. Neural Networks and Fuzzy Systems - Kosko, B., Prentice-Hall of India Pvt. Ltd., 1994.
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd
Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
Page 479
I Year I Semester
L P C
4 0 3
CYBER SECURITY
(ELECTIVE – I)
Page 480
I Year I Semester
L P C
4 0 3
CPLD AND FPGA ARCHITECURES AND APPLICATIONS
(ELECTIVE – II)
UNIT-I: Introduction to Programmable Logic Devices
Introduction, Simple Programmable Logic Devices – Read Only Memories, Programmable
Logic Arrays, Programmable Array Logic, Programmable Logic Devices/Generic Array Logic;
Complex Programmable Logic Devices – Architecture of Xilinx Cool Runner XCR3064XL
CPLD, CPLD Implementation of a Parallel Adder with Accumulation.
UNIT-II: Field Programmable Gate Arrays
Organization of FPGAs, FPGA Programming Technologies, Programmable Logic Block
Architectures, Programmable Interconnects, Programmable I/O blocks in FPGAs, Dedicated
Specialized Components of FPGAs, Applications of FPGAs.
UNIT -III: SRAM Programmable FPGAs
Introduction, Programming Technology, Device Architecture, The Xilinx XC2000, XC3000 and
XC4000 Architectures.
UNIT -IV: Anti-Fuse Programmed FPGAs
Introduction, Programming Technology, Device Architecture, TheActel ACT1, ACT2 and ACT3
Architectures.
UNIT -V: Design Applications
General Design Issues, Counter Examples, A Fast Video Controller, A Position Tracker for a
Robot Manipulator, A Fast DMA Controller, Designing Counters with ACT devices, Designing
Adders and Accumulators with the ACT Architecture.
TEXT BOOKS:
1. Field Programmable Gate Array Technology - Stephen M. Trimberger, Springer
International Edition.
2. Digital Systems Design - Charles H. Roth Jr, LizyKurian John, Cengage Learning.
Page 481
REFERENCE BOOKS:
1. Field Programmable Gate Arrays - John V. Oldfield, Richard C. Dorf, Wiley India.
2. Digital Design Using Field Programmable Gate Arrays - Pak K. Chan/SamihaMourad,
Pearson Low Price Edition.
3. Digital Systems Design with FPGAs and CPLDs - Ian Grout, Elsevier, Newnes.
4. FPGA based System Design - Wayne Wolf, Prentice Hall Modern Semiconductor Design
Series.
Page 482
I Year I Semester
L P C
4 0 3
ADVANCED COMPUTER ARCHITECTURE
(ELECTIVE-II)
UNIT-I: Fundamentals of Computer Design
Fundamentals of Computer design, Changing faces of computing and task of computer designer,
Technology trends, Cost price and their trends, measuring and reporting performance,
Quantitative principles of computer design, Amdahl’s law.
Instruction set principles and examples- Introduction, classifying instruction set- memory
addressing- type and size of operands, Operations in the instruction set.
UNIT-II:
Pipelines
Introduction, basic RISC instruction set, Simple implementation of RISC instruction set, Classic
five stage pipe lined RISC processor, Basic performance issues in pipelining, Pipeline hazards,
Reducing pipeline branch penalties.
Memory Hierarchy Design
Introduction, review of ABC of cache, Cache performance, Reducing cache miss penalty, Virtual
memory.
UNIT-III:
Instruction Level Parallelism (ILP)-The Hardware Approach
Instruction-Level parallelism, Dynamic scheduling, Dynamic scheduling using Tomasulo’s
approach, Branch prediction, High performance instruction delivery- Hardware based
speculation.
ILP Software Approach
Basic compiler level techniques, Static branch prediction, VLIW approach, Exploiting ILP,
Parallelism at compile time, Cross cutting issues - Hardware verses Software.
UNIT-IV: Multi Processors and Thread Level Parallelism
Multi Processors and Thread level Parallelism- Introduction, Characteristics of application
domain, Systematic shared memory architecture, Distributed shared – Memory architecture,
Synchronization.
Page 483
UNIT-V:
Inter Connection and Networks
Introduction, Interconnection network media, Practical issues in interconnecting networks,
Examples of inter connection, Cluster, Designing of clusters.
Intel Architecture
Intel IA-64 ILP in embedded and mobile markets Fallacies and pit falls.
TEXT BOOKS:
1. John L. Hennessy, David A. Patterson - Computer Architecture: A Quantitative Approach,
3rd
Edition, an Imprint of Elsevier.
REFERENCE BOOKS:
1. John P. Shen and Miikko H. Lipasti -, Modern Processor Design : Fundamentals of Super
Scalar Processors
2. Computer Architecture and Parallel Processing - Kai Hwang, Faye A.Brigs., MC Graw
Hill.
3. Advanced Computer Architecture - A Design Space Approach, DezsoSima, Terence
Fountain, Peter Kacsuk, Pearson Ed.
Page 484
I Year I Semester
L P C
4 0 3
HARDWARE SOFTWARE CO-DESIGN
(ELECTIVE-II)
UNIT-I:
Co- Design Issues
Co- Design Models, Architectures, Languages, A Generic Co-design Methodology.
Co- Synthesis Algorithms
Hardware software synthesis algorithms: hardware – software partitioning distributed system co-
synthesis.
UNIT-II:
Prototyping and Emulation
Prototyping and emulation techniques, prototyping and emulation environments, future
developments in emulation and prototyping architecture specialization techniques, system
communication infrastructure
Target Architectures
Architecture Specialization techniques, System Communication infrastructure, Target
Architecture and Application System classes, Architecture for control dominated systems (8051-
Architectures for High performance control), Architecture for Data dominated systems
(ADSP21060, TMS320C60), Mixed Systems.
UNIT-III:
Compilation Techniques and Tools for Embedded Processor Architectures
Modern embedded architectures, embedded software development needs, compilation
technologies, practical consideration in a compiler development environment.
UNIT-IV:
Design Specification and Verification
Design, co-design, the co-design computational model, concurrency coordinating concurrent
computations, interfacing components, design verification, implementation verification,
verification tools, interface verification.
Page 485
UNIT-V:
Languages for System-Level Specification and Design-I
System-level specification, design representation for system level synthesis, system level
specification languages.
Languages for System-Level Specification and Design-II
Heterogeneous specifications and multi language co-simulation, the cosyma system and lycos
system.
TEXT BOOKS:
1. Hardware / Software Co- Design Principles and Practice – Jorgen Staunstrup, Wayne
Wolf – 2009, Springer.
2. Hardware / Software Co- Design - Giovanni De Micheli, Mariagiovanna Sami, 2002,
Kluwer Academic Publishers.
REFERENCE BOOKS:
2. A Practical Introduction to Hardware/Software Co-design -Patrick R. Schaumont -
2010 – Springer Publications.
Page 486
I Year I Semester
L P C
0 3 2
FRONT END VLSI DESIGN LABORATORY
• The students are required to design the logic circuit to perform the following
experiments using necessary Industry standard simulator to verify the logical
/functional operation, perform the analysis with appropriate synthesizer and to
verify the implemented logic with different hardware modules/kits (CPLD/FPGA
kits).
• The students are required to acquire the knowledge on any of the TWO different
environmental platforms by perform at least FIVE experiments on each platform.
List of Experiments:
1. Realization of Logic gates.
2. Parity Encoder.
3. Random Counter
4. Single Port Synchronous RAM.
5. Synchronous FIFO.
6. ALU.
7. UART Model.
8. Dual Port Asynchronous RAM.
9. Fire Detection and Control System using Combinational Logic circuits.
10. Traffic Light Controller using Sequential Logic circuits
11. Pattern Detection using Moore Machine.
12. Finite State Machine (FSM) based logic circuit.
Lab Requirements:
Software: Industrial standard software with prefectural licence consisting of required simulator,
synthesizer, analyzer etc. in an appropriate integrated environment.
Hardware:Personal Computer with necessary peripherals, configuration and operating System
and relevant VLSI (CPLD/FPGA) hardware Kits.
Page 487
I Year II Semester
L P C
4 0 3
CMOS MIXED SIGNAL CIRCUIT DESIGN
UNIT-I: Switched Capacitor Circuits
Introduction to Switched Capacitor circuits- basic building blocks, Operation and Analysis, Non-
ideal effects in switched capacitor circuits, Switched capacitor integrators first order filters,
Switch sharing, biquad filters.
UNIT-II: Phased Lock Loop (PLL)
Basic PLL topology, Dynamics of simple PLL, Charge pump PLLs-Lock acquisition,
Phase/Frequency detector and charge pump, Basic charge pump PLL, Non-ideal effects in PLLs-
PFD/CP non-idealities, Jitter in PLLs, Delay locked loops, applications.
UNIT-III: Data Converter Fundamentals
DC and dynamic specifications, Quantization noise, Nyquist rate D/A converters- Decoder based
converters, Binary-Scaled converters, Thermometer-code converters, Hybrid converters
UNIT-IV: Nyquist Rate A/D Converters
Successive approximation converters, Flash converter, Two-step A/D converters, Interpolating
A/D converters, Folding A/D converters, Pipelined A/D converters, Time-interleaved converters.
UNIT-V: Oversampling Converters
Noise shaping modulators, Decimating filters and interpolating filters, Higher order modulators,
Delta sigma modulators with multibitquantizers, Delta sigma D/A
TEXT BOOKS:
1. Design of Analog CMOS Integrated Circuits- BehzadRazavi, TMH Edition, 2002
2. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford
University Press, International Second Edition/Indian Edition, 2010.
3. Analog Integrated Circuit Design- David A. Johns,Ken Martin, Wiley Student Edition,
2013
REFERENCE BOOKS:
1. CMOS Integrated Analog-to- Digital and Digital-to-Analog converters-Rudy Van De
Plassche, Kluwer Academic Publishers, 2003
2. Understanding Delta-Sigma Data converters-Richard Schreier, Wiley Interscience, 2005.
3. CMOS Mixed-Signal Circuit Design - R. Jacob Baker, Wiley Interscience, 2009.
Page 488
I Year II Semester
L P C
4 0 3
EMBEDDED SYSTEM DESIGN
UNIT-I: Introduction
An Embedded System-Definition, Examples, Current Technologies, Integration in system
Design, Embedded system design flow, hardware design concepts, software development,
processor in an embedded system and other hardware units, introduction to processor based
embedded system design concepts.
UNIT-II: Embedded Hardware
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
UNIT-III: Embedded Software
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded operating systems – Multitasking and process Management, Memory Management,
I/O and file system management, OS standards example – POSIX, OS performance guidelines,
Board support packages, Middleware and Application Software – Middle ware, Middleware
examples, Application layer software examples.
UNIT-IV: Embedded System Design, Development, Implementation and Testing
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
Page 489
TEXT BOOKS:
1. Tammy Noergaard “Embedded Systems Architecture: A Comprehensive Guide for Engineers
and Programmers”, Elsevier(Singapore) Pvt.Ltd.Publications, 2005.
2. Frank Vahid, Tony D. Givargis, “Embedded system Design: A Unified Hardware/Software
Introduction”, John Wily & Sons Inc.2002.
REFERENCE BOOKS:
1. Peter Marwedel, “Embedded System Design”, Science Publishers, 2007.
2. Arnold S Burger, “Embedded System Design”, CMP.
3. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, TMH Publications,
Second Edition, 2008.
Page 490
I Year II Semester
L P C
4 0 3
LOW POWER VLSI DESIGN
UNIT-I: Fundamentals of Low Power VLSI Design
Need for Low Power Circuit Design, Sources of Power Dissipation – Switching Power
Dissipation, Short Circuit Power Dissipation, Leakage Power Dissipation, Glitching Power
Dissipation, Short Channel Effects –Drain Induced Barrier Lowering and Punch Through,
Surface Scattering, Velocity Saturation, Impact Ionization, Hot Electron Effect.
UNIT-II: Low-Power Design Approaches
Low-Power Design through Voltage Scaling – VTCMOS circuits, MTCMOS circuits,
Architectural Level Approach –Pipelining and Parallel Processing Approaches.
Switched Capacitance Minimization Approaches
System Level Measures, Circuit Level Measures, Mask level Measures.
UNIT-III: Low-Voltage Low-Power Adders
Introduction, Standard Adder Cells, CMOS Adder’s Architectures – Ripple Carry Adders, Carry
Look-Ahead Adders, Carry Select Adders, Carry Save Adders, Low-Voltage Low-Power Design
Techniques –Trends of Technology and Power Supply Voltage, Low-Voltage Low-Power Logic
Styles.
UNIT-IV: Low-Voltage Low-Power Multipliers
Introduction, Overview of Multiplication, Types of Multiplier Architectures, Braun Multiplier,
Baugh-Wooley Multiplier, Booth Multiplier, Introduction to Wallace Tree Multiplier.
UNIT-V: Low-Voltage Low-Power Memories
Basics of ROM, Low-Power ROM Technology, Future Trend and Development of ROMs,
Basics of SRAM, Memory Cell, Precharge and Equalization Circuit, Low-Power SRAM
Technologies, Basics of DRAM, Self-Refresh Circuit, Future Trend and Development of
DRAM.
TEXT BOOKS:
1. CMOS Digital Integrated Circuits – Analysis and Design – Sung-Mo Kang, Yusuf
Leblebici, TMH, 2011.
2. Low-Voltage, Low-Power VLSI Subsystems – Kiat-Seng Yeo, Kaushik Roy, TMH
Professional Engineering.
Page 491
REFERENCE BOOKS:
1. Low Power CMOS Design – AnanthaChandrakasan, IEEE Press/Wiley International,
1998.
2. Low Power CMOS VLSI Circuit Design – Kaushik Roy, Sharat C. Prasad, John Wiley &
Sons, 2000.
3. Practical Low Power Digital VLSI Design – Gary K. Yeap, Kluwer Academic Press,
2002.
4. Low Power CMOS VLSI Circuit Design – A. Bellamour, M. I. Elamasri, Kluwer
Academic Press, 1995.
Page 492
I Year II Semester
L P C
4 0 3
DESIGN FOR TESTABILITY
UNIT-I: Introduction to Testing
Testing Philosophy, Role of Testing, Digital and Analog VLSI Testing, VLSI Technology
Trends affecting Testing, Types of Testing, FaultModeling: Defects, Errors and Faults,
Functional Versus Structural Testing, Levels of Fault Models, Single Stuck-at Fault.
UNIT-II: Logic and Fault Simulation
Simulation for Design Verification and Test Evaluation, Modeling Circuits for Simulation,
Algorithms for True-value Simulation, Algorithms for Fault Simulation.
UNIT -III:
Testability Measures
SCOAP Controllability and Observability, High Level Testability Measures, Digital DFT and
Scan Design: Ad-Hoc DFT Methods, Scan Design, Partial-Scan Design, Variations of Scan.
UNIT-IV:
Built-In Self-Test
The Economic Case for BIST, Random Logic BIST: Definitions, BIST Process, Pattern
Generation, Response Compaction, Built-In Logic Block Observers, Test-Per-Clock, Test-Per-
Scan BIST Systems, Circular Self Test Path System, Memory BIST, Delay Fault BIST.
UNIT-V:
Boundary Scan Standard
Motivation, System Configuration with Boundary Scan: TAP Controller and Port, Boundary
Scan Test Instructions, Pin Constraints of the Standard, Boundary Scan Description Language:
BDSL Description Components, Pin Descriptions.
TEXT BOOKS:
1. Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits -
M.L. Bushnell, V. D. Agrawal, Kluwer Academic Pulishers.
REFERENCE BOOKS:
1. Digital Systems and Testable Design - M. Abramovici, M.A.Breuer and A.D Friedman,
Jaico Publishing House.
2. Digital Circuits Testing and Testability - P.K. Lala, Academic Press.
Page 493
I Year II Semester
L P C
4 0 3
CAD FOR VLSI
UNIT-I: VLSI Physical Design Automation
VLSI Design Cycle, New Trends in VLSI Design Cycle, Physical Design Cycle, New Trends in
Physical Design Cycle, Design Styles, System Packaging Styles;
UNIT-II: Partitioning, Floor Planning, Pin Assignment and Placement
Partitioning – Problem formulation, Classification of Partitioning algorithms, Kernighan-Lin
Algorithm, Simulated Annealing, Floor Planning – Problem formulation, Classification of floor
planning algorithms, constraint based floor planning, Rectangular Dualization, Pin Assignment –
Problem formulation, Classification of pin assignment algorithms, General and channel Pin
assignments, Placement – Problem formulation, Classification of placement algorithms,
Partitioning based placement algorithms;
UNIT-III: Global Routing and Detailed Routing
Global Routing – Problem formulation, Classification of global routing algorithms, Maze routing
algorithms, Detailed Routing – Problem formulation, Classification of routing algorithms, Single
layer routing algorithms;
UNIT-IV: Physical Design Automation of FPGAs and MCMs
FPGA Technologies, Physical Design cycle for FPGAs, Partitioning, Routing – Routing
Algorithm for the Non-Segmented model, Routing Algorithms for the Segmented Model;
Introduction to MCM Technologies, MCM Physical Design Cycle.
UNIT-V: Chip Input and Output Circuits
ESD Protection, Input Circuits, Output Circuits and � ������ noise, On-chip clock Generation and
Distribution, Latch-up and its prevention.
TEXT BOOKS:
1. Algorithms for VLSI Physical Design Automation by NaveedShervani, 3rd
Edition, 2005,
Springer International Edition.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo Kang, Yusuf
Leblebici, TMH, 3rd
Ed., 2011.
3.
REFERENCE BOOKS:
1. VLSI Physical Design Automation-Theory and Practice by Sadiq M Sait, Habib Youssef,
World Scientific.
2. Algorithms for VLSI Design Automation, S. H. Gerez, 1999, Wiley student Edition, John
Wiley and Sons (Asia) Pvt. Ltd.
3. VLSI Physical Design Automation by Sung Kyu Lim, Springer International Edition.
Page 494
I Year II Semester
L P C
4 0 3
DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES
(ELECTIVE-III)
UNIT-I:
Introduction to Digital Signal Processing
Introduction, a Digital signal-processing system, the sampling process, discrete time sequences.
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-invariant
systems, Digital filters, Decimation and interpolation.
Computational Accuracy in DSP Implementations
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT-II:
Architectures for Programmable DSP Devices
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT-III:
Programmable Digital Signal Processors
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of
TMS320C54XX Processors, Program Control, TMS320C54XX Instructions and Programming,
On-Chip Peripherals, Interrupts of TMS320C54XX Processors, Pipeline Operation of
TMS320C54XX Processors.
UNIT-IV:
Analog Devices Family of DSP Devices
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Black fin Processor - The Black fin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
Page 495
UNIT-V:
Interfacing Memory and I/O Peripherals to Programmable DSP Devices
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach To Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. Embedded Signal Processing with the Micro Signal Architecture: Woon-SengGan, Sen M.
Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
1. Digital Signal Processors, Architecture, Programming and Applications-B. Venkataramani
and M. Bhaskar, 2002, TMH.
2. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand &
Co.
3. Digital Signal Processing Applications Using the ADSP-2100 Family by The Applications
Engineering Staff of Analog Devices, DSP Division, Edited by Amy Mar, PHI
4. The Scientist and Engineer's Guide to Digital Signal Processing by Steven W. Smith, Ph.D.,
California Technical Publishing, ISBN 0-9660176-3-3, 1997
Page 496
I Year II Semester
L P C
4 0 3
VLSI SIGNAL PROCESSING
(ELECTIVE-III)
UNIT-I:
Introduction to DSP
Typical DSP algorithms, DSP algorithms benefits, Representation of DSP algorithms
Pipelining and Parallel Processing
Introduction, Pipelining of FIR Digital filters, Parallel Processing, Pipelining and Parallel
Processing for Low Power
Retiming
Introduction – Definitions and Properties – Solving System of Inequalities – Retiming
Techniques
UNIT-II:
Folding: Introduction -Folding Transform - Register minimization Techniques – Register
minimization in folded architectures – folding of multirate systems
Unfolding: Introduction – An Algorithm for Unfolding – Properties of Unfolding – critical Path,
Unfolding and Retiming – Applications of Unfolding
UNIT-III:
Systolic Architecture Design
Introduction – Systolic Array Design Methodology – FIR Systolic Arrays – Selection of
Scheduling Vector – Matrix Multiplication and 2D Systolic Array Design – Systolic Design for
Space Representations contain Delays
UNIT-IV:
Fast Convolution
Introduction – Cook-Toom Algorithm – Winogard algorithm – Iterated Convolution – Cyclic
Convolution – Design of Fast Convolution algorithm by Inspection
UNIT-V:
Low Power Design
Scaling Vs Power Consumption –Power Analysis, Power Reduction techniques – Power
Estimation Approaches
Programmable DSP: Evaluation of Programmable Digital Signal Processors, DSP Processors for
Mobile and Wireless Communications, Processors for Multimedia Signal Processing.
Page 497
TEXT BOOKS:
1. VLSI Digital Signal Processing- System Design and Implementation – Keshab K. Parhi,
1998, Wiley Inter Science.
2. VLSI and Modern Signal Processing – Kung S. Y, H. J. While House, T. Kailath, 1985,
Prentice Hall.
REFERENCE BOOKS:
1. Design of Analog – Digital VLSI Circuits for Telecommunications and Signal
Processing – Jose E. France, YannisTsividis, 1994, Prentice Hall.
2. VLSI Digital Signal Processing – Medisetti V. K, 1995, IEEE Press (NY), USA.
Page 498
I Year II Semester
L P C
4 0 3
SYSTEM ON CHIP DESIGN
(ELECTIVE-IV)
UNIT-I: Introduction to the System Approach
System Architecture, Components of the system, Hardware & Software, Processor Architectures,
Memory and Addressing. System level interconnection, An approach for SOC Design, System
Architecture and Complexity.
UNIT-II: Processors
Introduction , Processor Selection for SOC, Basic concepts in Processor Architecture, Basic
concepts in Processor Micro Architecture, Basic elements in Instruction handling. Buffers:
minimizing Pipeline Delays, Branches, More Robust Processors, Vector Processors and Vector
Instructions extensions, VLIW Processors, Superscalar Processors.
UNIT-III: Memory Design for SOC
Overview of SOC external memory, Internal Memory, Size, Scratchpads and Cache memory,
Cache Organization, Cache data, Write Policies, Strategies for line replacement at miss time,
Types of Cache, Split – I, and D – Caches, Multilevel Caches, Virtual to real translation , SOC
Memory System, Models of Simple Processor – memory interaction.
UNIT-IV: Interconnect Customization and Configuration
Inter Connect Architectures, Bus: Basic Architectures, SOC Standard Buses , Analytic Bus
Models, Using the Bus model, Effects of Bus transactions and contention time. SOC
Customization: An overview, Customizing Instruction Processor, Reconfiguration Technologies,
Mapping design onto Reconfigurable devices, Instance- Specific design, Customizable Soft
Processor, Reconfiguration - overhead analysis and trade-off analysis on reconfigurable
Parallelism.
UNIT-V: Application Studies / Case Studies
SOC Design approach, AES algorithms, Design and evaluation, Image compression – JPEG
compression.
Page 499
TEXT BOOKS:
1. Computer System Design System-on-Chip - Michael J. Flynn and Wayne Luk, Wiely
India Pvt. Ltd.
2. ARM System on Chip Architecture – Steve Furber –2nd
Ed., 2000, Addison Wesley
Professional.
REFERENCE BOOKS:
1. Design of System on a Chip: Devices and Components – Ricardo Reis, 1st Ed., 2004,
Springer
2. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded
Technology) – Jason Andrews – Newnes, BK and CDROM.
3. System on Chip Verification – Methodologies and Techniques –PrakashRashinkar, Peter
Paterson and Leena Singh L, 2001, Kluwer Academic Publishers.
Page 500
I Year II Semester
L P C
4 0 3
OPTIMIZATION TECHNIQUES IN VLSI DESIGN
(ELECTIVE-IV)
UNIT-I: Statistical Modeling
Modeling sources of variations, Monte Carlo techniques, Process variation modeling- Pelgrom’s
model, Principle component based modeling, Quad tree based modeling, Performance modeling-
Response surface methodology, delay modeling, interconnect delay models.
UNIT-II: Statistical Performance, Power and Yield Analysis
Statistical timing analysis, parameter space techniques, Bayesian networks Leakage models,
Highlevel statistical analysis, Gate level statistical analysis, dynamic power, leakage power,
temperature and power supply variations, High level yield estimation and gate level yield
estimation.
UNIT-III: Convex Optimization
Convex sets, convex functions, geometric programming, trade-off and sensitivity analysis,
Generalized geometric programming, geometric programming applied to digital circuit gate
sizing, Floor planning, wire sizing, Approximation and fitting- Monomial fitting, Maxmonomial
fitting, Polynomial fitting.
UNIT-IV: Genetic Algorithm
Introduction, GA Technology-Steady State Algorithm-Fitness Scaling-Inversion GA for VLSI
Design, Layout and Test automation- partitioning-automatic placement, routing technology,
Mapping for FPGA- Automatic test generation- Partitioning algorithm Taxonomy-Multi-way
Partitioning Hybrid genetic-encoding-local improvement-WDFR Comparison of CAS-Standard
cell placement-GASP algorithm-unified algorithm.
UNIT-V: GA Routing Procedures and Power Estimation
Global routing-FPGA technology mapping-circuit generation-test generation in a GA frame
work-test generation procedures, Power estimation-application of GA-Standard cell placement-
GA for ATG-problem encoding- fitness function-GA Vs Conventional algorithm.
TEXT BOOKS / REFERENCE BOOKS:
1. Statistical Analysis and Optimization for VLSI: Timing and Power - AshishSrivastava, Dennis
Sylvester, DavidBlaauw, Springer, 2005.
2. Genetic Algorithm for VLSI Design, Layout and Test Automation - PinakiMazumder,
E.Mrudnick, Prentice Hall,1998.
3. Convex Optimization - Stephen Boyd, LievenVandenberghe, Cambridge University
Press,2004.
Page 501
I Year II Semester
L P C
4 0 3
SEMICONDUCTOR MEMORY DESIGN AND TESTING
(ELECTIVE-IV)
UNIT-I: Random Access Memory Technologies
SRAM – SRAM Cell structures, MOS SRAM Architecture, MOS SRAM cell and peripheral
circuit operation, Bipolar SRAM technologies, SOI technology, Advanced SRAM architectures
and technologies, Application specific SRAMs, DRAM – DRAM technology development,
CMOS DRAM, DRAM cell theory and advanced cell structures, BICMOS DRAM, soft error
failure in DRAM, Advanced DRAM design and architecture, Application specific DRAM.
UNIT-II: Non-volatile Memories
Masked ROMs, High density ROM, PROM, Bipolar ROM, CMOS PROMS, EPROM, Floating
gate EPROM cell, One time programmable EPROM, EEPROM, EEPROM technology and
architecture, Non-volatile SRAM, Flash Memories (EPROM or EEPROM), advanced Flash
memory architecture
UNIT-III: Memory Fault Modeling Testing and Memory Design for Testability and
Fault Tolerance
RAM fault modeling, Electrical testing, Pseudo Random testing, Megabit DRAM Testing, non-
volatile memory modeling and testing, IDDQ fault modeling and testing, Application specific
memory testing, RAM fault modeling, BIST techniques for memory
UNIT-IV: Semiconductor Memory Reliability and Radiation Effects
General reliability issues RAM failure modes and mechanism, Non-volatile memory reliability,
reliability modeling and failure rate prediction, Design for Reliability, Reliability Test Structures,
Reliability Screening and qualification, Radiation effects, Single Event Phenomenon (SEP),
Radiation Hardening techniques, Radiation Hardening Process and Design Issues, Radiation
Hardened Memory characteristics, Radiation Hardness Assurance and Testing, Radiation
Dosimetry, Water Level Radiation Testing and Test structures
UNIT-V: Advanced Memory Technologies and High-density Memory Packing
Technologies
Ferroelectric RAMs (FRAMs), GaAs FRAMs, Analog memories, magneto resistive RAMs
(MRAMs), Experimental memory devices, Memory Hybrids and MCMs (2D), Memory Stacks
and MCMs (3D), Memory MCM testing and reliability issues, Memory cards, High Density
Memory Packaging Future Directions.
TEXT BOOKS:
1. Semiconductor Memories Technology – Ashok K. Sharma, 2002, Wiley.
2. Advanced Semiconductor Memories – Architecture, Design and Applications - Ashok K.
Sharma- 2002, Wiley.
3. Modern Semiconductor Devices for Integrated Circuits – Chenming C Hu, 1st Ed.,
Prentice Hall.
Page 502
I Year II Semester
L P C
4 0 3
BACK END VLSI DESIGN LABORATORY
PART-A: VLSI Lab (Back-end Environment)
• The students are required to design and implement the Layout of the following
experiments of any FIVE using CMOS 130nm Technology with appropriate
Industrial standard software
List of Experiments:
9. Inverter Characteristics.
10. Full Adder.
11. RS-Latch, D-Latch and Clock Divider.
12. Synchronous Counter and Asynchronous Counter.
13. Static RAM Cell.
14. Dynamic RAM Cell.
15. ROM
16. Digital-to-Analog-Converter.
17. Analog-to-Digital Converter.
PART-B: Mixed Signal Simulation
• The students are required to perform the following experimental concepts with
suitable complexity of mixed-signal application based circuits of any FOUR (circuits
consisting of both analog and digital parts) using necessary appropriate Industrial
standard software
List of experimental Concepts:
• Analog circuit simulation.
• Digital circuit simulation.
• Mixed signal simulation.
• Layout Extraction.
• Parasitic values estimation from layout.
• Layout Vs Schematic.
• Net List Extraction.
• Design Rule Checks
Lab Requirements:
Software: Industrial standard software with prefectural licence consisting of required simulator,
synthesizer, analyzer etc. in an appropriate integrated environment.
Hardware:Personal Computer with necessary peripherals, configuration and operating System
and relevant VLSI (CPLD/FPGA) hardware kits if necessary.
Page 503
w.e.f. 2009-10
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
KAKINADA 533 003
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- II Semester
Specialization: VLSID/VLSISD
COURSE STRUCTURE
Code Name of the Subject L P C INT EXT TOTAL
Core
1. Algorithms for VLSI Design Automation 4 - 8 40 60 100
2. Low Power VLSI Design 4 - 8 40 60 100
3. DSP Processors & Architecture 4 - 8 40 60 100
4. Design of Fault Tolerant Systems 4 - 8 40 60 100
Elective III
1. Embedded and Real Time Systems 4 - 8 40 60 100
2.System Modeling & Simulation
Elective IV
1.CPLD and FPGA Architecture and
Applications
4 - 8 40 60 100
2. Advanced Microcontrollers and Processors
Laboratory
Mixed Signal Simulation Laboratory - 4 4 40 60 100
Page 504
ALGORITHMS FOR VLSI DESIGN AUTOMATION
UNIT I
PRELIMINARIES: Introduction to Design Methodologies, Design Automation tools,
Algorithmic Graph Theory, Computational Complexity, Tractable and Intractable Problems
UNIT II
GENERAL PURPOSE MTHODS FOR COMBINATIONAL OPTIMIZATION: Backtracking, Branch and Bound, Dynamic Programming, Integer Linear Programming, Local
Search, Simulated Annealing, Tabu search, Genetic Algorithms.
UNIT III
Layout Compaction, Placement, Floorplanning and Routing Problems, Concepts and Algorithms
UNIT IV
MODELLING AND SIMULATION: Gate Level Modelling and Simulation, Switch level
modeling and simulation
UNIT V
LOGIC SYNTHESIS AND VERIFICATION: Basic issues and Terminology, Binary –
Decision diagram, Two – Level Logic Sysnthesis.
UNIT VI
HIGH LEVEL SYNTHESIS: Hardware Models, Internal representation of the input algorithm,
Allocation, Assignment and Scheduling, Some Scheduling Algorithms, Some aqspects of
Assignment problem, High – level Transformations.
UNIT VII
PHYSICAL DESIGN AUTOMATION OF FPGA’S: FPGA technologies,Physical Design
cycle for FPGA’s partitioning and Routing for segmented and staggered models.
UNIT VIII
PHYSICAL DESIGN AUTOMATION OF MCM’S: MCM technologies, MCM physical
design cycle, Partitioning, Placement – Chip array based and full custom approaches, Routing –
Maze routing, Multiple stage routing, Topologic routing, Integrated Pin – Distribution and
routing, routing and programmable MCM’s.
Page 505
TEXT BOOKS:
1. Algorithms for VLSI Design Automation, S.H.Gerez, WILEY student edition, John
wiley & Sons (Asia) Pvt.Ltd. 1999.
2. Algorithms for VLSI Physical Design Automation, 3rd
edition, Naveed Sherwani,
Springer International Edition, 2005
REFERENCES:
1. Computer Aided Logical Design with Emphasis on VLSI – Hill & Peterson, Wiley,
1993
2. Modern VLSI Design: Systems on silicon – Wavne Wolf, Pearson Education Asia,
2nd
Edition, 1998
Page 506
LOW POWER VLSI DESIGN
UNIT I
LOW POWER DESIGN, AN OVER VIEW: Introduction to low- voltage low power design, limitations,
Silicon-on-Insulator.
UNIT II
MOS/BiCMOS PROCESSES : Bi CMOS processes, Integration and Isolation considerations, Integrated
Analog/Digital CMOS Process.
UNIT III
LOW-VOLTAGE/LOW POWER CMOS/ BICMOS PROCESSES: Deep submicron processes ,SOI
CMOS, lateral BJT on SOI, future trends and directions of CMOS/BiCMOS processes.
UNIT IV
DEVICE BEHAVIOR AND MODELING: Advanced MOSFET models, limitations of MOSFET models,
Bipolar models.
UNIT V
Analytical and Experimental characterization of sub-half micron MOS devices, MOSFET in a Hybrid-
mode environment.
UNIT VI
CMOS AND Bi-CMOS LOGIC GATES: Conventional CMOS and BiCMOS logic gates. Performance
evaluation
UNIT VII
LOW- VOLTAGE LOW POWER LOGIC CIRCUITS: Comparison of advanced BiCMOS Digital
circuits. ESD-free Bi CMOS , Digital circuit operation and comparative Evaluation.
UNIT VIII
LOW POWER LATCHES AND FLIP FLOPS: Evolution of Latches and Flip flops-quality measures for
latches and Flip flops, Design perspective.
TEXT BOOKS
1. CMOS/BiCMOS ULSI low voltage, low power by Yeo Rofail/ Gohl(3 Authors)-Pearson Education
Asia 1st Indian reprint,2002
Page 507
REFERENCES
1. Digital Integrated circuits , J.Rabaey PH. N.J 1996
2. CMOS Digital ICs sung-moKang and yusuf leblebici 3rd edition TMH2003(chapter 11)
3. VLSI DSP systems , Parhi, John Wiley & sons, 2003 (chapter 17)
4. IEEE Trans Electron Devices, IEEE J.Solid State Circuits, and other National and International
Conferences and Symposia.
Page 508
DSP PROCESSORS AND ARCHITECTURES
UNIT I
INTRODUCTION TO DIGITAL SIGNAL PROCESING
Introduction, A Digital signal-processing system, The sampling process, Discrete time sequences.
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-invariant systems,
Digital filters, Decimation and interpolation, Analysis and Design tool for DSP Systems MATLAB, DSP
using MATLAB.
UNIT II
COMPUTATIONAL ACCURACY IN DSP IMPLEMENTATIONS
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision, Sources of
error in DSP implementations, A/D Conversion errors, DSP Computational errors, D/A Conversion
Errors, Compensating filter.
UNIT III
ARCHITECTURES FOR PROGRAMMABLE DSP DEVICES
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and Memory, Data
Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Speed
Issues, Features for External interfacing.
UNIT IV
EXECUTION CONTROL AND PIPELINING
Hardware looping, Interrupts, Stacks, Relative Branch support, Pipelining and Performance, Pipeline
Depth, Interlocking, Branching effects, Interrupt effects, Pipeline Programming models.
UNIT V
PROGRAMMABLE DIGITAL SIGNAL PROCESSORS
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX DSPs, Data
Addressing modes of TMS320C54XX Processors, Memory space of TMS320C54XX Processors,
Program Control, TMS320C54XX instructions and Programming, On-Chip Peripherals, Interrupts of
TMS320C54XX processors, Pipeline Operation of TMS320C54XX Processors.
UNIT VI
IMPLEMENTATIONS OF BASIC DSP ALGORITHMS
The Q-notation, FIR Filters, IIR Filters, Interpolation Filters, Decimation Filters, PID Controller,
Adaptive Filters, 2-D Signal Processing.
UNIT VII
IMPLEMENTATION OF FFT ALGORITHMS
Page 509
An FFT Algorithm for DFT Computation, A Butterfly Computation, Overflow and scaling, Bit-Reversed
index generation, An 8-Point FFT implementation on the TMS320C54XX, Computation of the signal
spectrum.
UNIT VIII
INTERFACING MEMORY AND I/O PERIPHERALS TO PROGRAMMABLE DSP DEVICES
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O interface,
Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
A Multichannel buffered serial port (McBSP), McBSP Programming, a CODEC interface circuit,
CODEC programming, A CODEC-DSP interface example.
TEXT BOOKS
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. S. Chand & Co, 2000.
REFERENCES
1. Digital Signal Processors, Architecture, Programming and Applications – B. Venkata Ramani and M.
Bhaskar, TMH, 2004.
2. Digital Signal Processing – Jonatham Stein, John Wiley, 2005.
Page 510
DESIGN OF FAULT TOLERANT SYSTEMS
UNIT I
BASIC CONCEPTS: Reliability concepts, Failure & Faults, Reliability and failure rate, Relation between
reliability and Meantime between failure, Maintainability and Availability, Reliability of series, Parallel
and Parallel-Series combinational circuits.
UNIT II
FAULT TOLERANT DESIGN: Basic concepts – Static, dynamic, hybrid, Triple Modular Redundant
System, Self purging redundancy, Siftout redundancy (SMR), SMR Configuration, Use of error
correcting code, Time redundancy and software redundancy.
UNIT III
SELF CHECKING CIRCUITS: Basic concepts of Self checking circuits, Design of Totally Self
Checking checker, Checkers using m out of n codes, Berger code, Low cost residue code.
UNIT IV
FAIL SAFE DESIGN: Strongly fault secure circuits, fail-safe design of sequential circuits using partition
theory and Berger code, totally self-checking PLA design.
UNIT V
DESIGN FOR TESTABILITY FOR COMBINATIONAL CIRCUITS: Basic concepts of testability,
controllability and observability, the Reed Muller’s expansion technique, OR-AND-OR design, use of
control and syndrome testable design.
UNIT VI
Theory and operation of LFSR, LFSR as Signature analyzer, Multiple-input Signature Register.
UNIT VII
DESIGN FOR TESTABILITY FOR SEQUENTIAL CIRCUITS: Controllability and observability by
means of scan register, Storage cells for scan design, classic scan design, Level Sensitive Scan Design
(LSSD).
UNIT VIII
BUILT IN SELF TEST: BIST concepts, Test pattern generation for BIST exhaustive testing,
Pseudorandom testing, pseudo exhaustive testing, constant weight patterns, Generic offline BIST
architecture.
TEXT BOOKS:
1. Parag K. Lala – “Fault Tolerant & Fault Testable Hardware Design” (PHI)
Page 511
2. M. Abramovili, M.A. Breues, A. D. Friedman – “Digital Systems Testing and Testable Design” Jaico
publications.
Page 512
EMBEDDED AND REAL TIME SYSTEMS
UNIT I: INTRODUCTION
Embedded systems over view, design challenges, processor technology, Design technology,
Trade-offs. Single purpose processors RT-level combinational logic, sequential logic(RT-
level), custom purpose processor design(RT -level), optimizing custom single purpose
processors.
UNIT II: GENERAL PURPOSE PROCESSORS
Basic architecture, operations, programmer’s view, development environment, Application
specific Instruction –Set processors (ASIPs)-Micro controllers and Digital signal
processsors.
UNIT III: STATE MACHINE AND CONCURRENT PROCESS MODELS
Introduction, models Vs Languages, finite state machines with data path
model(FSMD),using state machines, program state machine model(PSM, concurrent
process model, concurrent processes, communication among processes, synchronization
among processes, Implementation, data flow model, real-time systems.
UNIT IV: COMMUNICATION PROCESSES
Need for communication interfaces, RS232/UART, RS422/RS485,USB, Infrared, IEEE1394
Firewire, Ethernet, IEEE 802.11, Blue tooth.
UNIT V: EMBEDDED/RTOS CONCEPTS-I
Architecture of the Kernel, Tasks and task scheduler, interrupt service routines,
Semaphores, Mutex.
UNIT VI: EMBEDDED/RTOS CONCEPTS-II
Mailboxes, Message Queues, Event Registers, Pipes-Signals.
UNIT VII: EMBEDDED/RTOS OCNCEPTS-III
Timers-Memory Management-Priority inversion problem-embedded operating systems-
Embedded Linux-Real-time operating systems-RT Linux-Handheld operating systems-
Windows CE.
UNIT VIII: DESIGN TECHNOLOGY
Introduction, Automation, Synthesis, parallel evolution of compilation and synthesis, Logic
synthesis, RT synthesis, Behavioral Synthesis, Systems Synthesis and Hard ware/Software
Co-Design, Verification, Hardware/Software co-simulation, Reuse of intellectual property
codes.
Page 513
TEXT BOOKS
1.Embedded System Design-A Unified Hardware/Software Introduction- Frank Vahid, Tony
D.Givargis, John Wiley & Sons, Inc.2002.
2. Embedded/Real Time Systems- KVKK prased, Dreamtech press-2005.
3. Introduction to Embedded Systems - Raj Kamal, TMS-2002.
REFERENCE BOOKS
1. Embedded Microcomputer Systems-Jonathan W.Valvano, Books/Cole,Thomson
Leaarning.
2. An Embedded Software Primer- David E.Simon, pearson Ed.2005
***
Page 514
SYSTEM MODELLING & SIMULATION
UNIT I
Basic Simulation Modeling, Systems, Models and Simulation, Discrete Event Simulation,
Simulation of Single server queing system, Simulation of Inventory System, Alternative
approach to modeling and simulation.
UNIT II
SIMULATION SOFTWARE:
Comparison of simulation packages with Programming Languages, Classification of Software,
Desirable Software features, General purpose simulation packages – Arena, Extend and others,
Object Oriented Simulation, Examples of application oriented simulation packages.
UNIT III
BUILDING SIMULATION MODELS:
Guidelines for determining levels of model detail, Techniques for increasing model validity and
credibility.
UNIT IV
MODELING TIME DRIVEN SYSTEMS:
Modeling input signals, delays, System Integration, Linear Systems, Motion Control models,
numerical experimentation.
UNIT V
EXOGENOUS SIGNALS AND EVENTS:
Disturbance signals, state machines, petri nets & analysis, System encapsulation.
UNIT VI
MARKOV PROCESS
Probabilistic systems, Discrete Time Markov processes, Random walks, Poisson processes, the
exponential distribution, simulating a poison process, Continuous – Time Markov processes.
UNIT VII
EVEN DRIVEN MODELS:
Simulation diagrams, Queing theory, simulating queing systems, Types of Queues, Multiple
servers.
UNIT VIII
SYSTEM OPTIMIZATION:
System identification, Searches, Alpha/beta trackers, multidimensional optimization, modeling
and simulation methodology.
Page 515
TEXT BOOKS:
1. System Modeling & Simulation, An introduction – Frank L.Severance, John
Wiley&Sons, 2001.
2. Simulation Modeling and Analysis – Averill M.Law, W.David Kelton, TMH, 3rd
Edition,
2003
REFERENCE BOOKS:
Systems Simulation – Geoffery Gordon, PHI, 1978
Page 516
CPLD AND FPGA ARCHITECTURE AND APPLICATIONS
(ELECTIVE IV)
UNIT –I
Programmable logic Devices: ROM, PLA, PAL, CPLD, FPGA – Features, Architectures, Programming,
Applications and Implementation of MSI circuits using Programmable logic Devices.
UNIT-II
CPLDs: Complex Programmable Logic Devices: Altera series – Max 5000/7000 series and Altera FLEX
logic-10000 series CPLD, AMD’s- CPLD (Mach 1 to 5), Cypress FLASH 370 Device technology, Lattice
pLSI’s architectures – 3000 series – Speed performance and in system programmability.
UNIT – III
FPGAs: Field Programmable Gate Arrays- Logic blocks, routing architecture, design flow, technology
mapping for FPGAs, Case studies Xilinx XC4000 & ALTERA’s FLEX 8000/10000 FPGAs: AT &T ORCA’s
(Optimized Reconfigurable Cell Array): ACTEL’s ACT-1,2,3 and their speed performance
UNIT-IV
Finite State Machines (FSM): Top Down Design, State Transition Table , State assignments for FPGAs,
Realization of state machine charts using PAL, Alternative realization for state machine charts using
microprogramming, linked state machine, encoded state machine.
UNIT-V
FSM Architectures: Architectures Centered around non registered PLDs, Design of state machines
centered around shift registers, One_Hot state machine, Petrinets for state machines-Basic concepts
and properties, Finite State Machine-Case study.
UNIT- VI
Design Methods: One –hot design method, Use of ASMs in one-hot design method, Applications of one-
hot design method, Extended Petri-nets for parallel controllers, Meta Stability, Synchronization,
Complex design using shift registers.
Page 517
UNIT-VII
System Level Design: Controller, data path designing, Functional partition, Digital front end digital design
tools for FPGAs & ASICs, System level design using mentor graphics EDA tool (FPGA Advantage), Design
flow using CPLDs and FPGAs.
UNIT - VIII
Case studies: Design considerations using CPLDs and FPGAs of parallel adder cell, parallel adder
sequential circuits, counters, multiplexers, parallel controllers.
TEXT BOOKS:
1. Field Programmable Gate Array Technology - S. Trimberger, Edr, 1994, Kluwer Academic Publications.
2. Engineering Digital Design - RICHARD F.TINDER, 2nd
Edition, Academic press.
3. Fundamentals of logic design-Charles H. Roth, 4th
Edition Jaico Publishing House.
REFERENCES:
1. Digital Design Using Field Programmable Gate Array, P.K.Chan & S. Mourad, 1994, Prentice Hall.
2. Field programmable gate array, S. Brown, R.J.Francis, J.Rose ,Z.G.Vranesic, 2007, BSP.
Page 518
MIXED SIGNAL SIMULATION LABORATORY
By considering suitable complexity Mixed-Signal application based circuits
(circuits consisting of both analog and digital parts), the students are required to perform
the following aspects using necessary software tools.
• Analog Circuits Simulation using Spice Software.
• Digital Circuits Simulation using Xilinx Software.
• Mixed Signal Simulation Using Mixed Signal Simulators.
• Layout Extraction for Analog & Mixed Signal Circuits.
• Parasitic Values Estimation from Layout.
• Layout Vs Schematic.
• Net List Extraction.
• Design Rule Checks.
*****