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Analog & Digital Compared Amplifiers and logic gates are certainly different in function, and mathematically, analog entails continuous functions while digital functions are discrete. (Sampled-data systems are in-between; their samples of continuous quantities occur discretely in time.) Analog and digital appear to be quite different realms of technology. However, techniques of one often have analogous techniques in the other. Here, we take a look at some similarities. The difference between analog and digital electronics diminishes with complexity. As digital approaches the functional complexity of computation, difference equations appear, and are comparable in the discrete domain to differential equations. DSP theory is more like analog electronics than logic design. At the register level, signal processing of discrete quantities is not unlike analog signal processing. To demonstrate the similarities, consider two technologies, op- amps and A/D converters (ADCs). While ADCs span the gap between analog and digital (and are not purely digital), they will serve to make the comparison. Starting with the op-amp, it is more of an integrator than an amplifier in that its open-loop gain begins rolling off near 0 Hz, as shown below. Now consider both integrating (dual-slope, -Σ ) and parallel-feedback (successive-approximation (SA), tracking) type ADCs. The generalized parallel-feedback converter scheme is diagrammed below. They also trade off speed for precision, with a plot similar to the op-amp, shown below.

Dennis Feucht - Analog Circuits

Oct 22, 2015




Short but concise guide to electronic design with special accent on comparing analog and digital domains
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Page 1: Dennis Feucht - Analog Circuits

Analog & Digital ComparedAmplifiers and logic gates are certainly different in function, and mathematically, analog entails continuous functions while digital functions are discrete. (Sampled-data systems are in-between; their samples of continuous quantities occur discretely in time.) Analog and digital appear to be quite different realms of technology. However, techniques of one often have analogous techniques in the other. Here, we take a look at some similarities.

The difference between analog and digital electronics diminishes with complexity. As digital approaches the functional complexity of computation, difference equations appear, and are comparable in the discrete domain to differential equations. DSP theory is more like analog electronics than logic design. At the register level, signal processing of discrete quantities is not unlike analog signal processing. To demonstrate the similarities, consider two technologies, op-amps and A/D converters (ADCs). While ADCs span the gap between analog and digital (and are not purely digital), they will serve to make the comparison.

Starting with the op-amp, it is more of an integrator than an amplifier in that its open-loop gain begins rolling off near 0 Hz, as shown below.

Now consider both integrating (dual-slope, ∆ -Σ ) and parallel-feedback (successive-approximation (SA), tracking) type ADCs. The generalized parallel-feedback converter scheme is diagrammed below.

They also trade off speed for precision, with a plot similar to the op-amp, shown below.

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As sampling rate increases, the number of digitized bits decreases. For both categories of ADCs, digital feedback of bits compares to the op-amp feedback. For instance, the SA converter makes one bit comparison per clock cycle. The sample rate consequently rolls off at a slope of –1 (–6 dB), as doubling the bits halves the sample rate for the same clock frequency. Integrating converters accumulate more counter bits, timing out a prolonged integration of their inputs, leading to more bits, but at the expense of time. Again, the log-log bits-speed slope is –1.

To increase converter speed, more processing is done in parallel. Instead of using a single comparator (which itself is a one-bit ADC), flash converters use 2N

comparators to convert N bits of data simultaneously. This bandwidth-extension technique has an analog in analog: the fT multiplier. The basic scheme is shown below.

To double bandwidth at the same gain, A, use two amplifiers with transconductance A/2 in parallel. Each amplifier, having half the gain of the original, has twice the bandwidth. And the current-summing at the output node does not decrease bandwidth, but allows the addition of the individual amplifier gains. Bandwidth can be further extended using three amplifiers (fT-tripler), and more. But eventually, side-effects from paralleling cause diminishing returns. But the concept works for low parallelism, just as it does with comparators in flash converters. A typical implementation of the fT-doubler as a differential amplifer is shown below.

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A BJT implementation (omitting biasing circuitry) as a current amplifier is shown below.

The collector currents of the two diff-amp stages are connected in parallel, while their inputs are in series. Each diff-amp has a gain of A and an input of Vi/2. Then the total gain is:

where m = 2 for a doubler. The gain-bandwidth of each diff-amp is fT (in the square brackets) multiplied by the leading m, for a gain-bandwidth of m⋅ fT. For a single diff-amp, with twice the input voltage (the right side of the above equation), the gain is the same but with a gain-bandwidth of only fT. Parallelism has its advantages.

Finally, gain and precision can be traded off by cascading op-amps, as shown below.

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Assume both op-amps have an open-loop gain of K and equal gain-bandwidths, fT. The second amplifier stage is faster than the first because its closed-loop gain is less, as shown on the Bode plot (b), and it has a bandwidth of fbw2. The cascaded combination has a gain-bandwidth that is no better than the individual amplifiers, but more loop gain is available at higher frequencies.

The digital analog - another ADC type - is the two-stage or half-flash ADC, sketched out as follows.

The two-stage ADC delivers n bits, or, for ADC1 = ADC2, 2⋅ m bits. A same-speed, one-stage flash ADC of n bits has 2n comparators, while the above ADC has 2⋅ 2n/2 = 2n/2 + 1. The two-stage ADC is less than half as fast but maintains the same precision of n bits with far fewer comparators.

While comparison with the cascaded op-amp in this case is not direct and simple, there are similarities. In an op-amp, more amplifier stages are required to achieve more gain just as more comparators are required in the full-flash ADC to achieve more bits of precision. In feedback amplifiers, more gain provides more precision. The reduction in comparators of the half-flash is greater than its speed reduction, thereby making its speed/comparator ratio (roughly analogous to gain-bandwidth product) better than the full flash. The cascaded op-amp similarly has no better speed than a single, closed-loop op-amp, but its precision at comparable speeds is better.

These three analog-digital comparisons underlay the message that the general principle of precision-speed trade-offs apply in both the analog and digital realms. Understanding their application in one realm prepares one to comprehend their application in the other, lesser-understood, realm.

Dennis L. Feucht, 2000

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ASICs Versus Semi-Discrete DesignApplication-specific ICs (ASICs) have the benefit of integrating a maximum amount of circuitry for a particular function on a single IC. This saves board space and cost. But designers beware. You could be "burned" by using an ASIC in your design.

The Appeal of ASICsAn example of a class of ASICs is PFC or PFC/PWM "combo" ICs, which contain essentially all the active control circuitry for power-factor correction and second-stage dc-dc conversion. Some PFC/PWM ICs, such as Micro Linear's ML4803, take integration and small size to the limit. The ML4803 is packaged in an 8-pin SOIC.

With these obvious benefits, it would seem that ASICs are the way to go, if the function you need has already been integrated. System-level design then becomes a simplified task of following the "typical circuit" in the part specifications, making minor adjustments for system specs, and voila! Board-level design has become easy and hot-shot designers will eventually all work for semiconductor companies.

Unfortunately, this scenario is fictional or at least highly idealized. A "just right" ASIC can be adjusted parametrically to the application while maintaining space and cost advantages. But the goal of commercial ASIC design is to make it as general as possible in its specificity. If the ASIC is optimized for one particular design, it is a custom IC, of little use for other applications. If it is too general, it is likely to be too suboptimal to be feasible.

In reducing package size and cost by reducing pin count, ASICs also reduce observability. In practice, a cheap ASIC will lure the unwary designer to adapt it to a somewhat different application than was intended. For instance, most PFC ASICs are based on a boost (common-active) converter topology. But what if you want to use a SEPIC instead? It has the advantage of eliminating power-on inrush current. The current-limit thermistor, a somewhat large and expensive part, can be eliminated. And though the SEPIC requires an extra winding, if the control circuitry is powered from a few turns on the boost power inductor, you already have a transformer. Besides, the SEPIC 1:1 transformer suggests use of a low-cost power-line common-mode filter inductor. So you try to adapt an ASIC to a SEPIC topology.

What happens? First, the small-signal (incremental) transfer function is different. For a boost, the cycle-averaged (low-frequency) transfer function is:

but for a SEPIC, it is:

Consequently, the ranges of voltages and currents changes, and parts values (such as sense resistors) that are found in control loops, change accordingly. But these value changes affect loop behavior.

The incremental control to input-current and control to output-current functions (though more difficult to derive) are also different in form (and the possible subject of a different article). This also affects the control scheme; poles and zeros appear in vastly different places (or not at all), and component values can become unfeasible to implement. Response times can become unacceptable.

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Additionally, ASIC control loops depend on a certain phase of input at their pins. Inversion requires additional circuitry.

Suppose you solve these problems only to find you cannot make spec because ASIC performance is too limited for your adaptation. More subtle difficulties involve layout. Because your topology is different, noise is higher at an ASIC pin, causing degraded performance. A short trace for a boost topology might be inescapably long for a SEPIC (or vice-versa). The ASIC is not designed to reject the higher noise, and you're sunk. Furthermore, your clever enhancement cannot be implemented using the ASIC because you cannot get inside it and make a change or two. ASICs do not always simplify design tasks. And they can be expensive because of their market-limited functions.

Another problem with ASICs is that they come and go. They are specific, and tend to have a short market life. While I was designing a PFC, I chose to use a Unitrode UCC3858. It had a nifty scheme for feedforward compensation of line-voltage variation using a DAC, which minimizes line ripple into the multiplier. While I was making progress on the design, TI acquired Unitrode and cancelled the part. Perhaps it was a good marketing decision for TI but not for my project. If I had used a well-established, multiple-sourced ASIC I would have avoided this problem, but no such ASICs for PFC were available. They were apparently too specific for that.

Semi-Discrete DesignBecause of these design limitations using ASICs, the creative designer tends to be pulled in the direction of design versatility. This leads to semi-discrete design – more parts than an ASIC but fewer than discrete transistors and MSI ICs. (MSI stands for medium-scale integration, such as op-amps, comparators, and dual flip-flops.) Though the trend is to flee from lower levels of integration, to consider maximum integration a high-priority design criterion can lead to the traps described previously. For low to medium-volume products not facing extreme space constraints, less integration can be optimal.

Semi-discrete design is based on the principle of using only well-established parts that are multi-sourced and enduring, such as the UC3842 PWM current controller, single-supply dual and quad op-amps and comparators (LM358, LM324, LM392, LM339), and a part such as a CA3080 for a multiplier. These parts are produced in high volume and have reached commodity price levels. The sum of their costs can be less than an ASIC. The disadvantage of additional board space is offset by more accessible nodes to probe in test, thus reducing production test cost. For development, such access is obviously desirable. Freed of ASIC constraints, novel benefits can be introduced, and the trade-off between parts count and performance better tailored to the application. For long product lifetimes, part obsolescence problems are minimized or avoided. Furthermore, semi-discrete designs become an "elastic" technology base from which adaptations can be pulled further for projects that differ from the base design. This saves redesign costs and reduces time-to-breakeven.

ClosureSometimes design trends should not be taken for granted. They are not always best for every project. While integration is generally a good trend, it can also produce undesirable side-effects in development activities. Semi-discrete design is a concept that is worth keeping in mind, if not applying as a design approach when feasible.

Dennis L. Feucht, 2000

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Feedback Circuit MisconceptionsTypical circuits textbooks tell us that there are four basic feedback topologies. The impression is given (if not stated) that any feedback circuit will conform to one of these four topologies. One of the tasks of feedback analysis, it would seem then, is to identify to which of the four basic topologies a given feedback circuit conforms. But this is misleading. This article attempts to clarify the resulting confusion.

Feedback-Circuit TopologiesThe basic goal of feedback-circuit analysis is to take the circuit diagram, which is sometimes a spaghetti-like connection of components, and adduce from it the transmittances (or gains or transfer functions) of the blocks G and H of the classical feedback topology, shown below in block diagram (a) and signal flow-path (b) representations. (Generalized electrical quantities - voltages or currents - are designated here as "x" quantities, where x is either v or i.)

Actual circuits can also have additional associated transmittances. The more general feedback topology is shown below. Ti and To are outside the feedback loop but are included because they commonly occur with feedback circuits. Sometimes it is not obvious from a circuit diagram that such blocks should be included.

Block diagrams do not represent circuit interconnections (topology) but instead describe the flow of electrical cause and effect. Each block has an input (cause) and an output (effect) which is an electrical quantity. The arrows represent causal constraints, pointing from output to input. The input multiplied by the transmittance written in the block is the output. For example, xf = G⋅ xE. The

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summing block, Σ, adds its inputs according to the sign by the arrowhead. This block diagram is a graphic way of expressing the following algebraic equations:

The first two equations describe the feedback loop itself. The loop is closed and consists of G, H, and Σ. Solving for the overall closed-loop gain of the feedback amplifier, T = xo/xi, and is:

The middle factor in parentheses is the gain of the closed feedback loop itself. Given a circuit diagram, if the corresponding block transmittances can be found, the closed-loop feedback gain can be calculated from the above general expression. Circuits are usually not obviously decomposable into the block transmittances. What is needed is a procedure that derives the blocks from feedback circuits in equivalent circuit form so that circuit analysis can then be used to determine their transmittances.

From Circuits to Block DiagramsWhat is usually hardest in going from circuit to block diagram is to identify the summing block, Σ , (and E, the error quantity) from the circuit diagram, and the pickoff circuit (and xf). Simplifying this task brings us to the "four topologies" of textbooks. (A circuit topology is essentially its schematic diagram, showing its structure through interconnection of its components.) The four topologies are all combinations of current or voltage pickoff and error summing. As such, they are four possible topological characteristics of the feedback circuit. The usual names given to the four are given in the following table.

Electrical Quantity

Summing Circuit Pickoff Circuit

voltage series comparison node sampling

current shunt comparison loop sampling

What is misleading in too many circuits textbooks is the notion that a given circuit has one of these four topologies. In other words, it is conveyed that any given feedback circuit is constrained, for example, to have either a series or shunt comparison for its summing circuit, and either node or loop sampling for its pickoff circuit. The key insight here is that it is not the circuit but the analyzer of it that determines whether voltages or currents are compared and sampled! If you have been thinking that the circuit itself (and not you) determines the electrical quantity summed or picked off, then you would be looking for some characteristic of the circuit topology to determine which quantity this is. But you choose the quantities for summing and pickoff and then analyze the circuit accordingly. The choices are arbitrary, though some choices lead to a simpler analysis than others, as we will see. Only simple circuits with ideal sources constrain the choice to only one quantity because the other choice leads to a circuit degeneracy.

Choosing Pickoff Quantities

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Starting with the pickoff circuit, what is essential is that an electrical quantity (current or voltage), xf, be identified as the pickoff quantity, xf, to be fed back. The choice of xf is constrained to be the output quantity of G and the input quantity of H. The first step in the analysis is to choose xf. There is often more than one choice that will result in a correct analysis, but also, one choice many times leads to the simplest analysis.

But the circuit is not the block diagram, and it may not be obvious from the circuit which quantity to choose. To see what might happen, consider the block diagram below. Suppose you choose a quantity that is inside G. G has been decomposed into cascaded blocks GA and GB. The additional output block, To, is included between the pickoff point and the circuit output quantity, xo, when the chosen pickoff quantity is not the output quantity.

If xf is chosen too much toward the input within the forward path, G, then common factors appear in the algebraic expressions for H and To. As shown, G = GA⋅ GB, where xf is chosen as the output of GA instead of GB. This results in the following feedback equations:

Note that GB is a common factor of both the H term of xE and To in xo. By letting xf be the output of GB instead, GB appears as a factor in the first equation and disappears from the others.

If xf is instead chosen too close to the output, so that To = ToA⋅ToB and xf is the output of ToA, then:

In this case, introducing factor ToA into the third equation removes it from the first two.

The optimal pickoff quantity is the one which minimizes common transmittances in these equations. However, it is not necessary to choose, or even identify, such a pickoff quantity. Let your intuition pick a quantity which seems most appropriate. It becomes the input quantity to H and To, if not xo (in which case To = 1).

Suppose you choose xf to be a voltage. Voltages occur at nodes. Consequently, xf is identified with a circuit node from which a connection to the feedback-path (H) input is made. For a current, a pickoff loop must exist in which this current flows. A loop of G generates this current, and it flows through circuitry comprising the input of H.

Choosing Summing QuantitiesNow let's apply the same kind of reasoning to the summing circuit. If xE is chosen too close to the

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output, common factors occur in the two terms of xE. Let xE be the input to GB. Then:

By letting G = GA⋅GB, GA becomes a factor in the first equation and is eliminated from the second.

The other case is that of choosing xE too close to the input, as the input of TiB. Then TiB appears as a common factor with G and in the error term containing H.

By moving xE to the output of TiB, TiB is eliminated from the first equation and H term of xE and becomes a factor in the first xE term so that Ti = TiA⋅ TiB.

You Choose Pickoff and Error QuantitiesThe form of input-network topology (series or shunt) is not generally determined by the circuit. But the choice of error quantity xE affects the choice of input topology. This can be seen from the following input network.

In this circuit, the output of the H block is represented by a generalized source (either Thevenin or Norton equivalent) consisting of transmittance x(xf) and source resistance RHo. The feedback-circuit input is a voltage source in series with an input resistance across which is voltage v1.

If v1 is chosen as vE, the H-path port is made a Thevenin circuit and the input forms a loop − a series topology. If v2 is chosen for vE instead, then converting the input and feedback ports to Norton equivalent circuits results in a common node with voltage vE − a shunt topology. The feedback circuit input topology is determined by choice of error quantity, and not by the circuit.

The same kind of argument applies to pickoff circuits. Once xf is chosen, then either a loop (for if) or node (for vf) as the pickoff circuit results. Often, either choice can lead to a successful analysis.

ClosureThe key steps in analyzing a feedback circuit are to choose pickoff and error quantities. With an awareness that input and output blocks may be required for some choices, consistent analysis will subsequently produce correct transmittance equations for G and H (and Ti and To). But do not be confused into thinking that your choices of xE and xf are determined by the circuit topology. Which of the four topologies results in your analysis depends on your choice of error and pickoff quantities, and not the circuit itself.

Dennis L. Feucht, 2001

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Electrical QuantitiesElectricity is analogous to fluid flow, as compared in the table below.

Electrical Quantity

Fluid Flow Analog

Charge Fluid

Voltage Pressure

Current Flow rate

Resistance Flow resistance (Fanning friction factor)

Fluid flows in pipes; electricity flows in electrical conductors, usually wires, circuit-board traces and components. What actually flows is electric charge, q, measured in coulombs (C). Current, i, is the rate of charge flow, or

That is, current is the change in charge flowing past a given point per change in time over which the change in charge was measured. Current is measured in units of amperes (A). One ampere is one coulomb per second. Resistance, R, determines how much current will flow when a voltage is placed across it. Voltage, v, has units of volts, V, and is an "across" quantity, like pressure and speed.

Across quantities must be measured between two points, junctions or nodes. Pressure is measured with respect to atmosphere (gage), vacuum (absolute), or with respect to some other junction in the plumbing (relative). Speed is measured with respect to some reference frame that is considered at rest. Voltage is also measured across − between two circuit nodes. The node designated as 0 V is also called ground. Usually, voltage measurements are made with respect to ground; otherwise, they are "floating" or differential measurements between two non-ground nodes.

Current, flow and force are through quantities and are measured in the branches of a network (whether it be wiring or plumbing). Network nodes are connected by branches.

Ohm’s LawThe most basic and often-used electrical equation is Ohm’s Law:

Resistance is defined by Ohm’s Law to be v/i. A 12 V battery with 10 Ω between its terminals results in 1.2 A of current through both 10 Ω resistor and battery.

Electrical components called resistors are used to limit or set current in a circuit with a given voltage, or set voltage for a given current. (A circuit element is an idealization of an actual electronic part, or component.) Resistors are usually marked with at least three color bands that indicate their resistance, in units of ohms (Ω ). For 5 % tolerance resistors, the first two bands are the first two significant digits of the value, and the third band is the number of zeros to be added to the first two digits. A final band of gold (5 %) or silver (10 %) indicates the tolerance. For 1 % resistors, the first three bands are the first three digits; the fourth is the multiplier. The color code is:

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The colors follow their order in the rainbow (except the ends). A resistor with color bands, starting from the end, of green, brown, red (5, 1, 2) has a value of 5100 Ω, or 5.1 kΩ.

Sources and Equivalent ResistancesElectrical sources are of two kinds: voltage and current. An ideal voltage source will maintain its rated voltage across its terminals no matter what amount of current flows. A short (0 Ω ) causes infinite current. The output voltage of actual voltage sources, such as batteries, power supplies or electric generators, will decrease with increasing current. For a short (assuming no shutdown), the source’s rated voltage divided by the resulting current is the equivalent internal resistance of the source. An actual voltage source can be modeled as in the following equivalent circuit:

The 10 Ω resistor is in series with the 12 V voltage source. The two small circles are the actual voltage source terminals, and the series resistance is internal to it. RL is the load resistance and is also in series with the internal resistance and ideal voltage source. The connections of these three circuit elements form a closed loop. The current everywhere in the loop must be the same or else charge would accumulate or deplete (which it does not). The current can be determined by Ohm’s Law: 12 V is across 10 Ω plus RL, or

Resistances in series add:

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Rseries = R1 + R2Two resistances in series are the equivalent of a single resistance with the sum of their values. Besides series connections, circuit elements can be connected in shunt or parallel, as shown for two resistors below:

Resistances in parallel (shunt) are equivalent to:

Rparallel = R1 || R2 =

The parallel resistances can be replaced with a single, equivalent resistance of the above value.

Most sources are available as power supplies and are voltage sources, rated for a given voltage output for not more than a maximum output current. Current sources supply a given current for not more than a maximum output voltage. They are often special-purpose supplies, such as the outputs of igniter pulse generators. They are limited by how much voltage can occur across their terminals when resistance approaches infinity (or, an open circuit). This maximum voltage is sometimes called the current-source’s voltage compliance. Current sources are limited by maximum resistances of their loads while voltage sources are limited by minimum resistances.

Kirchhoff’s Voltage and Current LawsBesides Ohm’s Law, the most basic circuit principles are Kirchhoff’s two laws. Kirchhoff’s Voltage Law (KVL) states that the sum of the voltages around a closed loop must equal zero:

Current flows out of the positive terminal of the source (by convention) and causes voltage drops across resistors and other passive (non-power-generating) circuit elements. (Sources are active elements.) Voltage sources are, by convention, voltage "rises" because current goes into their negative terminal and out the positive terminal, from − to +. Voltages traversed in this direction are negative. In contrast, current flows into the positive voltage end of resistances, as shown below:

Applying KVL,

− VS + VR1 + VR2 = 0

or, the sum of the voltage drops equals the voltage source:

VS = VR1 + VR2

KVL is the analog of the principle that the sum of the pressure drops in a fluidic circuit equals the pressure source.

Kirchhoff’s Current Law (KCL) states that the sum of current into a node must equal zero:

In other words, charge does not accumulate in nodes. By convention, currents flowing into a node are negative and out of a node are positive. This is analogous to the principle that the sum of fluid flows into a junction must equal the flows out (for incompressible fluids). KCL is demonstrated by the following circuit:

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Applying KCL,

iout = i1 + i2

All current into the junction must leave it.

DC and ACIn systems theory (whether it be electronic, chemical, mechanical, thermal or aerodynamic), some quantities remain constant while others change. A constant or static quantity is "dc" and a changing or dynamic quantity is "ac." Historically, these electrical terms meant "direct current" and "alternating current," but "constant" and "changing" are better descriptions. An ac waveform can be added to a dc offset, as shown below:

The ac waveform is added to a dc amount that is the average of the (total) waveform. This average amount around which the ac component varies is the waveform’s dc component. Ac and dc are often used to refer to the kind of voltages available from sources. Batteries are "dc" in that the voltage across their terminals is constant. Diesel-driven generators put out a sinusoidal ("sinewave") voltage that has a frequency of typically 60 Hz. Because it is a sinewave, its voltage reverses (is bipolar), reaching positive and negative peaks 60 times per second.

Some electronic components are inherently dynamic or "ac" in their behavior. The basic dynamic circuit elements are capacitors and inductors. Together, they are called reactive (versus resistive) elements. Transformers are a variation on inductors. Transistors, integrated circuits, switches, lamps and connectors are not basic circuit elements, but can be modeled by equivalent circuits that can include reactances, resistances and controlled sources.

Frequency and PeriodFrequency, f, is the rate a periodic waveform repeats. The unit is Hertz (Hz), which is "per second." North American electrical power has a frequency of 60 Hz. The reciprocal of frequency is period, T:

T = 1/f

Frequency counter/timers are instruments that measure frequency, period, and other time-related aspects of periodic waveforms. Deluxe digital multimeters have frequency measurement capability, as do most newer digital and some analog oscilloscopes.

Voltage and Current DividersA very common circuit used to reduce or scale a voltage is a voltage divider. It consists of 2 resistors and has an input and output. The common terminal shared by input and output is grounded in the diagram below. (Note the ground symbol.)

Ground is the 0 V node.Voltage measurements are made relative to ground unless otherwise noted. In general, the common terminal of the divider need not be at 0 V.

The general circuit for a voltage divider, with common node at ground, is shown below.

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The input loop has three series elements: vin (source), R1 and R2. Applying KVL results in:

vin = vR1 + vR2

At the output loop, the sensed voltage, vout, is:

vout = vR2

Then the ratio of output to input voltage (the scale-factor) is:

The voltages on the right side of this equation can be expressed in circuit element values by applying Ohm’s Law. Let the input-loop current be i. Then

vR1 = i⋅ R1 vR2 = i⋅ R2

Also by Ohm’s Law,

i = vin/(R1 + R2)

Substituting and simplifying,

This is the basic voltage-divider equation. It expresses the scale-factor or attenuation of voltage from input to output. The input nodes (input and common) are the pair of terminals across which the input voltage occurs. Such a pair is called a port. The output port has vout across its pair of terminals. By convention, current flowing into a port + terminal is positive.

A current divider scales current in the R2 branch of parallel resistors with input current of iin to the parallel pair. Then iout = i2 and the current-divider formula (solved using KCL) is:

Current dividers attenuate current. Note that R1, not R2, is in the numerator.

Thevenin’s and Norton’s TheoremsThevenin’s theorem is a way of simplifying circuits with (independent) sources to that of a single voltage source in series with a Thevenin equivalent resistance. This is the same equivalent circuit that was used earlier to model actual voltage sources. In general, an arbitrary circuit, as shown below, has a Thevenin equivalent circuit, shown to the right. The Thevenin voltage source and resistance can be found as follows. The Thevenin voltage is found by leaving the output port open.

No current will flow through Rth and

vth = voc

where voc is the output open-circuit voltage. The Thevenin resistance is found by shorting the output and measuring the

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resulting output short-circuit current, isc..


Rth = vth/isc

Analytically, voc and isc are found by applying the basic circuit principles: Ohm’s Law, KVL and KCL. Empirically, open-circuit voltage and short-circuit current are measured at the output.

Norton’s theorem reduces the same kind of arbitrary network to a Norton equivalent circuit: a current source, in, in parallel with a Norton equivalent resistance, Rn. A Norton equivalent circuit can be derived by finding the Thevenin circuit. Then the Norton values are:

in = vth/Rth Rn = Rth

SuperpositionLinear circuits (such as the above) with multiple sources can be solved for voltages and currents by solving the circuit for one source at a time while nulling (setting to zero) the others: voltage sources are shorted and current sources are opened. Add the results from each solution for each node (voltages) and branch (currents) to get the combined (total) result. Ideal voltage sources have zero resistance (shorted); ideal current sources have infinite resistance (open).

The following example circuit demonstrates the use of Thevenin’s and Norton’s theorems and superposition. The "schematic" diagram uses a new symbol − that of a battery − for the 12 V voltage source. It is functionally identical to an ideal voltage source. A more common way to indicate a voltage source is to use a label, such as − 5 V, to indicate that a − 5 V source is connected from that node to ground.

To find the open-circuit (Thevenin) voltage, use superposition. Beginning with the 12 V source, null the − 5 V source by replacing it with a short (to ground). The resulting voltage divider can be solved for vout. Using the divider formula and solving,

Similarly, nulling the 12 V source and solving for the voltage contribution from − 5 V,

The superposition of these voltages results in

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vth = 8.25 V + (− 1.56 V) = 6.69 V

The easy way to solve the above circuit for its Thevenin equivalent resistance is to note that the 1.0 kΩ, 12 V branch is in parallel with the 2.2 kΩ, − 5 V branch to ground. Voltage sources have 0 Ω resistance. Consequently, the equivalent resistance at the output port is 2.2 kΩ || 1.0 kΩ, or using the parallel resistance formula,

Rth = 687.5 Ω

The Thevenin resistance can also be found by shorting the output port and solving for the current. Using Ohm’s Law twice and KCL,

isc = 12 V/1.0 kΩ + (− 5 V)/2.2 kΩ = 9.73 mA


Rth = vth/isc = 6.69 V/9.73 mA = 687.5 Ω

in agreement with the parallel-resistor result.

The Norton equivalent circuit is readily calculated from the Thevenin circuit and is shown below. The source symbol is that of a current source.


in = isc = 9.73 mA Rn = Rth = 687.5 Ω

Unit PrefixesIn the previous example, mA was used as a unit of current and kΩ for resistance. Engineering prefixes for units are commonly used. The most used are:

Unit Prefix Prefix Name Multiplier

p pico 10-12

n nano 10-9

µ micro 10-6

m milli 10-3

k kilo 103

M mega 106

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G giga ("jig-a") 109

Basic Measurement InstrumentsThe most basic electronic test and measurement instrument worth owning is the digital multimeter (DMM). For about $100, a meter (such as a Beckman DM27XL or equivalent, for about $60) measures voltage, current, resistance and other quantities (frequency, capacitance) and tests transistors and diodes. On low-resistance ranges, continuity (electrical connection of wires) can be tested by an audible beep.

A big step up from a DMM is an oscilloscope, which plots a graph of input (probe) voltage versus time. A ‘scope is a "window" into dynamic (changing-in-time) circuit behavior. Voltage and time scales are adjustable ("volts/div and "time/div").

The ‘scope screen is like a window, and can only show a segment of the ongoing voltage function (or waveform) in time. Some way of selecting the alignment of this displayed window in time is needed. The trigger system is used to start the trace on the screen at the same point on a repetitive waveform for each sweep of the beam across the face of the screen. By tracing out the same waveform each time, the displayed trace looks stable. When the triggering is not correctly adjusted, many different traces are drawn, showing an unstable display. Trigger source, mode, slope and level controls are adjusted to make the trace stable. Instability is usually due to the trigger level being set to outside the maximum bounds of the waveform on "normal" triggering mode. "Auto" mode keeps the trace going (to show the no-waveform baseline of 0 V) and is generally the most useful mode. When viewing waveforms of less than 50 Hz, however, normal mode is necessary for stability.

Oscilloscopes come in two major categories nowadays: analog and digital. Analog ‘scopes are unable to capture transient (one-time) waveforms but are low-cost and show a continuous waveform. Digital storage oscilloscopes (DSOs) now sell for under $1000 and are able to capture (or "store") single-shot events by sampling the input waveform at points in time, resulting in a discrete (not continuous) display. Transient capture is useful for rocketry since firing events are not repetitive. DSOs are a kind of data acquisition system with a front-panel instead of a computer as interface.

Another useful test instrument is the power supply. Supplies are required as subsystems in electronic equipment, but a general-purpose test-bench supply, with multiple outputs, including one or more with variable output voltage, can expedite system testing.

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ReactanceResistors dissipate electric energy but do not store it. The two basic kinds of circuit elements (idealized components) that store energy are capacitors and inductors and are called reactances. They are duals of each other because the behavior of one is the same as the other with voltage and current interchanged. Reactances are inherently dynamic and their behavior depends on the rate of change of their current and voltage waveforms.

CapacitorsCapacitors are components that store electric charge, q. The charge is stored in electrically insulating (or dielectric) material that is between two conducting plates or sheets. A capacitor is analogous to a charge storage tank and its value is defined as

where C is capacitance, with units of farads (F), v is voltage, and d is "an infinitesimal change in." In other words, capacitance is the change in charge over the change in voltage. (Using notation from calculus, C is the derivative of q with respect to v; that is, it is the instantaneous slope of q plotted against v. For a constant capacitance, the slope of the q-v line, ∆q/∆v, is C. dq/dv is the slope of a line tangent at a given point on any continuous curve.) For constant C, C = q/v.

A farad is a coulomb/volt. But a coulomb is an ampere-second (A⋅s) so a farad is an A⋅s/V. By Ohm’s Law, a farad is the same as F ≡ s/Ω, or a second per ohm.

Capacitors can be made by wrapping a plastic film (such as polycarbonate, polyester or polypropylene) between two sheets of aluminum foil. The sheets are offset on the film so that each extends beyond the film at opposite ends. The ends are crushed together and attached to metal leads. A capacitor can be constructed out of the plastic and aluminum films found in kitchens. Capacitance in terms of geometry is:

where ε is the permittivity (or dielectric constant), A is the area of the dielectric and l is its thickness. The permittivity has units of F/m and is a measure of the ability of the insulator to store charge. The permittivity of vacuum is ε0 = 1/36⋅

π nF/m or about 8.85 pF/m. Relative permittivity, εr, is a factor multiplied to ε0 to produce total permittivity:

ε = εr⋅ε0

For example, kitchen plastic wrap (polyvinylidene chloride) has εr ≈ 3.5 (ε ≈ 31 pF/m) and a typical thickness of 15 µm (0.6 mil). Then a 1 inch (25.4 mm) wide by 1 foot (304.8 mm) long piece will make a capacitor of 16 nF.

Just as Ohm’s Law gives the v-i relationship for resistors, the v-i relationship for capacitors can be found from its definition and the definition of current, i = dq/dt:

Solving for dv/dt, the rate of change of voltage across the capacitor is i/C. For a constant current flowing into C, the voltage increases linearly. The voltage ramps up for a step in current applied to it.

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Although the current instantaneously steps to its value, I, the voltage "lags" in its response. For a resistor, v would have the same waveform as I, a voltage step of R⋅ I. This time dependence of capacitance is reflected in its unit (F = s/Ω), which includes time as a basic quantity.

As voltage increases, the electric field across the dielectric also increases until its breakdown voltage is reached and the dielectric material fails structurally. Capacitors are specified for a maximum allowable voltage.

The highest charge density is achieved in electrolytic capacitors. They are also polarized and marked for proper voltage polarity. Reversing the voltage on an electrolytic capacitor can destroy it explosively. Two of them in series with opposing polarities can be used for bipolar (± ) applied voltages.

Capacitors in parallel add and in series, the total capacitance is like parallel resistors. These formulas can be derived from the above equations.

Cparallel = C1 + C2

Cseries = C1⋅ C2/(C1 + C2)

InductorsInductors store magnetic flux, φ, in a magnetic field that is created by closed loops of current flowing in conductors (usually wires or circuit-board traces). Each loop produces a given flux and is related to the magnetic flux linkage, λ, by the number of turns:

λ = N⋅ φFlux linkage is the dual of current and is defined as

Magnetic flux and flux linkage have units of V⋅ s.

The definition of inductance is:

For constant L, L = λ/i. Inductance has units of henries, H, which is the same as a volt-second/ampere. Because V/A is Ω, H ≡ Ω⋅ s. Inductance also has a time-dependent unit and, like capacitance, will have a time-related circuit response.

The magnetic field of an inductor is concentrated within the current loop(s) and the amount of flux stored depends on the permeability of the material containing the field. The permeability of vacuum or air is µ0 = 400⋅ π nH/m ≈

1.26 µH/m. The relative permeability, µr, of ferromagnetic materials, such as iron or ferrites, is very high − typically several thousand. Total permeability is:

µ = µr⋅ µ0

A magnetic field will concentrate in (be contained by) high-permeability materials while being weak in air. High-µ materials consequently can be used to shield circuits from stray magnetic fields.

The flux produced by a given current, i, is proportional to the per-turn-square inductance, or permeance, L:

φ = L⋅(N⋅ i)The terminal current is multiplied by the number of current-loops, or turns. A winding with N turns is equivalent to N

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individual loops with current i. The magnetic circuit "sees" a current of (N⋅ i).Permeance is also related to the geometry of the inductor by a formula like that for capacitance:

where A is the current-loop area containing the flux, and l is the closed-path length of the flux.

These equations can be combined to find L by substituting for φ in the defining equation:

Inductance varies by the square of the number of turns. Substituting for the permeance,

A constant voltage applied across the terminals of an inductor will cause the current to increase linearly or ramp up. This will continue until the flux exceeds the ability of the magnetic (core) material to sustain it, and the inductor saturates, with a sharp decrease in inductance.

The v-i relation for inductance is found by substituting for dλ in its definition:

Then solving for v,

Inductors in series add and in parallel are like resistors, assuming they share no flux in common.

Lparallel = L1⋅ L2/( L1 + L2)

Lseries = L1 = L2

ImpedanceThe concept of resistance can be generalized to include reactances. This more general "resistance" is called impedance,

where R is resistance, j is and X is reactance. (We use j instead of i to avoid confusion with the symbol for current.) Impedance is a complex number, with real and imaginary values. Resistance is the real part of impedance; reactance is the imaginary part. Complex numbers can be represented as two-dimensional vectors. When plotted, the horizontal axis is the real axis and the vertical is the imaginary.

Shown above, Z1 = 2.2 kΩ + j1.5 kΩ . When added to Z2, the sum is:

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To add complex numbers in rectangular form, add the real and imaginary components individually.

Complex numbers can also be represented in polar coordinates, with a magnitude (length of vector) and phase angle. To convert impedance from the rectangular form to polar form,

The above impedance is converted to polar form as

The impedance vectors shown in the above diagram have R and jX values as rectangular-form components. The polar-form magnitude is geometrically the length of the Z vectors and their angle from the R-axis is the phase angle.

To multiply complex numbers in polar form, multiply the magnitudes and add the angles:

To add complex numbers in polar form, they must be converted to rectangular form first:

This rectangular form for Z can also be written as a single mathematical expression by use of Euler’s formula, which relates trigonometry to complex numbers:

Applying Euler’s formula to Z above, the polar form for Z results in a single expression:

Impedance allows us to extend our existing circuit analysis techniques to circuits with reactances. We now use impedance as we have resistance to solve circuits once we have the reactances of capacitors and inductors. The unit of reactance is the same as resistance (Ω), or v/i. To solve the v-i relations for C and L, we first need the concept of complex frequency.

Complex frequency, s, is:

s = σ + jωComplex frequency is related to the derivative of a quantity with respect to time:

s⋅ x ⇔ dx/dt

where x is voltage or current. That is, whenever s is multiplied by a variable, x, it can be transformed to the time domain as the derivative of x with respect to time; s⋅ x thus represents the rate of x. Using this approach, apply it to the v-i relations above for C and L to get:

From Ohm’s Law, we know that v/i is a resistance. Impedance is expressed in the complex-frequency domain (s-domain) by solving the above equations for v/i.

These impedances can be used in circuit analysis in the same way R is used for resistors. Because s represents a

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frequency, reactances are frequency-dependent. From them, at a frequency of zero (dc), capacitors are open circuits and inductors are short circuits. At infinite frequency, capacitors are shorts and inductors open.

Time and Frequency ResponsesThe quickness of response of amplifiers and other circuits can be characterized by their output when a step waveform is applied to the input. This is sometimes called the step response and is a function of time (in the time domain). The step response of a capacitor to a current step input is a voltage ramp output.

For a step input, a circuit that is underdamped will output a step waveform that overshoots the final step level and oscillates or "rings" about it for a while. An overdamped response does not overshoot but takes excessive time coming up to the final value of the step. A response that rises in minimal time without overshooting is called critically damped. The time that a step waveform takes to go from 10 % to 90 % of its final value is called the risetime.

Steps are usually generated repetitively as square-waves. Each repetition of the square-wave lasts long enough for circuit behavior to reach constant values, as though the square-wave lasted forever, like a step function. Square-waves are obtained from electronic instruments that are waveform sources, such as function generators or pulse generators. The square-wave period is set to be long enough (low enough square-wave frequency) to give the step response adequate time to decay away so that the full response can be viewed on an oscilloscope.

Step response is one way of observing the effect of circuit self-behavior, which is called the transient response or natural response. When a reactive component in a circuit contains energy, the response of the circuit to that energy is the transient response. Unless the circuit is purely reactive (no resistance), then this energy will eventually be dissipated, and the transient response will decay away in time. The transient response is the behavior of the circuit with no continual input applied.

Another approach to analysis of circuit dynamics is in the frequency domain. Sinusoids (sine-waves) of constant amplitude are applied to the input of a system and their frequency is varied. As frequency increases, the limited quickness of circuit response will cause the amplitude to decrease, or "roll off" with increasing frequency. The frequency at which roll-off becomes significant is called the bandwidth. In addition, the output sinusoids lag behind the input by some number of degrees of a cycle − by some amount of phase (angle).

Both amplitude (magnitude) and phase are affected by frequency and characterize the sinusoidal response. The magnitude of (vo/vi) is the gain of the circuit as a function of frequency. Its phase versus frequency is also significant. When plotted, they are called Bode or frequency response plots. Because the frequency response depends on frequency, not time, it is the steady-state response.

The total dynamic response of a circuit is the sum of the two responses:

Total response = transient + steady-stateAfter enough time, the transient response decays away and the steady-state response alone is left. When the input waveform is a sinusoid, the steady-state response is the frequency response. In practice, frequency response can be measured by network analyzers (expensive instruments), spectrum analyzers (now under $1000, but good for frequencies above 100 kHz to 1 GHz), audio sine-wave generators and the sine function of function generators. Sweeping function generators vary (or "sweep") their frequency linearly or exponentially (to give a log plot), and the output amplitude of the swept sine-waves traces the magnitude of the frequency response on an oscilloscope. A slower way of obtaining frequency response is to use a fixed-frequency (non-sweeping) sine-wave generator and measure output amplitudes at several frequencies with constant input amplitude. Then plot the points.

The transient response is caused by initial energy in reactive components: voltages across capacitors or currents through inductors. The circuit responds to this energy and its behavior is the transient response. The remaining steady-state

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response is caused by a periodic input waveform, and is also called the forced response. In summary, the two responses are:

transient: time-domain responsesteady-state: frequency-domain response

Reactance in the s-DomainAn elegant aspect of the use of complex frequency is that the transient response results from the real component and the frequency response from the imaginary component. By substituting s = jω into the impedance formulas for C and L above, the reactance values of each are obtained:

where ω = 2⋅ π ⋅ f and f is frequency, in Hertz (Hz); ω is the "radian frequency."

Furthermore, because s is in the denominator of ZC, its imaginary component contains 1/j = − j. An imaginary number is plotted on the vertical (imaginary) axis of a complex-number plot and consequently has a phase angle of 90 deg. And a negative imaginary number (such as − j) has an angle of − 90 deg. In polar form, j = 1, ∠ 90 deg and − j = 1, ∠ − 90 deg.

Plots of impedance magnitude versus frequency are called reactance plots and are conveniently overlaid on reactance charts which have values of R, L and C already drawn. (See reactance chart.) Values of R are horizontal lines. Values of XL increase with frequency and are parallel lines with a slope of 1 (+45 deg) on a log-log scale; values of XC have a

slope of –1 (− 45 deg) and decrease with frequency.

Circuit Analysis in the s-DomainAn example of circuit analysis in the s-domain is the voltage divider consisting of a resistor and capacitor, as shown below.

The divider formula is applied using the above impedance for C:

What is the transmittance? It is a complex number that varies with frequency, s. Complex gain Av(s) can be represented

as having a magnitude, Av, and an angle, ∠ θ. Frequency response is found by substituting s = jω and reducing to polar form.

Note that angles follow the rules of exponents. An angle in the denominator is negated when moved to the numerator. When the magnitude and phase given here are plotted versus ω (or f), the following frequency-response plots result.

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The frequency at which the amplitude decreases by is called the bandwidth, fbw, and is a measure of the speed of a two-port network.

Approximate Frequency-Response from the s-DomainThe frequency response plots for the RC integrator can be closely approximated with line segments on a log-log chart of magnitude versus frequency, ω , and a semi-log chart of phase versus ω . These "asymptotic approximations" are shown below for the RC integrator.

The straight-line approximation for magnitude is horizontal (or "flat") out to the break frequency, fb, and then decreases

(or "rolls off") at a slope of –1. The phase is flat to a decade before fb, then decreases at –45 ° /decade, crossing –45 ° at

fb, and becoming flat at –90 ° at 10⋅ fb.

Having solved for the transmittance (out/in) of a circuit, the general form is a rational algebraic expression in s of the form:

For the RC integrator, K = 1, p1 = –1/RC, and there are no z1, z2, … The rational expression is what results algebraically when the polynomials of both numerator and denominator are factored. The zi are called zeros and are the roots of the numerator polynomial; the pi are called poles and are roots of the denominator polynomial. The poles characterize the transient response of the circuit and the zeros characterize the steady-state response. K is the dc response, the frequency-independent amplification or attenuation of the circuit.

Poles cause the frequency response to decrease with frequency, or "roll off." Zeros cause the opposite effect. This can be demonstrated by the following circuit.

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The transmittance of this circuit can be determined by applying basic circuits laws, using 1/sC for the impedance of the capacitor. After some algebraic manipulation, the result is

where R1|| R2 = Rp is the value of R1 and R2 in parallel. The circuit has a dc gain equal to the voltage divider formula, for without C it is a resistive divider.

This "lead-lag" circuit has a single pole at the complex frequency, p = –1/Rp⋅ C, and one zero at frequency z = –R1⋅ C. Because resistors have positive resistances, Rp < R1, and the pole will always be at a higher frequency than the zero. The asymptotic approximation of its frequency response is shown below. The zero has the opposite effect of a pole; it causes the magnitude plot to increase at a +1 slope at the zero frequency, fz = 1/2⋅ π ⋅ R1⋅ C. The phase increases at

+45 ° /decade until it reaches the influence of the pole phase, at fp. The slopes of zero and pole cancel and the phase is

flat until 10⋅ fz, where the zero loses its influence. The pole then rolls the phase off until a decade past the pole

frequency, at 10⋅ fp. The pole also cancels the +1 magnitude slope of the zero, resulting in a flat response from fp to higher frequencies.

By using the pole and zero approximation rules, magnitude and phase plots can be constructed for any combination of poles and zeros. But there is one complication. From algebra, a polynomial can be factored into products that can contain not only real roots but also complex ones which appear in pairs, symmetric about the real axis, in the form:

s = –α ± jωwhere –α is the real component and jω is the imaginary component. Complex poles and/or zeros can appear in the transmittances of circuits with two or more reactances. The number of poles will equal the number of reactive components and also be the degree of the denominator polynomial. For arbitrarily complicated circuits, both numerator and denominator of the transmittance will consist of products of first and second-degree factors. The first-degree factors will be real and the (reduced) second-degree factors will be complex or imaginary.

Complex poles and zeros cause resonances in circuits. The two kinds of resonances are series and parallel resonance. The linear approximations for resonances can be very inaccurate around the resonant frequency when the resonance is highly underdamped. The approximate frequency response plots for resonances are shown below.

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The phase slope depends on how underdamped the resonance is, as does the magnitude peak at resonance. A parallel resonance changes from a +1 to a –1 magnitude slope through the resonant frequency, fr, and a series resonance changes from –1 to +1 slope.

A series resonance can occur when an inductor and capacitor are in series, and a parallel resonance when in parallel. The resonant impedance in either case is

A series resonance is critically damped when a series resistance, Rs = 2⋅ Zr; a parallel resonance is damped when a parallel resistance, Rp = Zr/2. In both cases, the resistance must equal the value of the combined reactance of the L and C.

A critically damped circuit has poles that are real but border on being complex. The step response for critical damping rises as quickly as possible without overshoot (no ringing).

The resonant frequency of an LC circuit (both series and parallel) is:

Frequency Response from Reactance ChartsFor circuits with more than two reactances, the algebraic method of finding the transmittance consists of solving n-degree polynomials. This can be difficult even for a third-degree polynomial, and are often solved numerically for higher-degree polynomials. But before resorting to a computer, there is a graphical method that often produces adequate results using the reactance chart. Series and parallel combinations of RC and RL circuits are shown, with reactance charts.

The method is demonstrated using the following circuit.

The upper and lower impedances of the divider are plotted on the reactance chart. The upper branch is R1 and is a flat line on the chart. The parallel combination of R2 and C is plotted by plotting each separately.

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Where R2 crosses C, C dominates (or "swamps out") R2 so that its impedance is approximately the combined impedance

above the frequency where the impedances are equal (which is 1/2⋅ π ⋅ R2⋅ C). The combined impedance is then the composite plot labeled R2 || C.

The divider transmittance is found by the voltage-divider formula, Z2/(Z1 + Z2) = Z2/Zin. Zin is plotted, beginning at

R1 + R2 and extending to break frequency 1/R2⋅ C. It then decreases to R1. Where it meets R1, a dotted line is extended down and intersects R2 || C at the parallel equivalent resistance of the two resistors.

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Because the plot is log-log, division is accomplished by subtraction. Z2 and Zin maintain equal vertical separation until Zin flattens out at R1 while Z2 continues to roll off. This results in a frequency response magnitude plot that is flat out to

1/(R1 || R2)⋅ C, then rolls off with a –1slope.

The reactance chart impedances and transmittance for the lead-lag circuit are shown below.

The difference between R2 and Zin decreases at frequency 1/R1⋅ C; the denominator of the impedance divider, Zin, is

decreasing, causing vo/vi to increase, until Zin flattens out. At that frequency, 1/(R1 || R2)⋅ C, the capacitor is essentially a short and passes vi to vo. The transmittance is then one.

Time-Domain ResponseThe time-domain response can also be approximated from the s-domain circuit transmittance. The real component of a pole causes an exponential response of the form e–t/τ , where τ is the time constant,

τ = 1/α

and α is the negative real component of the pole. For a real pole of an RC circuit, τ = R⋅ C, and for an RL circuit, τ = L/R.

The step response of a real (negative) pole is an exponential rise with time constant τ . After one time constant, the step has risen to e–1 ≅ 63 % of the final value. After 5⋅ τ , the exponential is within 1 % of the target value.

A measure of the speed of response to a step is the risetime, the time the response takes to go from 10 % to 90 % of the target value. For single-pole circuits with time constant, τ , the risetime is

tr ≅ 2.2⋅ τ

A 4 V step applied to an RC integrator results in the oscilloscope waveform shown below, where R = 1.00 kΩ and C = 10 nF. The time constant is

τ = R⋅ C = 10–5 s = 10 µ s

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The waveform rises to about 63 % of 4 V, or 2.5 V in 10 µ s, and after 5⋅ τ , or 50 µ s, it has reached the target value of 4 V.

The RC differentiator, under similar conditions, behaves similarly, as shown below. In this case, the waveform steps to 4 V, then decays to its 0 V target.

For complex poles at –α + jω , the real (–α ) component (α > 0) causes a decaying exponential response as before, but the imaginary component causes a sinusoidal response. Mathematically, this follows from Euler’s equation:

More generally, the response of a pole at s = –α +jω is:

where φ is the phase angle of the sinusoid. This time response is a decaying sinewave. The following RLC circuit was built and the step response acquired.

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The response to a 4 V step at vo is shown below, and is underdamped. The waveform overshoots the 4 V target and oscillates (or "rings") around it. The ringing is a decaying (or "damped") sinewave. The pulse generator that supplied the step had a 100 Ω output resistance, and this generator resistance was in series with the LC circuit.

The ringing is no longer discernible after about two cycles. The complex pole can be expressed in polar form, as a magnitude and angle, φ , relative to the (negative) real axis. For negative real poles, φ = 0, and the response is a decaying exponential. For φ = 90 degrees, the pole is imaginary and the response is a non-decaying sinusoid. On the jω axis, α = 0, and the time constant of a pole on the jω axis is 1/0 or infinite. In other words, the decay time is forever. For poles with angles in between 0 and 90 degrees, the closer the angle is to 90 degrees, the more underdamped is the response. By counting the cycles on an oscilloscope, Ns, the pole angle can be estimated.

Ns , cycles φ , degrees

0 0

0.3 30

0.6 45

1 60

2 75

5 84

The pole angle of a series resonant circuit is

and for a parallel resonant circuit, it is

The pole angle for this series resonant circuit is calculated by first finding the resonant impedance,

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Then φ is cos–10.275 ≅ 74 ° .The resonant frequency is

Because period is the reciprocal of frequency,

Tr = 1.14 µ s

When a sinuosid is damped, its frequency decreases to

In this case, sinφ ≅ 0.99 and Td ≅ 1.15 µ s. By noting that the time scale of the oscillograph is 500 ns per division

(spacing between dotted vertical lines), or 500 ns/div, the period of the oscillation is about 1 µ s.

The waveform peaks at about 5.5 V, or has an overshoot of 5.5 V – 4 V = 1.5 V. The ratio of overshoot to target voltage is the fractional overshoot, Mp. The pole angle can also be calculated from it as

In this case, Mp ≅ 1.5 V/4.0 V = 0.375, and φ ≅ 73 ° , in good agreement with the other calculation.

Finally, because time and frequency responses are related, risetime and bandwidth are related for circuits near critical damping by the approximation,

tr ≅ 0.35/fbw

ClosureThe concept of resistance was extended to include reactive circuit elements, capacitance and inductance, as impedance, a complex number involving complex frequency, s. With reactances expressed in s, we could apply circuit laws (Ohm’s Law and Kirchhoff’s laws) and develop transmittances for two-port circuits.

Because the algebraic expressions for transmittances involve solving nth-degree polynomials for their roots (poles and zeros), a graphical method was introduced based on the reactance plots of circuit impedances.

For single-pole circuits, various circuit properties were developed, such as the time constant and bandwidth. For a single complex-pole pair, the concept of resonance, with its resonant impedance, Zr, and resonant frequency, fr, were expressed in circuit component values L and C.

Time-response characteristics such as risetime can be related to frequency-response characteristics, such as bandwidth.

The principles illustrated here all involved passive circuits (no transistors or op-amps, etc.), but can also be applied directly to active circuits.

This article has merely introduced the analysis of circuit dynamic response theory, but these basic concepts and analysis methods should be adequate for the simpler (and most common) circuits encountered in electronics applications, and for understanding the terminology applied to them in the literature.

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DiodesDiodes are electronic devices made from semiconductor materials such as silicon. In their pure form, these materials do not conduct electricity and are electrical insulators. But by adding a small amount of either p or n-type impurity, excess positive or negative charges are introduced into the bulk semiconductor. This charge is free to travel as electrical current, leaving behind fixed ions of the opposite charge bound in the crystalline lattice of the semiconductor material.

By placing n and p-type material together, a p-n junction is formed, as shown below.

This is a diode. Upon joining p and n materials, positive charge (called "holes") and negative charge (electrons) diffuse into the opposing material where they encounter opposite charges and recombine; their charges cancel. As charges diffuse, they leave behind fixed charges which tend to impede further diffusion. As holes diffuse into the n side of the junction, they leave fixed negative ions which tend to counter the diffusion of electrons moving into the p material. Like charges repel. The fixed charges produce an electric field which opposes diffusion and results in a region in which few mobile charges exist. This is the space-charge layer or p-n junction.

The symbol and electrical behavior of diodes is shown below:

The arrow part of the symbol is the p side and the vertical bar is the n side. When a dc voltage of about 0.7 V or more is applied in the forward direction (with the arrow of the diode symbol), current flows. When the voltage is less than 0.7 V (including reverse or negative voltage), no current flows. The positive applied field repels mobile holes, driving them toward (and across) the junction, overcoming its opposing electric field barrier. Electrons are similarly repelled toward the junction and cross it, recombining with holes. More charge flows into the diode to replenish recombined holes and electrons and external current flows. If the externally applied voltage polarity is reversed, mobile charges are attracted to the + and − applied voltages and away from the junction. This further depletes the regions around the junction of charge. Where there is no charge, bulk silicon is an insulator and does not conduct. No holes and electrons cross the junction to recombine and no external current flows.

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The diode voltage-current (or v-i) relation is shown in the plot below: Above about 0.7 V of forward voltage, the current increases quickly and is very sensitive to diode voltage. It is difficult to control diode current by attempting to carefully adjust the forward voltage. Instead, a resistor is usually placed in series with the diode to a voltage source, as shown below:

Because the supply voltage (12 V) is so much larger than the diode voltage (0.7 V), most of its voltage is dropped across the resistor, which dominates in setting the current. The dc operating-point of 0.7 V and 11.3 mA are the bias voltage and current of the diode.

Bipolar Junction TransistorsTransistors are two diodes joined with a very thin common region, the base. When the base-emitter (b-e) junction is forward biased, mobile charges from the emitter cross the b-e junction. Some recombine, resulting in base current. But because the base is so thin, most cross the base-collector (b-c) junction, which is reversed-biased. The charges from the emitter are minority carriers in the base and are attracted across the b-c junction to become collector current.

What makes transistors so useful as circuit elements is that a small amount of base-emitter current controls a larger amount of collector-emitter current. A small electrical input can be amplified by a transistor.

This kind of transistor is the bipolar junction transistor (BJT). The two polarities of BJTs are npn and pnp. Their symbols are shown below:

Each has three terminals: base, emitter, collector. A small amount of current flowing into (out of) the base of an npn (pnp) causes a flow of current β times larger from collector to emitter (emitter to collector), in the direction of the arrow. That is,

ic = β⋅ ib

Beta (β) is typically about 100 in small-signal transistors and 20 in power BJTs. The base and collector currents join in the emitter so that

ie = ib + ic = (β + 1)ib

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A small amount of base current thereby controls a larger amount of emitter and collector current. The base current results from a forward-biasing base-emitter voltage, vBE.

Dynamic ResistanceBy Ohm’s Law, v/i is a resistance. What is the resistance of a diode? From the above v-i curve,

Rd = 0.7 V/1 mA = 700 Ω

This resistance is the inverse-slope (1/slope) of a line from the origin to the point (0.7 V, 1 mA) on the diode curve. This is the static (or dc) resistance. For a small variation of voltage around 0.7 V, the change in current is much larger (lower resistance). This dynamic (or ac) resistance is the inverse-slope of a line tangent to the curve at the operating point, which is (0.7 V, 1 mA). Dynamic resistance is calculated from the solid-state equation for p-n junctions as:

where i is the diode current. For the given operating point (i = 1 mA), rd is 26 Ω for small changes around the operating point. This diode dynamic resistance is much smaller than the static resistance.

Common-Emitter AmplifierBJTs have two diodes (or p-n junctions): base to emitter and base to collector. In an npn BJT, the b-c junction is normally reverse-biased. When it is forward-biased, the base is 0.7 V greater (more positive) than the collector. This state is called saturation. When BJTs are used as switches (as in digital or computer circuits) they are either off (no b-e or b-c forward bias) or else "full on" (saturated: b-e and b-c forward biased). For linear amplification, the b-c junction is reverse-biased (off) and the b-e junction is forward-biased (on). Both input and output waveforms have a range they must stay within.

A simple one-transistor amplifier can be built as shown below, using both positive and negative supplies:

This circuit has two loops: input and output. For the input loop, a change in the input voltage vin causes a change in voltage across RE and the transistor b-e junction dynamic resistance, re. To find re the static emitter current must first be found before the dynamic resistance can be calculated. (See the equation for rd above.) Therefore, solving transistor or diode circuits (those with nonlinear elements) has two steps:

1. Static circuit analysis: operating point(s) or bias 1. Dynamic circuit analysis: dynamic resistances and amplification

To solve for the static currents and voltages, we observe first that if Vbe of the transistor is about 0.7 V and vin has no static voltage component (VBE = 0 V), then the − 5V supply is applied across 0.7 V in series with RE. This circuit is similar to the previous diode circuit, where RE largely determines emitter current. In this case, it is about (5 V − 0.7 V)/

1.0 kΩ or 4.3 mA. The base current is IE/(β + 1) or (for β = 99) 43 µA. The collector current is the emitter current less the base current. The ratio of collector to emitter current is called alpha (α), defined as

For β = 99, α = 0.99. Then IC is (0.99)⋅ (4.3 mΑ) = 4.26 mA. This current drops (4.26 mA)⋅ (2.2 kΩ) or 9.37 V across RL so that the collector voltage (to ground) is:

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VC = 12 V − 9.37 V = 2.63 V

This is greater than the base voltage (0 V) and the b-c junction is reversed biased as required for linear operation. The static voltages and currents have now been determined and dynamic analysis can proceed.

The dynamic emitter resistance is 26 mV/IE or about 6 Ω. The total resistance across which vin is applied is the transresistance rM:

rM = re + RE = 6 Ω + 1.0 kΩ ≈ 1.0 kΩ

Because re varies with temperature and static emitter current, in good design it is dominated by RE, a stable resistor, so that rM is stable; it affects the amplification or voltage gain (Av) which is:

Av = vout/vin

where vout and vin are dynamic voltages.

The significance of rM is that it determines the emitter current:

rM = vin/iE

The emitter current does not flow in the base circuit, where the input voltage is applied. The current goes somewhere other than through the input voltage source, vin. Consequently, rM is a "transfer resistance" or transresistance. And transistor is short for "transfer resistor."

Now that iE is calculated from vin and circuit elements of the input loop, iC is just α⋅ iE and the change in voltage it causes across RL is

vout = − RL⋅ α⋅ iE

The minus sign is the polarity of the voltage change at the collector (to ground). An increase in collector current causes an increase in voltage drop across RL which subtracts from the collector supply (12 V), causing a decrease in collector voltage. We have worked our way from input to output. Putting the above equations together, the gain is:

Besides α, the gain is a ratio of two resistances, the collector (or "load") resistance and the transresistance.

This is the general form of amplifier gain expressions. For our example, Av ≈ − 2.2. The output voltage range is about ± 3 V and is limited by saturation at its minimum and cutoff (zero collector current) at its maximum. This design is saturation limited. For maximum linear dynamic range (largest undistorted output waveform), the collector voltage operating point would be about 6 V, halfway between saturation and cutoff. Calculation of saturation must also take into account base voltage, which is maximum (positive, not zero) when collector voltage is minimum. It is found from the gain expression.

BJT ModelA BJT circuit model for a transistor biased in the linear region of operation (a dynamic model for small variations around the operating-point values) is shown below:

The collector is connected to a current source controlled by the base current. Collector voltage variations across the

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current source (which has infinite resistance) do not affect the collector current. The collector is thereby isolated from the base-emitter input circuit. The key model element is the dependent current source, which provides amplification.

The dynamic base resistance is not re, though it is across the base-emitter terminals. Base resistance is greater because the collector current also flows through re in response to base current. The resulting base-emitter dynamic resistance can

be derived as the "β transform" formula:

This equation says that resistance from the base will be β + 1 times larger than that in the emitter. This applies to all resistance through which the emitter current flows. In the amplifier circuit of last section,

or (100)⋅(1006Ω), somewhat more than 100 kΩ.

The output resistance of the above amplifier (from collector to ground) is that of a current source in parallel with the load resistor, RL. Current sources have infinite resistance (appear as open circuits), leaving the load resistance as the output resistance. The significance of input and output resistances is discussed in "Basic Amplifier Circuits."

The collector characteristic curves for an npn BJT are shown below. The collector current is plotted as a function of collector-to-emitter voltage, with base current as a parameter, stepped by ∆IB for each new curve. These curves are plotted by an instrument called a transistor curve tracer. Note that for these curves, the 50 µA base current curve is at about the 5 mA collector-current level. The β is therefore about 5 mA/50 µA, or 100.

The collector curves are not flat but increase slightly with collector voltage. For the given transistor model, the curves would be flat because the collector current-source’s current output is not affected by the voltage across it. But actual transistors are better modeled by including a resistance (ro) from collector to emitter. It typically has a large value and can usually be disregarded. The collector curves slope downward toward the left and intersect the vCE axis at − VA, the "Early voltage":

VA is typically 50 V. Then for IC = 1 mA, ro = 50 kΩ.

A second feature of the collector curves is that they voltage "saturate" below (in this case) 0.1 V. This suggests that the base-collector diode becomes forward biased at a vCE of 0.1 V, or VCB = 0.5 V.

For pnp BJTs, the curves are similar but currents and voltages are of opposite polarity. Such curves are found in the third quadrant (negative vCE, negative iC) with negative iB. Having both polarities of transistors leads to greater flexibility in circuit design.

Field-Effect TransistorsField-effect transistors (FETs) operate differently than BJTs. Instead of a base, there is a gate to which a voltage is applied. This voltage creates an electric field across a channel between drain and source. As the gate-to-source voltage varies, the resistance of the channel varies. Unlike BJTs, no gate current flows and the input resistance is infinite.

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Junction FETs (or JFETs) have a diode between gate and source which must be kept reverse-biased for linear operation. Instead of a reverse-biased diode gate, metal-oxide semiconductor FETs (or MOSFETs) have a metal gate separated by a thin glass (silicon-dioxide) layer of insulation over the channel. Both JFETs and MOSFETs have the same dynamic model, shown below with their symbols.

The FET model is simpler than that of the BJT. It is a voltage-controlled current source in its linear region of operation. Compared to a BJT, α = 1 and rs is analogous to re but typically has a larger value, around 100 Ω. A FET can be substituted for a BJT in the above amplifier circuit and, using these correspondences, dynamic analysis is similar. P-channel devices have the same polarity of gate (base), source (emitter) and drain (collector) as pnp BJTs.

JFETs are depletion-mode devices because they conduct (iDS ≠ 0 mA) with zero gate-source voltage. But almost all available MOSFETs are enhancement-mode devices; they are off with zero gate-source voltage. When vGS is around 5 V for MOSFETs (or > 12 V for power MOSFETs), they are "full on" and operate in the resistance region. This corresponds to the voltage saturation region of a BJT. The difference is that the channel (drain-to-source) resistance varies somewhat linearly with vGS.

FETs are characterized by a threshold voltage (pinch-off voltage for JFETs), VT, of usually about 2 V. For n-channel FETs, if the drain voltage remains greater than the gate voltage by VT, the transistor will operate in the linear region, where the above model applies. To bias FETs, a dominating source resistor (RE >> rs) returned to a supply much larger than the threshold voltage will determine source current and the gate-source voltage will be whatever corresponds to that current. This approach is essentially the same as that for BJTs except that base-emitter voltages (around 0.7 V) are smaller than the gate-source bias voltages of FETs, which can be over a volt. For linear operation, the drain (on n-channel devices) must be kept sufficiently above the gate voltage. The dynamic source resistance rs can be found in the device specifications (data book) as 1/gm.

Power TransistorsPower transistors have large emitter/collector areas to handle large currents and/or voltages. Their packages are made to mount on heat sinks, to conduct away heat generated by power dissipation in the transistor. Linear amplifiers operate transistors in the linear region (and not as switches) with relatively high power loss. These inefficiencies are minimized by switching transistors between voltage saturation (low voltage, high current) and cutoff (high voltage, no current). For both on and off states, either transistor (collector/drain) voltage or current is near zero. By Watt’s Law for power, with units of watts (W),

P = v⋅ i

and P ≈ 0 W. Switching reduces power loss because P is zero (or nearly so) in both states. During the on state, transistor c-e or d-s voltages are not zero and conduction loss occurs. Also during switching, neither voltage nor current are near zero and for the brief time it takes to switch between states, switching loss occurs. It increases proportionally with both switching frequency and the switching time.

For high-power applications, control of power is achieved by switching transistors on for a fraction of the switching period, D, called the duty ratio:

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As D is varied, the average output voltage and current is D⋅ V and D⋅ I, where V and I are the off-voltage and on-current. Linear control of the average values is thus obtained by this scheme for switching transistors, and is called pulse-width modulation (PWM). It is commonly found in motor and other actuator controllers and in power converters such as switching power supplies.

A newer power device, the insulated gate bipolar transistor (IGBT) has MOSFET input and BJT output characteristics. It has gate, emitter and collector. BJTs are capable of higher current densities than FETs while MOSFETs have no dc gate current. The disadvantage of IGBTs is that they have an additional output series p-n junction, with its additional voltage drop. Therefore, IGBTs are superior for c-e voltages exceeding 200 V. MOSFETs switch fastest, then IGBTs, and BJTs are slowest.

Transistor PackagesLow-power or small-signal transistors usually come as discrete components in TO-92A packages. Power transistors come in TO-220, TO-247 or TO-204 packages, shown below, with terminals identified:

Not all BJTs in TO-220 packages have the above pin-outs of their terminals (though most do). TO-247 cases are larger than TO-220, but with roughly the same shape. TO-204 packages mount on a flat metal plate with holes for base/gate and emitter/source terminals, and two holes for bolts that hold transistor, socket and heat sink (which could be the plate) onto the mounting plate. Insulators are often required between power transistors and mounting plate.

The junction temperature of silicon devices must be kept beneath about 150 ° C to avoid damage. Junction temperature, TJ, can be calculated from power dissipation, P, and the total thermal resistance, RJA − that is, the junction-to-ambient (air, environment) resistance − by the thermal analog of Ohm’s Law:

∆T = P⋅ Rthermal

where temperature drop is like voltage, power like current, and thermal resistance like electrical resistance. In particular, junction temperature can be calculated from:

where the thermal resistances (in order) are from junction to transistor case, case to heat-sink, and heat-sink to ambient temperature. TO-220 RJC is typically about 1 ° C/W and TO-204 packages are about a third to a fifth of that. Heat-sink thermal resistances are given in heat-sink data sheets and vary greatly with air flow, which causes convective heat transfer. Otherwise, the contact of the metal transistor package with a metal heat-sink (often through a thermally but not electrically conducting insulating pad) allows conductive heat transfer. Thermal pads for TO-220 packages have typical thermal resistances of 1 degree C/W.

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Ideal AmplifiersA port is a pair of terminals of a network (circuit). Across the port is a voltage, v, and through it flows a current, i, as shown below.

Amplifiers have two ports, input and output. An electrical waveform is a voltage or current as a function of time. A waveform to be amplified is applied to the input port and another waveform appears at the output port that is larger than the input waveform. Input and output quantities can be either voltages or currents, resulting in four basic kinds of amplifiers:

Amplifier Type Input Quantity Output Quantity

Voltage, Av voltage, vi voltage, vo

Current, Ai current, ii current, io

Transresistance, Rm

current, ii voltage, vo

Transconduct-ance, Gm

voltage, vi current, io

In the table under amplifier type is the expression for amplification or gain (or transfer function), which is the output quantity divided by the input quantity. In general, A = xo/xi, where x is either a voltage or current.

An ideal input port is not affected by input source resistance nor is an ideal output port affected by output load resistance. The general amplifier is shown below:

The combination source/resistance symbol is a generalized source: either a Thevenin or Norton equivalent circuit. The amplifier has an input resistance Rin and output resistance, Rout. The input source, xi (where xi is vi or ii), has resistance

Ri. It forms a divider (voltage or current) with Rin so that xi ≠ xin. Similarly, output resistance Rout forms a divider with

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output port load resistance RL so that the output xout = K⋅ xin ≠ xo. The amplification of xin by K results in xout that is K times larger. K is the gain, and it scales xin. (Gain less than 1 is called attenuation.) If source or load resistance is unknown or varies with K, then error in the overall amount of gain results. An accurate (or at least unchanging) gain is required for calibrated sensor circuits, so that the transducer output is multiplied by a known (and constant) amount.

An example of a voltage amplifier is shown below:

The overall voltage gain is:

The first factor is the input voltage divider attenuation, the second is the amplifier voltage gain and the third is the output voltage divider attenuation. For the ideal voltage amplifier, Av = K. This is achieved when Rin approaches infinity (open-circuit input) and Ro = 0. The ideal port resistances are given in the following table:

Port Type Ideal Resistance

Voltage input infinite (open)

Current input zero

Voltage output zero

Current output infinite (open)

In practice, good amplifier design approaches the ideal so that input and output loading does not affect the overall amplifier gain accuracy.

Transistor ConfigurationsTransistors have three terminals connected to input and output circuit loops. One-transistor amplifiers are two-port networks; one of the three transistor terminals must be shared by both input and output ports as the common terminal. This results in three possibilities. The first is the common emitter (CE) amplifier. The emitter is common to both input and output, as shown below.

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The emitter is part of both input and output loops. It is the common terminal of the transistor that is connected to both an input and output port terminal. With a series emitter resistor RE the emitter terminal is still common to both loops. The output loop current is shown flowing from the power supply (+VCC), through RL and the BJT, through RE to ground, which is connected to the negative terminal of the supply. The closure of the output loop from ground to +VCC implies flow through the voltage-source, +VCC.

The common-base (CB) configuration is shown below:

The common-collector (CE) configuration, also known as the emitter-follower, is shown below.

Common-Emitter AmplifierThe CE amplifier was analyzed in the Transistors chapter. The voltage gain was found by the transresistance approach: a ratio of output (load) resistance and transresistance, the resistance across which the input voltage develops the common (emitter) current. Not all of the emitter current gets to the collector. Some is lost to the base, and the α factor accounts for this in the voltage-gain equation:

Because α ≈ 1, the voltage gain is a ratio of resistances. The input voltage vi is applied across rM, producing iE = vi/rM.

Then iC ( = α⋅ iE) gets through to the collector and develops a voltage of vo = − iC⋅ RL at the output. By solving these equations for Av, the above gain equation results.

The input resistance of the CE is vi/ii = vi/iB or

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The resistance of the input loop is the base resistance in series with the resistance in the emitter-side of the circuit, referred to the base by the β transform. (See Transistors for details.)

At the output node, the BJT transistor model shows a current source (infinite resistance) in parallel with load resistance RL. The output resistance is therefore RL.

The CE amplifier has relatively high input resistance due to the β-transform effect at the base. It is better as a voltage-input port. Its output resistance is relatively low if the load resistor is not made too large.

The current gain of the CE is io/ii = iC/iB = β. Its input-loop transresistance used to calculate gain is rM, but the overall

amplifier transresistance is Rm = vo/ii = Av⋅ rin and its transconductance is the inverse of the transresistance, or Gm = 1/Rm.

Common-Base AmplifierThe CB amplifier input source is in the emitter loop so that emitter current flows through it. This current is β + 1 times larger than the base current. Consequently, the CB input resistance is relatively low and would make a better current-input than voltage-input port. Its input resistance is

or typically about RE. Its output resistance is the same as the CE, or RL. The CB voltage gain is

Unlike the CE, it is non-inverting (no negative sign). The CB current gain is α, or slightly less than one.

Compared to the CE, the CB input resistance is lower by (β + 1) and is therefore better as a current-input port than the CE. According to the ideal-port table, the CB most closely approaches an ideal current amplifier, though its current gain is slightly less than one!

Common-Collector AmplifierThe CC or emitter-follower has the same input resistance as the CE but its output resistance is

or typically about re, a relatively small resistance of around a few ohms. With high input resistance and low output resistance, the CC appears to approach the ideal voltage amplifier. Unfortunately, its voltage gain is only

or typically somewhat less than one. The port resistances approach the ideal but the voltage gain is not high enough to be useful. The current gain, however, is β + 1.

None of the three single-transistor configurations is ideal as any of the four amplifier types. Amplifiers can better approach the ideal by combining configurations into multi-transistor amplifiers.

Cascade AmplifierAmplifiers are cascaded when the output of the first is the input to the second. The combined gain is

where vi2 = vo1. The total gain is the product of the cascaded amplifier stages.

The complication in calculating the gain of cascaded stages is the non-ideal coupling between stages due to loading. Two cascaded CE stages are shown below.

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Because the input resistance of the second stage forms a voltage divider with the output resistance of the first stage, the total gain is not the product of the individual (separated) stages.

The total voltage gain can be calculated in either of two ways. First way: the gain of the first stage is calculated including the loading of ri2. Then the second-stage gain is calculated from the output of the first stage. Because the loading (output divider) was accounted for in the first-stage gain, the second-stage gain input quantity is the Q2 base voltage, vB2 = vo1.

Second way: the first-stage gain is found by disconnecting the input of the second stage, thereby eliminating output loading. Then the Thevenin-equivalent output of the first stage is connected to the input of the second stage and its gain is calculated, including the input divider formed by the first-stage output resistance and second-stage input resistance. In this case, the first-stage gain output quantity is the Thevenin-equivalent voltage, not the actual collector voltage of the stage-connected amplifier. The second way includes interstage loading as an input divider in the gain of the second stage while the first way includes it as an output divider in the gain of the first stage.

By cascading a CE stage followed by an emitter-follower (CC) stage, a good voltage amplifier results. The CE input resistance is high and CC output resistance is low. The CC contributes no increase in voltage gain but provides a near voltage-source (low resistance) output so that the gain is nearly independent of load resistance. The high input resistance of the CE stage makes the input voltage nearly independent of input-source resistance. Multiple CE stages can be cascaded and CC stages inserted between them to reduce attenuation due to inter-stage loading.

Darlington AmplifierA CC stage followed by another CC stage has an input resistance of about (β + 1)2 times the emitter resistance of the second stage. More precisely, using the β transform, it is

If RE1 is removed, the second term is about β2 times RE2. Furthermore, if the collectors are connected together, the result is a Darlington stage, as shown below.

This stage can be viewed as a "Darlington transistor" because it has three terminals and an equivalent β of about β2. Darlington BJTs can be used in any of the three BJT configurations.

Differential AmplifierA differential or emitter-coupled BJT pair is formed, as shown below, by a CC/CE stage driving a CB stage. The first stage is a CE to the first output, vo− and is a CC to the second stage.

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A differential-input amplifier has an input port for which the negative (− ) terminal is not necessarily connected to the common node (usually ground). A differential amplifier (or diff-amp) amplifies the difference between its input terminals:

Amplifiers with differential outputs have two output terminals, neither of which is necessarily common with an input terminal or ground. The output is

xo = xo+ − xo−

The 2-transistor diff-amp has differential inputs and outputs. The voltage gain is found by calculating the gain from each input to each output (4 gains). The differential gain is the ratio of the difference of the outputs over the difference of the inputs. If the gain magnitude (absolute value, neglecting sign) to the output is different for the two inputs, the amplifier is not differential.

The above amplifier gain can be calculated using the transresistance method. The current-source resistor REE forms a divider between stages. Ideally, REE is a current source. The diff-amp circuit is also symmetrical if corresponding components have equal values:

RL1 = RL2 = RL

RE1 = RE2 = RE

RB1 = RB2 = RB



then the voltage gain is

For non-negligible REE, a divider is formed between stages consisting of the source-transistor RE and REE. Apply Thevenin’s theorem for a Thevenin equivalent source driving RE of the other stage.

Complementary StagesNot only can npn BJTs or n-channel FETs be used in stages, so can their complementary devices, pnp BJTs and p-channel FETs. Having both polarities of transistors allows for more kinds of amplifiers and makes biasing easier.

For example, a complementary cascade amplifier is shown below. The second (CE) stage uses a pnp BJT. In a representation similar to the power-supply voltage sources, the input voltage source is implicit by the vi label at the

input node. Also, the + terminal of vo is labeled by "vo" and is understood to be taken with respect to ground (as the − terminal).

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Its gain equation is the same as the all-npn cascade. The advantage of the complementary cascade amplifier is that the CB-stage collector supply (ground) must be at a lower voltage than that of the base, allowing a ground-referenced output. For the all-npn cascade, +VCC adds to the output voltage developed across RL instead.

A complementary cascode (CE followed by CB) is shown below, with a JFET input stage for high input resistance. Except for the FET (with rs instead of re) and the addition of RL1, the gain and port resistance formulas are the same as the all-npn cascode. The Q2 base-biasing divider resistors form the equivalent RB.

Many other amplifiers of two or more transistor stages can perform better than the three one-transistor configurations. The ones described here are among the most common and should be recognizable as "components" of larger circuits.

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Block Diagram of Feedback CircuitsCircuits that combine some of their output with input are feedback circuits. The general case is shown as a block diagram below, where x quantities are voltages or currents.

Block diagrams do not represent circuit interconnections but instead describe the flow of electrical cause and effect. Each block has an input (cause) and an output (effect). The arrows point from outputs to inputs. The output of a block is the input multiplied by the transmittance written in the block. For example, xf = G⋅ xE. The summing block, Σ , adds its inputs according to the sign by the arrowhead. This block diagram is a graphic way of expressing the following algebraic equations:

The first two equations describe the feedback loop itself. The loop is closed and consists of G, H, and Σ . Ti and To are blocks before and after the feedback loop. They are outside the loop but are included here because they commonly occur in feedback circuits. Solving for the overall closed-loop gain of the feedback amplifier, T = xo/xi, it is

The middle factor in parentheses is the gain of the closed feedback loop itself.

Starting with a circuit diagram, if the corresponding block transmittances can be found, the closed-loop feedback gain can be calculated from the above general expression. Circuits are usually not obviously decomposable into the block transmittances. What is needed is a general procedure that derives the blocks from feedback circuits in equivalent circuit form so that circuit analysis can then be used to determine their transmittances. The electrical circuit diagram equivalent of blocks in the block diagram are two-port networks. If circuitry can be represented by two-port networks, the transmittances are then easy to find.

Two-Port NetworksA two-port network has two ports. The circuitry at each port can be represented as either a Thevenin or Norton equivalent circuit, as shown below. All networks can be reduced to one or the other of these equivalent circuits, which themselves are duals.

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To represent amplifiers as two-port networks, one port is designated as the input and the other, the output. The output-port source has a value T⋅ xin dependent on (or controlled by) an input-port quantity xin (voltage or current) and T is the transmittance. The resulting network is shown below.

The controlling variables of these dependent sources are the voltages or currents of the other port. The behavior of a two-port network is fully determined by its port quantities.

Transmittance, T, can be one of four kinds, based on the current and voltage combinations of the two ports:

Voltage gain = Av = vout/vinCurrent gain = Ai = iout/iinTransresistance = Rm = vout/iinTransconductance = Gm = iout/vin

As an example of how to derive two-port equivalent circuits, the common-emitter amplifier (shown below) can be represented as a two-port network.

The two ports of the amplifier are already identified, by the pairs of circles at input and output. If the output port is driven by a voltage or current, no change occurs at the input port, and the reverse transmittance through the amplifier is zero. But from input to output port, the transmittance is the voltage gain, Av. A two-port equivalent circuit is shown below.

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where Rin, Rout, and Av are as calculated in the chapter on "Amplifier Circuits." The output port, as shown here, is a Thevenin equivalent circuit.

Port Resistances with Dependent SourcesThe resistance of a port, as represented by its Thevenin or Norton resistance, cannot be found by shorting a dependent Thevenin voltage source or by opening a dependent Norton current source. To do so could affect the quantity the source is dependent upon and lead to erroneous results. A dependent source can only be removed by causing its controlling variable to be set to zero − that is, by nulling it. The port resistance can then be found.

A dependent source can behave as a resistance if its controlling variable is the dual terminal (port) quantity. This is shown by the substitution theorem: across an arbitrary network with a port having voltage v is a dependent current source of current v/r. This current source is equivalent to a resistance of r, by Ohm’s Law. The dual is a network with a port having current i flowing into a dependent voltage source of value i⋅ r. It too is equivalent to r. Any resistance associated with a dependent source must therefore be removed by nulling its controlling quantity so that the port resistance alone remains.

If a two-port network contains a source dependent upon the current of the other port, then by opening the other port, the resistance of the source’s port can be found. Similarly, a source dependent upon the voltage of the other port can be nulled by shorting the other port. The controlling variable must be associated with the other port, or the network is not self-contained. The two-port nulling rules are shown above.

General Feedback CircuitThe feedback block diagram is brought closer to actual feedback circuits as a general feedback circuit consisting of ported networks, shown below.

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This rather involved diagram can represent just about any feedback circuit of interest, and is worth some further investigation. The x variables are generalized port quantities (current or voltage). Relating this to the feedback block diagram:

Ti extends from xi into the input network to sum with xB, resulting in xE, the error quantity and input of G.

Σ is in the input network. As we will see, either currents or voltages – quantities with the same units – can be added.G starts at xE of the upper two-port and extends from xGo through the output network to xf, the input to the feedback block, H. The pickoff circuitry that splits into output and feedback paths occurs in the output network. This feedback circuit model assumes that the reverse transmittance through H is negligible.To extends from xf to the circuit output quantity xo.H (the lower two-port network) starts at xf and extends from xHo through the input network to xB.

Input Network SummingThe summation symbol of the block diagram can be realized at the circuit level in the ways currents and voltages add (or subtract). Kirchhoff’s Laws sum currents (KCL) and voltages (KVL):

Currents sum at nodes.Voltages sum around loops.

Input networks can be simplified to one of two basic topologies: series (common loop) or shunt (common node). The three port quantities of the input network combine as a sum of voltages around a loop for which loop current is common, or as a sum of currents at a node for which the node voltage is common. The input xi is modified by Ti before it appears in the loop or at the node. The general forms of the two input network topologies are shown below.

In the series topology, the common input network quantity is the loop current, iE. It is common to all three input ports and when set to zero, or nulled by opening the loop, nulls the G-path transmittances: x(xE) becomes nulled when iE is nulled, thereby nulling the G source.

Similarly, both of the G-path transmittances dependent on vE in the shunt (parallel) topology are nulled by shorting the common input node.

In choosing the common input quantity as the error quantity, both Kirchhoff’s Laws and Ohm’s Law (ΩL) apply in the summation equation. For an error current around the common loop (series topology),

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For an error voltage at the common node (shunt topology),

By choosing instead the error voltage (input to G) in the series topology or the error current in the shunt topology, summation is by Kirchhoff’s Laws alone.

Another approach to summing in circuits is by superposition. In linear systems, the contributions of sources independent of each other can be calculated and their individual contributions to circuit quantities added for the total quantities. The general principle is shown below for both voltage and current summing.

When superposition is used for error summing, the input network cannot be reduced to a single loop or node. Feedback analysis can still be carried through but there is no common quantity which, when nulled, nulls the input to G. However, the input to G (upon which its controlled source depends) itself can be nulled.

Choosing xE, xf and the Input Network TopologyBefore transmittances can be found, xE and xf must be chosen. These choices are largely arbitrary and are usually not unique. However, some choices make the resulting feedback-circuit analysis easier than others. For a difficult analysis, choose a different circuit quantity for xE or xf, guided by the previously described input and output network considerations.

If xf is chosen too close to the input, common factors appear in the expressions for H and To. Let G = GA⋅ GB, where xf is the output of GA instead of GB, as shown below. This results in feedback equations:

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GB is common to both the H term of xE and To in xo. By letting xf be the output of GB instead, GB appears as a factor in the first equation and disappears from the others.

If xf is instead chosen too close to the output, so that To = ToA⋅ ToB and xf is the output of ToA, then:

In this case, introducing factor ToA into the third equation removes it from the first two.

If xE is chosen too close to the output, common factors occur in the two terms of xE. Let xE be input to GB. Then

By letting G = GA⋅ GB, GA becomes a factor in the first equation and is eliminated from the second.

The final case is that of choosing xE too close to the input, as the input of TiB. Then TiB appears as a common factor with G and in the error term containing H.

By moving xE to the output of TiB, TiB is eliminated from the first equation and H term of xE and becomes a factor in the first xE term so that Ti = TiA⋅ TiB.

The form of input-network topology (series or shunt) is not determined by the circuit. The choice of xE affects the choice of input topology. This can be seen from the following input network.

If v1 is chosen as vE, the H-path port is made a Thevenin circuit and the input forms a loop − a series topology. If v2 is chosen for vE instead, then converting the input and feedback ports to Norton equivalent circuits results in a common node with voltage vE − a shunt topology.

Two-Port Equivalent CircuitsThe transmittances of the general feedback block diagram are found by first finding the equivalent circuits of upper and lower two-port networks shown in the general feedback circuit.

Port resistances are found first by applying two-port nulling to dependent sources. Port resistances enter the calculation of transmittances by forming dividers in the input and output networks or by changing the gain of amplifier circuits. Other sources that contribute to the output port of the transmittance being found but which are not part of its path must be nulled. After nulling,, transmittance is found by applying amplifier or divider analyses that include port resistances.

To find the two-port equivalent circuits, null the controlling variable of each port and find the port resistance. To find RGo, null xE to null the G output source. To null xE, short the node of vE or open the loop of iE. Then inspect the G output port (at xGo) for its resistance, RGo, using circuit analysis.

To find RHo, null xf. For vf, short its node; for if, open its loop. This nulls the x(xf) source of the input-network feedback port, allowing its resistance, RHo, alone to appear across the H output port.

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Next, the transmittances are found. To find Ti, null xf. This both nulls the feedback contribution to xE (which is xB) and presents the feedback port resistance, RHo, to the input network for calculation of Ti. Find the transmittance from xi to xE by circuit analysis.

To find G, the effect of loading by the output network and RHi are included in calculating the G transmittance.

To find H, null the independent source xi by shorting, if vi, and opening, if ii. Apply circuit analysis from xf forward through the H path to xB or to xE. Then

Finally, find To = xo/xf.

Feedback Analysis ProcedureA general procedure can now be given for solving feedback circuits. Before the actual procedure is applied, simplify the circuit, if possible, using Thevenin and Norton equivalent circuits, and feedback-analyze the simpler circuit.

1. Choose xf. xf is dependent on xE. For vf, identify a node; for if, identify a loop.2. Choose xE and identify the input network topology. xE is dependent on xi and xB(xf). Port voltages sum

around a loop; port currents sum at a node.

For series (loop) topology, iE is the common input-network quantity to both error and feedback ports; for shunt (node) topology, vE is the common quantity. Either vE or iE can be chosen for xE.

For error-summing by superposition, no common input-network nulling quantity exists; multiple loops or nodes exist.

3. Find Ti. Ti is found by nulling xB by nulling xf. Input-network feedback-port resistance, RHo, is found by nulling xf and determining RHo. If xf = vf, short the vf node; if if, open the if loop. Then Ti = xE/xi with xf = 0.

4. Find transmittances of G. G = xf/xE while nulling x(xHo). Output network port resistance, RGo is found by nulling the input-network common error quantity (iE for loop; vE for node).

5. Find H. Null input source xi. If xi = vi, short it; if ii, open it. Then H = xB/xf = − (xE/xf) with xi = 0.6. Find To. To = xo/xf.

Non-Inverting Op-AmpNow that the general procedure for analysis of feedback amplifier circuits has been developed, it will be applied to specific amplifiers. The first example of its use is the non-inverting op-amp configuration, shown below.

The triangular amplifier symbol with + and − inputs (differential input) and single-ended (ground-referenced) output is the symbol of an operational amplifier, or op-amp. It has infinite input resistance, an ideal voltage-source output (zero output resistance) and infinite voltage gain. In practice, actual op-amps approach these conditions sufficiently so that use of the ideal op-amp model is often justified.

If the model is made slightly more realistic by assuming a finite voltage gain of K,

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where v+ is the voltage at the op-amp + (noninverting) input.

Then the voltage amplifier can be analyzed using the feedback analysis procedure.

1. Choose xf = vo. This choice is the only path back to the input from the amplifier output, through Rf. The amplifier output quantity is the same as the feedback quantity. The feedback node is the op-amp output.

2. Choose xE = vE = v+ − v− , and note that the input circuit is a loop with vi, vE, and vB in series. Because the op-amp input resistance (across vE) is infinite, iE is zero.

3. Ti = 1; vi adds directly to vE as v+ in the error loop. This can be found by nulling vf = vo by shorting the op-amp

output. With vf = vo shorted, to ground. This results in vi = v+ and v– at 0 V, leaving vE = v+ with no input attenuation: Ti = 1.

4. G = vo/vE = K. To examine output loading on G, open the error-summing loop at the v− node. This nulls iE (which is zero anyway). Then vE = 0, and the output resistance loading the op-amp is Rf + Ri. Because the op-amp output is an ideal voltage source, its zero output resistance allows no loading effect, no attenuation between the op-amp Thevenin equivalent output, v(vE), and the amplifier output, vo. In other words, v(vE) = vo.

5. With vi shorted, H = − (vE/vf). This is negative the attenuation of the voltage divider from vf = vo to v+ or

6. Because xo = vo = xf = vf, To = 1.

Now that all of the quantities of the feedback formula are known, the feedback-amplifier voltage gain (or closed-loop gain) can be found by substitution:

Multiplying numerator and denominator of the gain expression by 1/K, then for large K (as K approaches infinity), 1/K approaches 0 and for the ideal non-inverting op-amp, the voltage gain formula is:

For example, if Rf = 10 kΩ and Ri = 1.0 kΩ, then the op-amp voltage gain is 11.

Inverting Op-AmpThe other basic op-amp configuration, the inverting configuration, is shown below.

To analyze this amplifier, apply the feedback analysis procedure:

1. Choose xf = vo. As with the noninverting op-amp, the only path back to the input is Rf which connects to vo.2. Choose xE = iE, the current flowing into the node of the inverting op-amp terminal. Error current is summed at

this node; it is dependent upon input current through Ri and feedback current through Rf. Both sources are Norton equivalents, in parallel across v− (shunt topology). The common input-network node quantity is v− .

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Shorting v− nulls the forward path through G.3. Null xf = vo by shorting the output (to ground); RHo = Rf. Then Ti = iE/vi. No current flows into either input of

the op-amp. Therefore, iE = ii and iE/ii = 1. But from the Norton equivalent of the input current source, ii = vi/Ri, and Ti = 1/Ri.

The error quantity, iE, is the sum of the currents from the two current sources at the top node.

For the G path, v− is the op-amp input quantity, not iE. G consists of two cascaded transmittances, (v− /iE) times (vo/v− ). The first transmittance is the resistance of the op-amp inverting-input node. Include the G input loading of RHo by shorting vo. This has the effect of grounding the output side of Rf, and RHo = Rf. In the equivalent circuit above, it is the same as opening the output current source. Then RHo = Rf, and the resistance

across v– is . The error current times this node resistance is v– .

The second transmittance is K, the voltage gain of the op-amp.

4. The feedback, x(xf) = iB(vo) = vo/Rf. This is the current source of the Norton equivalent feedback circuit (output of H) and it is nulled by setting xf = vo to zero. With this nulling,

5. To find H, null ii. This is the Norton input circuit, where ii = vi/Ri. To null it, open the current source. Then H = − (iE/vo). But iE is only the current from the Norton feedback source, which is vo/Rf. Substituting, H = –(vo/Rf)/vo = − 1/Rf.

6. Finally, To = 1 because vf = vo.

Now that the transmittances have been found, the closed-loop voltage gain is

When K becomes large, this reduces to

An alternative analysis demonstrates a different choice of xE that uses superposition to sum error quantities.

1. Choose xf = vo. As with the noninverting op-amp, the only path back to the input is Rf which connects to vo.2. Choose xE = vE = v− and observe that xB must be a voltage that sums in a circuit with vi. (xB is the feedback

quantity that sums directly with Ti⋅ xi.) The input and feedback sources are voltage sources vi and vo in series with resistances Ri and Rf, respectively. Because the input port to G is across the op-amp input terminals, this port is in parallel with the input and feedback sources and no single series loop exists. Consequently, xE = vE = v− must be obtained by superposition. To null the G transmittance, vE is shorted.

3. Ti = vE/vi with feedback nulled by shorting vo. The feedback port resistance RHo is found to be Rf. Then Ti is a

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voltage divider:

4. To find G output loading, RGo and RHi are zero because of the ideal op-amp output. When vE is nulled, the output node is Rf in parallel with the op-amp output resistance, which is zero ohms. Then G = vo/vE = vo/v− = –K.

5. Null vi by shorting it. Then the path from vo to vE is a divider − the same one as for Ti but in the reverse direction, or

vB is the Thevenin equivalent voltage at v− due to vo. Because of summing convention, it subtracts from vE, and the − sign appears in H.

6. To = 1 because vGo = vo.

Substituting the above transmittances into the feedback formula produces the same result as the previous analysis. Another choice of xE, the voltage across Ri, is also workable, but much more difficult. In this case, the error quantity is chosen too close to the input and a redundant factor, Rf/Ri, appears in both G and H. (It cancels, resulting in the same closed-loop gain as already derived.)

An example of an inverting op-amp: Rf = 10 kΩ and Ri = 1.0 kΩ. Then the op-amp voltage gain is − 10.

The difference between the inverting and noninverting op-amp configurations is where ground is connected. Without rewiring, if the inverting input voltage-source + terminal is grounded instead of its − terminal, the non-inverting configuration results. The non-inverting configuration has a gain of one more because the input source is added to the op-amp output.

Two-Port Loading TheoremCalculation of two-port equivalent circuits is simplified when two independent ports are connected via a common resistance, as shown below for the voltage case.

The lower two-port equivalent circuit is derived from the upper circuit by applying superposition at nodes having vA and vB:

These equations are equivalent to

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where vA and vB are calculated assuming the other is given. In general, if vA were found, including the loading by port B on the vA node, then vB can be found assuming vA. What the above derivation shows is that both vA and vB can be found assuming the other already has been.

The current dual circuit is shown below. Port currents iA and iB are found assuming that the other is already determined.

The corresponding equations are:

This loading theorem is applicable, for instance, to the lower two-port network of a feedback circuit when xf and xE are connected by a resistance.

BJT Feedback AmplifierThe discrete-component BJT amplifier shown below resembles the inverting op-amp and demonstrates use of the two-port loading theorem.

Assuming that the transistors are biased for linear operation (so that the BJT model is valid), the feedback analysis procedure is as follows.

1. Choose xf = vo. This is the output node.2. Choose xE = iE = iB1, the current into the base of Q1. Components connect to this node from both the input and

output nodes, in parallel. The shunt input-network topology is consequently the most easy to identify. The

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equivalent input network is shown below.

The Norton equivalent input and feedback circuits are in parallel with the input of G1 and vB1 is the common input-port error quantity.

3. Because of rin:


a current-divider is formed by RB in parallel with Rf and rin. After nulling vo (by shorting it), RHo = Rf and

This is the fraction of input current, vi/RB, that flows through rin, which is iB1.

4. G = vo/iE = vo/iB1. While nulling the input-port common error quantity (the node voltage, vB1), at the G output node, RHi (= Rf) is in

parallel with RE2, as G output loading. The gain of the first stage, neglecting the loading of Q2, is vC1/iB1 = − β1⋅ RL. The total gain is

the product of first and second-stage gains, or

Both input and output loading of the G path is taken into account in G.

5. The feedback block, H, is found by nulling the input quantity, and calculating

The fraction of current due to vo that is iB1 is found by the current divider formula and multiplying by output the equivalent current:

6. To = 1, because the feedback quantity, xf = vo.

The above quantities are substituted into the feedback equation to calculate the closed-loop gain.

The choice of iB1 for the error quantity was not the only possibility. This amplifier could have been analyzed by assuming the base voltage of Q1 to

be the error quantity. For step 4, the loading theorem is applied to allow us to assume that vo and vB1 are the actual (loaded) node voltages with Rf the

connecting resistance. Then the effects of the input and output networks (due to loading) can be taken into account. Input summing would then be

applied by superposition of vi and vo to the calculation of vB1, from the equivalent circuit, shown below.

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Note that this circuit is similar to the inverting op-amp, with the addition of rin and the input and output loading of G. The G path is an inverting

amplifier, but has non-ideal input resistance.


Many other examples of feedback circuits could be given. With the network and feedback analysis principles given here, most of them can be

analyzed with sufficiently accurate results. Feedback principles apply to more than electronic circuits. Electronic circuits are but one application area

of feedback theory, which is an important part of the field of control theory.