A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of LA-3301P 1.0 Cover Sheet 1 58 Wednesday, March 07, 2007 Compal Electronics, Inc. 2007-03-07 BOM P/N : PCB NO : COMPAL CONFIDENTIAL MODEL NAME : IBQ00 M08 (UMA) Briscoe uFCPGA Mobile Merom Intel Crestline + ICH8M REV : 1.0 (A00) DELL CONFIDENTIAL/PROPRIETARY PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-3301P (DA80000771L) 45144631L01 PCB P/N: DA80000771L BOM NO. 45144631L01 DAZ P/N:DAZZGX0010L IBQ00 LS-3301P REV1 LED/B PCB1 LS-3301P REV1 LED/B IBQ00 LS-3302P REV1 IO/B PCB1 LS-3302P I/O Board Part Number Description DA80000771L PCB ZGX LA-3301P REV1 M/B UMA MB PCB
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Transcript
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Cover Sheet
1 58Wednesday, March 07, 2007
Compal Electronics, Inc.
2007-03-07
BOM P/N : PCB NO :
COMPAL CONFIDENTIALMODEL NAME : IBQ00
M08 (UMA) BriscoeuFCPGA Mobile MeromIntel Crestline + ICH8M
REV : 1.0 (A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-3301P (DA80000771L)45144631L01
PCB P/N: DA80000771LBOM NO. 45144631L01
DAZ P/N:DAZZGX0010L
IBQ00LS-3301P REV1LED/B
PCB1
LS-3301P REV1 LED/B
IBQ00LS-3302P REV1IO/B
PCB1
LS-3302P I/O Board
Part Number Description
DA80000771L PCB ZGX LA-3301P REV1 M/B UMA
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Block Diagram
2 58Wednesday, February 14, 2007
Compal Electronics, Inc.
Clock Generator
DMI
Compal confidentialModel : IBQ00
Azalia Codec
Memory BUS(DDR2)
+1.5V_RUN 100MHz
+1.8V_SUS 533 / 667MHz
PATA
MDC
CK505
STAC9205
Azalia I/F
LVDS
RJ11D Moudle+5V_MOD
+VDDA
+3.3V_RUN
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8DDRII-DIMM X2
+0.9V_DDR_VTT
+1.8V_SUS
Cable
+3.3V_SUS
CPU ITP Port
LVDS CONNon M/B Board
+FAN1_VOUT
SATA
+3.3V_RUN
PWR Sequence
GUARDIAN IIIEMC4001
Thermal
+3.3V_SUS
FAN
S-HDD+5V_HDD
+1.05V_VCCP
DELL CONFIDENTIAL/PROPRIETARY
page 18
page 18
page6page 7
page 19
page 21,22,23,24
page 25 page 25 page 26
page 33
page 42
page 16,17
CRT CONNpage 20
LPC BUS+3VRUN33MHz
SMSC SIO
+3.3V_ALW
ECE5028page 38
RGB
page 51DVODVI Bridge
SI1362ADVI
RGB
TV
DOCKINGBUFFER
page 35
DOCKINGPORT
page 36 page 30
PCI BUS
CardBusOZ711 LQFP
+3VRUN 33MHz
IDSEL:AD17(PIRQD#,GNT#1,REQ#1)
+3.3V_RUN
Mini Card2
+3.3V_WLAN
WLAN+3.3V_RUN
Mini Card 1
PCI Express BUS
+1.5V_RUN+1.5V_RUN page 28,29
GIGA Enthernet+3.3V_LAN
RJ45
(+1.5V_RUN 100MHz)
BCM5755MWWAN
page 34page 34
Bluetooth
USB[7]
48MHz
USB[9]
USB[6]
SC_USB
+3.3V_RUN
page 39
page 37
COM
+3.3V_SUSST M25P16
+3.3V_ALW+RTC_CELL
MEC5025page 39
SPI
Stick
page 40
Int.KBD &Stick
page 40+5V_RUN
Touch Pad
AMP & INT.Speaker
HeadPhone& MIC Jack
+5V_RUN+3.3V_RUN
page 27 page 27
INT MIC+VDDA
page 40
SPI
+5V_RUN
+5V_RUN
IO/BIO/B
+1.25V_RUN
uFCPGA CPU
INTEL
H_A#(3..35) H_D#(0..63)
Pentium-M
System BusFSB 800 MHz
1299pin BGA
Crestline
+1.8V_SUS
+VCC_CORE
+1.05V_VCCP
+1.5V_RUN
+1.05V_VCCP
478pin
Merom -4MB (Socket P)
+3.3V_RUN
+1.8V_RUN
page 7,8,9
page 10,11,12,13,14,15
INTELICH8-M
676pin BGA
page 21,22,23,24+1.05V_VCCP
+3.3V_RUN
+3.3V_SUS
+1.5V_RUN
USB0 : side pair top,USB1 : side pair bottom
USB2 : Rear Left as viewed from the back,USB3 Rear Right as viewed from the back
USB Ports X2
Smart Card+5V_RUN page 31
OZ77CR6
IO/Board
SLOT
+5V_SUS
USB[2,3] USB Ports X2+5V_SUS page 32
USB[4]
USB[0,1] SIDE
REAR
IEEE1394
ECE1077page 37
page 27
+3.3V_ALW
+3.3V_SUS
+RTC_CELL
page 30
PCI_PIRQA#REQ#0GNT#0
ME & LEDpage 43
DC INpage 44
Battery INpage 44
3V / 5V /15Vpage 45
page 46
1.8V / 0.9V/1.25V
page 47
1.5V / 1.05V
page 48
Vccore
page 49
Charger
page 50
Battery Select
Block Diagram
USB[5]
+2.5V_LAN+1.2V_LAN
+1.25V_RUN
+3.3V_RUN
Biometricpage 40
Trough Cable
DOCK LPC BUS USB[8]
DOCK LPC BUS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Index and Config.
3 58Wednesday, February 14, 2007
Compal Electronics, Inc.
PIRQ
+1.05V_VCCP
PM TABLE
PCI DEVICE IDSEL
S0
PCI TABLE
S3
+3.3V_SUS+5V_SUS
+5V_ALW
S5 S4/AC don't exist
+1.8V_RUN
+VCC_CORE
REQ#/GNT#
+5V_RUN
ON
powerplane
+3.3V_RUN
S5 S4/AC
+3.3V_ALW
State
+1.8V_SUS
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+0.9V_DDR_VTT
OZ711
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
ICH8-M
MINI CARD-2 WLAN
None
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
+3.3V_RTC_LDO+2.5V_RUN
REQ#1 / GNT#1AD17 PIRQD
AD24 REQ#0 / GNT#0
MINI CARD-1 WWAN
+1.5V_RUN
POWER STATES
S0 (Full ON) / M0
SLP S3#
SLPS5#
HIGH
SignalState
SLPS4#
HIGH HIGH HIGH
S4STATE#
ALWAYSPLANE
ON
MPLANE
ON
SUSPLANE
RUNPLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH ON ON ON ONOFF
S4 (Suspend to DISK) / M1 ON ON ON ONOFF
SLPM#
HIGH
HIGH
LOW HIGH HIGH HIGHLOW
S5 (SOFT OFF) / M1 ON ON ON ONOFFLOW HIGH LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
8
9+15V_ALW
PIRQADocking
Side Top
Side Bottom
Rear Left
Rear Right
Smart Card
Biometric
Card Bus
Bluetooth
Docking
WWAN
Lane 5
Lane 6
None
None
GIGA LAN
ECE 5028
1
2
3
4
None
None
None
None+1.25V_RUN
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Power Rail
4 58Wednesday, February 14, 2007
Compal Electronics, Inc.
+5V_SUS
BATTERY+PWR_SRC
ADAPTER
+VDDA
MAX9789A
FDS4435 +INV_PWR_SRCRUN_ON
SI3456SI3456BDV
HD
DC
_EN
#
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_MOD
MO
DC
_EN
#
+VCC_CORE
ISL6236
+1.8V_SUS
RU
NP
WR
OK
ISL6260
CHARGER
DD
R_O
N
AUD
IO_A
VD
D_O
N
SU
S_O
N
+3.3V_ALWALWON
ISL6236
+15V_ALW
+5V_ALWALWON
SI3456BDV
ENAB
_3V
LAN
+3.3V_LAN
+3.3V_SUS
+5V_RUNRUN_ON
+2.5V_LAN +1.2V_LAN
RE
GC
TL_P
NP
12
RE
GC
TL_P
NP
25
SI4810DY
RU
N_O
N
+3.3V_RUN
+5V_HDD
(Q24)
(PU11) (PU22)
+0.9V_DDR_VTT
TPS51100(PU24)
0.9V
_DD
R_V
TT_O
N
+1.25V_RUN
M_O
N
1.05
V_R
UN
_ON
+1.05V_VCCP
SI3456BDV
+1.5V_RUN
1.5V
_RU
N_O
N
ISL6236(PU21)
+1.8VRUN
RU
N_O
N
(Q54)
(Q48)(Q56) (U37)
(PU20)
(Q69)
BCP69 MMJT9435T1G(Q71)(Q70)
(Q58)
SI4810DY(Q52)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
SMBUS TOPOLOGY
5 58Wednesday, February 14, 2007
Compal Electronics, Inc.
MEC 5025
ICH8-M
INVERTER
ICH_SMBDATA
ICH_SMBCLK
SIO
PBAT_SMBCLKPBAT_SMBDAT
CHARGER
AD19
AJ26
7
8
5
6
SMBUS Address [TBD]
CLK_SCLK
9
10
111
112
WWAN
SMBUS Address [TBD]
3032
SMBUS Address [TBD]
SBAT_SMBDAT9
102'ndBATTERY
3
4
SBAT_SMBCLK
100
99 THRM_SMBDAT
12
11
Intel LAN
C8C7
SMBUS Address [TBD]
(JLVDS)
LCD_SMBCLK
LCD_SMDATA
EMC4001THRM_SMBCLK
+3.3V_SUS
2.2K
2.2K
4.7K
4.7K
2.2K
100 ohm
100 ohm
2.2K
+3.3V_ALW
8.2K
8.2K
SMBUS Address [TBD]
SMBUS Address [TBD]
2.2K
2.2K
100 ohm
100 ohm BATTERYCONN
3
4 SMBUS Address [TBD]
SMBUS Address [TBD]
32 30
5
6
SMBUS Address [TBD]
8.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
6
5
8.2K
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
2N7002MEM_SCLK
MEM_SDATA 195 DIMMA
SMBUS Address [TBD]
197
2N7002
+3.3V_RUN
2.2K
2.2K
DIMMB
SMBUS Address [TBD]
195
197
16
17CKG_SMBDAT
CKG_SMBCLK CLK GEN SMBUS Address [TBD]2N7002
2N7002
12
13
+3.3V_RUN
2.2K
2.2K
CLK_SDATA
WLAN2N7002
2N7002
WLAN_SMBCLK
WLAN_SMBDATA
+3.3V_WLAN
2.2K
2.2K
CLK_SDATA
SMBUS Address [TBD]Charger10
9
CLK_SCLK@ 0
@ 0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_CPU_ITP
CLK_CPU_ITP#
CLK_MCH_BCLK#
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_ICH_14M
CLK_SIO_14M
MCH_DREFCLK#
MCH_DREFCLK
CLK_MCH_BCLK
CLK_PCI_ICH
CLK_PCI_PCM
PCI_PCM
PCI_LOM
CLK_XTAL_OUT
H_STP_PCI#
PGMODE
CLK_SCLK
CLK_SDATA
DOT96_SSC#
CPU_BCLK#CLK_XTAL_IN
CLKREF
CLK_SDATA
DOT96#
MCH_BCLK
CLK_SCLK
PCI_LOM
H_STP_CPU#
CLK_PWRGD
CPU_BCLK
CPU_ITP
DOT96_SSC
PCI_ICH
DOT96
CPU_ITP#
MCH_BCLK#
PCI_ICH
+CK_VDD_REF
+CK_VDD_48
+CK_VDD_MAIN
+CK_VDD_A
+CK_VDD_REF
CLK_PCI_TPMCLK_PCI_DOCK
CLK_PCI_5018CLK_PCI_5025
PCI_PCM
PCI_DOCK
PCI_SIO
PCIE_MINI1
PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
PCIE_MINI2
PCIE_MINI2#
PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_ICH
PCIE_ICH#
CLK_PCIE_LOM
PCIE_LOM#
PCIE_LOM
CLK_PCIE_LOM#
CLK_PCIE_SATA#
PCIE_SATA CLK_PCIE_SATA
PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#MCH_3GPLL#
MCH_3GPLL
MINI1CLK_REQ#
MINI2CLK_REQ#
CLK_3GPLLREQ#
SATA_CLKREQ#
LOM_CLKREQ#
+CK_VDD_48
CLK_SMC_48MCLK_ICH_48M
FSA
FSC
FSA
CLK_SMC_48MCLK_ICH_48M
CLK_PCI_PCM
CLK_PCI_5025
CLK_PCI_5018
CLK_PCI_ICH
CLK_ICH_14M
CLK_SIO_14M
CLK_PCI_TPM
CLK_PCI_DOCK
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+CK_VDD_MAIN2
+CK_VDD_MAIN+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
CLK_MCH_BCLK# 10
CLK_MCH_BCLK 10
CLK_CPU_BCLK# 7
CLK_CPU_BCLK 7
DREF_SSCLK 10
DREF_SSCLK# 10
CLK_CPU_ITP 7
CLK_CPU_ITP# 7
CLK_ICH_14M23
CLK_SIO_14M38
MCH_DREFCLK10
MCH_DREFCLK#10
CLK_PCI_ICH21
CLK_PCI_PCM30
CLK_PWRGD23
H_STP_CPU# 23
H_STP_PCI# 23
CKG_SMBDAT39
CKG_SMBCLK39
CLK_PCI_TPM28CLK_PCI_DOCK36
CLK_PCI_501838CLK_PCI_502539
CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34
MINI1CLK_REQ# 34
CLK_PCIE_MINI2 34
CLK_PCIE_MINI2# 34
MINI2CLK_REQ# 34
CLK_PCIE_ICH# 23
CLK_PCIE_ICH 23
CLK_PCIE_LOM 28
CLK_PCIE_LOM# 28
LOM_CLKREQ# 28
CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22
SATA_CLKREQ# 23
CLK_MCH_3GPLL 10
CLK_MCH_3GPLL# 10
CLK_3GPLLREQ# 10
CLK_SMC_48M31CLK_ICH_48M23
CPU_MCH_BSEL18,10
CPU_MCH_BSEL28,10
CPU_MCH_BSEL08,10
CLK_SDATA34
CLK_SCLK34
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Clock Generator
6 58Monday, February 26, 2007
Compal Electronics, Inc.
Place crystal within500 mils of CK410
Table : ICS954305AK
1
*
CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU
MHzSRCMHz
PCIMHz
266
133
200
166
333
100
400
100
100
100
100
100
100
100
33.3
33.3
33.3
33.3
33.3
33.3
33.3
0 0 0
00
0
0
0
00
0
0
1
1
1 1
1
1
1
1 1
1
1
CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)
133
166
0
0
0
1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FCTSEL1 PIN43 PIN44 PIN47 PIN48
0=UMA
1=DIS
DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
*
PGMODE
0
1
PIN 9
VTT_PWRGD#/PD
CKPWRGD/PD#
TME
0
1
PIN 32
Normal Operation
Trusted Mode Enabled
ITP_EN
0
1
PIN 37
Pin 5/6 as SRC_10
Pin 5/6 as CPU_ITP*
*
200 100 33.3
Non-iAMT
Non-iAMT
Non-iAMT
Non-iAMT
0=UMA1=Disc. GRFX down
C7793.3P_0402_50V8C~D @
1
2
R299 33_0402_5%~D
1 2
R317 33_0402_5%~D 1 2
R759
2.2_0603_5%~D
1 2
R270 33_0402_5%~D
1 2
R309 2.2K_0402_5%~D
1 2
C48
10.
1U_0
402_
16V4
Z~D
1
2
R267 33_0402_5%~D
1 2
R307 33_0402_5%~D
1 2
R293 33_0402_5%~D
1 2
R29510K_0402_5%~D
@
1 2
R269 33_0402_5%~D
1 2
X114.31818MHz_20P_1BX14318CC1A~D
12
C47
84.
7U_0
603_
6.3V
4Z~D
1
2
R301 10K_0402_5%~D
1 2
C48327P_0402_50V8J~D
12
R2710_0402_5%~D1 2
R306 33_0402_5%~D
1 2
C7763.3P_0402_50V8C~D@
1
2
C47
90.
047U
_040
2_16
V4Z~
D
1
2
R279 33_0402_5%~D
1 2
R32910K_0402_5%~D@
12
C18
90.
047U
_040
2_16
V7K~
D
1
2G
D S
Q352N7002W-7-F_SOT323-3~D
2
1 3
C47
50.
1U_0
402_
16V4
Z~D
1
2
R282 15_0402_5%~D
12
R311 33_0402_5%~D
1 2
R280 33_0402_5%~D
12
C77
43.
3P_0
402_
50V8
C~D
1
2
R274 33_0402_5%~D
1 2
C47
10.
1U_0
402_
16V4
Z~D
1
2
R30410K_0402_5%~D
12
R281 33_0402_5%~D
1 2
R26
62.
2K_0
402_
5%~D
12
R435
0_0402_5%~D
@1 2 C
474
0.1U
_040
2_16
V4Z~
D
1
2
R289 33_0402_5%~D
1 2
R277 33_0402_5%~D
12
R288 33_0402_5%~D
1 2
R596 33_0402_5%~D 12
R333 15_0402_5%~D 1 2
R284 15_0402_5%~D
1 2
R31810K_0402_5%~D@
12
C7803.3P_0402_50V8C~D@
1
2R286 33_0402_5%~D
1 2
R287 33_0402_5%~D 1 2
R758 2.2_0603_5%~D 1 2
C48
010
U_0
805_
10V4
Z~D
1
2
C7753.3P_0402_50V8C~D @
1
2
L87BLM21PG600SN1D_0805~D
1 2
R294 33_0402_5%~D
1 2
R310 10K_0402_5%~D 1 2
R291 33_0402_5%~D 12
R313 33_0402_5%~D
1 2
SLG8LP550
U28
SLG8LP550_QFN72~D
VDD_SRC1VDD_SRC49
VDD_SRC65
VDD_PCI30VDD_PCI36
VDD_4840
VDD_CPU12
VDD_REF18
USB_48MHz/FSLA41
FSL_B/TEST_MODE45
XTAL_OUT19
XTAL_IN20
VSS_PCI31
PCICLK2/TME32
REF_0/FSL_C/TEST_SEL23
SMBDAT17
SMBCLK16
PCICLK_F0/ITP_EN37
PGMODE9
CPU_STP# 24
CPU_1 11
CPU_1# 10
CPU_ITP/SRC_10 6
PCICLK333
PCICLK4/FCT_SEL34
CPU_0# 13
CPU_0 14
PCI_STP# 25
VSS_A 8
VDD_A 7
VSS_PCI35
CPU_ITP#/SRC_10# 5
VSS_REF21
VSS_CPU15
VSS_SRC4
VSS_4842
VSS_SRC68
DOT_96/27M43
DOT_96#/27M_SS44
CKPWRGD/PD#39
REF_122 SRC_7 66
SRC_7# 67
SRC_8 70
SRC_8# 69
SRC_9 3
SRC_9# 2
SRC_1#/SATA# 51
LCD_CLK/SRC_0 47
SRC_2 52
SRC_4 58
SRC_1/SATA 50
CLKREQ_4# 57
SRC_2# 53
SRC_5# 61
SRC_4# 59
SRC_5 60
LCD_CLK#/SRC_0# 48
SRC_3# 56
SRC_3 55
SRC_6 63
SRC_6# 64
CLKREQ_6# 62
CLKREQ_8# 71
CLKREQ_9# 72
CLKREQ_1# 46
CLKREQ_5# 29
CLKREQ_3# 28
CLKREQ_2# 26
CLKREQ_7# 38
VDD_SRC54
PCICLK127
THRM_PAD73
THRM_PAD76
THRM_PAD74THRM_PAD75
R31910K_0402_5%~D
12
R268 33_0402_5%~D
1 2
C47
70.
1U_0
402_
16V4
Z~D
1
2C47
30.
1U_0
402_
16V4
Z~D
1
2
C48433P_0402_50V8J~D
12
R315 10K_0402_5%~D
1 2
R298
10K_0402_5%~D
@ 1 2
R285 15_0402_5%~D
1 2
R316 33_0402_5%~D 1 2
L28BLM21PG600SN1D_0805~D
1 2
R275 15_0402_5%~D
1 2
C7813.3P_0402_50V8C~D@
1
2
R29010K_0402_5%~D
12
C79
90.
047U
_040
2_16
V4Z~
D
1
2
R760
1_0603_5%~D 1 2
R26
52.
2K_0
402_
5%~D
12
R4400_0402_5%~D
@1 2
C47
210
U_0
805_
10V4
Z~D
1
2
R273 15_0402_5%~D
12
C7783.3P_0402_50V8C~D@
1
2
C99
4.7U
_060
3_6.
3V4Z
~D
1
2
C7773.3P_0402_50V8C~D@
1
2
C47
60.
1U_0
402_
16V4
Z~D
1
2
R168 33_0402_5%~D
1 2
R419 475_0402_1%~D
1 2
R272 33_0402_5%~D
1 2
R39110K_0402_5%~D@
12
R314 8.2K_0402_5%~D
1 2
C70
83.
3P_0
402_
50V8
C~D
1
2
R297 10K_0402_5%~D 1 2
C7853.3P_0402_50V8C~D@
1
2
C48
20.
1U_0
402_
16V4
Z~D
1
2
R283 10K_0402_5%~D 1 2G
D S
Q342N7002W-7-F_SOT323-3~D
2
1 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ITP_TRST#
ITP_TCK
ITP_DBRESET#
H_THERMTRIP#
H_RESET#
H_INIT#
CLK_CPU_BCLK
H_HIT#
H_LOCK#
ITP_TRST#
H_INTR
H_ADS#
CLK_CPU_ITP
H_DRDY#
H_RS#1
ITP_BPM#3
H_BR0#
H_RESET#
ITP_TCK
H_SMI#
ITP_DBRESET#
H_STPCLK#
H_DEFER#
CLK_CPU_BCLK#
ITP_DBRESET#
H_ADSTB#1
EC_CPU_PROCHOT#
H_FERR#
ITP_BPM#0ITP_BPM#1
H_RS#2
H_RESET#
ITP_TDO
H_TRDY#
H_NMI
ITP_BPM#4
H_BNR#
H_HITM#
CLK_CPU_ITP#
H_A20M#
H_IGNNE#
H_RS#0
H_DBSY#
ITP_TDO
H_IERR#
ITP_BPM#2
H_BPRI#
ITP_BPM#5
H_A#27
H_REQ#1
H_A#18
H_A#15
H_A#10
H_A#13
H_REQ#0
H_REQ#3
H_A#32
H_A#21
H_A#14
H_A#30
H_A#35
H_A#3
H_A#17
H_A#22
H_A#25H_A#26
H_A#19
H_A#31
H_A#33
H_A#9
H_A#28
H_A#20
H_A#23
H_A#29
H_REQ#2
H_ADSTB#0
H_A#7
H_A#24
H_A#4
H_A#8
H_A#12
H_A#5
H_A#16
H_REQ#4
H_A#34
H_A#11
H_A#6
H_THERMTRIP#
H_THERMDA
H_THERMDC
ITP_TMS
ITP_TMS
ITP_TDI
ITP_TDI
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
H_LOCK# 10
CLK_CPU_BCLK 6
H_THERMDA 18
H_INIT# 22
H_BNR# 10
H_IGNNE#22
H_A20M#22
H_DEFER# 10
H_SMI#22
H_RS#0 10
H_ADSTB#110
H_NMI22
H_TRDY# 10
H_BPRI# 10
H_DRDY# 10
H_HITM# 10
CLK_CPU_BCLK# 6
H_HIT# 10
H_FERR#22
CLK_CPU_ITP6
H_STPCLK#22
H_RS#2 10
ITP_DBRESET# 23,38
H_ADS# 10
H_RESET# 10
H_THERMTRIP# 18H_INTR22
H_RS#1 10
CLK_CPU_ITP#6
H_BR0# 10
H_DBSY# 10
H_REQ#210H_REQ#310
H_REQ#010
H_ADSTB#010
H_A#[3..35]10
H_REQ#410
H_REQ#110
H_THERMDC 18
EC_CPU_PROCHOT# 39
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Merom Processor(1/2)
7 58Monday, February 26, 2007
Compal Electronics, Inc.
This shall place near CPU
Place near JITP
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Resistor placed within 0.5" ofCPU pin.Trace should be at least25 mils away from any othertoggling signal. COMP0, COMP2trace should be 27.4 ohm.COMP1, COMP3 should be 55ohm.
Layout close CPU PIN AD2655 ohm, 0.5 inch (max)
Place R342 and R343 near CPU
Route VCCSENSE and VSSSENSE trace at27.4 ohms, 7 mils spacing and 1 inch (max)
Length match within 25 mils Z0=27.4 ohm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB was 270uF
For the purpose of testability, route these signalsthrough a ground referenced Z0 = 55ohm trace thatends in a via that is near a GND via and isaccessible through an oscilloscope connection.
Place C close to theCPU_TEST4 pin. Make sureCPU_TEST4 routing isreference to GND and awayfrom other noisy signal.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these insidesocket cavity on L8(North sideSecondary)
Place these insidesocket cavity on L8(Sorth sideSecondary)
Place these insidesocket cavity on L8(North sidePrimary)
Place these insidesocket cavity on L8(Sorth sidePrimary)
South Side Secondary
Place these insidesocket cavity on L8(North sideSecondary)
Layout Note:H_RCOMP trace widthand spacing is 10/20
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NO CONNECT FOR DISCRETETrace CRT_IREF should be atleast 20 miles away from anyother toggling signal.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
40mA Max.
45mA Max.45mA Max.
40mA Max.
CRB 270uF
Non-iAMT
Place caps closeto VCC_AXF (PinA21, B21, B23)
C533,C534,C536,C545,C553,C579 are beingreplaced by 0-ohm 0805 resistor
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note: 370 mils from edge
Layout Note: Inside GMCH cavity.
Layout Note: Inside GMCH cavity.
Layout Note: Place close to GMCH edge.
Layout Note: Place C901 whereLVDS and DDR2 taps.
Layout Note: Place on the edge Layout Note: Inside GMCH
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Compal Electronics, Inc.Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
RESERVEDIMMA
Layout Note:Place near JDIM1
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place near JDIM2
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
DIMMBSTANDARD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place C634 close to theGuardian pins as possiblePlace C633 close to the Q40 as possible
Diode circuit at DP4/DN4 isused for skin temp sensor(placed optimally betweenCPU, MCH and MEM).
Voltage marginingcircuit for LDO output. For Vmargin, stuffRa=31.6K and Rb=30K. Rb=1K for production
Ra
Rb
VSET =Tp-70
21
VSET=R436+R438
R438x 3.3V
=> Tp = 88.2 C
=0.865V
Place C650close to Q41
Place C636 close to the Guardian pins as possible
This thermistor circuit is located nearTop side DDR connector.
JFAN1
MOLEX_53398-0371~D
112233
EB
CQ19MMST3904-7-F_SOT323-3~D
2
31
C6502200P_0402_50V7K~D@
1
2
C6410.1U_0402_16V4Z~D@
1
2
R42410K_0402_5%~D
12
R438118K_0402_1%~D
12
R77310K_0402_5%~D
12
EB
C
Q38MMST3904-7-F_SOT323-3~D
2
31
C418
2200P_0402_50V7K~D
1
2
R485
31.6K_0402_1%
~D
@12
C6320.1U_0402_16V4Z~D
1
2
C64
510
U_0
805_
10V4
Z~D
1
2
C6480.1U_0402_16V4Z~D
1
2
C63
80.
1U_0
402_
16V4
Z~D
1
2
EB
CQ41MMST3904-7-F_SOT323-3~D
2
31
C6440.1U_0402_16V4Z~D
1
2
R434
7.5K_0402_5%~D
12
C6280.1U_0402_16V4Z~D
1
2
R439
0_1210_5%~D
12
R772
10K_0603_1%_TSM1A103F34D3RZ~D
12
R4338.2K_0402_5%~D
12
C6370.1U_0402_16V4Z~D
1
2 R43010K_0402_5%~D
12
C6390.1U_0402_16V4Z~D
1
2
R43110K_0402_5%~D
@ 12
D19RB751S40T1_SOD523-2~D
@
21
R43
71K
_040
2_5%
~D
12
R428
49.9_0603_1%~D
1 2
C7502200P_0402_50V7K~D
1
2
R9610K_0402_5%~D
12
R4252.2K_0402_5%~D 1 2
R194
10K_0402_5%~D
@1 2
U31
EMC4001_QFN48~D
DP3 45DN3 44
VCP1 43
ACAVAIL_CLR 4
VDD_5V 5
FAN_OUT7
SMDATA11SMBCLK12
VSS34
GPIO110GPIO213
3V_SUS35
3V_PWROK#16
THERMTRIP1#17
THERMTRIP2#18
THERMTRIP3#19
ATF_INT# 20RTC_PWR3V21
GPIO314GPIO415
VSUS_PWRGD23
SYS_SHDN# 24
LDO_SHDN#/ADDR 27
LDO_SET 28
LDO_OUT 32
LDO_IN 30
LDO_OUT 31
LDO_IN 29
XEN26
THERMTRIP_SIO 25
LDO_POK 33
GPIO6/FAN_DAC236
FAN_DAC139
DN240 DP241
DN137 DP138
POWER_SW# 3
VSET42
VCP2 46
VDD_5V 6
VDD_3V 9
DN4 47DP4 48
DN5 1DP5 2
GPIO522
FAN_OUT8
PAD_GND49 C64
31U
_060
3_10
V4Z~
D
1
2
C6332200P_0402_50V7K~D
@
1
2
C64
60.
1U_0
402_
16V4
Z~D
1
2 C64
710
U_0
805_
10V4
Z~D
1
2
R4140_0402_5%~D
12
C636470P_0402_50V7K~D
1
2
R4268.2K_0402_5%~D
12
EB
C
Q40MMST3904-7-F_SOT323-3~D
2
31
C2030.1U_0402_16V4Z~D@
1
2
R441
1K_0402_1%~D
12
R4238.2K_0402_5%~D
12
C6342200P_0402_50V7K~D
1
2
C1002200P_0402_50V7K~D
1
2
C63
0
22U
_080
5_6.
3VAM
~D
1
2
EB
C
Q39MMST3904-7-F_SOT323-3~D
2
31
C9042200P_0402_50V7K~D
@
1
2
R7712.21K_0603_1%~D
12
R4272.2K_0402_5%~D 1 2
R436332K_0402_1%~D
12
C64
010
U_0
805_
10V4
Z~D
@
1
2
C6492200P_0402_50V7K~D
1
2
R196
10K_0402_5%~D
@1 2
R429 1K_0402_5%~D
1 2
G
D
S
Q1022N7002W-7-F_SOT323-3~D
2
13
R432 1K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD_TST
LCD_A1-
LCD_A0+
LCD_A2-
LCD_A0-
LCD_A2+
LCD_A1+
LCD_ACLK+LCD_ACLK-
LCD_BCLK+
LCD_B0+LCD_B0-
LCD_B2-
LCD_B1-
LCD_B2+
LCD_BCLK-
LCD_B1+
LAMP_STAT#
+3.3V_RUN
+LCDVDD
+3.3V_RUN
+INV_PWR_SRC+PWR_SRC
+INV_PWR_SRC
+5V_ALW
+LCDVDD
+LCDVDD+15V_ALW
+15V_ALW
+3.3V_RUN
RUN_ON37,39,41,42
LCD_TST 38
LCD_DDCCLK 12LCD_DDCDATA 12
LCD_A0- 12LCD_A0+ 12
LCD_A1- 12LCD_A1+ 12
LCD_A2- 12LCD_A2+ 12
LCD_ACLK- 12LCD_ACLK+ 12
LCD_B0- 12LCD_B0+ 12
LCD_B1- 12LCD_B1+ 12
LCD_B2- 12LCD_B2+ 12
LCD_BCLK- 12LCD_BCLK+ 12
LCD_SMBDAT 39LCD_SMBCLK 39
BIA_PWM 12
ENVDD12
LCD_VCC_TEST_EN39
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Internal LVDS
19 58Wednesday, February 28, 2007
Compal Electronics, Inc.
FDS4435: P CHANNAL
40mil40mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Populate R155 for platformwithout DPST support. NoStuff for Discrete DSPTsupport due to back upplan.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
BIOS should not enable the internalGPIO pull up resistor
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U19
Within 500 mils
XOR Chain Entrance Strap
DescriptionICH RSVD HDA SDOUT
RSVD
Enter XOR Chain
Normal Operation (Default)
Set PCIE port config bit 1
0 0
0
0
1
1
1 1
ICH8M Internal VR Enable Strap(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Within 500 mils
Within 500 mils
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
Low = Default
High = No Reboot
SPKR
No Reboot Strap
----->Blue Tooth----->Card Bus
----->Smart Card
----->Rear Left----->Side Bottom----->Side Top
----->Rear Right
----->Biometric
----->Dock----->WWAN
Non-iAMT
GIGA LAN --->
Non-iAMT
Non-iAMT
Option to " Disable "clkrun. Pulling itdownwill keep the clksrunning.
Filters are to supress14MHz noise sourcedfrom the ICH
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
W=30 mil
Close to Pin 6
TRACE>15 mil
45
2
single gate TTL
31
U34 place as close to CODEC as possible
Close to Pin 5
C71
40.
1U_0
402_
16V4
Z~D
1
2
G
D
S Q752N7002W-7-F_SOT323~D
2
13C
715
1U_0
603_
10V4
Z~D
1
2
R711
20K_0402_1%~D
12
C7820.1U_0402_16V4Z~D@
1
2
R54310K_0402_5%~D
12
R821100K_0402_5%~D
1 2
R546 10K_0402_5%~D 12
C7100.1U_0402_16V4Z~D
1
2
R544 33_0402_5%~D
1 2
R82310K_0402_5%~D
12
G
D
SQ742N7002W-7-F_SOT323~D
2
13
R54020K_0402_5%~D
1 2
C72
61U
_060
3_10
V4Z~
D
1
2 C71
810
U_0
805_
10V6
K~D
@
1
2
R47947_0402_5%~D @
12
U34
74AHCT1G86GW_SOT353-5~D
B1
A2 Y 4
P5
G3
R54510_0402_5%~D
12
C71
310
00P_
0402
_50V
7K~D
1
2
C71
70.
1U_0
402_
10V7
K~D
1
2
C75
910
00P_
0402
_50V
7K~D
1
2
R5425.11K_0402_1%~D
12
R54110K_0402_5%~D
12
C72
410
U_0
805_
10V4
Z~D
1
2
STAC9205
QFN 7x7 & LQFP 9x9 colay footprint.
U35
STAC9205X5NBEB1XR_QFN48_COMON~D
HDA_SDO5
HDA_BIT_CLK6
HDA_SYNC10
HDA_RST#11
SPDIF _OUT48
CAP2 33
AVDD1 25
AVSS242 AVSS126
SPDIF_ IN//GPIO0/EAPD47
SENSE_A 13
HDA_SDI_CODEC8
PORT_A_L 39
PORT_A_R 41
CD_L 18
CD_R 20
DMIC_CLK46
VREFFILT 27
DVDD_CORE1
DVSS7
NC143
NC244
VOL_UP/DMIC0/GPIO12
VOL_DN/DMIC1/GPIO24
PC_BEEP 12
MONO_OUT 32
AVDD2 38
SENSE_B 34
VREFOUT_A 37
PORT_B_L 21
PORT_B_R 22
VREFOUT_B 28
PORT_C_L 23
PORT_C_R 24
VREFOUT_C 29
PORT_D_L 35
PORT_D_R 36
PORT_E_L 14
PORT_E_R 15
VREFOUT_E/GPIO4 31
PORT_F_L 16
PORT_F_R 17
VREFOUT_F/GPIO3 30
CD_GND 19
DVDD_CORE9DVDD_CORE/VPP40DVDD_IO3
NC345
Thermal PAD GND49
R547 10K_0402_5%~D 12
C17
210
U_0
805_
10V4
Z~D
@
1
2
C7110.1U_0402_10V6K~D
1 2
C72110P_0402_50V8J~D
1
2
C72
510
U_0
805_
10V4
Z~D
1
2
C71
60.
1U_0
402_
16V4
Z~D
1
2
R71
039
.2K_
0402
_1%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HP_SPK_R2HP_SPK_R1
HP_SPK_L1 HP_SPK_L2
MIC_L1
VREFOUT_R
MIC_R1
AUD_MIC_BIAS
AUD_MIC_BIAS
+5V_SPK+AMP
ADU_SPK_ENABLE#
AUD_GAIN1
AUD_GAIN2
C1N
HP_SPK_R1
C1P
HP_SPK_L1AUD_GAIN1
INT_SPK_R2INT_SPK_R1
AUD_GAIN2
INT_SPK_R2
SPKR_INR_C
HP_INL_C
HP_INR_C
ADU_SPK_ENABLE#
AUD_AMP_MUTE#
AUD_AMP_MUTE#
SET
REGEN
AUDIO_AVDD_ON
SPKR_INL_C INT_SPK_R1
AUD_HP_NB_SENSE
NB_MUTE#
AUD_EAPD
MIC_L2
MIC_R2
+5V_SPK+AMP
+5V_RUN+5V_SPK+AMP
VREFOUT
+3.3V_RUN
+VDDA
+VDDA
+VDDA
+5V_SPK+AMP
+VDDA
+5V_SPK+AMP
+3.3V_RUN
+5V_SPK+AMP
+VDDA
+5V_SPK+AMP
AUD_LINE_OUT_R26
AUD_HP_NB_SENSE26,38
AUD_MIC_SWITCH26
AUD_EXT_MIC_R26
AUD_EXT_MIC_L26
AUD_INT_MIC_IN 26AUD_INT_MIC+32
AUD_INT_MIC-32
AUD_EAPD26
AUD_HP_OUT_L26
AUD_HP_OUT_R26
NB_MUTE#38
AUDIO_AVDD_ON 18
AUD_LINE_OUT_L26
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
AMP and PHONE JACK
27 58Wednesday, March 07, 2007
Compal Electronics, Inc.
Gain Setting
GAIN1 INPUTAV(inv)GAIN2
21.6dB
15.6dB
6dB
1
0
10dB
26K ohm
45K ohm
66K ohm
82K ohm
IMPEDANCE
11
0
0
0
*
1
Speaker Connector
15 mils trace
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
W=40mils
MINIMAM 150 mA
Place Close to Audio Chip Place Close to Audio Chip
ForTPA6040A,popC304,depopR584
For TPA6040A,pop C301,depop R585
For TPA6040A,popR714,depop R713
C78
30.
1U_0
402_
16V4
Z~D
1
2
C3010.033U_1206_50V7K~D@1 2
R572100K_0402_5%~D@
12
C758
1U_0603_10V4Z~D
12
C74
61U
_060
3_10
V4Z~
D
1
2
JAUDIO
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
C7301U_0603_10V6K~D
1 2
R796 0_0402_5%~D
12
MAX9789A
U37
MAX9789A_TQFN32~D
PGN
D2
21PG
ND
15
CPV
SS13
PVSS
14
SPKR_INR2
SET 1
REGEN 4
OUTL- 7
OUTL+ 6
OUTR- 19
OUTR+ 20
SPKR_INL3
HP_INR26
HP_INL27
GAIN2 32
GAIN1 31
PVD
D1
8
C1N12
HPL 16
HPR 15
VOUT 29C1P10
CPGND11
HPVDD17
CPVDD9
MUTE#25
HP_EN22
SPKR_EN#23
BIAS24
PVD
D2
18
GN
D28
VDD
30EP
33
C73
410
0P_0
402_
50V8
J~D
1
2
R5800_0402_5%~D
1 2
C7360.1U_0402_10V6K~D
1 2
R556100K_0402_5%~D
12
L49BLM18BD121SN1D_0603~D
12
R55
910
0K_0
402_
5%~D
12
C74
710
U_0
805_
10V4
Z~D
1
2C74
41U
_060
3_10
V4Z~
D
1
2
C74
010
0P_0
402_
50V8
J~D
@
1
2
R56010K_0402_5%~D
1 2
C75
61U
_060
3_10
V4Z~
D
1
2
C96
47P
_040
2_50
V8J~
D
@
1
2
C727
10U_0805_10V4Z~D
1 2
C748 0.033U_1206_50V7K~D
12
R55
14.
7K_0
402_
5%~D
12
C90
747
P_0
402_
50V8
J~D
@
1
2
C749 1U_1206_25V7K~D
1 2
C751 1U_1206_25V7K~D
1 2
R56310K_0402_5%~D
1 2
R5681K_0402_5%~D
12
U40
74AHCT1G08GW_SOT353-5~D
A2
B1 G3
Y 4
P5
C7292.2U_0805_10V6K~D
12
C23210P_0402_50V8J~D
@
1
2
C7541U_0603_10V4Z~D
1
2
C90
547
P_0
402_
50V8
J~D
@
1
2
R56
220
K_04
02_1
%~D
@
12
C7330.1U_0805_25V7K~D
1 2
R712100K_0402_5%~D
12
R573100K_0402_5%~D
12
R565100K_0402_5%~D
1 2
L47BLM18BD601SN1D_0603~D
12
C7281U_0603_10V6K~D
1 2
C74
21U
_060
3_10
V4Z~
D
1
2
R79010_0402_5%~D
@
12
G
D
S Q422N7002W-7-F_SOT323-3~D
2
13
C74
510
U_0
805_
10V4
Z~D
1
2
C752 1U_0603_10V4Z~D
12
C7310.1U_0402_10V6K~D
1 2
R570100K_0402_5%~D@
12
L48BLM18BD601SN1D_0603~D
12
R569100K_0402_5%~D
12
L50BLM18BD121SN1D_0603~D
12
JSPK
MOLEX_53398-0271~D
1122
C73
810
0P_0
402_
50V8
J~D
1
2
R5540_0402_5%~D
1 2
R5531K_0402_5%~D
12
R56
120
K_04
02_1
%~D
@
12
C75
5
1U_0
603_
10V4
Z~D
1
2
JMIC
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
R55
24.
7K_0
402_
5%~D
12
C30
40.
033U
_120
6_50
V7K~
D
@
1
2
C75
71U
_060
3_10
V4Z~
D
1
2
C7322.2U_0805_10V6K~D
1
2
R5581K_0402_5%~D
12
R713100K_0402_5%~D
12
C77 0.033U_1206_50V7K~D
12
R5555.1_0402_1%~D
12
R82
21M
_040
2_1%
~D
12
L51BLM21PG600SN1D_0805~D
1 2
C7372.2U_0805_10V6K~D
12
G
D
SQ43
2N7002W-7-F_SOT323-3~D
2
13
R7140_0402_5%~D
@1 2
R571100K_0402_5%~D
12
R56
410
0K_0
402_
5%~D
12
R58
4
0_04
02_5
%~D
12
U36ALM358DR2G_SOIC8~D
P8
IN+ 3
IN- 2G4
O1
C73
910
0P_0
402_
50V8
J~D
1
2
R567100K_0402_5%~D
12
R797 0_0402_5%~D
12
U36BLM358DR2G_SOIC8~D
P8
IN+5
IN-6 G4
O 7
R5575.1_0402_1%~D
12
C75
310
U_0
805_
10V4
Z~D
1
2
C74
110
0P_0
402_
50V8
J~D
@
1
2
C74
31U
_060
3_10
V4Z~
D
1
2
C90
647
P_0
402_
50V8
J~D
@
1
2
C73
510
0P_0
402_
50V8
J~D
1
2
R5661K_0402_5%~D
12
R585 0_0402_5%~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LOM_SI
LOM_CS#
CLK_PCIE_LOM#
GLAN_RXN_C
LAN_TX0+
LAN_TX3+
LPC_LAD3
LAN_TX3-
CLK_PCIE_LOM
GLAN_RXP_C
LOM_SCLK
LOM_ACTLED_YEL#
LAN_TX2+
NV_STRAP0
TPM_GPIO0
XTALI
LAN_TX1-
LOM_SI
LPC_LAD0
CLK_PCI_TPM
REGCTL_PNP25
IRQ_SERIRQ
LOM_SCLK
TPM_GPIO1TPM_GPIO2
CLK_PCI_TPM
LOM_SO
LOM_SPD100LED_ORG#
LOM_CS#LOM_SO
LPC_LAD1
LAN_TX0-
PCIE_WAKE#
LPC_LAD2LAN_TX2-
XTALO
LOM_SPD10LED_GRN#
REGCTL_PNP12
LAN_TX1+
REGCTL_PNP25
REGCTL_PNP12
PHYTVCOI
LOM_LOW_PWR
GPIO1_SERIAL_DI
LOM_LOW_PWR GPIO2_SERIAL_DO
LOM_SMB_ALERT#GPIO1_SERIAL_DI
PLTRST3#LPC_LFRAME#
PLTRST3#LOM_RST_R#
+3.3V_LAN
+PCIE_PLLVDD
+AVDD
+3.3V_LAN
+GPHY_PLLVDD
+AVDDL
+GPHY_PLLVDD
+PCIE_PLLVDD
+PCIE_SDS_VDD
+1.2V_LAN
+BIASVDD
+XTALVDD
+2.5V_LAN
+AVDD
+2.5V_LAN
+1.2V_LAN
+AVDDL
+3.3V_LAN
+2.5V_LAN
+1.2V_LAN
+3.3V_LAN
+3.3V_RUN
+PCIE_SDS_VDD
+BIASVDD
+3.3V_LAN
+1.2V_LAN
+XTALVDD
+2.5V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+2.5V_LAN
+1.2V_LAN+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_ALW
LAN_TX3- 29
LAN_TX1- 29
LAN_TX3+ 29
LAN_TX2- 29LAN_TX1+ 29
PCIE_RX6+/GLAN_RX+ 23
PCIE_RX6-/GLAN_RX- 23
LAN_TX2+ 29
LOM_ACTLED_YEL#29
LOM_SPD10LED_GRN#29LOM_SPD100LED_ORG#29
CLK_PCI_TPM6
ICH_SMBCLK23,34ICH_SMBDATA23,34
IRQ_SERIRQ23,30,38,39
LPC_LAD[0..3]22,38,39
LOM_TPM_EN#38
LOM_SUPER_IDDQ 38
LOM_CLKREQ# 6CLK_PCIE_LOM 6
LAN_TX0+ 29
LOM_LOW_PWR 38
CLK_PCIE_LOM# 6
PCIE_TX6-/GLAN_TX- 23
LAN_TX0- 29
PCIE_WAKE# 34,38
PCIE_TX6+/GLAN_TX+ 23
LOM_CABLE_DETECT38
LOM_SMB_ALERT#23,39
LPC_LFRAME#22,38,39PLTRST3#21,34
PLTRST3# 21,34
SB_LOM_PCIE_RST# 21
ENAB_3VLAN41
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
BCM5755M
28 58Monday, February 26, 2007
Compal Electronics, Inc.
1C4
MMJT9435
B
C2
3E
Layout Notice : 1.2V filter. Place as closechip as possible.
Layout Notice : Place as closechip as possible.
Layout Notice : No highspeed signal should berouted near RDAC or onadjacent layer to RDAC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin J8
R7, R9 are 1/2 W rating
Logic High Voltage mustbe 0.7V to 2.75V
Need to ensurecrystal at least300uW max powerdrive-level
LOM_CABLE_DETECT goes to an input on a system microcontroller that canpoll this signal periodically and can de-assert the LOM_LOW_PWR whenLOM_CABLE_DETECT signal is high. Connect to an EC GPIOC defined by theGPIO mapping.
Reserved for BCM5752as back-up solution
Atmel AT45BCM021B
ST M45PE20
0
01
10
10
0
1
11
0
(Default)
SCLK
000 0Auto-Sense Mode 0 0
NV_STRAP1 NV_STRAP0 SO CS#SI
Place R666 asclose to the ASICas possible. Padis needed tomeasure 125MHzclock fordebugging
Monitor GPHY PLL Clk
R646, R648, R649 Reserved forBCM5752 as back-up solution
Layout Notice : Place bead asclose PI3L500 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Notice : Placetermination as close asASIC as possible
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin 45
Layout Note: Place close to 1394 connector
Ground pin 129 exposed die pad, dimension5.72mm x 5.72mm, should connect to PCB solderpad of same dimension
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB SMARTCARD READER.
& USB SMARTCARDS ARE SUPPORTED.TYPE A (5V), B (3V), AB (5V/3V)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
COIN RTC Battery
Non-iAMT
C272200P_0402_50V7K~D
1
2
U12B
74LVC3G14DC_VSSOP8~D
P8
A6 Y 2
G4
C4570.1U_0402_16V4Z~D
1
2
D23RB751V_SOD323~D
2 1
JCOIN
MOLEX_53398-0271~D
1122
U27A74VHC08MTCX_NL_TSSOP14~DIN11
IN22 OUT 3
P14
G7
R136200K_0402_5%~D
12
U27C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R15910K_0402_5%~D
1 2
R79100K_0402_5%~D
12
EB
CQ84MMST3904-7-F_SOT323-3~D
2
31
EB
CQ86MMST3904-7-F_SOT323-3~D
2
31
C1990.1U_0402_16V4Z~D
1
2
R4180_0402_5%~D
1 2
R1344.7K_0402_5%~D
1 2
C490.1U_0402_16V4Z~D
1
2
R1644.7K_0402_5%~D
1 2
C
BE Q79
MMBT3906WT1G_SC70-3~D
1
2
3
U12C
74LVC3G14DC_VSSOP8~D
P8
A3 Y 5
G4
R13220K_0402_5%~D
12
D32
RB751V_SOD323~D
2 1
R208 0_0402_5%~D
12
D27
RB751V_SOD323~D
2 1
C192200P_0402_50V7K~D
1
2
U27B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
C1340.01U_0402_16V7K~D
1
2
R36710K_0402_5%~D
1 2
G
D
S
Q172N7002W-7-F_SOT323-3~D
2
13
R13
920
0K_0
402_
5%~D
12
R486 0_0402_5%~D
1 2
C40
422
00P_
0402
_50V
7K~D
1
2
C
BE
Q26MMBT3906WT1G_SC70-3~D
1
2
3
C3701U_0603_10V4Z~D
1
2
C
BE Q78
MMBT3906WT1G_SC70-3~D
1
2
3 U27D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
C172200P_0402_50V7K~D
1
2C
422
2200
P_04
02_5
0V7K
~D
1
2
R15
820
0K_0
402_
5%~D
12
C1860.1U_0402_16V4Z~D
1 2
R61
620
0K_0
402_
5%~D
12
R15
720
0K_0
402_
5%~D
12
C1350.1U_0402_16V4Z~D 1 2
R36410K_0402_5%~D
1 2D26
RB751V_SOD323~D
2 1
D33RB751V_SOD323~D
2 1
EB
CQ85MMST3904-7-F_SOT323-3~D
2
31
U12A
74LVC3G14DC_VSSOP8~D
P8
A1 Y 7
G4
D13BAT54CW_SOT323~D
32
1
C4580.1U_0402_16V4Z~D 1 2D25
RB751V_SOD323~D
2 1
D31RB751V_SOD323~D
2 1
R16010K_0402_5%~D
1 2
R13
520
0K_0
402_
5%~D
12
R207 0_0402_5%~D
12
R68
200K
_040
2_5%
~D
12
C
BE
Q20MMBT3906WT1G_SC70-3~D
1
2
3
R33410K_0402_5%~D
1 2R
8220
0K_0
402_
5%~D
12
C470.1U_0402_16V4Z~D
1
2
R1334.7K_0402_5%~D
1 2
R216 0_0402_5%~D@12
C460.1U_0402_16V4Z~D
1
2
C
BE Q77
MMBT3906WT1G_SC70-3~D
1
2
3
R211K_0402_5%~D
12
U48A
74LVC3G14DC_VSSOP8~D
P8
A1 Y 7
G4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT_GREEN_LED
BAT1_LED#
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
R_MPCI_ACT
BAT2_LED#
BATT_AMBER_LED
R_BT_ACT
SNIFFER_GREEN#
SNIFFER_YELLOW#
SNIFFER_G
SNIFFER_Y
BT_ACTIVE
SATA_ACT#_R SATA_ACT#
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN+RTC_CELL
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_WLAN
BAT1_LED#39
SCRL_LED#39
CAP_LED#39
NUM_LED#39
LED_WLAN_OUT#34
BAT2_LED#39
BATT_GREEN_LED 32
BATT_AMBER_LED 32
R_MPCI_ACT 32
R_SCRL_LED# 40
R_NUM_LED# 40
R_CAP_LED# 40
R_BT_ACT 32
SNIFFER_GREEN#39
SNIFFER_YELLOW#39
BT_ACTIVE34,40
R_PIDEACT 36
HDD_LED 32
LED_MASK#38
SATA_ACT#_R22
LED_MASK#38
WIRELESS_ON/OFF#38
SNIFFER_PWR_SW#39
BREATH_GREEN_LED 32BREATH_LED39
Title
Size Document Number R ev
Date: Sheet o fLA-3301P 1.0
PAD and Standoff
43 58Monday, February 26, 2007
Compal Electronics, Inc.
Fiducial Mark
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI CLIP
This circuit isonly needed if theplatform has theSNIFFER.
H9@H_C236B315D110
1
CLIP4EMI_CLIP
GND 1
CLIP3EMI_CLIP
GND1
R225330_0402_5%~D
12
R15
150_0402_5%~D
1 2
Q22PDTA114EU_SC70-3~D 2
13
FD2
FIDUCIAL MARK~D
1
R102100K_0402_5%~D
12
FD9
FIDUCIAL MARK~D
1
H17@H_C217B276D98
1
R18
010
0K_0
402_
5%~D
12
FD21
FIDUCIAL MARK~D
1
H26@H_C472D376
1
Y
G
D14
12-22AUYSYGC/530-A2/TR8_G/Y~D
3
21
CLIP6EMI_CLIP
GND 1
H16@H_C217B276D98
1
CLIP5EMI_CLIP
GND1 FD11
FIDUCIAL MARK~D
1
FD6
FIDUCIAL MARK~D
1
CLIP2EMI_CLIP
GND1
R71100_0402_5%~D
1 2
H7@H_C236B315D110
1
G
DS
Q23BSS138W-7-F_SOT323~D
2
13
H27@H_C472D431X376
1
R9
220_0402_5%~D
1 2
Q1PDTA114EU_SC70-3~D 2
13
Q4PDTA114EU_SC70-3~D 2
13
R1400_0402_5%~D @
1 2
H14@H_C291B236D118
1
R145330_0402_5%~D
1 2
U43
NC7SZ04P5X_NL_SC70-5~D
A2 Y 4
P5
NC
1
G3
R262 220_0402_5%~D
1 2
JSNIFF
1BS008-13130-7F_4P~D
11
22
33
44
55
66
H18@H_C217D91
1
FD12
FIDUCIAL MARK~D
1
R226330_0402_5%~D
12
FD3
FIDUCIAL MARK~D
1
Q32PDTA114EU_SC70-3~D 2
13
H5@H_C236B315D110
1
H15@H_C295D118
1
Q28PDTA114EU_SC70-3~D 2
13
R1790_0402_5%~D
1 2
H19@H_C217D91
1
H29@H_O115X31D115X31N
1
R63910K_0402_5%~D
1 2
H11@H_C315B236D118
1
FD10
FIDUCIAL MARK~D
1
H6@H_C236B256D110
1
FD15
FIDUCIAL MARK~D
1
R7410K_0402_5%~D
1 2
H8@H_C217B276D98
1
FD19
FIDUCIAL MARK~D
1
G
D
SQ29BSS138W-7-F_SOT323~D
2
13
H12@H_C315D118
1
FD18
FIDUCIAL MARK~D
1
R224330_0402_5%~D
12
H28@H_O115X31D115X31N
1
R261 220_0402_5%~D
1 2
FD5
FIDUCIAL MARK~D
1
H10@H_C236B315D110
1
FD13
FIDUCIAL MARK~D
1
C
BE
Q18MMBT3906WT1G_SC70-3~D 1
2
3
FD8
FIDUCIAL MARK~D
1
R181100K_0402_5%~D@
12
FD4
FIDUCIAL MARK~D
1
Q33PDTA114EU_SC70-3~D 2
13
R9710K_0402_5%~D@
12
C
BE
Q5MMBT3906WT1G_SC70-3~D 1
23
R2121K_0402_5%~D 1 2
CLIP1EMI_CLIP
GND 1
R63847K_0402_5%~D
12
H3@H_C315D110
1
FD17
FIDUCIAL MARK~D
1
R7810K_0402_5%~D
12
R6
220_0402_5%~D
1 2
H30@H_O115X31D115X31N
1
FD7
FIDUCIAL MARK~D
1
FD25
FIDUCIAL MARK~D
1
FD1
FIDUCIAL MARK~D
1
FD20
FIDUCIAL MARK~D
1
H1H_C146B217D91
1H2H_C146B217D91
1
FD16
FIDUCIAL MARK~D
1
FD14
FIDUCIAL MARK~D
1H13
@H_C315D118
1
H4H_C256B63D47
1
H20@H_C217B276D98
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DC_IN
-DCIN_JACK
Z4301Z4302Z4303
Z4304Z4305Z4306
+DCIN_JACK
+3.3V_ALW+5V_ALW
+5V_ALW
+DC_IN_SS
+5V_ALW
PBATT+
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
SBATT+
+DC_IN
PS_ID 39
PSID_DISABLE# 38
PBAT_PRES# 38PBAT_SMBDAT 39
PBAT_ALARM#
PBAT_SMBCLK 39
SBAT_ALARM#
SBAT_PRES# 38,50SBAT_SMBDAT 39SBAT_SMBCLK 39
DOCK_PSID36
AC_OFF39
Title
Size Document Number R ev
Date: Sheet o fLA-3301P 0.0
+DCIN
44 58Monday, February 26, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARYTHESE CAPS MUST BENEXT TO JCHG
DC_IN+ SourceZ-series AC AdaptorConnctor
ESD Diodes
Secondary Battery Connector
ESD Diodes
Primary Battery Connector
GPIO Input from EC
PD11DA204U_SOT323~D @
231
PC
40.
1U_0
603_
25V
7K~D
12
PBATT1
SUYIN_200277MR009G506ZR~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
PR
610
0K_0
402_
1%~D
12
PQ3FDS6679AZ_SO8~D
3 6
5
78
2
4
1
PR
495
0_04
02_5
%~D
@
12
PC
231
2200
P_0
402_
50V7
K~D
12
PR
1015
K_0
402_
1%~D
1
2
PD45DA204U_SOT323~D @
231
PR18433_0402_5%~D 1 2
PJP60
PAD-OPEN 4x4m
1 2
PD44DA204U_SOT323~D @
231
PC
230
0.1U
_060
3_25
V7K
~D
12
PJP1
TYCO_1734077-1~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
TYCO_1566065-2~DPJPDC1
Low_PWR 1
DC+_1 2
DC+_2 3
DC-_1 4
DC-_2 5GND_16
GND_27
GND_38
GND_49
MH
1M
H2
EB
CPQ2MMST3904-7-F_SOT323~D
2
31
PD
41D
A20
4U_S
OT3
23~D
@
231
PL6FBMA-L18-453215-900LMA90T_1812~D 1 2
PR303100_0402_5%~D
1 2
PD10DA204U_SOT323~D @
231
PR23100_0402_5%~D
1 2
PC
20.
47U
_080
5_25
V7K
~D
12
PD9DA204U_SOT323~D @
231
G
D S
PQ1
FDV301N_SOT23~D
2
1 3
PD
59V
Z060
3M26
0APT
_060
3
@
1
2
PR
124.
7K_0
805_
5%~D
12
PR
22.
2K_0
402_
5%~D
12
PC
90.
1U_0
603_
25V
7K~D
12
PD43DA204U_SOT323~D @
231
PR299
10K_0402_5%~D @
1 2
PR
710
K_0
402_
1%~D
12
PC
610
U_1
206_
25V
6M~D
12
PR20100_0402_5%~D
1 2
PR302100_0402_5%~D
1 2
PQ100AIMD2AT-108_SC74-6~D
@
5
16
PD42DA204U_SOT323~D @
231
PQ100BIMD2AT-108_SC74-6~D
@
2
43
PD
2D
A20
4U_S
OT3
23~D
231
PR304100_0402_5%~D
1 2
PR
11
240K
_040
2_5%
~D
12 PC
30.
1U_0
603_
25V
7K~D 1
2
PD53SM24_SOT23
@ 2 3
1
PR
1347
K_0
402_
1%~D
12
PR
300
10K
_040
2_5%
~D
12
PL1BLM18BD102SN1D_0603~D
12
PR22100_0402_5%~D
1 2
PJP61
PAD-OPEN 4x4m
1 2
PR
1910
K_0
402_
1%~D
12
PC
50.
1U_0
603_
25V
7K~D
12
PL2FBMJ4516HS720NT 1806~D
1 2
PR301100_0402_5%~D
1 2
PD12DA204U_SOT323~D @
231
PC
397
0.1U
_060
3_25
V7K
~D
@
12
PL32FBMA-L18-453215-900LMA90T_1812~D
1 2
PD
58V
Z060
3M26
0APT
_060
3
@
1
2
PC
1022
00P
_040
2_50
V7K~
D
12
PL34FBMJ4516HS720NT 1806~D
1 2
PR21100_0402_5%~D
1 2
PR346
0_0402_5%~D
@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+5V_ALW_BOOT
+5V_ALW_UGATE
+3.3V_ALW_LGATE
+3.3V_ALW_UGATE+3.3V_ALW_PHASE
EN_3V_5VEN_3V_5V
POK2
POK2
+3.3V_ALW_BOOT
+5V_ALW_LGATE
EN
_3V
_5V
+5V_ALW_PHASE
+15V_ALWP
POK1
+5V_ALWP
POK1
+3.3V_ALWP
+PWR_SRC
+5V_ALWP
+5V_VCC1
+3.3V_ALWP
+3.3V_ALWP
+15V_ALW
+5V_ALW+5V_ALWP
+3.3V_ALW
+5V
_ALW
2
+5V_ALWP
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALWP
GNDA_3V5V
+5V_ALW2
+DC1_PWR_SRC
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALW2
ALWON39
THERM_STP#18
ALW_PWRGD_3V_5V 39
Title
Size Document Number R ev
Date: Sheet o fLA-3301P 0.0
DC/DC +3V/ +5V
45 58Monday, February 26, 2007
Compal Electronics, Inc.
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
5 Volt +/-5%Thermal Design Current:6.2APeck current: 8.8A OCP min: 9.05A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these CAPsclose to FETs Place these CAPs
close to FETs
1.8V/1.25V/0.9V VTT
1.25 Volt +/-5%Thermal Design Current: 1APeak current: 1.4AOCP min:1.72A
PGND and GND sholud be tiedtogether at one point near the GND Pin
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Iccmax=44AI_TDC=35AOCP=65A, Intel spec=50A
PR23210_0402_1%~D
12
PR
261
2.43
K_0
402_
1%~D
12
PR
482
30K
_040
2_5%
~D
@
12
PR254 0_0402_5%~D@12
PR5130_0402_5%~D
12
PC1790.22U_0603_10V7K~D
1 2
PC
178
1U_0
603_
10V
6K~D
12
PR258
1.69K_0402_1%~D
12
PH310KB_0603_1%_ERTJ1VG103FA~D
@
12
PQ
61FD
S70
88S
N3_
SO
8~D
G2
D3
S1
PR2430_0402_5%~D
12
PQ
57
IRF7
821T
RP
BF_
SO
8~D
G4
S3
S2
S1
D5
D6
D7
D8
PC213 1000P_0402_50V7K~D
12
PC2501500P_0402_50V7K~D
1 2
PR2707.68K_0805_1%~D
12
PC
246
1500
P_0
603_
25V7
K~D
@
12
PR32910_0402_1%~D
12
PU16
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR2646.34K_0402_1%~D
12
PC
392
0.1U
_040
2_16
V7K
~D
@
1
2
PH
2
6.8K
B_0
603_
5%_E
RTJ
1VR
682J
~D
12
PR
263
4.53
K_0
402_
1%~D
12
PL44FBMA-L18-453215-900LMA90T_1812~D
@
1 2
PC
260
0.1U
_040
2_16
V7K
~D
@1
2
PC214 1000P_0402_50V7K~D
12
PC3911U_0603_10V6K~D
12
PR33010K_0402_1%~D
1 2
PR26910K_0402_1%~D
1 2
PR26710.5K_0402_1%
12
PJP31
PAD-OPEN 4x4m
1 2
PR2681K_0402_1%~D
12
PR
290
0_06
03_5
%~D1
2
PC
272
10U
_120
6_25
V6M
~D 12
PC
271
10U
_120
6_25
V6M
~D1
2
PR25982.5K_0402_1%~D
12
PR252
10K_0402_5%~D
12
PC
182
1U_0
603_
10V
6K~D
12
PR2420_0402_5%~D
12
PC
180
0.01
U_0
402_
25V
7K~D
12
PQ
56FD
S70
88S
N3_
SO
8~D
G2
D3
S1
PC
270
10U
_120
6_25
V6M
~D1
2
PC1810.22U_0603_10V7K~D
12
PR23010K_0402_1%~D
1 2
PQ
42
IRF7
821T
RP
BF_
SO
8~D
G4
S3
S2
S1
D5
D6
D7
D8
PC4092200P_0402_50V7K~D
@
12
PR26011.5K_0402_1%~D
12
PC1980.22U_0603_10V7K~D
1 2
PC
240
2200
P_0
402_
50V7
K~D
12
PC
176
10U
_120
6_25
V6M
~D
12
PC190680P_0402_50V7K~D
1 2
PR2620_0603_5%~D
12
PC
249
0.1U
_060
3_25
V7K
~D
12
PR22810_0603_5%~D
12
PQ
50
IRF7
821T
RP
BF_
SO
8~D
G4
S3
S2
S1
D5
D6
D7
D8
PR257
332_0402_1%~D
12
PC
229
0.01
U_0
402_
16V
7K~D
1
2
PC
196
1U_0
603_
10V
6K~D
12
PC
248
1500
P_0
603_
25V7
K~D
@
12
PR2410_0402_5%~D
12
PR
266
15K
_040
2_1%
~D
12
PC
412
4700
P_0
402_
25V7
K~D
@
12
PR2400_0402_5%~D
12
PC
239
0.1U
_060
3_25
V7K
~D
12
PC
223
0.1U
_060
3_25
V7K
~D
12
PR2390_0402_5%~D
12
PR508226K_0402_1%~D@
12
PR2317.68K_0805_1%~D
12
PC
193
10U
_120
6_25
V6M
~D1
2
PR249
0_0402_5%~D12
PR4790_0402_5%~D@
12
PR4870_0402_5%~D
12
PC
215
0.03
3U_0
402_
16V
7K~D
12
PR5150_0402_5%~D
12
PU10
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PL330.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PR
485
13K
_040
2_5%
~D
@
12
+
PC
380
100U
_25V
_M~D
1
2
PC
411
4700
P_0
402_
25V7
K~D
@
12
PC1870.015U_0402_16V7K~D
12
PR
233
10_0
603_
5%~D
12
PR509 0_0402_5%~D
12
PR2840_0402_5%~D
@
12
PR27110_0402_1%~D
12
PR248
499_0402_1%~D
12
PU11
ISL6260CCRZ_QFN40~D
VW8
PMON2
PSI#1
DPRSLPVR36
DPRSTP#37
VID634 VID533
RTN13
FB10
COMP9
VS
S19
VDIFF11
DFB
15
VO
16
ISEN3 21
OCSET 7
PWM3 25
FCCM 24
CLK_EN#38
VR_TT#4
RBIAS3
NTC5
SOFT6
VID028VID129VID230VID331VID432
3V3
39
VSUM 17
VSEN12
VR_ON35
PWM1 27
ISEN2 22
ISEN1 23
PWM2 26
DR
OO
P14
VD
D20
VIN
18
PG
OO
D40
GND41PU13
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC2000.22U_0603_10V7K~D
12
PC
227
0.1U
_060
3_25
V7K
~D
12
PC
413
0.01
U_0
402_
16V
7K~D
1
2
PR3317.68K_0805_1%~D
12
PR
481
0_04
02_5
%~D
@
12
PL290.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PC2430.22U_0603_10V7K~D
12
PC195220P_0402_50V8J~D
1 2PC201
330P_0402_50V7K~D
12
PR2450_0402_5%~D
12
PR2290_0603_5%~D
12
PR486
4.99K_0402_1%@ 12
PQ
60FD
S70
88S
N3_
SO
8~D
G2
D3
S1
PH1
470KB_0402_5%_NCP15WM474J03RB~D
@12
PJP30
PAD-OPEN 4x4m
1 2
PR287
0_0603_5%~D
12
PC197
1000P_0402_50V7K~D
12
PC
191
0.33
U_0
603_
10V
7K
1
2
PR238147K_0402_1%~D
12
PC
241
1U_0
603_
10V
6K~D
12
PC
228
2200
P_0
402_
50V7
K~D
12
PC
247
1500
P_0
603_
25V7
K~D
@
12
PC
224
2200
P_0
402_
50V7
K~D
12
PR2341.91K_0603_1%~D
12
PR5140_0402_5%~D
12
PR512
0_0402_5%~D
12
PR3280_0603_5%~D
12
PR2440_0402_5%~D
12
PR
480
0_04
02_5
%~D
@
12
PL310.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PC2420.22U_0603_10V7K~D
1 2
PR
516
1K_0
402_
1%~D
12
PC
177
10U
_120
6_25
V6M
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ISL88731_ICM
ISL88731_VREF
ISL88731_VDDP
CHG_LGATE
ISL88731_VDDP
CHG_UGATE
+VCHGR_L
ISL88731_VREF
ISL88731_ICM
+VCHGR_B
+VCHGR
+DC_IN_SS
+5V_ALW
CHAGER_SRC+SDC_IN
+5V_ALW +3.3V_ALW
+5V_ALW
+5V_ALW
+VCHGR
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
+5V_ALW
ACAV_IN18,39,50
ADAPT_OC 38
ADAPT_TRIP_SET38
THRM_SMBDAT18,39
THRM_SMBCLK18,39
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 0.0
Charger
49 58Monday, February 26, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+DC_IN discharge path
Vin DetectorHigh 17.9 VLow 17.24 V
Maximum charging current is 6.24A
PC
112
0.1U
_060
3_25
V7K~
D
12
PR
363
13K_
0402
_1%
12
PR
150
16.2
K_04
02_1
%~D
@
12
PC
127
2200
P_04
02_5
0V7K
~D
@
12
PC384
0.22U_0402_6.3V6K
1 2
PR
362
57.6
K_04
02_1
%~D
12
PU19ALM393DR_SO8~D
IN+3
IN-2O 1
P8
G4
1SS
355_
SOD
323~
DP
D54
@
21
PR368
0_0603_5%~D
1 2
PC
212
0.01
U_0
402_
25V7
K~D
@
12
PR
149
10K_
0402
_1%
~D1
2
PC
258
0.01
U_0
402_
25V7
K~D
12
PC9910U_1206_25V6M~D
12
PC
114
10U
_120
6_25
V6M
~D 12
PD
40R
B75
1V_S
OD
323~
D
@ 21
PC
120
0.1U
_040
2_10
V7K~
D
@
12
PC253220P_0402_50V7K~D@
12
PC
128
0.1U
_060
3_25
V7K~
D
@
12
PC
254
0.1U
_040
2_25
V7K~
D
12
PR
473
10_0
402_
1%~D
1
2
PR1380.01_2512_1%~D
4
2
1
3
PC
256
100P
_040
2_50
V8K
12
PC
379
10U
_120
6_25
V6M
~D
12PC
122
1U_0
603_
10V6
K~D
@
12
PR1450.01_2512_1%~D
4
2
1
3
PR47533.2K_0402_1%~D
@
1 2
PR361
8.45K_0402_5%~D
1 2
PR
341
15.8
K_04
02_1
%~D
12
PC
121
0.1U
_040
2_10
V7K~
D
@
12
G
D
SPQ81RHU002N06_SOT323
2
13
PC
119
0.01
U_0
402_
25V7
K~D
12
PJP65
PAD-OPEN1x1m
1 2
PC
106
10U
_120
6_25
V6M
~D1
2
PR373
1K_0603_1%~D
@12
PU19BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PC110
0.01U_0402_25V7K~D
12
PC2210.1U_0402_10V7K~D
12
PU8
ISL88731_TQFN28~D
UGATE 24
CSOP 18
PHASE 23
VFB 15
SDA9
ICM8
NC
1
DCIN22
ACIN2
VDDSMB11
SCL10
ACOK13
NC14
BOOT 25
NC 16
ICOMP4
VDDP 21
VCC 26
CSS
P28
CSON 17
PGND 19
LGATE 20
VCOMP6
NC5
CSS
N27
VREF3
NC7
GND12
GND29
PR
472
10_0
402_
1%~D
1
2
PC
113
10U
_120
6_25
V6M
~D 12
PR
364
105_
0402
_1%
~D 12
PC
257
100P
_040
2_50
V8K
12
PJP62
PAD-OPEN 4x4m
1 2
PC
104
0.1U
_060
3_25
V7K~
D
12
PL20
5.6U_HMU1356-5R6_8.8A_20%~D
12
PR2750_0603_5%~D
1 2
PQ75
SI4
800B
DY
-T1_
SO8~
D
365 7 8
2
4
1
PR
366
100K
_040
2_1%
~D 12
PC
259
10P
_040
2_50
V8J~
D
@
12
PC
267
3300
PF_0
402_
50V7
K~D
@
12
PR27433_0603_1%~D
12
PC
103
2200
P_04
02_5
0V7K
~D
12
PC
118
0.01
U_0
402_
25V7
K~D
12
PR
474
1K_0
402_
5%~D
@1
2
PC2041U_0603_10V6K~D
1 2
PQ79
SI4
800B
DY
-T1_
SO8~
D
365 7 8
2
4
1
PC2021U_0603_10V6K~D
1 2PC102
1U_0805_25V4Z~D
12
PR3600_0603_1%~D
12
PR
148
2.2K
_040
2_5%
~D 12
PC
255
100P
_040
2_50
V8K
12
PR14349.9K_0402_1%~D
12
PC
105
10U
_120
6_25
V6M
~D1
2
PC
393
0.01
U_0
402_
25V7
K~D
12
PR146
0_0402_5%~D
1 2
PR
367
100K
_040
2_5%
~D1
2
PC
203
0.1U
_060
3_25
V7K~
D
12
PC383
0.22U_0402_6.3V6K
1 2
PR3651M_0402_1%~D 1 2
PR142215K_0402_1%
12
PQ76
SI4
810B
DY
-T1-
E3_S
O8~
D
S3
D6
D5
D7
D8
S2
G4
S1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PBAT_G
CHG_PBAT_N
CHG_PBATT_N
CHG_SBATT_N
CHG_SBATT_NCHG_SBAT
SBAT_G
CHG_PBAT
CHG_SBAT_N
+SDC_IN
+VCHGR
+PWR_SRC
+VCHGR
+PWR_SRC
PBATT+
PBATT+
SBATT+
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
SBATT+
PBATT+
CHG_PBATT38
CHG_SBATT38
ACAV_IN18,39,49
SBAT_PRES#38,44
PBAT_DSCHG38
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 0.0
Selector
50 58Wednesday, February 28, 2007
Compal Electronics, Inc.
+DC_IN discharge path
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
G
D
SPQ74RHU002N06_SOT323
2
13
G
D
S
PQ64RHU002N06_SOT323
2
13
G
D
S
PQ68RHU002N06_SOT323
2
13
PQ70SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
PR31947K_0402_1%~D
1 2
G
D
S
PQ73RHU002N06_SOT323
2
13
PQ71SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
PQ69SI4835BDY-T1-E3_SO8~D
3 65
78
2
4
1
PQ62
SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
PU15TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
PC2340.1U_0603_25V7K~D
1 2
PR32410K_0402_5%~D
1 2
PR
305
10K_
0402
_5%
~D1
2
G
D
S
PQ63RHU002N06_SOT323
2
13
PR
318
33K_
0402
_5%
~D
12
PR
320
470K
_040
2_5%
~D
12
PD50
RB715F_SOT323
2
31
PD47B540C~D
2 1
+
PC
382
100U
_25V
_M~D
1
2
PR31210K_0402_5%~D
12
PC
232
2200
P_04
02_5
0V7K
~D
12
PR321147K_0402_1%~D
1 2
PU14BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PR310100K_0402_5%~D
12
PR
317
10K_
0402
_5%
~D
12
PQ72SI4835BDY-T1-E3_SO8~D
3 65
78
2
4
1
PD51
RB715F_SOT323
2
31
PR308100K_0402_5%~D@
12
PR
326
32.4
K_04
02_1
%~D
12
PR322100K_0402_5%~D
1 2
PR325100K_0402_5%~D
1 2
PR
311
33K_
0402
_5%
~D
12
PC
236
0.1U
_060
3_25
V7K~
D
@ 12
PQ66SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
PR
323
42.2
K_04
02_1
%~D
12
PR30610K_0402_5%~D
12
PD48
RB715F_SOT323
2
31
FDS4935BZ_SO8~D
PQ65
G2 2D28
S1 3D15
S2 1D27
G1 4D16
PU14ALM393DR_SO8~D
IN+3
IN-2 O 1
P8
G4
PR307100K_0402_5%~D
12
PC
233
0.1U
_060
3_25
V7K~
D
12
PR30910K_0402_5%~D
12
PC
237
0.1U
_060
3_25
V7K~
D
12
PR
314
470K
_040
2_5%
~D
12
PR313100K_0402_5%~D
12
PC2350.1U_0603_25V7K~D
1 2
PR
315
470K
_040
2_5%
~D
12
+
PC
381
100U
_25V
_M~D
1
2
PR31647K_0402_1%~D
1 2
PD49B540C~D
2 1
G
D
S
PQ67RHU002N06_SOT323
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDVOB_GREEN+
DVI_TX2+SDVOB_BLUE+
INT-
SDVOB_RED-
DVI_TX2-
+VSWING
DVI_SCLK
DVI_TX1-
DVI_TX0-
DVI_CLK+
SDVOB_BLUE-
DVI_TX1+
DVI_CLK-
SDVOB_GREEN-
DVI_TX0+
INT+
DVI_SDATA
SDVOB_RED+
DVI_TX2-
DVI_TX1-
DVI_TX0+
DVI_TX0-
DVI_CLK+
DVI_CLK-
+VCC
+SPVCC
+SVCC
+PVCC1
+PVCC2
+AVCC
DVI_TX2+
DVI_TX1+
SDVO_CTRLCLK
SDVO_CTRLDATA
+1.8V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+AVCC
+3.3V_RUN
+5V_RUN
+1.8V_RUN
+AVCC
+3.3V_RUN
SDVOB_BLUE+12
SDVOB_INT+12SDVOB_INT-12
SDVOB_RED+12SDVOB_RED-12
PLTRST1#10,21
SDVOB_CLK+12
SDVOB_GREEN+12
SDVOB_CLK-12
SDVOB_GREEN-12
DVI_DETECT36
SDVOB_BLUE-12
SDVO_CTRLDATA 10SDVO_CTRLCLK 10
DVI_SDATA 36DVI_SCLK 36
DVI_TX2+ 36
DVI_TX2- 36
DVI_TX1+ 36
DVI_TX1- 36
DVI_TX0- 36
DVI_TX0+ 36
DVI_CLK- 36
DVI_CLK+ 36
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Internal LVDS
51 58Monday, February 26, 2007
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
08/2/200638 HW Compal BID change to X01 Pop R108, depop R106 X01
HW18 X01Change Q102, to SOT323 packageChange SOT23 package to SOT323 packageCompal08/10/20062
73 08/21/2006 Compal BITS issue WI86517 (S5 state back driver issue) Change R324 pin1 connect from +3.3V_ALW to +3.3V_SUS
4 08/21/2006 Compal Bits issue WI84312 (Derating issue) Change R151 from 30 ohm to 75 ohm
HW
HW
X01
X01
5 23 08/21/2006 Compal Bits issue WI86509 Populate R761 and change value from 100k to 10k. Change R761 pin1 connect from +3.3V_ALW to +3.3V_SUSHW X01
7 39 08/21/2006 Compal Bits issue WI86511 Add R401 (100K) for signal BC_DAT pull up to +3.3V_ALWHW X01
8 Bits issue WI86512Compal08/21/200637 X01Change R131 to no-stuff and from 4.7k to 100k per SMSC HW
9 23 08/21/2006 Compal Bits issue WI86516R509 PU for SIO_EXT_SMI# change from +3.3V_ALW to+3.3V_SUS to prevent backdrive through the ICH in S4/S5HW X01
10 08/21/2006 Compal Bits issue WI86518 Swap PSID GPIO from ECE5018 pin 71 with MEC5025ITP_DBRESET#/HDT_RESET# pin 55 HW X0138,39
11 08/21/2006 Compal Bits issue WI86531 Move BEEP (ECE5018 GPIOB[6]) to SGPIO46 of MEC502538,39 HW X01
Bits issue WI86752Compal08/21/200612 X01Change pull-up rail for R773 from +5V_SUS to +3.3V_SUSHW18
08/30/2006 Compal Bits issue WI8653013 21 HW Move SB_NB_PCIE_RST# to GPIO4/PIRQG# pinF12 per M08design, add R631 (20K ohm) for pull down X01
09/7/2006 Compal Bits issue WI8652914 21 HW X01Move SB_WLAN_PCIE_RST# to GPIO3/PIRQF# U32 pin G11 perM08 direction, add test point T1 on pin F18
09/7/2006 Compal Bits issue WI86376. Due to increase in number ofpayloads the BIOS is carrying15 39 HW X01Change U23 from ( ST M25P80 8M bit ) to ) MXIC
MX25L1605AM2C 16M bit )
09/11/2006Change Q5 to MMBT3906WT1G, R15 to 150 ohm. Add R638 onLED_WLAN_OUT# pull up to +3.3V_WLAN. Add R639 (10K ohm)in series on LED_WLAN_OUT#
16 43 Compal Bits issue WI90535 X01HW
09/14/2006 Remove ITP port and just keep ITP test point 17 7 Compal Briscoe ESD/EMI Improvement Requests on PT X01HW
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
09/14/200623 HW Compal Bits issue WI89409 No stuff R516, add R690 (8.2K ohm) for pull up ICH8 pinAF22 to +3.3V_SUS X01
25 HWAdd Q68, Q69, R691, R692 for HDDC_EN and MODC_ENcircuits 26 09/14/2006 Compal Bits issue WI89407 X01
32 EMI solutions Populate RS232 C152,153,154,155,156,157,158,159. ResumeICH_AZ_MDC_BITCLK C656,R123,C128. Add R790,R791,C232,C267. Change L63,L65 from 0603size to 0805size. AddC309,C316 for LOM. Add C427,C463 for LVDS. Add fuse F3,R792 for CRT. Populate C660, R545 (10 ohm),C721 (10P)
X0137,22,33,28,19,20
HW 09/15/2006 Compal
33 23,36 HW Bits issue WI92298Move SIO_EXT_SCI# from to ICH8 GPIO11/SMBALERT# pin AG22to GPO12 pin AC19. Remove D22 and R761 and net DOCK_DET# X0109/18/2006 Compal
2334
X01ICH8 Pin AG22 tie to LOM_ICH_SMBALERT#. Add R793 (0 ohm)series on LOM_ICH_SMBALERT# and LOM_SMB_ALERT#. ChangeR730 pull up rail from +3.3V_ALW to +3.3V_LAN. Add R807pull up to +3.3V_SUS for LOM_ICH_SMBALERT#Bits issue WI9229909/18/2006HW Compal
35 X01Move ALW_PWRGD_3V_5V from MEC5025 pin 18 to MEC5025pin 29. Remove 3.3V_5V_SUS_PWRGD from MEC5025 pin 2939 HW 09/18/2006 Compal Bits issue WI92301
36 X01Swap DOCK_SMB_PME and DOCK_SMB_ALERT# from MEC5025 pin3and ECE5028 pin7609/18/2006HW38,39 Bits issue WI92305Compal
X01Change R669 to from 1.15K to 1.13K. Depop C771 & C772.Change C861 and C862 to 22pFBits issue WI92858HW Compal09/20/20062842
HW Bits issue WI92857 Add no-stuff series 0-ohm for ITP_DBRESET# on ECE502843 38 X0109/20/2006 Compal
HW44 WWAN noise issue Add R808,R809,R810,R811 series for LCD_DDCCLK,LCD_DDCDATA, LCD_SMBCLK, LCD_SMBDAT19 09/20/2006 Compal X01
Remove R586 and make JMDC pin2 NCBits issue WI93157HW X01Compal09/21/20063345
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Changed-List History
54 58Wednesday, February 14, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
53 30 HW 10/05/2006 Compal Bits issue WI95910 Change R603 from 6.2k to 5.9k.Change C805 from 820pF to 270pF X01
54 10/05/2006No stuff R227, R221, C89, C93, C97, c401, C92, r72,C90, C88. Change R369 to 3.3K 1%. No stuff C775-C781,C785. No stuff R514 (no iAMT). Populate R515.
38,2312,27,6 HW Compal Bits issue WI95932 X01
HW55 Dell10/14/2006 Bits issue WI97539 Added signal DOCK_DET# to JDOCKBpin137, pin205 andQ3pin2 X0236
HW 10/17/2006 Dell Bits issue WI97840Add 0.1 uf (0402) caps on +Vcc_Core to Gnd. Fourtotal, bottom of board. (C870 ~ C873)56 9 X02
HW 10/18/2006 Dell Bits issue WI98222 (Change for ASF2.0 due to ICH8M errata )23571. No stuff R502, R5032. Connect the pad of R503.2 to the pad of R498.23. Connect the pad of R502.1 to the pad of R499.2
X02
Board ID Changed to X02Dell10/24/2006HW3858 Populated R106, R107. Depopulated R108, R109. X02
HW 10/27/2006 Dell Bits issue WI100037. Intel CRT noise issue59 13Change L36 to 100 ohm resistor and change C722 to 22nF.Replace C569 with a 0603 1uF cap X02
HW 10/30/2006 Dell60 23 Bits issue WI100049 X02
61 51 HW 11/2/2006 Dell Bits issue WI100826Change Change R812, R813 from 9.09K_1% to 13.7K_1%.Change R253, R254 from 2.94K_1% to 4.32K_1% X02
62 28 HW 11/7/2006 Dell Bits issue WI102451 Change L64,L66,L67,L68 from BLM18AG601SN1D toBK1608LM182. Change R668 to L88 BK1608LM182.Change L63,L65 from BLM21AG601SN1D to BK2125LM182. ChagneC850,C852,C856,C858 to 47pF caps. Change C849 to 1000pF.Populate C863, C864
X02
63 6,23,34 HW 11/8/2006 Dell Bits issue WI103311 Change R309 from 8.2K to 2.2K. No stuff R820.No stuff R550 X02
65 39 HW 11/14/2006 Dell Bits issue WI103986 Change C379 from 22pF to 33pF per KDS X'tal report X02
Add R816,C874 for USB_IDE#. R817,C875 for SIO_EXT_WAKE#.R819,C876 for PCIE_MCARD1_DET#. R820,C878 forUSB_MCARD1_DET#. R818,C877 for USB_MCARD2_DET#. Removenet RSVD_GPIO6 and R513
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Changed-List History
55 58Wednesday, March 07, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HW89 Bits issue WI125145.DPST enablement for UMA Populate R156 (0_0402_5%)19 2/28/2007 Compal A00
93 27 HW A00Change U40 from 74AHC1G08 to 74AHCT1G083/7/2007 Dell Bits issue WI127300
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 1.0
Changed-List History
55 58Wednesday, February 28, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HW66 Bits issue WI105207Change net name from +5V_ALW2 to +3.3V_ALW2 at R618.1,R626.1, R623.1, R621.1, R766.1, R765.125,41 11/20/2006 Compal X03
38,39 HW 11/21/2006 DellChange R794 pin1 from +5V_ALW to +3.3V_ALW.Change R245 pin1 from +3.3V_ALW to +5V_ALW X0367 Bits issue WI105754
Add 100kohm resistor R721 between U35 pin 40 and+3.3V_RUN and 1000pF cap C759Dell11/21/2006HW26 X03Bits issue WI105758. Updates for potential Back Drive 68
Change R253, R254 from 2.94K_1% to 5.23K_1%.Change R812, R813 from 9.09K_1% to 16.5K_1%51 HW 12/1/2006 Dell X0369 Bits issue WI100826
21,23,34 Please populate R820 with a 4.7k-ohm resistor. Movesignal PCIE_MCARD2_DET# from ICH8m GPIO20 pinAE11 toPIRQH#/GPIO5 pinB3. Delete R457 and netICH_GPIO5_PIRQH#. Populate R550
HW 12/1/2006 Dell X0370 Bits issue WI106999
41 HW Populate C208 12/1/2006 Dell X0371 Bits issue WI107466. +2.5V_LAN in-rush current test fai.
72 27 HW 12/6/2006 Dell Bits issue WI107896 Change R554 from 10K to 0 ohm X03
Dell12/6/2006HW36,3873 X03Change net DOCK_SMB_PME to DOCK_SMB_PME#Bits issue WI108259. Per M08 GPIO map rev A15 Change list
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
2 PWR
3 PWR
4 PWR
5
PWR
6
7
8
9
10
11
12
13
14
15
48/50 Elick change the AL CAP to 2000hrchange PC380 from SF10004M08L to SF000000S8L.change PC381 from SF10004M08L to SF000000S8L.change PC382 from SF10004M08L to SF000000S8L.
45BITS-WI91007change to correct part for 15ALW.
change to PSL of DELL
change PD55 from SCSB717F08L to SCS00001U8L.change PD56 from SCSB717F08L to SCS00001U8L.
48
44
44 PWR
change PH2 from SL20000030L to SL200000F8L
change PL1 from SM01001680L to SM010008U0L.
change PL2 from SM01001418L to SM010009C8L.change PL34 from SM01001418L to SM010009C8L.
LA-3301P
0.1
0.1
0.1
0.1
DELL
DELL
DELL
DELL
BITS-WI89364The 0.9V_DDR_VTT_PWRGD net is not used at the MEC5025.The 0.9V_DDR_VTT_PWRGD net should be no connect at the MEC5025 pin 73.
46 remove PR437, PR438, PR441, PQ93 and PQ94. DELLPWR
BITS-WI90985following DELL rule
Change PC285 pin 2 pad connection from PGND to AGND.45 PWR DELL
0.1
0.1
0.1BITS-WI90999Change PQ83 from FDS8880 to BSC079N03SG PPAK
Change PQ83 from SB000004U8L to SB000004D8L.DELLPWR45
BITS-WI91012change to correct current limits
Change PR383 from 124k(SD03412438L) to 150K(SD03415038L).Change PR382 from 187k(SD03418738L) to 226K(SD03422638L).
45 PWR DELL
BITS-WI91287following DELL rule Depopulate PR415 and PR416 resistors.DELL9/14PWR
47
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
0.1
0.1
BITS-WI91288Change PQ86 from SI4392DY to SI4682DY.
change PQ86 from SB54392008L to SB000006N0L 0.147 PWR 9/14 DELL
BITS-WI91291be compliant with the reference schematic.
Change PR274 from 4.7 ohm(SD000006T8L) to 33 ohm(SD014330A8L). Populate PR373 and PD54. 0.1DELL9/14PWR49
BITS-WI91374following DELL rule Change PR408 from 75K(SD03475028L) to 82.5K(SD00000278L). 0.1DELL9/14PWR47
BITS-WI91672Change in 1.25V_RUN_PWRGD circuit.
Change the node name connected to pin 2 of PR431from +3.3V_ALW to +3.3V_SUS.Depopulate PR431.
46 PWR 9/14 DELL 0.1
BITS-WI91689DC IN schematic changes.
Change PL1 from SM01001680L to SM010008U0L.Change PQ100 from SI2301BDS(SB923010020) to PQ100A depopulated IMD2A(SB000009N8L).Change PQ101 from SI2301BDS(SB923010020) toPQ100B depopulated IMD2A(SB000009N8L).Change PR12 from 10K,0603(SD01310028L) to 4.7K,0805(SD00247018L).
DELL9/14PWR44
0.1
change to PSL of DELL
change to PSL of DELL
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 0.6
Changed-List History 2
Wednesday, February 28, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
18 PWR
19
20
16 PWR
17 PWR
21
22
23
24
25
27
28
46 9/15 DELL BITS-WI92156correct the current limit on 1.25Voutput
change PR425 from 39.2K(SD03439228L) to 51.1K (SD03451128L)0.1
46 9/15 DELLBITS-WI91655Add 0.1uF connected to the pins 1 and 2 of PU24
Add PC410(SE042104K8L). One pad connected to the pins 1 and 2 of PU24 . The other pad is connected to PGND.
0.1
46 9/15 DELLBITS-WI91929correct the current limit on 1.8Voutput
change PR426 from 110K(SD03411038L) to 130K (SD03413038L) 0.1
48 PWR 9/18 DELLBITS-WI92465improve transients at load dump.and reduce jittering.
Add depopulate PR516(SD03410018L) and depopulate PC413(SE076103K8L)between pin 9 of PU11 and AGND.Add depopulated PC411(SE075472K8L),4700pF between pin 14 of PU11 and AGND .Add depopulated PC412(SE075472K8L),4700pF between pin 15 of PU11 and AGND
0.1
44 PWR 9/21 DELL0.1
BITS-WI91689change PL1 from BK1608HM to BLM18BD102SN1D. change PL1 from SM010008U0L to SM010007C8L.
48/50 PWR 9/21 DELLBITS-WI87563change populate PC380 from 25CE100AX to 25CE100LSchange PC381 from 25CE100AX to 25CE100LSchange PC382 from 25CE100AX to 25CE100LS
change populate PC380 from SF000000S8L to SF000000T8L.change PC381 from SF000000S8L to SF000000T8L.change PC382 from SF000000S8L to SF000000T8L.
0.1
62 62
49
49
49
49
PWR
PWR
PWR
PWR
9/29
9/29
9/29
9/29
DELL
DELL
DELL
DELL
match Maxim's response time of ICM input to comparator.
change PR361 from 0 Ohm (SD02800008L) to 8.45K (SD00000068L).change PC254 from 0.01uF 25V (SE068103K8L) to 0.1uF 16V (SE076104K8L). 0.1
ICM is voltage source and does not need this component. depopulate PR150. 0.1
Increase BW from 20kHz to 25kHz while maintaining 80degrees phase margin. change PR148 from 4.7K (SD03447018L) to 10K (SD03410028L). 0.1
following DELL rule depopulate PD54 and PR373 0.1
26
45,46,47 PWR 10/27 DELL
BITS-WI99902This is to add an optional ultrasonic modein case the regulators experience an audible noise.
Add PR517(SD02800008L) between pin 29 of PU20 and AGND .Add PR518(SD02800008L) between pin 29 of PU22 and AGND .Add PR519(SD02800008L) between pin 29 of PU21 and AGND .
0.2
0.2Add bead to connect +PWR_SRC to +CPU_PWR_SRC Add PL44(SM01002078L) to parallel PJP30.10/27 DELLPWR48
10/3146 PWR DELL BITS-WI100140Change PR429 from 0 ohm to 1 ohm change PR429 from 0 Ohm (SD01300008L ) to 1 Ohm(SD013100B8L).
0.2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3301P 0.6
Changed-List History 3
58 58Wednesday, February 28, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DELL29 49 PWR 11/16BITS: WI102613 Change PR148 from 10K_0402_1% to 2.2K_0402_5%
change PR148 from 10K 0402 1% (SD03410028L ) to 2.2k 0402 5%(SD02822018L) 0.3
30 45 PWR 11/20 DELLBITS-WI105401Add node name +3.3V_ALW2 for the traceconnected to the pin 5 (VREF3) of PU20.Populate PC285 with 0.1uF cap.
Add node name +3.3V_ALW2 between pin5 of PU20 and PC285.Populate PC285. 0.3
31 49 PWR 12/06 DELLBITS-WI106278make sure that PC113, PC114 and PC379 are X5R/X75 caps, need to stuff PC379. change PC379 is populated. 0.3
32 48 PWR 12/06 DELL
BITS-WI108223Change PC187 from 10nF to 15nF. Change PR258 from 2.21K to 1.69K. Populate PR516 with 1K resistor. Populate C413 with 0.01uF.
change PR187 from 10nF(SE076103K8L) to 15nF(SE076153K8L).change PR258 from 2.21K(SD03422118L) to 1.69K(SD00000JB8L).populate PC413.populate PR516.
0.3
33 49 PWR 01/25 ELICK change to new part number for PSLchange PR138 from SD021100D8L to SD021100D3L(S RES 1W .01 +-1% 2512 FOR M08 PROJECTS)change PR145 from SD021100D8L to SD021100D3L(S RES 1W .01 +-1% 2512 FOR M08 PROJECTS)
0.4
34
35
45/47 PWR 02/05 DELLBITS-WI119945 Increase current limits for 3.3V and 1.5V regulators.
change PR382 from 226K to 267k (SD02822018L).Change PR408 from 82.5K to 100K(SD03410038L).
0.4additional 1206 resistor on +VCHGR for Maxim solution.
add an unpopulation PR520 (1.8K 1206 1%(SD00000JN8L))between +VCHGR to PGND.
DELL02/06PWR49
360.4
49 PWR 02/12 DELL delete 1206 resistor on +VCHGRnot to implement for Maxim solution.
delete not to
delete an unpopulate PR520 (1.8K 1206 1%(SD00000JN8L))between +VCHGR to PGND.