1 | Page pnkondekar/resume/May2015 Curriculum Vitae 1) Name: Pravin Neminath Kondekar 2) Father’s Name Neminath Babaorao Kondekar 3) Present Postal Address A-203 Swami Sadan Apartments Above Yes Bank, GPO Square, Civil Lines, Nagpur-440 001 Telephone: (R) +91-712-2533915 4) Email: [email protected], [email protected]5) Telephone a) Mobile (91-9425805445) b) Land Line (0761-2632236) c) Fax: (0761-2632524) 6) Nationality Indian 7) Date of Birth 10 th March 1961 8) Educational Qualifications Degree (Subjects) Institution/School/ University Year Remarks SSC (X) HSC (XII) F.E. (first year engineering) B. E (E &T/C) Electronics & Telecommunication M. Tech (EDT) Electronic Design & Technology Ph. D (Electrical Engg) Microelectronics/ Nano electronic Devises Nutan Vidya Mandir Parbhani Shri Shivaji Mahavidyalaya Parbhani Govt. College of Engineering, Aurangabad Marathwada University Govt. College of Engineering (CoEP) PUNE University *CEDT, Indian Institute of Science, IISc, Bangalore Electrical Engineering Department, Indian Institute of Technology Mumbai, (IIT Bombay) March 1977 June 1979 June 1980 June 1983 Jan 1989 July 2003 Merit Scholarship PCM (87%) GATE Admission Test Score 96% in Electronic Engineering Received Excellent Grade (A+) for Project prototype Duration of Ph.D (Approx 3.Years, 3 months)
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1 | P a g e pnkondekar/resume/May2015
Curriculum Vitae
1) Name: Pravin Neminath Kondekar
2) Father’s Name Neminath Babaorao Kondekar
3) Present Postal Address A-203 Swami Sadan Apartments
4 Shashank Dubey Ph.D ( 2.5 Years) Stress analysis for Fin FETs (Ongoing)
5 Kaushal Nigam Ph.D (1.5 Years ) Tunnel FETs and Their Performance (Ongoing)
6 Bhaskar Awdiya Ph.D (1.0 Years) Circuit Implementation of Steep SS TFET (Ongoing)
1 Apurba Chakraborty M.Tech Driving Current Improvement Analysis of Tunnel FET. (Completed)
2 Manish Yadav M.Tech Comparative analysis of Finfet. (Completed)
3 Pankaj Yadav M.Tech Trigate Organic FET (Completed)
4 Deep Aghari M.Tech Organic FET performance using different materials (Completed)
5 Pankaj Jha M.Tech Performance Estimation of Gate-Inside Junctionless Transistor (GIJLT)- A Novel Device Structure (Completed)
6 Ishu Agrawal M.Tech Performance Analysis of Double Gate Tunnel FET (Completed)
7 Ankit Dixit M.Tech Performance Enhancement of Lateral I-MOS Using Simulation and Characteristics (Completed)
8 Pankaj Wakhradkar M.Tech Super Junction SiC Power Devices (Completed)
9 Rai Narendra Suresh M.Tech (IV)
High Electron Mobility Transistor Study & Application (Ongoing)
10 Hemant Kumar Bhardwaj M.Tech (IV)
Study of Process Variations on Strained Fin FETs (Completed)
11 Shashank Kumar Banchhor M.Tech (IV)
Schottkey-TunnelFET Modeling (Completed)
4 | P a g e pnkondekar/resume/May2015
12. Publication (Separate list at the end)
14. Short-term Course/Workshop/Seminars Organized
1) Successfully organized a National level conference on recent trends in electronic circuit design,
UTKARSH’97 at RKN Engineering College for which I worked as Chairman.
2) Actively involved in the organization of International Conference on VLSI-Technology VSDT 2001
at IIT Mumbai
3) “TCAD tools for Semiconductor Device and Circuit Simulation with hands on training” A 3 days
Workshop opens for all interested students and faculty. Experts from Industry and reputed institutes
like IITB were arranged. 40 participants from all around have taken the benefit of this workshop
4) “Research trends in nanofabrication with TCAD simulation with hand on training” WON 2013, 25th
to 27th
May, Workshop on Nanofabrication
15. Arranged Distinguished Lectures at IIITDM Jabalpur
a)“Building India where dreams come true – journey to an exciting professional career” by Padmshree Prof.
Deepak Phatak of IIT Mumbai (Open for all and attended by more than 150 participants)
b)“Multi-disciplinary Research Opportunities in Nanotechnology” by Prof. V.Ramgopal Rao, Bhatnagar Awardee,
from IIT Mumbai, attended by approx. 80 PG/UG students
16. Administrative Experience
Member Board of Governors, IIITDM Jabalpur, From Dec-2014 onward….. Head of Dept. ECE, IIITDM from Jan 2010 to July 2012 and Aug 2014 onwards….
Transparency Officer , IIITDM Jabalpur from Jan 2014 (Under RTI Act-2005)
Head Counseling Services , IIITDM Jabalpur from June 2011 onward…
Chairman, Placement Cell, IIITDM Jabalpur from May 2011~ Aug 2013
Chairman Internship Board, IIITDM Jabalpur from April 2011 ~ Aug 2013
Member of CRC- Curriculum Review Committee, IIITDM 2010-till today
Convener PG Admission (M.Tech./Ph.D) committee IIITDM May 2010, and May 2015
Member Recruitment committee (2010) for technical staff at IIITDM Jabalpur.
Member of Institute Advisory Group for General Administration of IIITDM (IAG-GA Member 2010~)
Dean, Faculty of Engineering, Symbiosis International University, Pune Dec 2008 to Nov 2009
Director, SIT Symbiosis Institute of Technology, Lavale, Pune Oct 2008 to Sept. 2009 (New Institute)
Member IT advisory committee/ Member Purchase Committee, Symbiosis Society, SIU Pune
Member of International Admission Committee for PG in South Korea (KAIST and Konkuk University)
Worked as HoD for Electronic Design Technology at RKN College of Engineering Nagpur.
Member Moderation Committee in Nagpur University during 1990-1998
No of Papers Published
Single Author
No of Papers Published
Jointly
No of Papers in Seminar, Workshop
International
Journal/Proceedings
(18)
International
Journal/Proceedings
(20)
International Seminars
(4)
National Journal/Proceedings
(1)
National Journal/Proceedings
(0) National Seminars
(2)
5 | P a g e pnkondekar/resume/May2015
17. Awards and Recognition
Biography is published in the America’s Marquis Who’s Who of the World 2006
National Merit Scholarship from SSC onward for Higher Education
18. Teaching Experience, New Courses and Labs (Development)
Title Level (UG/PG) Number of Times
Developed by you or not
1. a) Solid State Device Physics b) Analog CMOS-IC Design 2. Engineering Literacy (Lab) 3. Noise reduction techniques in electronic equipments. 4. Reliability of electronic equipment.
1 .Electronic Devices &Circuit Design (Fundamental of Electronic Devices )(+Lab) 2. CMOS VLSI design (+Lab) 3. Solid Sate Electronic Devices 4. Electronic devices and circuit 5. Design of electronic circuits (+Lab) 6. Digital circuit and logic design 7. Circuit theory (+Lab) 8. Linear Integrated Circuits (+Lab) 9. Electronic Instrumentation and Measurements 10. Electronic and Electrical components and Materials 11. Basic Electrical Engineering
PG UG (I year) UG (III Year) UG (III Year
UG(II year) PG UG UG UG UG UG UG UG UG UG
4 4 2 3 3
7 3 4 10 6 5 8 4 4 3 6
Developed by Me for IIITDM Developed by Team lead by me at IIITDM Developed by me based on CEDT ( First time in Nagpur University) Developed by me based on CEDT ( First time in Nagpur University)
Existing ( Modified by me to add design approach at IIITDM) Existing (Modified by me at KAIST S.Korea) ) Existing (At KAIST) Existing (At KAIST and INDIA) Exisiting at Konkuk University S. Korea Existing (At KAIST and INDIA Exisiting at Konkuk University S. Korea Existing Existing Existing (modified by me ) Existing
6 | P a g e pnkondekar/resume/May2015
19. Books Authored/Planned
Planning to publish a book on
1) “Engineering Literacy” a Noval New Subject/Concept, which, we have introduced for the First Year of
Engineering at our Institute based on the collection of most commonsense oriented and essential knowledge for
all engineers across all disciplines which includes Lab Demonstrations. e.g. Earthing connection in Domestic
wiring, Specifications of energy saving gadgets, along with all Computer related etc.
2) A student friendly book on “Electronic Devices and Circuit Design” is almost ready
20. Countries Visited
Participated in many International conferences to present my work at Dallas, USA, Singapore, Bangkok
Thailand, Hong Kong, Malaysia, Australia, South Korea, Spain, and Egypt
21. Project (Sponsered)
22. Professional Experience
Publicity Chair, and Member of Advisory committee, for the First IEEE Sponsored International Conference on
“Control, Automation, Robotics and Embedded System” CARE-2013 at IIITDM Jabalpur in Dec 2013
Period Sponsoring Organization Title of Project Amount of Grant
Co-Investigators
(if any)
Aug 1983~
Oct 1984
Morris Electronics Ltd. Pune
Replacement of Alnico Magnet with hard ferrite and transformer soft-ferrite core characterization (funded project)
Rs 8 Lac
Oct 2006~ Dec 2009
Ministry of Information Through Information and Communication University (KAIST) Govt of Korea
RF Semiconductor Device Modeling and Characterization (as initial funding)
US $ 25000/-
Dec 2013 Mar. 2014
INUP(Indian Nano-electronic User Program) IITB Short-term Projcet
Sub-threshold characteristics investigation of fabricated Vertical IMOS & TCAD validation and modeling using device physics
---------------
9th Sept. 2014~2018 (Submitted)
DST (Dept. of Science and Technology) Govt. of India through SERB
Investigation of Emerging Nano-electronic Devices & Nano-electro-mechanical Devices & Systems (NEMS) as High Sensitivity Chemical/Bio-Sensors.
Rs 1.37 Cr Under Review
Dr Neeraj Jaiswal IIITDM J
May. 2015~2020 (5 Years )
DeitY Govt of India Special Manpower Development Program for VLSI (SMDP) (funded project)
Hardware & Software Support (~Rs 65 Lacs)
Dr Jawar Singh
7 | P a g e pnkondekar/resume/May2015
Worked as Center In-charge for conducting various competitive examinations/written test for a) Indian Railway
Recruitment Board (10 times) b) Maharashtra State Electricity Board Recruitment of Junior Engineers c) State
Bank of India Recruitment of officers, at RKN Engineering College, Nagpur
Invited Speaker on topic “Electronic Product Design from EMI/EMC considerations” International Design
workshop at IIITDM, DEW 2010
Chair the session on Device Modeling at IEEE ICM’2010, 18~24 Dec 2010 (International Conference on
Microelectronics), Cario, Egypt.
Steering Committee Member for “International Design Workshop on leading edge theories and practices in
design” Oct 2010 at IIIT DM Jabalpur
Invited by AUK the Discrete Semiconductor Devices Manufacturing Company Iksan South Korea for presenting
talk on Super-junction Power MOSFET on 4th Sept 2007.
Invited by National Security Research Institute of South Korea to present a talk on EMI/EMC reduction
techniques for PCB design.
Chaired the session and also to present my work on Power devices in IEEE Tencon 2004 held at Ching Mai,
Thailand.
Chaired Session at IEEE CIMSim 2013 at Seoul, South Korea
Worked as Observer for JEE (Mains) April 2012 and April 2014, appointed by CBSC New Delhi
Department of electronic engineering, Konkuk University, Seoul, invited me for presenting seminar on the
“CMOS VLSI- the current trend & technology
Conducted and organized the Minimum competition vocational courses teacher training program (3
months duration) funded by Maharashtra Govt. through DTE (Continuously for 2 Years at RKN Engg
College Nagpur)
23. Institute Building Activities
As Prof & Head ECE Established A Micro/Nano Computational Lab (June 2010) and already Simulation tools
such as Synopsis and Cadence and Silvaco tools are procured and already 10 Masters + 5, PhD students working
on Project of Finfets and MOS device Simulation and Characterization at IIIT DM Jabalpur
As Guest House In charge for the newly constructed on campus 38 room, recently, I will be leading the
committee to formulate and procure the Furniture for the entire Guset House including Entrance, Lobby
conference room Kitchen etc. We have taken almost 6 meetings and about finalize the tender document for the
furniture with great look and quality and durability
As a Transparency officer (TO): I appealed all my faculty colleagues to upload their information and a brief CV
and their link for the course/research website to the main website. 2) Also requested the institute administration
time to time the Senate & BoG meetings minutes without delay in accordance with Suo-moto disclosure and also
took immense efforts to reduce the number of RTI applications.
The Institute authority decided to root all the tender draft documents before uploading/publishing through TO.
Which has tremendously increased my workload? But that exercise has resulted in a great amount of cost saving,
in addition to providing equal opportunity and motivation to the guanine vendors/service provider to Institute.
As Head Counseling Services, June 2011, at IIITDMJ, We have developed strong team of 70 students,
who will work as counselor and student guides who are 24/7 ready to help to all those students who are
8 | P a g e pnkondekar/resume/May2015
under stress, feeling homesick, frustrated due to their academic performance, or their personal problems
including financial one! Since our Institute is fully residential this team of counselors proved to be very
useful for suffering students and these teams taking rounds of meetings gives very useful and
constructive feedback/suggestion to institute management for various policies. I have aggressively
convinced the institute authorities not to create stressful/negative environment for student just by
suggesting few changes in the prevailing rules and their faulty implementation
All these have resulted in creating a positive campus environment. A program of Academic Mentorship
for the academically week students under faculty mentorship is now being proposed
As Member of the Student Gymkhana, IIITDMJ, Election Reform, helped identifying the limitations
of the system and helped in successful conduction of a series of meeting with UG/PG students, for
convincing the new reforms, committee’s recommendation were implemented from Jan 2012 and all
student community and faculty appreciated the improvement in culture on campus and resulted a very
successful conduction of events “ABHIKALPAN-2012” and “TARANG-2012” without any
controversies among student representatives delete this line
As Chairman Placement Cell, IIITDMJ, from May 2011~ Aug 2013, changed the policy for campus
placement for students, which resulted in offering dream job choice to academically excellent students; I
was personally involved in designing the “Placement Brochure-2011” for the institute, which resulted in
an excellent quality Brochure which was appreciated a lot. I managed to have a Most Active Placement
Cell office in term of student interaction and IIITDM Students appreciated a lot, the efforts and struggle
made by placement cell for providing good opportunities
o Visited Many Industries in Banglaore, Delhi, Pune, Hydrabad, Mumbai, and successfully
conducted meeting with HR personnel, presenting our Institute Strengths. This is the first time,
that corporate world started recognizing the presence our Institute and many of the excellent
companies empanelment process is successfully achieved
o Successfully Managed to convince the public sector company BEL (Bharat Electronics Limited)
Who suddenly cancelled their (well in advance) announced visit to institute for recruitment. I
personally visited the Head quarter at Bangalore and somehow could convince them about the
feelings of the students eagerly waiting for this opportunity. Finally on the last day of the term in
May 2012 BEL visited IIITDM and happy recruited 13 students in one go of ECE and ME
disciplines. This effort was appreciated by all ( All these 13 students Joined BEL)
23. Other Contributions
Actively involved in getting MoU between IIT Bombay and KAIST-ICU (Information and Communication
University, Daejeon South Korea), IIT Bombay’s Director, Ashok Mishra signed the General MoU on 27th July
2007.
Research Member faculty of IREC “Intelligent Radio Engineering Centre” Funded by the centre of excellence of
Ministry of Science, Ministry of Information and Communication Korea , School of Engineering, Information
and communication University, Daejeon
Advisor for identifying institutes of potential from India for recruiting research engineers for ETRI (Electronic
and Telecom Research Institute, Daejeon South Korea) Oct 2006 to Jan 2008
After completion of M.Tech (Electronic design and technology) from CEDT, IISc Bangalore, in Jan. 1989, I
joined as Assistant Professor in Shri Ramdeobaba Kamala Nehru Engineering College in Dec.1989. Here, I was
9 | P a g e pnkondekar/resume/May2015
instrumental in development of PCB Lab. Facilities along with Prototype Development Lab for converting the
project work in to a prototype product.
As a Guest house in charge at IIITDMJ, I have formulated the policy for the allotment priority, and effective
maintenance and cleanliness where the guest of the institute will enjoy their stay and wish to visit again.
Received very good response & Evaluation from students for teaching and the 155 (Korean) students registered
my “Electric Circuit Analysis” at UG level which is record in itself
24. Details of Experience of Organizing Events:
Sr.
No. Name of the Event Place held
Duration
Position held
From To
1.
“WON” A 3 Days Workshop on
nanofabrication and Nano electronics
http://won2013.iiitdmj.ac.in/
PDPM IIITDM
Jabalpur
25th
May
2013
27th
May
2013
Convener
2. Workshop for Hands on training on Circuit
Simulation CEDENCE
PDPM IIITDM
Jabalpur
17th
Feb
2012
18th
Feb
2012
Coordinator
3. Distinguished Lecture by Padma Shri (Prof.)
D. B. Phatak (IIT Bombay)
PDPM IIITDM
Jabalpur
9th
Jan
2012
-- Organizer
4.
Distinguished Lecture by Shanti Swarup
Bhatnagar Awardee, Prof. Ramgopal Rao
(IIT Bomaby)
PDPM IIITDM
Jabalpur
27th
Dec
2011
-- Organizer
5. International Design Workshop on leading
edge theories and practices in design
PDPM IIITDM
Jabalpur
Oct
2010
Steering
Committee
member
6.
The Fourth Indo-Japan Joint seminar on
micro/nano manufacturing”, Sponsored by
Ministry of Science and Technology, Govt.
of India and Japan’s Society for Promotion of
Science (JSPS)
Symbiosis Institute
of Technology, Pune
8th
March
2009
11th
March
2009
Coordinator
7.
IEEE- International Conference on
Control,Automation, Robotic & Embedded
Systems
PDPM IIITDM
Jabalpur
16th
Dec
2013
18th
Dec
2013
Committee
Member
Publicity
8. IEEE- International Conference on VLSI-
Technology VSDT 2001 IIT Bombay
Dec
2001 3 Days
Member
Organizing
Committee
9. National level conference on recent trends in
electronic circuit design, UTKARSH’97
RKN Engineering
College Nagpur
10th
Oct
1997
3 Days Chairman
25. Experience of Working with International Bodies / International Exposure: