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CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts
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CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Jan 05, 2016

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Page 1: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

CSNB374: Microprocessor Systems

Chapter 5: Procedures and Interrupts

Page 2: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedures A procedure is a group of instructions that

usually performs a particular task. Also called subroutine, method or function. Allows the same piece of code to be reused

multiple times. Save memory space. Makes it easier to write program.

A procedure begins with the PROC directive and ends with the ENDP directive. Both are preceded by the procedure’s name.

Page 3: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedures The directive PROC is followed by the procedure

type: NEAR or FAR. NEAR is used for local procedures.

Means that the statement that calls the procedure is in the same segment as the procedure itself.

NEAR procedure is assumed if the procedure type is not defined.

Most procedures are NEAR procedures. FAR is used for global procedures.

i.e. the procedure is called by other programs. Means that the calling statement is in different segment.

General procedure syntax: Name PROC Type

; Body of the procedureRETName ENDP

Page 4: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedure Call The instruction used to call a procedure

is CALL. Syntax:

CALL procedure_name For NEAR procedure call, the CALL

instruction will cause: The return address to be saved on the

stack. More specifically the offset address of the next

instruction, which is contained in the IP register. The IP register to be loaded with the offset

address which points to the procedure.

Page 5: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedure Return We can return back to the instruction

from where the procedure is called by using the RET instruction. There must be at least one RET instruction

in the procedure. The RET instruction will cause the return

address to be removed from the stack and loaded into the IP register. Will cause the program to leave the

procedure and continue executing the instruction after the CALL instruction.

Page 6: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedure Call and Return

MAIN PROC

CALL PROC1next instruction

PROC1 PROCfirst instruction

RET

Page 7: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedure Call (Before CALL)

MAIN PROC

CALL PROC1next instruction

PROC1 PROCfirst instruction

RET

Code SegmentOffset address

00100012

0200

IPStack Segment

0100

00FE

00FC

Offset address

SP

Page 8: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedure Call (After CALL)

MAIN PROC

CALL PROC1next instruction

PROC1 PROCfirst instruction

RET

Code SegmentOffset address

00100012

0200IP

Stack Segment

0100

00FE

00FC

Offset address

SP0012

Page 9: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedure Return (Before RET)

MAIN PROC

CALL PROC1next instruction

PROC1 PROCfirst instruction

RET

Code SegmentOffset address

00100012

0200

IP

Stack Segment

0100

00FE

00FC

Offset address

SP0012

0300

Page 10: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Procedure Call (Before CALL)

MAIN PROC

CALL PROC1next instruction

PROC1 PROCfirst instruction

RET

Code SegmentOffset address

00100012

0200

IPStack Segment

0100

00FE

00FC

Offset address

SP0300

Page 11: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Passing Parameters to Procedure Procedures should be made general

enough so that it can operate on any value. Therefore, we need to be able to pass

parameters to a procedure. There are three ways to pass parameters

to a procedure. Pass through registers Pass through memory Pass through stack

Page 12: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Passing Parameters to Procedure Pass through registers:

Parameters are put inside pre-defined registers. The procedure will read the specified registers

to get the parameters. Pass through memory:

Parameters are put inside pre-defined variables. The procedure will read the specified variables

to get the parameters. The variable can be accessed either using its

name or using a pointer (a register which contains the offset address of the variable).

Page 13: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Passing Parameters to Procedure Pass through stack:

Parameters are pushed into stack before the procedure is called.

The procedure will then pop the stack to get the parameters.

Need to be aware that the return address is also pushed into the stack.

A procedure may also return values to the calling procedure. Can also be achieved by passing through

registers or memory.

Page 14: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Passing Parameters to Procedure If a procedure is to be used by other

people, it needs to be properly commented to specify how the parameters are passed and returned.

When a procedure performs its operation, it may need to use one or more registers. If this is the case, the registers to be used must

also be specified in the comments. This will prevent the procedure from overwriting

the registers used by the calling procedure.

Page 15: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Passing Parameters to Procedure A procedure can also be designed not

to overwrite any register. If any register were to be used inside the

procedure, the value of the register must first be pushed into the stack.

When the procedure is done using the register, the value is popped back from the stack into the register.

From the calling procedure point of view, nothing is changed.

Page 16: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Interrupts An interrupt is an event that causes the

CPU to stop executing the current program and execute a procedure to handle the interrupt. The procedure called by an interrupt is called

interrupt service routine or interrupt handler. It operates much like a procedure call, but

may happen automatically. There three types of interrupts:

Hardware interrupt Software interrupt Processor exception

Page 17: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Hardware Interrupt Allows hardware devices to interrupt the

operation of the CPU. For example, when a keyboard key is

pressed, the CPU must be interrupted to read the key code in the keyboard buffer.

The Intel processor has three pins that are related to hardware interrupt: INTR NMI (non-maskable interrupt) INTA

Page 18: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Hardware Interrupt

Page 19: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Hardware Interrupt The general operation of a hardware

interrupt goes as follows: The hardware that needs service sends an

interrupt request signal to the processor through the INTR pin.

The processor acknowledges by sending an interrupt acknowledge signal through the INTA pin.

The interrupting device responds by sending an 8-bit interrupt number on the data bus.

This interrupt number identifies the interrupt service routine to be executed, as is unique for each device.

Page 20: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Hardware Interrupt The processor suspends the current task it

is executing and calls the interrupt service routine.

The interrupt service routine services the hardware device and then returns back to the task that the processor was executing.

Interrupts can be enabled/disabled using the I bit in the flag register. The instruction STI enables interrupts. The instruction CLI disables interrupts.

Page 21: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Hardware Interrupt The NMI pin is an interrupt input pin

which cannot be disabled. An interrupt on this pin will invoke the Type

2 interrupt. This NMI pin is normally used to signal

major faults such as: Memory and I/O parity errors, which may

indicate bad chips. Power failures

Page 22: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Software Interrupt Software interrupt is used by programs to

request system services. It occurs when a program calls an interrupt

service routine using the INT instruction. Syntax:

INT interrupt_number The processor will treat the software

interrupt number the same way as the interrupt number generated by a hardware device.

Page 23: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Processor Exception Exception occurs when a condition

arises inside the processor that requires special handling.

Example: The divide instruction may cause a divide by

zero or a divide overflow error. This will cause an interrupt of Type 0. The processor will then executes the

interrupt service routine for interrupt Type 0 to handle this error.

Page 24: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Interrupt Vector Interrupt vector refers to the area in memory

which contains the addresses of interrupt service routines.

Located in the first 1024 bytes of memory (000000H – 0003FFH) in real mode.

In protected mode, the interrupt vector contains the interrupt descriptor table.

There are 256 interrupt vectors. Numbered from 0 – 255 (or 0H – FFH).

Each interrupt vector contains 4 bytes. The first 2 bytes contain the offset address of the

interrupt service routine. The last 2 bytes contain the segment address of the

interrupt service routine.

Page 25: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Interrupt Vector To find the interrupt

vector for interrupt number n, we just need to multiply n by 4.

Example: Interrupt 9 Offset address = 9 x

4 = 36 = 0024H. Segment address =

0024H + 2 = 0026H.Offset of INT 0

Segment of INT 0

Offset of INT 1

Segment of INT 1

Offset of INT FF

Segment of INT FF

0000

0002

0004

0006

03FC

03FF

Address Memory words

Page 26: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Interrupt Vector Intel reserves the first 32 interrupt vectors.

Interrupt Type 0 – 31 (or 0H – 1FH). These are where the BIOS interrupts are located. The first five of these are the same in all Intel

microprocessors (Interrupt Type 0 – 4). The operating systems may load its

interrupt service routine addresses in subsequent interrupt vectors. DOS interrupts can be found in Interrupt Type

20H – 3FH. Other interrupt vectors are available to

users.

Page 27: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

BIOS Interrupts Interrupt 0H: Divide error

Generated after DIV/IDIV instruction if divide overflow or divide by 0 occurs.

Interrupt 1H: Single-step / trap Generated after execution of each

instruction if the trap flag bit (TF) is set. Interrupt 2H: Non-maskable interrupt

Generated when a logic 1 is placed on the NMI input pin.

Page 28: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

BIOS Interrupts Interrupt 3H: Breakpoint

The only single-byte interrupt instruction. Commonly used to store a breakpoint in a program

for debugging. Interrupt 4H: Overflow

Generated when the instruction INTO (Interrupt if Overflow) is called and the overflow flag (OF) is set.

Interrupt 5H: Print Screen Generated when the Print Screen key is pressed. Also generated when the BOUND instruction is called

and the value given is outside the boundary specified.

Page 29: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

BIOS Interrupts Interrupt 6H: Undefined Opcode

Generated when an invalid instruction is encountered in a program.

Interrupt 7H: Coprocessor not available Generated when an attempt is made to

execute a floating-point instruction and no numeric coprocessor is not available.

Interrupt 8H: Timer Implemented by the system timer circuit. The timer circuit generates Interrupt Type 8

once every 55ms (18.2 times per second).

Page 30: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

BIOS Interrupts Interrupt 9H: Keyboard

Generated every time a keyboard key is pressed and released.

The interrupt service routine will read the scan code and store it in the keyboard buffer.

Interrupt 10H: Video Video driver – used by software programs.

Interrupt 13H: Disk I/O Disk driver – used by software programs.

Page 31: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

BIOS Interrupts Interrupt 14H: Serial port communication

Communication driver – used by software programs. Interrupt 16H: Keyboard I/O

Keyboard driver – used by software programs. Interrupt 17H: Printer I/O

Printer driver – used by software programs. Interrupt 1AH: Real time clock

Allows a program to get and set the real-time clock (RTC).

Interrupt 1CH: Time tick Called by INT 8 service routine. Users may write own service routine to perform

timing operations.

Page 32: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

DOS Interrupts Interrupt 20H: Program terminate

Allows a program to return control to DOS. However, INT 21H function 4CH is more

convenient for this purpose. Interrupt 21H: Function request

Provides functions for doing keyboard, video and file operations.

Interrupt 27H: Terminate but stay resident Allows a program to stay in memory after

termination.

Page 33: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

User-defined Interrupt Service Routines There are many situations where it is useful to

write our own interrupt service routines. Create new interrupts on the unused interrupt

numbers. Replace the default BIOS interrupt service routine.

When interrupt occurs, it will perform the operations specified by our interrupt service routine rather than the default BIOS operations.

The interrupt service routine itself is just a normal procedure.

The only difference is that the last instruction is IRET instead of RET.

However, there are extra steps required to make it an interrupt service routine

Page 34: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

User-defined Interrupt Service Routines Steps required to set up an interrupt

service routine. Save the current interrupt vector. Place the addresses of the user-defined

interrupt service routine in the interrupt vector.

Restore the previous vector when terminating the program.

There are two INT 21H functions that can be used to get and set interrupt vectors.

Page 35: CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

User-defined Interrupt Service Routines INT 21H, Function 25H

Set interrupt vector Input: AH = 25H

AL = Interrupt numberDS:DX = Address of ISR

Output: None INT 21H, Function 35H

Get interrupt vector from vector table Input: AH = 35H

AL = Interrupt number Output: ES:BX = Address of ISR