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CSE245: Computer-Aided Circuit Simulation and Verification Lecture Note 5 Numerical Integration Spring 2010 Prof. Chung-Kuan Cheng 1
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CSE245: Computer-Aided Circuit Simulation and Verification

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CSE245: Computer-Aided Circuit Simulation and Verification. Lecture Note 5 Numerical Integration Spring 2010 Prof. Chung-Kuan Cheng. Numerical Integration: Outline. One-step Method for ODE (IVP) Forward Euler Backward Euler Trapezoidal Rule Equivalent Circuit Model Convergence Analysis - PowerPoint PPT Presentation
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Page 1: CSE245: Computer-Aided Circuit Simulation and Verification

CSE245: Computer-Aided Circuit Simulation and

VerificationLecture Note 5

Numerical Integration

Spring 2010

Prof. Chung-Kuan Cheng

1

Page 2: CSE245: Computer-Aided Circuit Simulation and Verification

Numerical Integration: Outline

• One-step Method for ODE (IVP)– Forward Euler– Backward Euler– Trapezoidal Rule– Equivalent Circuit Model

• Convergence Analysis

• Linear Multi-Step Method

• Time Step Control

2

Page 3: CSE245: Computer-Aided Circuit Simulation and Verification

Ordinary Difference Equaitons

.condition initial given the intervalan in

)(

),()(

:(IVP) Problem Value Initial Solve

00

00

x,T][t

xtx

txfdt

tdx

N equations, n x variables, n dx/dt.

Typically analytic solutions are not available

solve it numerically

3

Page 4: CSE245: Computer-Aided Circuit Simulation and Verification

Numerical Integration

Forward Euler

Backward Euler

Trapezoidal

0 0

( )( , )

( )

dx tf x t

dtx t x

4

Page 5: CSE245: Computer-Aided Circuit Simulation and Verification

Numerical Integration: State Equation

Forward Euler

Backward Euler

5

Page 6: CSE245: Computer-Aided Circuit Simulation and Verification

Numerical Integration: State Equation

Trapezoidal

6

Page 7: CSE245: Computer-Aided Circuit Simulation and Verification

7

Equivalent Circuit Model-BE• Capacitor

( ) ( ) ( )tCv t t v t i t t

+

C

-

+

-

( )v t t

( )i t t

( )i t t

Ceq tG

( )v t t

+

-( )C

eq tI v t

( ) ( ) ( )C Ct ti t t v t t v t

Page 8: CSE245: Computer-Aided Circuit Simulation and Verification

8

Equivalent Circuit Model-BE• Inductor

( ) ( ) ( )tLi t t i t v t t

+

L

-

+

-

( )v t t

( )i t t

( )i t t

Leq tR

( )v t t

+

-( )L

eq tV i t

( ) ( ) ( )L Lt tv t t i t t i t

Page 9: CSE245: Computer-Aided Circuit Simulation and Verification

9

Equivalent Circuit Model-TR• Capacitor

2( ) ( ) ( ( ) ( ))tCv t t v t i t i t t

+

C

-

+

-

( )v t t

( )i t t

( )i t t

2Ceq tG

( )v t t

+

- 2 ( ) ( )Ceq tI v t i t

2 2( ) ( ) ( ) ( )C Ct ti t t v t t v t i t

Page 10: CSE245: Computer-Aided Circuit Simulation and Verification

10

Equivalent Circuit Model-TR• Inductor

2( ) ( ) ( ( ) ( ))tLi t t i t v t v t t

+

L

-

+

-

( )v t t

( )i t t

( )i t t

2Leq tR

( )v t t

+

-2 ( ) ( )L

eq tV i t v t

2 2( ) ( ) ( ) ( )L Lt tv t t i t t i t v t

Page 11: CSE245: Computer-Aided Circuit Simulation and Verification

Trap Rule, Forward-Euler, Backward-Euler All are one-step methods xk+1 is computed using only xk, not xk-1, xk-2, xk-3... Forward-Euler is the simplest No equation solution explicit method. Backward-Euler is more expensive Equation solution each step implicit method most stable (FE/BE/TR) Trapezoidal Rule might be more accurate Equation solution each step implicit method More accurate but less stable, may cause oscillation

Summary of Basic Concepts

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Page 12: CSE245: Computer-Aided Circuit Simulation and Verification

12

Stabilities

Froward Euler

0 -1

h

stable

unstable

j

1k k k

k k

x x hx

x x

1k k kx x h x

11 0(1 ) (1 )kk kx h x h x

Page 13: CSE245: Computer-Aided Circuit Simulation and Verification

Difference EqnStability region 1-1

1z h

Im(z)

Re(z)

Im

Re

Forward Euler

ODE stability region

2

t

Region ofAbsolute Stability

FE region of absolute stability

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Page 14: CSE245: Computer-Aided Circuit Simulation and Verification

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Stabilities

Backward Euler

1 1

1 1

k k k

k k

x x hx

x x

1 1k k kx x h x

11 0

1 1( )

1 1k

k kx x xh h

0 1

h

1-h

stable

unstable

j

Page 15: CSE245: Computer-Aided Circuit Simulation and Verification

Difference EqnStability region 1-1

Im(z)

Re(z)

Im Backward Euler 1

1z h

Region ofAbsolute Stability

BE region of absolute stability

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Page 16: CSE245: Computer-Aided Circuit Simulation and Verification

16

Stabilities

Trapezoidal

1 1

1 1

( )2k k k k

k k

k k

hx x x x

x x

x x

1 1( )2k k k k

hx x x x

11 0

1 12 2( )

1 12 2

kk k

h h

x x xh h

0 1

h

1+h/2

stable

unstable

-1

1-h/2

j

Page 17: CSE245: Computer-Aided Circuit Simulation and Verification

Convergence• Consistency: A method of order p (p>1) is

consistent if

• Stability: A method is stable if:

• Convergence: A method is convergent if:

Consistency + Stability Convergence

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Page 18: CSE245: Computer-Aided Circuit Simulation and Verification

A-Stable

• Dahlqnest Theorem:– An A-Stable LMS (Linear MultiStep) method

cannot exceed 2nd order accuracy

• The most accurate A-Stable method (smallest truncation error) is trapezoidal method.

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Page 19: CSE245: Computer-Aided Circuit Simulation and Verification

Convergence Analysis: Truncation Error

• Local Truncation Error (LTE):– At time point tk+1 assume xk is exact, the difference between

the approximated solution xk+1 and exact solution x*k+1 is called

local truncation error.

– Indicates consistancy

– Used to estimate next time step size in SPICE

• Global Truncation Error (GTE):– At time point tk+1, assume only the initial condition x0 at time t0

is correct, the difference between the approximated solution xk+1 and the exact solution x*

k+1 is called global truncation error.

– Indicates stability

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Page 20: CSE245: Computer-Aided Circuit Simulation and Verification

LTE Estimation: SPICE• Taylor Expansion of xn+1 about the time point tn:

• Taylor Expansion of dxn+1/dt about the time point tn:

• Eliminate term in above two equations we get the trapezoidal rule

LTE 20

Page 21: CSE245: Computer-Aided Circuit Simulation and Verification

Time Step Control: SPICE• We have derived the local truncation error

the unit is charge for capacitor and flux for inductor

• Similarly, we can derive the local truncation error in terms of (1)

the unit is current for capacitor and voltage for inductor

• Suppose ED represents the absolute value of error that is allowed per time point. That is

together with (1) we can calculate the time step as

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Page 22: CSE245: Computer-Aided Circuit Simulation and Verification

Time Step Control: SPICE (cont’d)• DD3(tn+1) is called 3rd divided difference, which is given

by the recursive formula

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