CSE 242A Integrated Circuit Layout Automation Lecture: Floorplanning Winter 2009 Chung-Kuan Cheng.

CSE 242A Integrated Circuit Layout Automation

Lecture: Floorplanning

Winter 2009

Chung-Kuan Cheng

Outlines Introduction Representations and Approaches

Constraint Graph Triangulation Tutte’s Duality Slicing Flooplanning Nonslicing ...

Block Handling Research Directions

Introduction Input A set of blocks with constraints on

area, shapes, relative positions, Constraints on chip area and aspect ratio, Netlist. Output Shapes, Locations, Pin positions of the

blocks Objective Functions Performance, chip area, and wire length

Representations

Constraint Graph

Theorem: A V or H constraint graph is planar and acyclic.

i j

ijd

i

j

ijd

horizontal edge

vertical edge

j i ij

j i ij

x x d

y y d

Constraint Graph Generation

# Edges O(n2), O(n)

Constraint Graph Generation

Scan from left to right at cur_x;Update scaline: list of blocks crossing scanline.For blocks T strating at cur_x;

Insert T into scanline list…R->T->S …

Generate edgesR->T and T->S

End

Constraint Graph Generation 2

Scan from left to right at cur_x;Update scanline: list of blocks crossing scanline.For blocks T starting at cur_x;

Insert T into scanline list: …R->T->S …Generate list:T.top=R, R.bot=T, T.bot=S, S.top=T

EndFor block T ending at cur_x;

if T.top is list in scanline, generate edge T.top->T;if T.bot is list in scanline, generate edge T->T.bot

EndEnd

Floorplan Triangulation

Floorplan with zero dead space

Floorplan with dead space

Triangulation

For floorplan with zero dead space, H & V constraint graphs are dual.

H & V Every face is a triangle All internal nodes have a degree >= 4 All cycles that are not faces have length >= 4

Triangulation 2

Node oriented vs edge oriented constraint graph

ab

ce

d

f g

18

2

3

4

5

6 7 10

Tutte’s Dualitys

c

d

t

b

a

a

b

t

d

c

s

Slicing Floorplan & General Flow

V

H

V

H

H

2 1 54 3 6

Nonslicing

Routing Region Definition & Ordering

Straight ChannelL Shaped

a

1

2

b

3

c

a 2 1

b

c

Non-Feasible Order Feasible Order

Polish Expression

1

3

4

2 5 7

6

v

H

H

V

V

H

2 1 5 7 4 3 6

2 1 H 5 7 V 4 3 H 6 V H V

Given n components, there are n-1 operators Polish Exp has 2n-1 length

Polish Exp is legal iff # operators <= # comps – 1 For any prefix substring

2 1 H5 7 V 4 3 H 6 V H V

2 1 5 H 7 V 4 3 H 6 V H V

2 1 5 H V H V 7 4 3 6 H V

Redundancy of Polish Exp

1 2 3

V

V

1 2 3

V

V

2 31

1 2 V 3 V1 2 3 V V

No consecutive operators of the same type

Neighborhood Structure

OP. Chain: VHVHV… or HVHV… 2 3 V 1 4 H 5 V 6 H V V M1: Swap adjacent components M2: Complement a chain M3: Move an operator under the prefix

constraint of “# operators <= # comps – 1”

5

3

1 24

5

4

1 23

3 5

4

1 2

34

5

1 2

45

3

1 2

4 53

21

2

1

3 5

4

1 2 V 3 H4 V 5 H

1 2 V 4 H 3 V 5 H

1 2 V 4 H 3 5 V H

1 2 V 4 3 H 5 V H

1 2 V 4 3 5 H V H

1 2 H 4 3 5 H V H

1 2 H 4 3 5 V H V

The choices of macro cell

3

2

1

4

H

V

H

2 3 41Hi Hj

( ) ( ) ( )ij i jH w H w H w

Hierarchy Floorplan

K=2

K=3

K=4

a b

cd

e

a1

a2

a3a4

a5 a6

a11

a12

a13a14

b1 b2

b3 b4 b5

Sequence Pair

1

2

ab ba ab ba

ab ab ba ba

ab

b

a

a

bb a

Eg. c a e b d

a b c d e

ec

a b d#combinations 2( !)n

Grid System Interpretation

5

4

3

2

1

1 2 3 4 5

c

e

a

b

d

x

a r

l b

Perturbation: move a component to another room

Bounded-Sliceline Grid

BSG Adjacency Graphs

Theorem: nxn grid contains the complete solution space for n components

Twin Binary Trees

Definition of Twin Binary TreesTransformations between Floorplan and

Twin Binary Trees

Twin Binary Trees T T T T

00 900 1800 2700

C+-neighbor: 00 T-junction, block on right 2700 T-junction, block on top

C--neighbor: 900 T-junction, block on top 1800 T-junction, block on left

A B

00

A

B2700

A

B900

AB

1800

AB C

DE

F

C

B

A

E

D

FX 1

1

0

0 1

X X X

0

1

0

10

F

A

D

B

C

E

Twin Binary Trees

(1)=11001

(2)=00110

order(1)=order(2)=ABCDFE

Twin Binary Trees and Mosaic Floorplan

Twin Binary Tree Mosaic Floorplan: one to one mapping

Transformation between twin binary trees andmosaic floorplan takes linear complexity

#twin binary trees = Baxter number

Corner Block List

Corner Block List Mosaic Floorplan A permutation and two 0-1 lists

e.g. S=(fcegbad), L=(001100), T=(001010010)

Corner Block List

S=(fcegbad), L=(001100),

T=(001010010) S is the reversed sequence of removed

blocks L[i] is the removing direction of block i Number of ‘0’s before ith ‘1’ in T is the

number of blocks covered by S[i] when it is removed

Corner Block List

Redundancy (L and T are not independent) Solution space size O(n!23n-3/n1.5) Can be reduced to O(n!23n-3/n4), no

redundancy

Floorplan Optimization Flow Simulated annealing (SA) in the

representation solution spaces := s0; e := E(s) // Initial state, energy.sb := s; eb := e // Initial "best" solutionk := 0 // Energy evaluation count.while k < kmax and e > emax // While time remains & not good enough: sn := neighbour(s) // Pick some neighbour. en := E(sn) // Compute its energy. if en < eb then // Is this a new best? sb := sn; eb := en // Yes, save it. if P(e, en, temp(k/kmax)) > random() then // Should we move to it? s := sn; e := en // Yes, change state. k := k + 1 // One more evaluation donereturn sb // Return the

E() is the objective function neighbour(s) comes from perturbation on s