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CSE 241 Computer Engineering (1) ة س د ن ه ب س حا ل ا ات( 1 ) Lecture # 5 Ch. 3 Instruction Set Architecture & Design
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CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Dec 19, 2015

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Page 1: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

CSE 241

Computer Engineering (1) )1 (اتالحاسب هندسة

Lecture # 5

Ch. 3Instruction Set Architecture & Design

Dr. Tamer Samy GaafarDept. of Computer & Systems Engineering

Page 2: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Course Web Page

http://www.tsgaafar.faculty.zu.edu.eg

—Email: [email protected]

Page 3: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Instruction Set Architecture & Design

Page 4: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Outline

• Machine Instruction Characteristics—Elements of machine instructions, instruction

representation, number of Addresses, … etc.

• Types of Operands—Numbers, characters, logical data

• Types of Operations

Page 5: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Instruction Cycle State Diagram

Page 6: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Instructions• Instruction set

— Complete collection of instructions that are understood by a CPU, i.e., the set of all machine instructions.

—Instructions are represented in a binary form (machine language), or a symbolic form (assembly language).

• Elements of an instruction— Operation code (op code)

– Do this … (e.g., ADD, I/O).

— Source operand reference– To this …

— Result operand reference– Put the answer here …

— Next instruction reference– When you have done that, do this next ...– Usually implicit (from PC).

• Immediate: value.• Main memory: address.• CPU register: register number.

Implicit if one register exists.• I/O device: I/O module & device.

MM address if memory-mapped I/O.

Page 7: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Instruction Representation• Within computer, each Instruction is represented

by a sequence of bits, divided into fields.• During the execution phase, an instruction is read

from the IR register.• CPU extracts the data from these fields to perform

the required operation.• For programmers, a symbolic representation is

used.—Opcodes mnemonics, e.g., ADD, SUB, LOAD.—Operands symbolic names, e.g., Y = 514.—Example: ADD R1, Y

Page 8: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Instruction Types

• Data processing— Arithmetic and logic instructions.— Arithmetic: computations (processing) on

numeric data.— Logic: operate on the bits of a word (any data

type).

• Data storage— Memory instructions.

• Data movement— I/O instructions.

• Program flow control— Test and branch instructions.

Page 9: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Number of Addresses (1)

• What is the maximum number of addresses

would be needed in an instruction?

—“addresses” here means “explicit operand references”.

—Arithmetic & logic instructions would need the most #

of addresses.

— Arithmetic & logic operations are either unary (one

operand) or binary (two operands).

— Two addresses are needed to reference operands.

— One more address to store the result.

— One for next instruction (usually implicit).

— Most instructions are one-, two-, or three-operand.

Page 10: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Program to Execute: Y = (A–B)/(C+D×E)

3-address instructions

2-address instructions

1-address instructions

MPY D, E would alter D

Page 11: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Number of Addresses (2)

• 3 addresses— Operand 1, Operand 2, Result— a = b + c;—Needs very long words to hold everything.

• 2 addresses— One address doubles as operand and result— a = a + b— Reduces length of instruction

Page 12: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Number of Addresses (3)

• 1 address— Implicit second address— Usually a register (accumulator: AC)— Common on early machines

• 0 (zero) addresses— All addresses implicit— Uses a stack

– Last-in-first-out set of locations.– Top of stack.

— e.g. push a— push b — add— pop c— c = a + b

...

Top of stackStack

(Last-in first-out)...

19

...745

3

push 3

Top of stack

pop a

Top of stack

pop bpop c

Top of stack

push 5

5

Page 13: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Types of Operands• Addresses

—A form of data.—Unsigned integers.

• Numbers

• Characters—IRA (ASCII): 7-bit code. An 8th bit may be used for

parity.

• Logical Data—Bit-oriented view of data (true/false).—Store an array of logical data, manipulate bits of a

data item.

Page 14: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Types of Operations

1. Data Movement

2. Arithmetic

3. Logical

4. I/O

5. Transfer of Control (Sequencing)

Page 15: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

1. Data Transfer

• Instruction must specify:—Location of source operand.—Location of destination operand.

• Location of operand and amount of data could be specified as part of opcode or operand fields:

•Memory.•Register.•Top of

stack.

Page 16: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

1. Data Transfer – Common Operations

Page 17: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

1. Data Transfer – CPU Actions

• In terms of CPU action, data transfer operations are perhaps the simplest type.

• If both source and destination are registers:— Issue a command to transfer data from a

register to another, which is completely internal.

• If one or both operands are in memory:—Calculate memory address(es) of operand(s).—Translate adress(es) from virtual to physical.—Check the cache.—If miss, issue a command to the memory

module.

Page 18: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

Types of Operations

1. Data Transfer

2. Arithmetic

3. Logical

4. I/O

5. Transfer of Control

Page 19: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

2. Arithmetic

• Add, Subtract, Multiply, Divide—Signed Integer (fixed-point) numbers—Floating point numbers.

• May include—Increment (a++)—Decrement (a--)—Negate (-a)—Absolute (if a<0 then -a else a)

• May involve data transfer• Desired arithmetic operation is performed

by ALU

Page 20: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

3. Logical – Common Operations

Page 21: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

3. Logical – AND, OR, NOT, XOR, …

• To manipulate individual bits bit twiddling.

• Could be used for bit masking: —Reset a specific group of bits:

– Operation: AND– Mask: 0 for each bit to be reset and 1 otherwise.

—Set a specific group of bits:– Operation: OR– Mask: 1 for each bit to be set and 0 otherwise.

—Toggle a specific group of bits:– Operation: XOR– Mask: 1 for each bit to be inverted and 0 otherwise.

Page 22: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

3. Logical – Shift and Rotate Operations

Logical right shift

Logical left shift

Arithmetic right shift

Arithmetic left shift

Right rotate

Left rotate

Page 23: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

4. Input/Output

• May be done using data movement instructions (memory-mapped).

• May be using specific i/o instructions.• May be done by a separate controller

(DMA).

Page 24: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.

4. Input/Output – Common Operations

Page 25: CSE 241 Computer Engineering (1) هندسة الحاسبات (1) Lecture # 5 Ch. 3 Instruction Set Architecture & Design Dr. Tamer Samy Gaafar Dept. of Computer & Systems.