Copyright © 2003 Texas Instruments. All rights reserved. DSP C5000 Chapter 20 Polyphase FIR Filter Implementation for Communication Systems.

Copyright © 2003 Texas Instruments. All rights reserved.

DSP C5000DSP C5000

Chapter 20Chapter 20

Polyphase FIR Filter Polyphase FIR Filter Implementation Implementation

for Communication Systemsfor Communication Systems


ESIEE, Slide 2

Multirate Processing 1 of 2Multirate Processing 1 of 2 Multirate processing arises in many fields Multirate processing arises in many fields

of digital signal processing:of digital signal processing: Digital audio: sampling frequency conversion Digital audio: sampling frequency conversion

(32 kHz, 44.1kHz, 48kHz), sharp cut-off of FIR (32 kHz, 44.1kHz, 48kHz), sharp cut-off of FIR filter, …filter, …

Signal processing for digital communications: Signal processing for digital communications: symbol rate processing, bit rate processing, symbol rate processing, bit rate processing, sample rate processing, …sample rate processing, …

Speech processing: 3G speech codec (Adaptive Speech processing: 3G speech codec (Adaptive Multi Rate), fractionnal pitch estimation, ...Multi Rate), fractionnal pitch estimation, ...

……


ESIEE, Slide 3

Multirate Processing 2 of 2Multirate Processing 2 of 2 Involves two actions on the digital signal:Involves two actions on the digital signal:

Downsampling: resampling downwards the Downsampling: resampling downwards the digital signal in the digital domain.digital signal in the digital domain.

Upsampling: resampling upwards the digital Upsampling: resampling upwards the digital signal in the digital domain.signal in the digital domain.

MFe Fe/M Retain one sample over Retain one sample over M M and discardand discard

the the M-1M-1 others, every others, every M M samples.samples.

LFe LFe Insert Insert L-1L-1 zeros between each sample zeros between each sample


ESIEE, Slide 4

Downsampling 1 of 2Downsampling 1 of 2

1

1

2)(

1 M

k

nM

kj

enxM

)(1

)()()()( nxM

mMnnxmMxmym

Folding termFolding term

Mx(n) y(m)

else.0

,if)()(

mMnnxmy


ESIEE, Slide 5

Downsampling 2 of 2Downsampling 2 of 2 Anti-aliasing FilterAnti-aliasing Filter

Noble identity for decimationNoble identity for decimation

Mx(n) y(m)H(z)

Fe Fe/M

fc : (Fe/M)/2

MH(zM) M H(z)


ESIEE, Slide 6

Upsampling 1 of 2Upsampling 1 of 2

Lx(m) y(n)

else.0

,if)()(

mLnmxny

L

m

mL

n

n zXzmxznyzY

)()()(


ESIEE, Slide 7

Upsampling 2 of 2Upsampling 2 of 2 Interpolating FilterInterpolating Filter

Noble identity for upsamplingNoble identity for upsampling

Lx(m) y(n)H(z)

LFeFe

fC : (Fe/L)/2

H(z) LH(zL)L


ESIEE, Slide 8

Polyphase Implementation of FIR FiltersPolyphase Implementation of FIR FiltersDecimation Case 1 of 4Decimation Case 1 of 4

MH(z) ME(zM)

1

0

)(mM

n

nznhzH

Let Let n=lM+kn=lM+k

Mk

M

k

k zEzzH

1

0

withwith

1/

0

MN

l

lk zklMhzE


ESIEE, Slide 9


M

E0(zM)

E1(zM)

EM-1(zM)

z-1

z-1

Fe Fe/M

• M-1M-1 filter evaluation over filter evaluation over MM

are discarded.are discarded.

• NN filter length filter length

MH(z)

TimeTime

Processing load (MAC/s)Processing load (MAC/s)

MTMTee

NN


ESIEE, Slide 10


Using noble identityUsing noble identity

M E0(z)

E1(z)

EM-1(z)

z-1

z-1

M

M

Fe Fe/M

TimeTime


MTMTee

NN

• No more useless computations, but one sampling period over No more useless computations, but one sampling period over MM, CPU is , CPU is burdned with burdned with N N MAC/s. MAC/s.


ESIEE, Slide 11

Polyphase Implementation of FIR FiltersPolyphase Implementation of FIR FiltersDecimation Case 4 of 4Decimation Case 4 of 4 Equivalent commutator modelEquivalent commutator model

E0(z)

E1(z)

EM-1(z)

Fe Fe/M• Commutator runs at Commutator runs at FFee,.,. At each input sample only one component is computed and accu- At each input sample only one component is computed and accu-

mulated with the result of the previous one. The result is output when the last componentmulated with the result of the previous one. The result is output when the last component

is reached and accumulator is reset. This spreads the processing load over is reached and accumulator is reset. This spreads the processing load over MTMTee..

TimeTime


MTMTee

N/MN/M


ESIEE, Slide 12

Polyphase Implementation of FIR FiltersPolyphase Implementation of FIR FiltersInterpolation Case 1 of 5Interpolation Case 1 of 5

L H(z) R(zL)L

1

0

)(lL

n

nznhzH

Let Let n=mL+L-1-kn=mL+L-1-k

Lk

L

k

kL zRzzH

1

0

)1( withwith

1/

0

1LN

m

mk zkLmLhzR


ESIEE, Slide 13


L H(z)

LFe

R0(zL)

R1(zL)

RM-1(zL)

z-1

z-1

L

TimeTime


TTee/L/L

NN

• L-1L-1 multiplications by 0 over multiplications by 0 over LL

For each filter evaluation.For each filter evaluation.

• NN filter length. filter length.

Fe


ESIEE, Slide 14


Using noble identityUsing noble identity

R0(z)

R1(z)

RM-1(z)

L

L

L

z-1

z-1

LFeFe

• At each output sampling instant,At each output sampling instant,

only one component is non zeroonly one component is non zero


ESIEE, Slide 15


Equivalent commutator modelEquivalent commutator model

R0(z)

R1(z)

RM-1(z)

Fe LFe

TimeTime


N/LN/L

TTee/L/L

• For each output sampling instant one polyphase component is computed.For each output sampling instant one polyphase component is computed.

When we reach again the first component (When we reach again the first component (M-1)M-1) a new input sample is inputed a new input sample is inputed

in the delay line of each polyphase component.in the delay line of each polyphase component.


ESIEE, Slide 16


Linear Periodically Varying Time system Linear Periodically Varying Time system

hh00

zz-1-1

hhLL hh2L2L

zz-1-1

hh11

zz-1-1

hhL+1L+1 hh2L+12L+1

zz-1-1

hhL-1L-1

zz-1-1

hh2L-12L-1 hh3L-13L-1

zz-1-1

zz-1-1 zz-1-1

hh00

hh11

hhL-1L-1

hhLL

hhL+1L+1

hh2L-12L-1

hh2L+12L+1

hh3L-13L-1

hh2L2L


ESIEE, Slide 17

Case StudyCase Study

Shaping filters for a QPSK modem :Shaping filters for a QPSK modem : Emitter: interpolation case.Emitter: interpolation case. Receiver: decimation caseReceiver: decimation case

Efficient Algorithm Implementation :Efficient Algorithm Implementation : Good ordering of computations,Good ordering of computations, Efficient memory organization and management.Efficient memory organization and management.


ESIEE, Slide 18

Emitter 1 of 4Emitter 1 of 4

bits

Ak

Bk

: Phasecomputation

Cos()

Sin()

QPSK modulatorRCF

RCF

DAC

DAC

Fs Fe

Fb

BitBit

frequencyfrequency

SymbolSymbol

frequencyfrequencySampleSample

frequencyfrequency

s(t)=1/2[cos(2fot).cos((Ak,Bk))-sin(2fot).sin((Ak,Bk))]s(t)=1/2[cos(2fot).cos((Ak,Bk))-sin(2fot).sin((Ak,Bk))]


ESIEE, Slide 19

Emitter 2 of 4Emitter 2 of 4

Let FLet Fee=16F=16Fs s (16 sample / symbol)(16 sample / symbol) Define a raised cosine filter with:Define a raised cosine filter with:

6 symbols length.6 symbols length. Roll_off : 0.5Roll_off : 0.5

Matlab commandMatlab command h=RCOSFIR(0.5,3,16,1);h=RCOSFIR(0.5,3,16,1);

• In red: ideal interpolating filterIn red: ideal interpolating filter

• In blue: actual RC filterIn blue: actual RC filter

16 H(z)

Equivalent systemEquivalent system


ESIEE, Slide 20

Emitter 3 of 4Emitter 3 of 4 The 16 Polyphase filters are defined by :The 16 Polyphase filters are defined by :

1/

0

1LN

m

mk zkLmLhzR

With With NN=112 and =112 and L=16L=16

96,80,64,48,32,16,0

110,94,78,62,46,30,14

111,95,79,63,47,31,15

15

1

0

hhhhhhhmr

hhhhhhhmr

hhhhhhhmr

Filter length is 97, impulse response is padded with 0 to reach 112=7*16Filter length is 97, impulse response is padded with 0 to reach 112=7*16


ESIEE, Slide 21

Emitter 4 of 4Emitter 4 of 4h(0)h(16)h(32)h(48)h(64)h(80)h(96)

h(1)h(17)h(33)h(49)h(65)h(81)h(97)

h(15)h(31)h(47)h(63)h(79)h(95)h(111)

CoefficientsCoefficients

x(0)x(1)x(2)x(3)x(4)x(5)x(6)

SymbolsSymbols

1515thth sample sample

11stst sample sample22ndnd sample sample

When coefficient pointer reaches this address a newWhen coefficient pointer reaches this address a new

symbol will be input at the next output sample periodsymbol will be input at the next output sample period

R=flipud(reshape(h,8,12));

R=round(R*2^15);

fid=fopen('coef.inc','wt');

for p=1:8

fprintf(fid,'\t.word\t%d\n,R(p,:))

end

fclose(fid);

Shuffle coefficientsShuffle coefficients


ESIEE, Slide 22

Emitter (C callable)Emitter (C callable).sect.sect "coefs2""coefs2"

NcompNcomp .set.set 1616 ;number of polyphase component;number of polyphase component

coefs2coefs2 .include .include "coefpoly2.inc""coefpoly2.inc"

coefsfin:coefsfin:

coefsize coefsize .set coefsfin-coefs2.set coefsfin-coefs2

LfilLfil .set.set coefsize/Ncompcoefsize/Ncomp ;polyphase component length;polyphase component length

filbufQfilbufQ .usect.usect "filtre2",Lfil"filtre2",Lfil ;data buffer;data buffer

.text.text

_firinit:_firinit:

STST #coefs2,*(adbufQ)#coefs2,*(adbufQ) ;pointer to current coefs pointer;pointer to current coefs pointer

STMSTM #filbufQ,AR2#filbufQ,AR2 ;zeroed initial buffer condition;zeroed initial buffer condition

RPTRPT #Lfil-1#Lfil-1

STLSTL A,*AR2+A,*AR2+

RETRET


ESIEE, Slide 23

_firTxQ:…_firTxQ:… ;context save;context save

LDLD #var,DP#var,DP

STMSTM #coefsize,BK#coefsize,BK

MVDMMVDM adbufQ,AR2adbufQ,AR2 ;current coefs pointer;current coefs pointer

STMSTM #1,AR0#1,AR0

STMSTM #filbufQ,AR3#filbufQ,AR3 ;symbol buffer;symbol buffer

STLSTL A,*AR3A,*AR3 ;new sample (guess hold during 16 samples);new sample (guess hold during 16 samples)

RPTZRPTZ A,#Lfil-1A,#Lfil-1 ;compute one polyphase component;compute one polyphase component

MACMAC *AR2+0%,*AR3+,A*AR2+0%,*AR3+,A

MVMDMVMD AR2,adbufQAR2,adbufQ ;save new current coefs pointer;save new current coefs pointer

SFTASFTA A,-16A,-16

SFTASFTA A,-1A,-1 ;output of RCF can be greater than 1 !;output of RCF can be greater than 1 !

CMPMCMPM @adbufQ,#coefs2@adbufQ,#coefs2 ;test if delay symbols is needed;test if delay symbols is needed

BCBC endTxQ,NTCendTxQ,NTC ;jump if not necessary;jump if not necessary

MARMAR *+AR3(-2)*+AR3(-2)

RPTRPT #Lfil-2#Lfil-2

DELAYDELAY *AR3-*AR3-

endTxQ:endTxQ:

…… ;context restore;context restore

RETRET


ESIEE, Slide 24

Symbol vs Sample OutputSymbol vs Sample Output

FFee: 16 khz: 16 khz

FFss: 1 khz: 1 khz

constant for each symbolconstant for each symbol

f= Ff= Fss/8=125 Hz/8=125 Hz

Symbol outputSymbol output Sample outputSample output


ESIEE, Slide 25

Receiver 1 of 2Receiver 1 of 2

Fb

ADC

ADC

RCF

RCF

Fe Fs

Bit Bit

processingprocessing

SymbolSymbol

processingprocessing


ESIEE, Slide 26

Receiver 2 of 2Receiver 2 of 2 Receiver structure is quite similar, except Receiver structure is quite similar, except

that:that: Each polyphase component has its own delay tapEach polyphase component has its own delay tap Each polyphase output has to be accumulated for Each polyphase output has to be accumulated for M M

polyphase computations and accumulator is outputed polyphase computations and accumulator is outputed every every MM input sample and reset. input sample and reset.

E0(z)

E1(z)

EM-1(z)


ESIEE, Slide 27

Follow on ActivitiesFollow on Activities Laboratory 10 for the TMS320C5416 DSKLaboratory 10 for the TMS320C5416 DSK

Illustrates the effects of decimation and anti-Illustrates the effects of decimation and anti-aliasing filters.aliasing filters.

Laboratory 11 for the TMS320C5416 DSKLaboratory 11 for the TMS320C5416 DSK Illustrates the effects of interpolation and anti-Illustrates the effects of interpolation and anti-

imaging filters.imaging filters.

Application 9 for the TMS320C5416 DSKApplication 9 for the TMS320C5416 DSK Uses interpolation and decimation to produce Uses interpolation and decimation to produce

sharper cut-offs FIRs than would be obtained sharper cut-offs FIRs than would be obtained otherwise.otherwise.


ESIEE, Slide 28

ReferenceReference

Digital Signal Processing a Practical Digital Signal Processing a Practical Approach by Emmanuel C. Ifeachor Approach by Emmanuel C. Ifeachor and Barrie W. Jervis. and Barrie W. Jervis. Chapter 9. Multirate Chapter 9. Multirate digital signal processing.digital signal processing.

Copyright © 2003 Texas Instruments. All rights reserved. DSP C5000 Chapter 20 Polyphase FIR Filter Implementation for Communication Systems.

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