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• Active-clamp circuit can be added to any single switch in a PWM converter
M i it h l ili it h b h ( l d d) ZVS QSW • Main switch plus auxiliary switch behave as an (unloaded) ZVS-QSW converter resulting in zero-voltage transitions
• Can be viewed as a lossless voltage-clamp snubber that employs a auxiliary
c rrent bidirectional s itchcurrent-bidirectional switch
• Operation (resonant transitions) similar to ZVS-QSW operation
• Can be added to the transistor in any PWM converter• Can be added to the transistor in any PWM converter
• Not only adds ZVS to forward converter, but also resets transformer better,
leading to better transistor utilization than conventional reset circuitg
ECEN 58177
The conventional forward converter
• Max vds = 2Vg + ringing
Li it d t D 0 5• Limited to D < 0.5
• On-state transistor current is P/DVg
• Magnetizing current must operate in DCM
• Peak transistor voltage occurs during transformer reset
ECEN 58178
• Could reset the transformer with less voltage if interval 3 were reduced
The active-clamp forward converter
• Better transistor/transformer
tili tiutilization
• ZVS
• Not limited to D < 0.50 5
Transistors are driven in usual half-bridge manner, similar to 2-switch ZVS-QSW:
ECEN 58179
Approximate analysis:ignore resonant transitions, dead times, and resonant elements
ECEN 581710
Charge balance
Vb can be viewed as a flyback converter output. By use of a current-bidirectional switch, there is no DCM, and LM operates in CCM
ECEN 581711
Similar to an unloaded two-switch ZVS-QSW converter
Peak transistor voltage
• Max vds = Vg + Vb = Vg /D’
which is less than the conventional value of 2 Vg when D > 0.5
• This can be used to considerable advantage: improved transistor g p
and transformer utilization
• Design example:270 V ≤ Vg ≤ 350 Vmax Pload = P = 200 W
Compare designs using conventional 1:1 reset winding and Compare designs using conventional 1:1 reset winding and using active clamp circuit
ECEN 581712
Conventional case
Peak v = 2V + ringingPeak vds = 2Vg + ringing= 700 V + ringing
Let’s let max D = 0.5 (at Vg = 270 V), which is optimistic
Then min D (at Vg = 350 V) is(0 )(2 0)/(3 0) 0 38 (0.5)(270)/(350) = 0.3857
The on-state transistor current, neglecting ripple, is given by ig = DnI = Diq-on g q-on
with P = 200 W = Vg ig = DVg iq-on
So iq-on = P/DVg = (200W) / (0.5)(270 V) = 1.5 A
ECEN 581713
Active clamp case:scenario #1
Suppose we choose the same turns ratio as in the conventional design. Then the converter operates with the same range of duty cycles, and the on-state transistor
i h h i l i l / ’ d i d dcurrent is the same. But the transistor voltage is equal to Vg / D’, and is reduced:
At Vg = 270 V: D = 0.5 peak vds = 540 VAt Vg = 350 V: D = 0.3857 peak vds = 570 V
which is considerably less than 700 V
ECEN 581714
Active clamp case:scenario #2
Suppose we operate at a higher duty cycle, say, D = 0.5 at Vg = 350 V. Then the transistor voltage is equal to Vg / D’, and is similar to the conventional design
d di iunder worst-case conditions:
At Vg = 270 V: D = 0.648 peak vds = 767 VAt Vg = 350 V: D = 0.5 peak vds = 700 V
But we can now use a lower turns ratio that leads to lower reflected current in Q1:iq-on = P/DVg = (200W) / (0.5)(350 V) = 1.15 A
Conclusion: the active clamp circuit resets the forward converter transformerConclusion: the active clamp circuit resets the forward converter transformer better. The designer can use this fact to better optimize the converter, by reducing the transistor blocking voltage or on-state current.
ECEN 581715
Active clamp forward converteranalysis of operating waveforms and characteristics